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669a5db4 JG |
1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer | |
3 | * (C) 2005 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * based in part upon | |
7 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 | |
8 | * | |
9 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer | |
10 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
11 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
12 | * | |
13 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
14 | * May be copied or modified under the terms of the GNU General Public License | |
15 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | |
16 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | |
17 | * | |
18 | * Documentation | |
19 | * Chipset documentation available under NDA only | |
20 | * | |
21 | * TODO/CHECK | |
22 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but | |
23 | * otherwise should do atapi DMA. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/blkdev.h> | |
31 | #include <linux/delay.h> | |
32 | #include <scsi/scsi_host.h> | |
33 | #include <linux/libata.h> | |
34 | #include <linux/dmi.h> | |
35 | ||
36 | #define DRV_NAME "pata_ali" | |
2a3103ce | 37 | #define DRV_VERSION "0.7.5" |
669a5db4 | 38 | |
1892225f | 39 | static int ali_atapi_dma = 0; |
8243e636 TH |
40 | module_param_named(atapi_dma, ali_atapi_dma, int, 0644); |
41 | MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); | |
42 | ||
669a5db4 JG |
43 | /* |
44 | * Cable special cases | |
45 | */ | |
46 | ||
1855256c | 47 | static const struct dmi_system_id cable_dmi_table[] = { |
669a5db4 JG |
48 | { |
49 | .ident = "HP Pavilion N5430", | |
50 | .matches = { | |
51 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
5c8d5201 | 52 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
669a5db4 JG |
53 | }, |
54 | }, | |
03e6f489 DE |
55 | { |
56 | .ident = "Toshiba Satelite S1800-814", | |
57 | .matches = { | |
58 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
59 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
60 | }, | |
61 | }, | |
669a5db4 JG |
62 | { } |
63 | }; | |
64 | ||
65 | static int ali_cable_override(struct pci_dev *pdev) | |
66 | { | |
67 | /* Fujitsu P2000 */ | |
68 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) | |
69 | return 1; | |
8f59a13a | 70 | /* Mitac 8317 (Winbook-A) and relatives */ |
11b7becc | 71 | if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) |
8f59a13a | 72 | return 1; |
669a5db4 JG |
73 | /* Systems by DMI */ |
74 | if (dmi_check_system(cable_dmi_table)) | |
75 | return 1; | |
76 | return 0; | |
77 | } | |
78 | ||
79 | /** | |
80 | * ali_c2_cable_detect - cable detection | |
81 | * @ap: ATA port | |
82 | * | |
83 | * Perform cable detection for C2 and later revisions | |
84 | */ | |
85 | ||
86 | static int ali_c2_cable_detect(struct ata_port *ap) | |
87 | { | |
88 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
89 | u8 ata66; | |
90 | ||
91 | /* Certain laptops use short but suitable cables and don't | |
92 | implement the detect logic */ | |
93 | ||
94 | if (ali_cable_override(pdev)) | |
fc085150 | 95 | return ATA_CBL_PATA40_SHORT; |
669a5db4 JG |
96 | |
97 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary | |
98 | Bit set for 40 pin */ | |
99 | pci_read_config_byte(pdev, 0x4A, &ata66); | |
100 | if (ata66 & (1 << ap->port_no)) | |
101 | return ATA_CBL_PATA40; | |
102 | else | |
103 | return ATA_CBL_PATA80; | |
104 | } | |
105 | ||
669a5db4 JG |
106 | /** |
107 | * ali_20_filter - filter for earlier ALI DMA | |
108 | * @ap: ALi ATA port | |
109 | * @adev: attached device | |
110 | * | |
111 | * Ensure that we do not do DMA on CD devices. We may be able to | |
112 | * fix that later on. Also ensure we do not do UDMA on WDC drives | |
113 | */ | |
114 | ||
a76b62ca | 115 | static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) |
669a5db4 | 116 | { |
8bfa79fc | 117 | char model_num[ATA_ID_PROD_LEN + 1]; |
669a5db4 JG |
118 | /* No DMA on anything but a disk for now */ |
119 | if (adev->class != ATA_DEV_ATA) | |
120 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
8bfa79fc | 121 | ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
669a5db4 JG |
122 | if (strstr(model_num, "WDC")) |
123 | return mask &= ~ATA_MASK_UDMA; | |
a76b62ca | 124 | return ata_pci_default_filter(adev, mask); |
669a5db4 JG |
125 | } |
126 | ||
127 | /** | |
128 | * ali_fifo_control - FIFO manager | |
129 | * @ap: ALi channel to control | |
130 | * @adev: device for FIFO control | |
131 | * @on: 0 for off 1 for on | |
132 | * | |
133 | * Enable or disable the FIFO on a given device. Because of the way the | |
134 | * ALi FIFO works it provides a boost on ATA disk but can be confused by | |
135 | * ATAPI and we must therefore manage it. | |
136 | */ | |
137 | ||
138 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) | |
139 | { | |
140 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
141 | int pio_fifo = 0x54 + ap->port_no; | |
142 | u8 fifo; | |
143 | int shift = 4 * adev->devno; | |
144 | ||
145 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | |
146 | 0x00. Not all the docs agree but the behaviour we now use is the | |
147 | one stated in the BIOS Programming Guide */ | |
85cd7251 | 148 | |
669a5db4 JG |
149 | pci_read_config_byte(pdev, pio_fifo, &fifo); |
150 | fifo &= ~(0x0F << shift); | |
151 | if (on) | |
152 | fifo |= (on << shift); | |
153 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
154 | } | |
155 | ||
156 | /** | |
157 | * ali_program_modes - load mode registers | |
158 | * @ap: ALi channel to load | |
159 | * @adev: Device the timing is for | |
160 | * @cmd: Command timing | |
161 | * @data: Data timing | |
162 | * @ultra: UDMA timing or zero for off | |
163 | * | |
164 | * Loads the timing registers for cmd/data and disable UDMA if | |
165 | * ultra is zero. If ultra is set then load and enable the UDMA | |
166 | * timing but do not touch the command/data timing. | |
167 | */ | |
168 | ||
169 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) | |
170 | { | |
171 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
172 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ | |
173 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ | |
174 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ | |
175 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ | |
176 | int shift = 4 * adev->devno; | |
177 | u8 udma; | |
178 | ||
179 | if (t != NULL) { | |
180 | t->setup = FIT(t->setup, 1, 8) & 7; | |
181 | t->act8b = FIT(t->act8b, 1, 8) & 7; | |
182 | t->rec8b = FIT(t->rec8b, 1, 16) & 15; | |
183 | t->active = FIT(t->active, 1, 8) & 7; | |
184 | t->recover = FIT(t->recover, 1, 16) & 15; | |
185 | ||
186 | pci_write_config_byte(pdev, cas, t->setup); | |
187 | pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); | |
188 | pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); | |
189 | } | |
190 | ||
191 | /* Set up the UDMA enable */ | |
192 | pci_read_config_byte(pdev, udmat, &udma); | |
193 | udma &= ~(0x0F << shift); | |
194 | udma |= ultra << shift; | |
195 | pci_write_config_byte(pdev, udmat, udma); | |
196 | } | |
197 | ||
198 | /** | |
199 | * ali_set_piomode - set initial PIO mode data | |
200 | * @ap: ATA interface | |
201 | * @adev: ATA device | |
202 | * | |
203 | * Program the ALi registers for PIO mode. FIXME: add timings for | |
204 | * PIO5. | |
205 | */ | |
206 | ||
207 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
208 | { | |
209 | struct ata_device *pair = ata_dev_pair(adev); | |
210 | struct ata_timing t; | |
211 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
212 | ||
213 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); | |
214 | if (pair) { | |
215 | struct ata_timing p; | |
216 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
217 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
218 | if (pair->dma_mode) { | |
219 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
220 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
221 | } | |
222 | } | |
223 | ||
224 | /* PIO FIFO is only permitted on ATA disk */ | |
225 | if (adev->class != ATA_DEV_ATA) | |
226 | ali_fifo_control(ap, adev, 0x00); | |
227 | ali_program_modes(ap, adev, &t, 0); | |
228 | if (adev->class == ATA_DEV_ATA) | |
229 | ali_fifo_control(ap, adev, 0x05); | |
230 | ||
231 | } | |
232 | ||
233 | /** | |
234 | * ali_set_dmamode - set initial DMA mode data | |
235 | * @ap: ATA interface | |
236 | * @adev: ATA device | |
237 | * | |
238 | * FIXME: MWDMA timings | |
239 | */ | |
240 | ||
241 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
242 | { | |
243 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; | |
244 | struct ata_device *pair = ata_dev_pair(adev); | |
245 | struct ata_timing t; | |
246 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
247 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
248 | ||
249 | ||
250 | if (adev->class == ATA_DEV_ATA) | |
251 | ali_fifo_control(ap, adev, 0x08); | |
252 | ||
253 | if (adev->dma_mode >= XFER_UDMA_0) { | |
254 | ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); | |
255 | if (adev->dma_mode >= XFER_UDMA_3) { | |
256 | u8 reg4b; | |
257 | pci_read_config_byte(pdev, 0x4B, ®4b); | |
258 | reg4b |= 1; | |
259 | pci_write_config_byte(pdev, 0x4B, reg4b); | |
260 | } | |
261 | } else { | |
262 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); | |
263 | if (pair) { | |
264 | struct ata_timing p; | |
265 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
266 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
267 | if (pair->dma_mode) { | |
268 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
269 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
270 | } | |
271 | } | |
272 | ali_program_modes(ap, adev, &t, 0); | |
273 | } | |
274 | } | |
275 | ||
8243e636 TH |
276 | /** |
277 | * ali_warn_atapi_dma - Warn about ATAPI DMA disablement | |
278 | * @adev: Device | |
279 | * | |
280 | * Whine about ATAPI DMA disablement if @adev is an ATAPI device. | |
281 | * Can be used as ->dev_config. | |
282 | */ | |
283 | ||
284 | static void ali_warn_atapi_dma(struct ata_device *adev) | |
285 | { | |
286 | struct ata_eh_context *ehc = &adev->link->eh_context; | |
287 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; | |
288 | ||
289 | if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { | |
290 | ata_dev_printk(adev, KERN_WARNING, | |
291 | "WARNING: ATAPI DMA disabled for reliablity issues. It can be enabled\n"); | |
292 | ata_dev_printk(adev, KERN_WARNING, | |
293 | "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n"); | |
294 | } | |
295 | } | |
296 | ||
669a5db4 JG |
297 | /** |
298 | * ali_lock_sectors - Keep older devices to 255 sector mode | |
669a5db4 JG |
299 | * @adev: Device |
300 | * | |
301 | * Called during the bus probe for each device that is found. We use | |
302 | * this call to lock the sector count of the device to 255 or less on | |
303 | * older ALi controllers. If we didn't do this then large I/O's would | |
304 | * require LBA48 commands which the older ALi requires are issued by | |
305 | * slower PIO methods | |
306 | */ | |
307 | ||
cd0d3bbc | 308 | static void ali_lock_sectors(struct ata_device *adev) |
669a5db4 JG |
309 | { |
310 | adev->max_sectors = 255; | |
8243e636 | 311 | ali_warn_atapi_dma(adev); |
669a5db4 JG |
312 | } |
313 | ||
498222f3 AC |
314 | /** |
315 | * ali_check_atapi_dma - DMA check for most ALi controllers | |
316 | * @adev: Device | |
317 | * | |
318 | * Called to decide whether commands should be sent by DMA or PIO | |
319 | */ | |
2541d0ca | 320 | |
498222f3 AC |
321 | static int ali_check_atapi_dma(struct ata_queued_cmd *qc) |
322 | { | |
8243e636 TH |
323 | if (!ali_atapi_dma) { |
324 | /* FIXME: pata_ali can't do ATAPI DMA reliably but the | |
325 | * IDE alim15x3 driver can. I tried lots of things | |
326 | * but couldn't find what the actual difference was. | |
327 | * If you got an idea, please write it to | |
328 | * linux-ide@vger.kernel.org and cc htejun@gmail.com. | |
329 | * | |
330 | * Disable ATAPI DMA for now. | |
331 | */ | |
332 | return -EOPNOTSUPP; | |
333 | } | |
334 | ||
498222f3 | 335 | /* If its not a media command, its not worth it */ |
4a38e733 | 336 | if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC) |
498222f3 AC |
337 | return -EOPNOTSUPP; |
338 | return 0; | |
339 | } | |
340 | ||
669a5db4 JG |
341 | static struct scsi_host_template ali_sht = { |
342 | .module = THIS_MODULE, | |
343 | .name = DRV_NAME, | |
344 | .ioctl = ata_scsi_ioctl, | |
345 | .queuecommand = ata_scsi_queuecmd, | |
346 | .can_queue = ATA_DEF_QUEUE, | |
347 | .this_id = ATA_SHT_THIS_ID, | |
348 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
349 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
350 | .emulated = ATA_SHT_EMULATED, | |
351 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
352 | .proc_name = DRV_NAME, | |
353 | .dma_boundary = ATA_DMA_BOUNDARY, | |
354 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 355 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
356 | .bios_param = ata_std_bios_param, |
357 | }; | |
358 | ||
359 | /* | |
360 | * Port operations for PIO only ALi | |
361 | */ | |
362 | ||
363 | static struct ata_port_operations ali_early_port_ops = { | |
669a5db4 JG |
364 | .set_piomode = ali_set_piomode, |
365 | .tf_load = ata_tf_load, | |
366 | .tf_read = ata_tf_read, | |
367 | .check_status = ata_check_status, | |
368 | .exec_command = ata_exec_command, | |
369 | .dev_select = ata_std_dev_select, | |
370 | ||
371 | .freeze = ata_bmdma_freeze, | |
372 | .thaw = ata_bmdma_thaw, | |
b723d144 | 373 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 374 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 375 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
376 | |
377 | .qc_prep = ata_qc_prep, | |
378 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 379 | |
0d5ff566 | 380 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
381 | |
382 | .irq_handler = ata_interrupt, | |
383 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 384 | .irq_on = ata_irq_on, |
669a5db4 | 385 | |
81ad1837 | 386 | .port_start = ata_sff_port_start, |
669a5db4 JG |
387 | }; |
388 | ||
389 | /* | |
390 | * Port operations for DMA capable ALi without cable | |
391 | * detect | |
392 | */ | |
393 | static struct ata_port_operations ali_20_port_ops = { | |
669a5db4 JG |
394 | .set_piomode = ali_set_piomode, |
395 | .set_dmamode = ali_set_dmamode, | |
396 | .mode_filter = ali_20_filter, | |
397 | ||
398 | .tf_load = ata_tf_load, | |
399 | .tf_read = ata_tf_read, | |
8243e636 | 400 | .check_atapi_dma = ali_check_atapi_dma, |
669a5db4 JG |
401 | .check_status = ata_check_status, |
402 | .exec_command = ata_exec_command, | |
403 | .dev_select = ata_std_dev_select, | |
404 | .dev_config = ali_lock_sectors, | |
405 | ||
406 | .freeze = ata_bmdma_freeze, | |
407 | .thaw = ata_bmdma_thaw, | |
b723d144 | 408 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 409 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 410 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
411 | |
412 | .bmdma_setup = ata_bmdma_setup, | |
413 | .bmdma_start = ata_bmdma_start, | |
414 | .bmdma_stop = ata_bmdma_stop, | |
415 | .bmdma_status = ata_bmdma_status, | |
416 | ||
417 | .qc_prep = ata_qc_prep, | |
418 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 419 | |
0d5ff566 | 420 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
421 | |
422 | .irq_handler = ata_interrupt, | |
423 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 424 | .irq_on = ata_irq_on, |
669a5db4 | 425 | |
81ad1837 | 426 | .port_start = ata_sff_port_start, |
669a5db4 JG |
427 | }; |
428 | ||
429 | /* | |
430 | * Port operations for DMA capable ALi with cable detect | |
431 | */ | |
432 | static struct ata_port_operations ali_c2_port_ops = { | |
669a5db4 JG |
433 | .set_piomode = ali_set_piomode, |
434 | .set_dmamode = ali_set_dmamode, | |
435 | .mode_filter = ata_pci_default_filter, | |
436 | .tf_load = ata_tf_load, | |
437 | .tf_read = ata_tf_read, | |
498222f3 | 438 | .check_atapi_dma = ali_check_atapi_dma, |
669a5db4 JG |
439 | .check_status = ata_check_status, |
440 | .exec_command = ata_exec_command, | |
441 | .dev_select = ata_std_dev_select, | |
442 | .dev_config = ali_lock_sectors, | |
443 | ||
444 | .freeze = ata_bmdma_freeze, | |
445 | .thaw = ata_bmdma_thaw, | |
b723d144 | 446 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 447 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 448 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
449 | |
450 | .bmdma_setup = ata_bmdma_setup, | |
451 | .bmdma_start = ata_bmdma_start, | |
452 | .bmdma_stop = ata_bmdma_stop, | |
453 | .bmdma_status = ata_bmdma_status, | |
454 | ||
455 | .qc_prep = ata_qc_prep, | |
456 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 457 | |
0d5ff566 | 458 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
459 | |
460 | .irq_handler = ata_interrupt, | |
461 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 462 | .irq_on = ata_irq_on, |
669a5db4 | 463 | |
81ad1837 | 464 | .port_start = ata_sff_port_start, |
669a5db4 JG |
465 | }; |
466 | ||
467 | /* | |
468 | * Port operations for DMA capable ALi with cable detect and LBA48 | |
469 | */ | |
470 | static struct ata_port_operations ali_c5_port_ops = { | |
669a5db4 JG |
471 | .set_piomode = ali_set_piomode, |
472 | .set_dmamode = ali_set_dmamode, | |
473 | .mode_filter = ata_pci_default_filter, | |
474 | .tf_load = ata_tf_load, | |
475 | .tf_read = ata_tf_read, | |
498222f3 | 476 | .check_atapi_dma = ali_check_atapi_dma, |
669a5db4 JG |
477 | .check_status = ata_check_status, |
478 | .exec_command = ata_exec_command, | |
479 | .dev_select = ata_std_dev_select, | |
8243e636 | 480 | .dev_config = ali_warn_atapi_dma, |
669a5db4 JG |
481 | |
482 | .freeze = ata_bmdma_freeze, | |
483 | .thaw = ata_bmdma_thaw, | |
b723d144 | 484 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 485 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 486 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
487 | |
488 | .bmdma_setup = ata_bmdma_setup, | |
489 | .bmdma_start = ata_bmdma_start, | |
490 | .bmdma_stop = ata_bmdma_stop, | |
491 | .bmdma_status = ata_bmdma_status, | |
492 | ||
493 | .qc_prep = ata_qc_prep, | |
494 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 495 | |
0d5ff566 | 496 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
497 | |
498 | .irq_handler = ata_interrupt, | |
499 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 500 | .irq_on = ata_irq_on, |
669a5db4 | 501 | |
81ad1837 | 502 | .port_start = ata_sff_port_start, |
669a5db4 JG |
503 | }; |
504 | ||
34d8dfb1 A |
505 | |
506 | /** | |
507 | * ali_init_chipset - chip setup function | |
508 | * @pdev: PCI device of ATA controller | |
509 | * | |
510 | * Perform the setup on the device that must be done both at boot | |
511 | * and at resume time. | |
512 | */ | |
f20b16ff | 513 | |
34d8dfb1 A |
514 | static void ali_init_chipset(struct pci_dev *pdev) |
515 | { | |
44c10138 | 516 | u8 tmp; |
34d8dfb1 A |
517 | struct pci_dev *north, *isa_bridge; |
518 | ||
34d8dfb1 A |
519 | /* |
520 | * The chipset revision selects the driver operations and | |
521 | * mode data. | |
522 | */ | |
523 | ||
44c10138 | 524 | if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
525 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ |
526 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
527 | /* Clear CD-ROM DMA write bit */ | |
528 | tmp &= 0x7F; | |
529 | pci_write_config_byte(pdev, 0x4B, tmp); | |
44c10138 | 530 | } else if (pdev->revision >= 0xC2) { |
34d8dfb1 A |
531 | /* Enable cable detection logic */ |
532 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
533 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | |
534 | } | |
8e42a5a2 | 535 | north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
34d8dfb1 A |
536 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
537 | ||
538 | if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { | |
539 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. | |
540 | Set the south bridge enable bit */ | |
541 | pci_read_config_byte(isa_bridge, 0x79, &tmp); | |
44c10138 | 542 | if (pdev->revision == 0xC2) |
34d8dfb1 | 543 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); |
44c10138 | 544 | else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) |
34d8dfb1 A |
545 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); |
546 | } | |
44c10138 | 547 | if (pdev->revision >= 0x20) { |
34d8dfb1 A |
548 | /* |
549 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | |
550 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | |
551 | * via 0x54/55. | |
552 | */ | |
553 | pci_read_config_byte(pdev, 0x53, &tmp); | |
44c10138 | 554 | if (pdev->revision <= 0x20) |
34d8dfb1 | 555 | tmp &= ~0x02; |
44c10138 | 556 | if (pdev->revision >= 0xc7) |
34d8dfb1 A |
557 | tmp |= 0x03; |
558 | else | |
559 | tmp |= 0x01; /* CD_ROM enable for DMA */ | |
560 | pci_write_config_byte(pdev, 0x53, tmp); | |
561 | } | |
562 | pci_dev_put(isa_bridge); | |
563 | pci_dev_put(north); | |
564 | ata_pci_clear_simplex(pdev); | |
565 | } | |
669a5db4 JG |
566 | /** |
567 | * ali_init_one - discovery callback | |
568 | * @pdev: PCI device ID | |
569 | * @id: PCI table info | |
570 | * | |
571 | * An ALi IDE interface has been discovered. Figure out what revision | |
572 | * and perform configuration work before handing it to the ATA layer | |
573 | */ | |
574 | ||
575 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
576 | { | |
1626aeb8 | 577 | static const struct ata_port_info info_early = { |
669a5db4 | 578 | .sht = &ali_sht, |
1d2808fd | 579 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
580 | .pio_mask = 0x1f, |
581 | .port_ops = &ali_early_port_ops | |
582 | }; | |
583 | /* Revision 0x20 added DMA */ | |
1626aeb8 | 584 | static const struct ata_port_info info_20 = { |
669a5db4 | 585 | .sht = &ali_sht, |
1d2808fd | 586 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
587 | .pio_mask = 0x1f, |
588 | .mwdma_mask = 0x07, | |
589 | .port_ops = &ali_20_port_ops | |
590 | }; | |
591 | /* Revision 0x20 with support logic added UDMA */ | |
1626aeb8 | 592 | static const struct ata_port_info info_20_udma = { |
669a5db4 | 593 | .sht = &ali_sht, |
1d2808fd | 594 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 | 595 | .pio_mask = 0x1f, |
85cd7251 | 596 | .mwdma_mask = 0x07, |
669a5db4 JG |
597 | .udma_mask = 0x07, /* UDMA33 */ |
598 | .port_ops = &ali_20_port_ops | |
599 | }; | |
600 | /* Revision 0xC2 adds UDMA66 */ | |
1626aeb8 | 601 | static const struct ata_port_info info_c2 = { |
669a5db4 | 602 | .sht = &ali_sht, |
1d2808fd | 603 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
604 | .pio_mask = 0x1f, |
605 | .mwdma_mask = 0x07, | |
bf6263a8 | 606 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
607 | .port_ops = &ali_c2_port_ops |
608 | }; | |
ee581502 | 609 | /* Revision 0xC3 is UDMA66 for now */ |
1626aeb8 | 610 | static const struct ata_port_info info_c3 = { |
669a5db4 | 611 | .sht = &ali_sht, |
1d2808fd | 612 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
613 | .pio_mask = 0x1f, |
614 | .mwdma_mask = 0x07, | |
bf6263a8 | 615 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
616 | .port_ops = &ali_c2_port_ops |
617 | }; | |
ee581502 | 618 | /* Revision 0xC4 is UDMA100 */ |
1626aeb8 | 619 | static const struct ata_port_info info_c4 = { |
669a5db4 | 620 | .sht = &ali_sht, |
1d2808fd | 621 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
622 | .pio_mask = 0x1f, |
623 | .mwdma_mask = 0x07, | |
bf6263a8 | 624 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
625 | .port_ops = &ali_c2_port_ops |
626 | }; | |
627 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ | |
1626aeb8 | 628 | static const struct ata_port_info info_c5 = { |
669a5db4 | 629 | .sht = &ali_sht, |
1d2808fd | 630 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
631 | .pio_mask = 0x1f, |
632 | .mwdma_mask = 0x07, | |
bf6263a8 | 633 | .udma_mask = ATA_UDMA6, |
669a5db4 JG |
634 | .port_ops = &ali_c5_port_ops |
635 | }; | |
636 | ||
1626aeb8 | 637 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
44c10138 | 638 | u8 tmp; |
34d8dfb1 | 639 | struct pci_dev *isa_bridge; |
f08048e9 TH |
640 | int rc; |
641 | ||
642 | rc = pcim_enable_device(pdev); | |
643 | if (rc) | |
644 | return rc; | |
669a5db4 | 645 | |
669a5db4 JG |
646 | /* |
647 | * The chipset revision selects the driver operations and | |
648 | * mode data. | |
649 | */ | |
650 | ||
44c10138 | 651 | if (pdev->revision < 0x20) { |
1626aeb8 | 652 | ppi[0] = &info_early; |
44c10138 | 653 | } else if (pdev->revision < 0xC2) { |
1626aeb8 | 654 | ppi[0] = &info_20; |
44c10138 | 655 | } else if (pdev->revision == 0xC2) { |
1626aeb8 | 656 | ppi[0] = &info_c2; |
44c10138 | 657 | } else if (pdev->revision == 0xC3) { |
1626aeb8 | 658 | ppi[0] = &info_c3; |
44c10138 | 659 | } else if (pdev->revision == 0xC4) { |
1626aeb8 | 660 | ppi[0] = &info_c4; |
669a5db4 | 661 | } else |
1626aeb8 | 662 | ppi[0] = &info_c5; |
669a5db4 | 663 | |
34d8dfb1 | 664 | ali_init_chipset(pdev); |
f20b16ff | 665 | |
669a5db4 | 666 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
44c10138 | 667 | if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
668 | /* Are we paired with a UDMA capable chip */ |
669 | pci_read_config_byte(isa_bridge, 0x5E, &tmp); | |
670 | if ((tmp & 0x1E) == 0x12) | |
1626aeb8 | 671 | ppi[0] = &info_20_udma; |
34d8dfb1 | 672 | pci_dev_put(isa_bridge); |
669a5db4 | 673 | } |
1626aeb8 | 674 | return ata_pci_init_one(pdev, ppi); |
669a5db4 JG |
675 | } |
676 | ||
438ac6d5 | 677 | #ifdef CONFIG_PM |
34d8dfb1 A |
678 | static int ali_reinit_one(struct pci_dev *pdev) |
679 | { | |
f08048e9 TH |
680 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
681 | int rc; | |
682 | ||
683 | rc = ata_pci_device_do_resume(pdev); | |
684 | if (rc) | |
685 | return rc; | |
34d8dfb1 | 686 | ali_init_chipset(pdev); |
f08048e9 TH |
687 | ata_host_resume(host); |
688 | return 0; | |
34d8dfb1 | 689 | } |
438ac6d5 | 690 | #endif |
34d8dfb1 | 691 | |
2d2744fc JG |
692 | static const struct pci_device_id ali[] = { |
693 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, | |
694 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, | |
695 | ||
696 | { }, | |
669a5db4 JG |
697 | }; |
698 | ||
699 | static struct pci_driver ali_pci_driver = { | |
700 | .name = DRV_NAME, | |
701 | .id_table = ali, | |
702 | .probe = ali_init_one, | |
34d8dfb1 | 703 | .remove = ata_pci_remove_one, |
438ac6d5 | 704 | #ifdef CONFIG_PM |
34d8dfb1 A |
705 | .suspend = ata_pci_device_suspend, |
706 | .resume = ali_reinit_one, | |
438ac6d5 | 707 | #endif |
669a5db4 JG |
708 | }; |
709 | ||
710 | static int __init ali_init(void) | |
711 | { | |
712 | return pci_register_driver(&ali_pci_driver); | |
713 | } | |
714 | ||
715 | ||
716 | static void __exit ali_exit(void) | |
717 | { | |
718 | pci_unregister_driver(&ali_pci_driver); | |
719 | } | |
720 | ||
721 | ||
722 | MODULE_AUTHOR("Alan Cox"); | |
723 | MODULE_DESCRIPTION("low-level driver for ALi PATA"); | |
724 | MODULE_LICENSE("GPL"); | |
725 | MODULE_DEVICE_TABLE(pci, ali); | |
726 | MODULE_VERSION(DRV_VERSION); | |
727 | ||
728 | module_init(ali_init); | |
729 | module_exit(ali_exit); |