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669a5db4 JG |
1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer | |
3 | * (C) 2005 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * based in part upon | |
7 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 | |
8 | * | |
9 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer | |
10 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
11 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
12 | * | |
13 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
14 | * May be copied or modified under the terms of the GNU General Public License | |
15 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | |
16 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | |
17 | * | |
18 | * Documentation | |
19 | * Chipset documentation available under NDA only | |
20 | * | |
21 | * TODO/CHECK | |
22 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but | |
23 | * otherwise should do atapi DMA. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/blkdev.h> | |
31 | #include <linux/delay.h> | |
32 | #include <scsi/scsi_host.h> | |
33 | #include <linux/libata.h> | |
34 | #include <linux/dmi.h> | |
35 | ||
36 | #define DRV_NAME "pata_ali" | |
2a3103ce | 37 | #define DRV_VERSION "0.7.5" |
669a5db4 JG |
38 | |
39 | /* | |
40 | * Cable special cases | |
41 | */ | |
42 | ||
1855256c | 43 | static const struct dmi_system_id cable_dmi_table[] = { |
669a5db4 JG |
44 | { |
45 | .ident = "HP Pavilion N5430", | |
46 | .matches = { | |
47 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
5c8d5201 | 48 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
669a5db4 JG |
49 | }, |
50 | }, | |
03e6f489 DE |
51 | { |
52 | .ident = "Toshiba Satelite S1800-814", | |
53 | .matches = { | |
54 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
55 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
56 | }, | |
57 | }, | |
669a5db4 JG |
58 | { } |
59 | }; | |
60 | ||
61 | static int ali_cable_override(struct pci_dev *pdev) | |
62 | { | |
63 | /* Fujitsu P2000 */ | |
64 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) | |
65 | return 1; | |
8f59a13a AC |
66 | /* Mitac 8317 (Winbook-A) and relatives */ |
67 | if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) | |
68 | return 1; | |
669a5db4 JG |
69 | /* Systems by DMI */ |
70 | if (dmi_check_system(cable_dmi_table)) | |
71 | return 1; | |
72 | return 0; | |
73 | } | |
74 | ||
75 | /** | |
76 | * ali_c2_cable_detect - cable detection | |
77 | * @ap: ATA port | |
78 | * | |
79 | * Perform cable detection for C2 and later revisions | |
80 | */ | |
81 | ||
82 | static int ali_c2_cable_detect(struct ata_port *ap) | |
83 | { | |
84 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
85 | u8 ata66; | |
86 | ||
87 | /* Certain laptops use short but suitable cables and don't | |
88 | implement the detect logic */ | |
89 | ||
90 | if (ali_cable_override(pdev)) | |
fc085150 | 91 | return ATA_CBL_PATA40_SHORT; |
669a5db4 JG |
92 | |
93 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary | |
94 | Bit set for 40 pin */ | |
95 | pci_read_config_byte(pdev, 0x4A, &ata66); | |
96 | if (ata66 & (1 << ap->port_no)) | |
97 | return ATA_CBL_PATA40; | |
98 | else | |
99 | return ATA_CBL_PATA80; | |
100 | } | |
101 | ||
669a5db4 JG |
102 | /** |
103 | * ali_20_filter - filter for earlier ALI DMA | |
104 | * @ap: ALi ATA port | |
105 | * @adev: attached device | |
106 | * | |
107 | * Ensure that we do not do DMA on CD devices. We may be able to | |
108 | * fix that later on. Also ensure we do not do UDMA on WDC drives | |
109 | */ | |
110 | ||
a76b62ca | 111 | static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) |
669a5db4 | 112 | { |
8bfa79fc | 113 | char model_num[ATA_ID_PROD_LEN + 1]; |
669a5db4 JG |
114 | /* No DMA on anything but a disk for now */ |
115 | if (adev->class != ATA_DEV_ATA) | |
116 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
8bfa79fc | 117 | ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
669a5db4 JG |
118 | if (strstr(model_num, "WDC")) |
119 | return mask &= ~ATA_MASK_UDMA; | |
a76b62ca | 120 | return ata_pci_default_filter(adev, mask); |
669a5db4 JG |
121 | } |
122 | ||
123 | /** | |
124 | * ali_fifo_control - FIFO manager | |
125 | * @ap: ALi channel to control | |
126 | * @adev: device for FIFO control | |
127 | * @on: 0 for off 1 for on | |
128 | * | |
129 | * Enable or disable the FIFO on a given device. Because of the way the | |
130 | * ALi FIFO works it provides a boost on ATA disk but can be confused by | |
131 | * ATAPI and we must therefore manage it. | |
132 | */ | |
133 | ||
134 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) | |
135 | { | |
136 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
137 | int pio_fifo = 0x54 + ap->port_no; | |
138 | u8 fifo; | |
139 | int shift = 4 * adev->devno; | |
140 | ||
141 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | |
142 | 0x00. Not all the docs agree but the behaviour we now use is the | |
143 | one stated in the BIOS Programming Guide */ | |
85cd7251 | 144 | |
669a5db4 JG |
145 | pci_read_config_byte(pdev, pio_fifo, &fifo); |
146 | fifo &= ~(0x0F << shift); | |
147 | if (on) | |
148 | fifo |= (on << shift); | |
149 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
150 | } | |
151 | ||
152 | /** | |
153 | * ali_program_modes - load mode registers | |
154 | * @ap: ALi channel to load | |
155 | * @adev: Device the timing is for | |
156 | * @cmd: Command timing | |
157 | * @data: Data timing | |
158 | * @ultra: UDMA timing or zero for off | |
159 | * | |
160 | * Loads the timing registers for cmd/data and disable UDMA if | |
161 | * ultra is zero. If ultra is set then load and enable the UDMA | |
162 | * timing but do not touch the command/data timing. | |
163 | */ | |
164 | ||
165 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) | |
166 | { | |
167 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
168 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ | |
169 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ | |
170 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ | |
171 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ | |
172 | int shift = 4 * adev->devno; | |
173 | u8 udma; | |
174 | ||
175 | if (t != NULL) { | |
176 | t->setup = FIT(t->setup, 1, 8) & 7; | |
177 | t->act8b = FIT(t->act8b, 1, 8) & 7; | |
178 | t->rec8b = FIT(t->rec8b, 1, 16) & 15; | |
179 | t->active = FIT(t->active, 1, 8) & 7; | |
180 | t->recover = FIT(t->recover, 1, 16) & 15; | |
181 | ||
182 | pci_write_config_byte(pdev, cas, t->setup); | |
183 | pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); | |
184 | pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); | |
185 | } | |
186 | ||
187 | /* Set up the UDMA enable */ | |
188 | pci_read_config_byte(pdev, udmat, &udma); | |
189 | udma &= ~(0x0F << shift); | |
190 | udma |= ultra << shift; | |
191 | pci_write_config_byte(pdev, udmat, udma); | |
192 | } | |
193 | ||
194 | /** | |
195 | * ali_set_piomode - set initial PIO mode data | |
196 | * @ap: ATA interface | |
197 | * @adev: ATA device | |
198 | * | |
199 | * Program the ALi registers for PIO mode. FIXME: add timings for | |
200 | * PIO5. | |
201 | */ | |
202 | ||
203 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
204 | { | |
205 | struct ata_device *pair = ata_dev_pair(adev); | |
206 | struct ata_timing t; | |
207 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
208 | ||
209 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); | |
210 | if (pair) { | |
211 | struct ata_timing p; | |
212 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
213 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
214 | if (pair->dma_mode) { | |
215 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
216 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
217 | } | |
218 | } | |
219 | ||
220 | /* PIO FIFO is only permitted on ATA disk */ | |
221 | if (adev->class != ATA_DEV_ATA) | |
222 | ali_fifo_control(ap, adev, 0x00); | |
223 | ali_program_modes(ap, adev, &t, 0); | |
224 | if (adev->class == ATA_DEV_ATA) | |
225 | ali_fifo_control(ap, adev, 0x05); | |
226 | ||
227 | } | |
228 | ||
229 | /** | |
230 | * ali_set_dmamode - set initial DMA mode data | |
231 | * @ap: ATA interface | |
232 | * @adev: ATA device | |
233 | * | |
234 | * FIXME: MWDMA timings | |
235 | */ | |
236 | ||
237 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
238 | { | |
239 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; | |
240 | struct ata_device *pair = ata_dev_pair(adev); | |
241 | struct ata_timing t; | |
242 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
243 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
244 | ||
245 | ||
246 | if (adev->class == ATA_DEV_ATA) | |
247 | ali_fifo_control(ap, adev, 0x08); | |
248 | ||
249 | if (adev->dma_mode >= XFER_UDMA_0) { | |
250 | ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); | |
251 | if (adev->dma_mode >= XFER_UDMA_3) { | |
252 | u8 reg4b; | |
253 | pci_read_config_byte(pdev, 0x4B, ®4b); | |
254 | reg4b |= 1; | |
255 | pci_write_config_byte(pdev, 0x4B, reg4b); | |
256 | } | |
257 | } else { | |
258 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); | |
259 | if (pair) { | |
260 | struct ata_timing p; | |
261 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
262 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
263 | if (pair->dma_mode) { | |
264 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
265 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
266 | } | |
267 | } | |
268 | ali_program_modes(ap, adev, &t, 0); | |
269 | } | |
270 | } | |
271 | ||
272 | /** | |
273 | * ali_lock_sectors - Keep older devices to 255 sector mode | |
669a5db4 JG |
274 | * @adev: Device |
275 | * | |
276 | * Called during the bus probe for each device that is found. We use | |
277 | * this call to lock the sector count of the device to 255 or less on | |
278 | * older ALi controllers. If we didn't do this then large I/O's would | |
279 | * require LBA48 commands which the older ALi requires are issued by | |
280 | * slower PIO methods | |
281 | */ | |
282 | ||
cd0d3bbc | 283 | static void ali_lock_sectors(struct ata_device *adev) |
669a5db4 JG |
284 | { |
285 | adev->max_sectors = 255; | |
286 | } | |
287 | ||
498222f3 AC |
288 | /** |
289 | * ali_check_atapi_dma - DMA check for most ALi controllers | |
290 | * @adev: Device | |
291 | * | |
292 | * Called to decide whether commands should be sent by DMA or PIO | |
293 | */ | |
2541d0ca | 294 | |
498222f3 AC |
295 | static int ali_check_atapi_dma(struct ata_queued_cmd *qc) |
296 | { | |
297 | /* If its not a media command, its not worth it */ | |
298 | if (qc->nbytes < 2048) | |
299 | return -EOPNOTSUPP; | |
300 | return 0; | |
301 | } | |
302 | ||
669a5db4 JG |
303 | static struct scsi_host_template ali_sht = { |
304 | .module = THIS_MODULE, | |
305 | .name = DRV_NAME, | |
306 | .ioctl = ata_scsi_ioctl, | |
307 | .queuecommand = ata_scsi_queuecmd, | |
308 | .can_queue = ATA_DEF_QUEUE, | |
309 | .this_id = ATA_SHT_THIS_ID, | |
310 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
311 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
312 | .emulated = ATA_SHT_EMULATED, | |
313 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
314 | .proc_name = DRV_NAME, | |
315 | .dma_boundary = ATA_DMA_BOUNDARY, | |
316 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 317 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
318 | .bios_param = ata_std_bios_param, |
319 | }; | |
320 | ||
321 | /* | |
322 | * Port operations for PIO only ALi | |
323 | */ | |
324 | ||
325 | static struct ata_port_operations ali_early_port_ops = { | |
669a5db4 JG |
326 | .set_piomode = ali_set_piomode, |
327 | .tf_load = ata_tf_load, | |
328 | .tf_read = ata_tf_read, | |
329 | .check_status = ata_check_status, | |
330 | .exec_command = ata_exec_command, | |
331 | .dev_select = ata_std_dev_select, | |
332 | ||
333 | .freeze = ata_bmdma_freeze, | |
334 | .thaw = ata_bmdma_thaw, | |
b723d144 | 335 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 336 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 337 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
338 | |
339 | .qc_prep = ata_qc_prep, | |
340 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 341 | |
0d5ff566 | 342 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
343 | |
344 | .irq_handler = ata_interrupt, | |
345 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 346 | .irq_on = ata_irq_on, |
669a5db4 | 347 | |
81ad1837 | 348 | .port_start = ata_sff_port_start, |
669a5db4 JG |
349 | }; |
350 | ||
351 | /* | |
352 | * Port operations for DMA capable ALi without cable | |
353 | * detect | |
354 | */ | |
355 | static struct ata_port_operations ali_20_port_ops = { | |
669a5db4 JG |
356 | .set_piomode = ali_set_piomode, |
357 | .set_dmamode = ali_set_dmamode, | |
358 | .mode_filter = ali_20_filter, | |
359 | ||
360 | .tf_load = ata_tf_load, | |
361 | .tf_read = ata_tf_read, | |
362 | .check_status = ata_check_status, | |
363 | .exec_command = ata_exec_command, | |
364 | .dev_select = ata_std_dev_select, | |
365 | .dev_config = ali_lock_sectors, | |
366 | ||
367 | .freeze = ata_bmdma_freeze, | |
368 | .thaw = ata_bmdma_thaw, | |
b723d144 | 369 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 370 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 371 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
372 | |
373 | .bmdma_setup = ata_bmdma_setup, | |
374 | .bmdma_start = ata_bmdma_start, | |
375 | .bmdma_stop = ata_bmdma_stop, | |
376 | .bmdma_status = ata_bmdma_status, | |
377 | ||
378 | .qc_prep = ata_qc_prep, | |
379 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 380 | |
0d5ff566 | 381 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
382 | |
383 | .irq_handler = ata_interrupt, | |
384 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 385 | .irq_on = ata_irq_on, |
669a5db4 | 386 | |
81ad1837 | 387 | .port_start = ata_sff_port_start, |
669a5db4 JG |
388 | }; |
389 | ||
390 | /* | |
391 | * Port operations for DMA capable ALi with cable detect | |
392 | */ | |
393 | static struct ata_port_operations ali_c2_port_ops = { | |
669a5db4 JG |
394 | .set_piomode = ali_set_piomode, |
395 | .set_dmamode = ali_set_dmamode, | |
396 | .mode_filter = ata_pci_default_filter, | |
397 | .tf_load = ata_tf_load, | |
398 | .tf_read = ata_tf_read, | |
498222f3 | 399 | .check_atapi_dma = ali_check_atapi_dma, |
669a5db4 JG |
400 | .check_status = ata_check_status, |
401 | .exec_command = ata_exec_command, | |
402 | .dev_select = ata_std_dev_select, | |
403 | .dev_config = ali_lock_sectors, | |
404 | ||
405 | .freeze = ata_bmdma_freeze, | |
406 | .thaw = ata_bmdma_thaw, | |
b723d144 | 407 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 408 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 409 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
410 | |
411 | .bmdma_setup = ata_bmdma_setup, | |
412 | .bmdma_start = ata_bmdma_start, | |
413 | .bmdma_stop = ata_bmdma_stop, | |
414 | .bmdma_status = ata_bmdma_status, | |
415 | ||
416 | .qc_prep = ata_qc_prep, | |
417 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 418 | |
0d5ff566 | 419 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
420 | |
421 | .irq_handler = ata_interrupt, | |
422 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 423 | .irq_on = ata_irq_on, |
669a5db4 | 424 | |
81ad1837 | 425 | .port_start = ata_sff_port_start, |
669a5db4 JG |
426 | }; |
427 | ||
428 | /* | |
429 | * Port operations for DMA capable ALi with cable detect and LBA48 | |
430 | */ | |
431 | static struct ata_port_operations ali_c5_port_ops = { | |
669a5db4 JG |
432 | .set_piomode = ali_set_piomode, |
433 | .set_dmamode = ali_set_dmamode, | |
434 | .mode_filter = ata_pci_default_filter, | |
435 | .tf_load = ata_tf_load, | |
436 | .tf_read = ata_tf_read, | |
498222f3 | 437 | .check_atapi_dma = ali_check_atapi_dma, |
669a5db4 JG |
438 | .check_status = ata_check_status, |
439 | .exec_command = ata_exec_command, | |
440 | .dev_select = ata_std_dev_select, | |
441 | ||
442 | .freeze = ata_bmdma_freeze, | |
443 | .thaw = ata_bmdma_thaw, | |
b723d144 | 444 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 445 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
b723d144 | 446 | .cable_detect = ali_c2_cable_detect, |
669a5db4 JG |
447 | |
448 | .bmdma_setup = ata_bmdma_setup, | |
449 | .bmdma_start = ata_bmdma_start, | |
450 | .bmdma_stop = ata_bmdma_stop, | |
451 | .bmdma_status = ata_bmdma_status, | |
452 | ||
453 | .qc_prep = ata_qc_prep, | |
454 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 455 | |
0d5ff566 | 456 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
457 | |
458 | .irq_handler = ata_interrupt, | |
459 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 460 | .irq_on = ata_irq_on, |
669a5db4 | 461 | |
81ad1837 | 462 | .port_start = ata_sff_port_start, |
669a5db4 JG |
463 | }; |
464 | ||
34d8dfb1 A |
465 | |
466 | /** | |
467 | * ali_init_chipset - chip setup function | |
468 | * @pdev: PCI device of ATA controller | |
469 | * | |
470 | * Perform the setup on the device that must be done both at boot | |
471 | * and at resume time. | |
472 | */ | |
f20b16ff | 473 | |
34d8dfb1 A |
474 | static void ali_init_chipset(struct pci_dev *pdev) |
475 | { | |
44c10138 | 476 | u8 tmp; |
34d8dfb1 A |
477 | struct pci_dev *north, *isa_bridge; |
478 | ||
34d8dfb1 A |
479 | /* |
480 | * The chipset revision selects the driver operations and | |
481 | * mode data. | |
482 | */ | |
483 | ||
44c10138 | 484 | if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
485 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ |
486 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
487 | /* Clear CD-ROM DMA write bit */ | |
488 | tmp &= 0x7F; | |
489 | pci_write_config_byte(pdev, 0x4B, tmp); | |
44c10138 | 490 | } else if (pdev->revision >= 0xC2) { |
34d8dfb1 A |
491 | /* Enable cable detection logic */ |
492 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
493 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | |
494 | } | |
8e42a5a2 | 495 | north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
34d8dfb1 A |
496 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
497 | ||
498 | if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { | |
499 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. | |
500 | Set the south bridge enable bit */ | |
501 | pci_read_config_byte(isa_bridge, 0x79, &tmp); | |
44c10138 | 502 | if (pdev->revision == 0xC2) |
34d8dfb1 | 503 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); |
44c10138 | 504 | else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) |
34d8dfb1 A |
505 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); |
506 | } | |
44c10138 | 507 | if (pdev->revision >= 0x20) { |
34d8dfb1 A |
508 | /* |
509 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | |
510 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | |
511 | * via 0x54/55. | |
512 | */ | |
513 | pci_read_config_byte(pdev, 0x53, &tmp); | |
44c10138 | 514 | if (pdev->revision <= 0x20) |
34d8dfb1 | 515 | tmp &= ~0x02; |
44c10138 | 516 | if (pdev->revision >= 0xc7) |
34d8dfb1 A |
517 | tmp |= 0x03; |
518 | else | |
519 | tmp |= 0x01; /* CD_ROM enable for DMA */ | |
520 | pci_write_config_byte(pdev, 0x53, tmp); | |
521 | } | |
522 | pci_dev_put(isa_bridge); | |
523 | pci_dev_put(north); | |
524 | ata_pci_clear_simplex(pdev); | |
525 | } | |
669a5db4 JG |
526 | /** |
527 | * ali_init_one - discovery callback | |
528 | * @pdev: PCI device ID | |
529 | * @id: PCI table info | |
530 | * | |
531 | * An ALi IDE interface has been discovered. Figure out what revision | |
532 | * and perform configuration work before handing it to the ATA layer | |
533 | */ | |
534 | ||
535 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
536 | { | |
1626aeb8 | 537 | static const struct ata_port_info info_early = { |
669a5db4 | 538 | .sht = &ali_sht, |
1d2808fd | 539 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
540 | .pio_mask = 0x1f, |
541 | .port_ops = &ali_early_port_ops | |
542 | }; | |
543 | /* Revision 0x20 added DMA */ | |
1626aeb8 | 544 | static const struct ata_port_info info_20 = { |
669a5db4 | 545 | .sht = &ali_sht, |
1d2808fd | 546 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
547 | .pio_mask = 0x1f, |
548 | .mwdma_mask = 0x07, | |
549 | .port_ops = &ali_20_port_ops | |
550 | }; | |
551 | /* Revision 0x20 with support logic added UDMA */ | |
1626aeb8 | 552 | static const struct ata_port_info info_20_udma = { |
669a5db4 | 553 | .sht = &ali_sht, |
1d2808fd | 554 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 | 555 | .pio_mask = 0x1f, |
85cd7251 | 556 | .mwdma_mask = 0x07, |
669a5db4 JG |
557 | .udma_mask = 0x07, /* UDMA33 */ |
558 | .port_ops = &ali_20_port_ops | |
559 | }; | |
560 | /* Revision 0xC2 adds UDMA66 */ | |
1626aeb8 | 561 | static const struct ata_port_info info_c2 = { |
669a5db4 | 562 | .sht = &ali_sht, |
1d2808fd | 563 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
564 | .pio_mask = 0x1f, |
565 | .mwdma_mask = 0x07, | |
bf6263a8 | 566 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
567 | .port_ops = &ali_c2_port_ops |
568 | }; | |
ee581502 | 569 | /* Revision 0xC3 is UDMA66 for now */ |
1626aeb8 | 570 | static const struct ata_port_info info_c3 = { |
669a5db4 | 571 | .sht = &ali_sht, |
1d2808fd | 572 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
573 | .pio_mask = 0x1f, |
574 | .mwdma_mask = 0x07, | |
bf6263a8 | 575 | .udma_mask = ATA_UDMA4, |
669a5db4 JG |
576 | .port_ops = &ali_c2_port_ops |
577 | }; | |
ee581502 | 578 | /* Revision 0xC4 is UDMA100 */ |
1626aeb8 | 579 | static const struct ata_port_info info_c4 = { |
669a5db4 | 580 | .sht = &ali_sht, |
1d2808fd | 581 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, |
669a5db4 JG |
582 | .pio_mask = 0x1f, |
583 | .mwdma_mask = 0x07, | |
bf6263a8 | 584 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
585 | .port_ops = &ali_c2_port_ops |
586 | }; | |
587 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ | |
1626aeb8 | 588 | static const struct ata_port_info info_c5 = { |
669a5db4 | 589 | .sht = &ali_sht, |
1d2808fd | 590 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
591 | .pio_mask = 0x1f, |
592 | .mwdma_mask = 0x07, | |
bf6263a8 | 593 | .udma_mask = ATA_UDMA6, |
669a5db4 JG |
594 | .port_ops = &ali_c5_port_ops |
595 | }; | |
596 | ||
1626aeb8 | 597 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
44c10138 | 598 | u8 tmp; |
34d8dfb1 | 599 | struct pci_dev *isa_bridge; |
669a5db4 | 600 | |
669a5db4 JG |
601 | /* |
602 | * The chipset revision selects the driver operations and | |
603 | * mode data. | |
604 | */ | |
605 | ||
44c10138 | 606 | if (pdev->revision < 0x20) { |
1626aeb8 | 607 | ppi[0] = &info_early; |
44c10138 | 608 | } else if (pdev->revision < 0xC2) { |
1626aeb8 | 609 | ppi[0] = &info_20; |
44c10138 | 610 | } else if (pdev->revision == 0xC2) { |
1626aeb8 | 611 | ppi[0] = &info_c2; |
44c10138 | 612 | } else if (pdev->revision == 0xC3) { |
1626aeb8 | 613 | ppi[0] = &info_c3; |
44c10138 | 614 | } else if (pdev->revision == 0xC4) { |
1626aeb8 | 615 | ppi[0] = &info_c4; |
669a5db4 | 616 | } else |
1626aeb8 | 617 | ppi[0] = &info_c5; |
669a5db4 | 618 | |
34d8dfb1 | 619 | ali_init_chipset(pdev); |
f20b16ff | 620 | |
669a5db4 | 621 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
44c10138 | 622 | if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
34d8dfb1 A |
623 | /* Are we paired with a UDMA capable chip */ |
624 | pci_read_config_byte(isa_bridge, 0x5E, &tmp); | |
625 | if ((tmp & 0x1E) == 0x12) | |
1626aeb8 | 626 | ppi[0] = &info_20_udma; |
34d8dfb1 | 627 | pci_dev_put(isa_bridge); |
669a5db4 | 628 | } |
1626aeb8 | 629 | return ata_pci_init_one(pdev, ppi); |
669a5db4 JG |
630 | } |
631 | ||
438ac6d5 | 632 | #ifdef CONFIG_PM |
34d8dfb1 A |
633 | static int ali_reinit_one(struct pci_dev *pdev) |
634 | { | |
635 | ali_init_chipset(pdev); | |
636 | return ata_pci_device_resume(pdev); | |
637 | } | |
438ac6d5 | 638 | #endif |
34d8dfb1 | 639 | |
2d2744fc JG |
640 | static const struct pci_device_id ali[] = { |
641 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, | |
642 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, | |
643 | ||
644 | { }, | |
669a5db4 JG |
645 | }; |
646 | ||
647 | static struct pci_driver ali_pci_driver = { | |
648 | .name = DRV_NAME, | |
649 | .id_table = ali, | |
650 | .probe = ali_init_one, | |
34d8dfb1 | 651 | .remove = ata_pci_remove_one, |
438ac6d5 | 652 | #ifdef CONFIG_PM |
34d8dfb1 A |
653 | .suspend = ata_pci_device_suspend, |
654 | .resume = ali_reinit_one, | |
438ac6d5 | 655 | #endif |
669a5db4 JG |
656 | }; |
657 | ||
658 | static int __init ali_init(void) | |
659 | { | |
660 | return pci_register_driver(&ali_pci_driver); | |
661 | } | |
662 | ||
663 | ||
664 | static void __exit ali_exit(void) | |
665 | { | |
666 | pci_unregister_driver(&ali_pci_driver); | |
667 | } | |
668 | ||
669 | ||
670 | MODULE_AUTHOR("Alan Cox"); | |
671 | MODULE_DESCRIPTION("low-level driver for ALi PATA"); | |
672 | MODULE_LICENSE("GPL"); | |
673 | MODULE_DEVICE_TABLE(pci, ali); | |
674 | MODULE_VERSION(DRV_VERSION); | |
675 | ||
676 | module_init(ali_init); | |
677 | module_exit(ali_exit); |