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WorkStruct: Pass the work_struct pointer instead of context data
[linux-2.6-block.git] / drivers / ata / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
1da177e4
LT		 35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/list.h>
40#include <linux/mm.h>
41#include <linux/highmem.h>
42#include <linux/spinlock.h>
43#include <linux/blkdev.h>
44#include <linux/delay.h>
45#include <linux/timer.h>
46#include <linux/interrupt.h>
47#include <linux/completion.h>
48#include <linux/suspend.h>
49#include <linux/workqueue.h>
67846b30 50#include <linux/jiffies.h>
378f058c 51#include <linux/scatterlist.h>
1da177e4 52#include <scsi/scsi.h>
193515d5 53#include <scsi/scsi_cmnd.h>
1da177e4
LT		 54#include <scsi/scsi_host.h>
55#include <linux/libata.h>
56#include <asm/io.h>
57#include <asm/semaphore.h>
58#include <asm/byteorder.h>
59
60#include "libata.h"
61
d7bb4cc7 62/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH		 63const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 66
3373efd8
TH		 67static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70static void ata_dev_xfermask(struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
453b07ac
TH		 75struct workqueue_struct *ata_aux_wq;
76
418dc1f5 77int atapi_enabled = 1;
1623c81e
JG		 78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
95de719a
AL		 81int atapi_dmadir = 0;
82module_param(atapi_dmadir, int, 0444);
83MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
84
c3c013a2
JG		 85int libata_fua = 0;
86module_param_named(fua, libata_fua, int, 0444);
87MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
88
a8601e5f
AM		 89static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90module_param(ata_probe_timeout, int, 0444);
91MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
92
1da177e4
LT		 93MODULE_AUTHOR("Jeff Garzik");
94MODULE_DESCRIPTION("Library module for ATA devices");
95MODULE_LICENSE("GPL");
96MODULE_VERSION(DRV_VERSION);
97
0baab86b 98
1da177e4
LT		 99/**
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
104 *
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
107 *
108 * LOCKING:
109 * Inherited from caller.
110 */
111
057ace5e 112void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 113{
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
119
120 fis[4] = tf->lbal;
121 fis[5] = tf->lbam;
122 fis[6] = tf->lbah;
123 fis[7] = tf->device;
124
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
129
130 fis[12] = tf->nsect;
131 fis[13] = tf->hob_nsect;
132 fis[14] = 0;
133 fis[15] = tf->ctl;
134
135 fis[16] = 0;
136 fis[17] = 0;
137 fis[18] = 0;
138 fis[19] = 0;
139}
140
141/**
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
145 *
e12a1be6 146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 147 *
148 * LOCKING:
149 * Inherited from caller.
150 */
151
057ace5e 152void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 153{
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
156
157 tf->lbal = fis[4];
158 tf->lbam = fis[5];
159 tf->lbah = fis[6];
160 tf->device = fis[7];
161
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
165
166 tf->nsect = fis[12];
167 tf->hob_nsect = fis[13];
168}
169
8cbd6df1
AL		 170static const u8 ata_rw_cmds[] = {
171 /* pio multi */
172 ATA_CMD_READ_MULTI,
173 ATA_CMD_WRITE_MULTI,
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 176 0,
177 0,
178 0,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 180 /* pio */
181 ATA_CMD_PIO_READ,
182 ATA_CMD_PIO_WRITE,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 185 0,
186 0,
187 0,
188 0,
8cbd6df1
AL		 189 /* dma */
190 ATA_CMD_READ,
191 ATA_CMD_WRITE,
192 ATA_CMD_READ_EXT,
9a3dccc4
TH		 193 ATA_CMD_WRITE_EXT,
194 0,
195 0,
196 0,
197 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 198};
1da177e4
LT		 199
200/**
8cbd6df1
AL		 201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
1da177e4 203 *
2e9edbf8 204 * Examine the device configuration and tf->flags to calculate
8cbd6df1 205 * the proper read/write commands and protocol to use.
1da177e4
LT		 206 *
207 * LOCKING:
208 * caller.
209 */
9a3dccc4 210int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 211{
8cbd6df1
AL		 212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
9a3dccc4 214 u8 cmd;
1da177e4 215
9a3dccc4 216 int index, fua, lba48, write;
2e9edbf8 217
9a3dccc4 218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 221
8cbd6df1
AL		 222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
9a3dccc4 224 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
0565c26d 228 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 229 } else {
230 tf->protocol = ATA_PROT_DMA;
9a3dccc4 231 index = 16;
8cbd6df1 232 }
1da177e4 233
9a3dccc4
TH		 234 cmd = ata_rw_cmds[index + fua + lba48 + write];
235 if (cmd) {
236 tf->command = cmd;
237 return 0;
238 }
239 return -1;
1da177e4
LT		 240}
241
cb95d562
TH		 242/**
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
247 *
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
250 *
251 * LOCKING:
252 * None.
253 *
254 * RETURNS:
255 * Packed xfer_mask.
256 */
257static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
260{
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
264}
265
c0489e4e
TH		 266/**
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
272 *
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
275 */
276static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
280{
281 if (pio_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
283 if (mwdma_mask)
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
285 if (udma_mask)
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
287}
288
cb95d562 289static const struct ata_xfer_ent {
be9a50c8 290 int shift, bits;
cb95d562
TH		 291 u8 base;
292} ata_xfer_tbl[] = {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
296 { -1, },
297};
298
299/**
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
302 *
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
305 *
306 * LOCKING:
307 * None.
308 *
309 * RETURNS:
310 * Matching XFER_* value, 0 if no match found.
311 */
312static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
313{
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
316
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
320 return 0;
321}
322
323/**
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
326 *
327 * Return matching xfer_mask for @xfer_mode.
328 *
329 * LOCKING:
330 * None.
331 *
332 * RETURNS:
333 * Matching xfer_mask, 0 if no match found.
334 */
335static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
336{
337 const struct ata_xfer_ent *ent;
338
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
342 return 0;
343}
344
345/**
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
348 *
349 * Return matching xfer_shift for @xfer_mode.
350 *
351 * LOCKING:
352 * None.
353 *
354 * RETURNS:
355 * Matching xfer_shift, -1 if no match found.
356 */
357static int ata_xfer_mode2shift(unsigned int xfer_mode)
358{
359 const struct ata_xfer_ent *ent;
360
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
363 return ent->shift;
364 return -1;
365}
366
1da177e4 367/**
1da7b0d0
TH		 368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 370 *
371 * Determine string which represents the highest speed
1da7b0d0 372 * (highest bit in @modemask).
1da177e4
LT		 373 *
374 * LOCKING:
375 * None.
376 *
377 * RETURNS:
378 * Constant C string representing highest speed listed in
1da7b0d0 379 * @mode_mask, or the constant C string "<n/a>".
1da177e4 380 */
1da7b0d0 381static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 382{
75f554bc
TH		 383 static const char * const xfer_mode_str[] = {
384 "PIO0",
385 "PIO1",
386 "PIO2",
387 "PIO3",
388 "PIO4",
b352e57d
AC		 389 "PIO5",
390 "PIO6",
75f554bc
TH		 391 "MWDMA0",
392 "MWDMA1",
393 "MWDMA2",
b352e57d
AC		 394 "MWDMA3",
395 "MWDMA4",
75f554bc
TH		 396 "UDMA/16",
397 "UDMA/25",
398 "UDMA/33",
399 "UDMA/44",
400 "UDMA/66",
401 "UDMA/100",
402 "UDMA/133",
403 "UDMA7",
404 };
1da7b0d0 405 int highbit;
1da177e4 406
1da7b0d0
TH		 407 highbit = fls(xfer_mask) - 1;
408 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
409 return xfer_mode_str[highbit];
1da177e4 410 return "<n/a>";
1da177e4
LT		 411}
412
4c360c81
TH		 413static const char *sata_spd_string(unsigned int spd)
414{
415 static const char * const spd_str[] = {
416 "1.5 Gbps",
417 "3.0 Gbps",
418 };
419
420 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
421 return "<unknown>";
422 return spd_str[spd - 1];
423}
424
3373efd8 425void ata_dev_disable(struct ata_device *dev)
0b8efb0a 426{
0dd4b21f 427 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
f15a1daf 428 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
0b8efb0a
TH		 429 dev->class++;
430 }
431}
432
1da177e4
LT		 433/**
434 * ata_pio_devchk - PATA device presence detection
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
437 *
438 * This technique was originally described in
439 * Hale Landis's ATADRVR (www.ata-atapi.com), and
440 * later found its way into the ATA/ATAPI spec.
441 *
442 * Write a pattern to the ATA shadow registers,
443 * and if a device is present, it will respond by
444 * correctly storing and echoing back the
445 * ATA shadow register contents.
446 *
447 * LOCKING:
448 * caller.
449 */
450
451static unsigned int ata_pio_devchk(struct ata_port *ap,
452 unsigned int device)
453{
454 struct ata_ioports *ioaddr = &ap->ioaddr;
455 u8 nsect, lbal;
456
457 ap->ops->dev_select(ap, device);
458
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
461
462 outb(0xaa, ioaddr->nsect_addr);
463 outb(0x55, ioaddr->lbal_addr);
464
465 outb(0x55, ioaddr->nsect_addr);
466 outb(0xaa, ioaddr->lbal_addr);
467
468 nsect = inb(ioaddr->nsect_addr);
469 lbal = inb(ioaddr->lbal_addr);
470
471 if ((nsect == 0x55) && (lbal == 0xaa))
472 return 1; /* we found a device */
473
474 return 0; /* nothing found */
475}
476
477/**
478 * ata_mmio_devchk - PATA device presence detection
479 * @ap: ATA channel to examine
480 * @device: Device to examine (starting at zero)
481 *
482 * This technique was originally described in
483 * Hale Landis's ATADRVR (www.ata-atapi.com), and
484 * later found its way into the ATA/ATAPI spec.
485 *
486 * Write a pattern to the ATA shadow registers,
487 * and if a device is present, it will respond by
488 * correctly storing and echoing back the
489 * ATA shadow register contents.
490 *
491 * LOCKING:
492 * caller.
493 */
494
495static unsigned int ata_mmio_devchk(struct ata_port *ap,
496 unsigned int device)
497{
498 struct ata_ioports *ioaddr = &ap->ioaddr;
499 u8 nsect, lbal;
500
501 ap->ops->dev_select(ap, device);
502
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
505
506 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
508
509 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
510 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
511
512 nsect = readb((void __iomem *) ioaddr->nsect_addr);
513 lbal = readb((void __iomem *) ioaddr->lbal_addr);
514
515 if ((nsect == 0x55) && (lbal == 0xaa))
516 return 1; /* we found a device */
517
518 return 0; /* nothing found */
519}
520
521/**
522 * ata_devchk - PATA device presence detection
523 * @ap: ATA channel to examine
524 * @device: Device to examine (starting at zero)
525 *
526 * Dispatch ATA device presence detection, depending
527 * on whether we are using PIO or MMIO to talk to the
528 * ATA shadow registers.
529 *
530 * LOCKING:
531 * caller.
532 */
533
534static unsigned int ata_devchk(struct ata_port *ap,
535 unsigned int device)
536{
537 if (ap->flags & ATA_FLAG_MMIO)
538 return ata_mmio_devchk(ap, device);
539 return ata_pio_devchk(ap, device);
540}
541
542/**
543 * ata_dev_classify - determine device type based on ATA-spec signature
544 * @tf: ATA taskfile register set for device to be identified
545 *
546 * Determine from taskfile register contents whether a device is
547 * ATA or ATAPI, as per "Signature and persistence" section
548 * of ATA/PI spec (volume 1, sect 5.14).
549 *
550 * LOCKING:
551 * None.
552 *
553 * RETURNS:
554 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
555 * the event of failure.
556 */
557
057ace5e 558unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 559{
560 /* Apple's open source Darwin code hints that some devices only
561 * put a proper signature into the LBA mid/high registers,
562 * So, we only check those. It's sufficient for uniqueness.
563 */
564
565 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
566 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
567 DPRINTK("found ATA device by sig\n");
568 return ATA_DEV_ATA;
569 }
570
571 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
572 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
573 DPRINTK("found ATAPI device by sig\n");
574 return ATA_DEV_ATAPI;
575 }
576
577 DPRINTK("unknown device\n");
578 return ATA_DEV_UNKNOWN;
579}
580
581/**
582 * ata_dev_try_classify - Parse returned ATA device signature
583 * @ap: ATA channel to examine
584 * @device: Device to examine (starting at zero)
b4dc7623 585 * @r_err: Value of error register on completion
1da177e4
LT		 586 *
587 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
588 * an ATA/ATAPI-defined set of values is placed in the ATA
589 * shadow registers, indicating the results of device detection
590 * and diagnostics.
591 *
592 * Select the ATA device, and read the values from the ATA shadow
593 * registers. Then parse according to the Error register value,
594 * and the spec-defined values examined by ata_dev_classify().
595 *
596 * LOCKING:
597 * caller.
b4dc7623
TH		 598 *
599 * RETURNS:
600 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 601 */
602
b4dc7623
TH		 603static unsigned int
604ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 605{
1da177e4
LT		 606 struct ata_taskfile tf;
607 unsigned int class;
608 u8 err;
609
610 ap->ops->dev_select(ap, device);
611
612 memset(&tf, 0, sizeof(tf));
613
1da177e4 614 ap->ops->tf_read(ap, &tf);
0169e284 615 err = tf.feature;
b4dc7623
TH		 616 if (r_err)
617 *r_err = err;
1da177e4 618
93590859
AC		 619 /* see if device passed diags: if master then continue and warn later */
620 if (err == 0 && device == 0)
621 /* diagnostic fail : do nothing _YET_ */
622 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
623 else if (err == 1)
1da177e4
LT		 624 /* do nothing */ ;
625 else if ((device == 0) && (err == 0x81))
626 /* do nothing */ ;
627 else
b4dc7623 628 return ATA_DEV_NONE;
1da177e4 629
b4dc7623 630 /* determine if device is ATA or ATAPI */
1da177e4 631 class = ata_dev_classify(&tf);
b4dc7623 632
1da177e4 633 if (class == ATA_DEV_UNKNOWN)
b4dc7623 634 return ATA_DEV_NONE;
1da177e4 635 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 636 return ATA_DEV_NONE;
637 return class;
1da177e4
LT		 638}
639
640/**
6a62a04d 641 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 642 * @id: IDENTIFY DEVICE results we will examine
643 * @s: string into which data is output
644 * @ofs: offset into identify device page
645 * @len: length of string to return. must be an even number.
646 *
647 * The strings in the IDENTIFY DEVICE page are broken up into
648 * 16-bit chunks. Run through the string, and output each
649 * 8-bit chunk linearly, regardless of platform.
650 *
651 * LOCKING:
652 * caller.
653 */
654
6a62a04d
TH		 655void ata_id_string(const u16 *id, unsigned char *s,
656 unsigned int ofs, unsigned int len)
1da177e4
LT		 657{
658 unsigned int c;
659
660 while (len > 0) {
661 c = id[ofs] >> 8;
662 *s = c;
663 s++;
664
665 c = id[ofs] & 0xff;
666 *s = c;
667 s++;
668
669 ofs++;
670 len -= 2;
671 }
672}
673
0e949ff3 674/**
6a62a04d 675 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 676 * @id: IDENTIFY DEVICE results we will examine
677 * @s: string into which data is output
678 * @ofs: offset into identify device page
679 * @len: length of string to return. must be an odd number.
680 *
6a62a04d 681 * This function is identical to ata_id_string except that it
0e949ff3
TH		 682 * trims trailing spaces and terminates the resulting string with
683 * null. @len must be actual maximum length (even number) + 1.
684 *
685 * LOCKING:
686 * caller.
687 */
6a62a04d
TH		 688void ata_id_c_string(const u16 *id, unsigned char *s,
689 unsigned int ofs, unsigned int len)
0e949ff3
TH		 690{
691 unsigned char *p;
692
693 WARN_ON(!(len & 1));
694
6a62a04d 695 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 696
697 p = s + strnlen(s, len - 1);
698 while (p > s && p[-1] == ' ')
699 p--;
700 *p = '\0';
701}
0baab86b 702
2940740b
TH		 703static u64 ata_id_n_sectors(const u16 *id)
704{
705 if (ata_id_has_lba(id)) {
706 if (ata_id_has_lba48(id))
707 return ata_id_u64(id, 100);
708 else
709 return ata_id_u32(id, 60);
710 } else {
711 if (ata_id_current_chs_valid(id))
712 return ata_id_u32(id, 57);
713 else
714 return id[1] * id[3] * id[6];
715 }
716}
717
0baab86b
EF		 718/**
719 * ata_noop_dev_select - Select device 0/1 on ATA bus
720 * @ap: ATA channel to manipulate
721 * @device: ATA device (numbered from zero) to select
722 *
723 * This function performs no actual function.
724 *
725 * May be used as the dev_select() entry in ata_port_operations.
726 *
727 * LOCKING:
728 * caller.
729 */
1da177e4
LT		 730void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
731{
732}
733
0baab86b 734
1da177e4
LT		 735/**
736 * ata_std_dev_select - Select device 0/1 on ATA bus
737 * @ap: ATA channel to manipulate
738 * @device: ATA device (numbered from zero) to select
739 *
740 * Use the method defined in the ATA specification to
741 * make either device 0, or device 1, active on the
0baab86b
EF		 742 * ATA channel. Works with both PIO and MMIO.
743 *
744 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 745 *
746 * LOCKING:
747 * caller.
748 */
749
750void ata_std_dev_select (struct ata_port *ap, unsigned int device)
751{
752 u8 tmp;
753
754 if (device == 0)
755 tmp = ATA_DEVICE_OBS;
756 else
757 tmp = ATA_DEVICE_OBS | ATA_DEV1;
758
759 if (ap->flags & ATA_FLAG_MMIO) {
760 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
761 } else {
762 outb(tmp, ap->ioaddr.device_addr);
763 }
764 ata_pause(ap); /* needed; also flushes, for mmio */
765}
766
767/**
768 * ata_dev_select - Select device 0/1 on ATA bus
769 * @ap: ATA channel to manipulate
770 * @device: ATA device (numbered from zero) to select
771 * @wait: non-zero to wait for Status register BSY bit to clear
772 * @can_sleep: non-zero if context allows sleeping
773 *
774 * Use the method defined in the ATA specification to
775 * make either device 0, or device 1, active on the
776 * ATA channel.
777 *
778 * This is a high-level version of ata_std_dev_select(),
779 * which additionally provides the services of inserting
780 * the proper pauses and status polling, where needed.
781 *
782 * LOCKING:
783 * caller.
784 */
785
786void ata_dev_select(struct ata_port *ap, unsigned int device,
787 unsigned int wait, unsigned int can_sleep)
788{
88574551 789 if (ata_msg_probe(ap))
0dd4b21f 790 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
88574551 791 "device %u, wait %u\n", ap->id, device, wait);
1da177e4
LT		 792
793 if (wait)
794 ata_wait_idle(ap);
795
796 ap->ops->dev_select(ap, device);
797
798 if (wait) {
799 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
800 msleep(150);
801 ata_wait_idle(ap);
802 }
803}
804
805/**
806 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 807 * @id: IDENTIFY DEVICE page to dump
1da177e4 808 *
0bd3300a
TH		 809 * Dump selected 16-bit words from the given IDENTIFY DEVICE
810 * page.
1da177e4
LT		 811 *
812 * LOCKING:
813 * caller.
814 */
815
0bd3300a 816static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 817{
818 DPRINTK("49==0x%04x "
819 "53==0x%04x "
820 "63==0x%04x "
821 "64==0x%04x "
822 "75==0x%04x \n",
0bd3300a
TH		 823 id[49],
824 id[53],
825 id[63],
826 id[64],
827 id[75]);
1da177e4
LT		 828 DPRINTK("80==0x%04x "
829 "81==0x%04x "
830 "82==0x%04x "
831 "83==0x%04x "
832 "84==0x%04x \n",
0bd3300a
TH		 833 id[80],
834 id[81],
835 id[82],
836 id[83],
837 id[84]);
1da177e4
LT		 838 DPRINTK("88==0x%04x "
839 "93==0x%04x\n",
0bd3300a
TH		 840 id[88],
841 id[93]);
1da177e4
LT		 842}
843
cb95d562
TH		 844/**
845 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
846 * @id: IDENTIFY data to compute xfer mask from
847 *
848 * Compute the xfermask for this device. This is not as trivial
849 * as it seems if we must consider early devices correctly.
850 *
851 * FIXME: pre IDE drive timing (do we care ?).
852 *
853 * LOCKING:
854 * None.
855 *
856 * RETURNS:
857 * Computed xfermask
858 */
859static unsigned int ata_id_xfermask(const u16 *id)
860{
861 unsigned int pio_mask, mwdma_mask, udma_mask;
862
863 /* Usual case. Word 53 indicates word 64 is valid */
864 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
865 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
866 pio_mask <<= 3;
867 pio_mask |= 0x7;
868 } else {
869 /* If word 64 isn't valid then Word 51 high byte holds
870 * the PIO timing number for the maximum. Turn it into
871 * a mask.
872 */
46767aeb
AC		 873 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
874 if (mode < 5) /* Valid PIO range */
875 pio_mask = (2 << mode) - 1;
876 else
877 pio_mask = 1;
cb95d562
TH		 878
879 /* But wait.. there's more. Design your standards by
880 * committee and you too can get a free iordy field to
881 * process. However its the speeds not the modes that
882 * are supported... Note drivers using the timing API
883 * will get this right anyway
884 */
885 }
886
887 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 888
b352e57d
AC		 889 if (ata_id_is_cfa(id)) {
890 /*
891 * Process compact flash extended modes
892 */
893 int pio = id[163] & 0x7;
894 int dma = (id[163] >> 3) & 7;
895
896 if (pio)
897 pio_mask |= (1 << 5);
898 if (pio > 1)
899 pio_mask |= (1 << 6);
900 if (dma)
901 mwdma_mask |= (1 << 3);
902 if (dma > 1)
903 mwdma_mask |= (1 << 4);
904 }
905
fb21f0d0
TH		 906 udma_mask = 0;
907 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
908 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 909
910 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
911}
912
86e45b6b
TH		 913/**
914 * ata_port_queue_task - Queue port_task
915 * @ap: The ata_port to queue port_task for
e2a7f77a 916 * @fn: workqueue function to be scheduled
65f27f38 917 * @data: data for @fn to use
e2a7f77a 918 * @delay: delay time for workqueue function
86e45b6b
TH		 919 *
920 * Schedule @fn(@data) for execution after @delay jiffies using
921 * port_task. There is one port_task per port and it's the
922 * user(low level driver)'s responsibility to make sure that only
923 * one task is active at any given time.
924 *
925 * libata core layer takes care of synchronization between
926 * port_task and EH. ata_port_queue_task() may be ignored for EH
927 * synchronization.
928 *
929 * LOCKING:
930 * Inherited from caller.
931 */
65f27f38 932void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
86e45b6b
TH		 933 unsigned long delay)
934{
935 int rc;
936
b51e9e5d 937 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 938 return;
939
65f27f38
DH		 940 PREPARE_DELAYED_WORK(&ap->port_task, fn);
941 ap->port_task_data = data;
86e45b6b 942
52bad64d 943 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
86e45b6b
TH		 944
945 /* rc == 0 means that another user is using port task */
946 WARN_ON(rc == 0);
947}
948
949/**
950 * ata_port_flush_task - Flush port_task
951 * @ap: The ata_port to flush port_task for
952 *
953 * After this function completes, port_task is guranteed not to
954 * be running or scheduled.
955 *
956 * LOCKING:
957 * Kernel thread context (may sleep)
958 */
959void ata_port_flush_task(struct ata_port *ap)
960{
961 unsigned long flags;
962
963 DPRINTK("ENTER\n");
964
ba6a1308 965 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 966 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
ba6a1308 967 spin_unlock_irqrestore(ap->lock, flags);
86e45b6b
TH		 968
969 DPRINTK("flush #1\n");
970 flush_workqueue(ata_wq);
971
972 /*
973 * At this point, if a task is running, it's guaranteed to see
974 * the FLUSH flag; thus, it will never queue pio tasks again.
975 * Cancel and flush.
976 */
977 if (!cancel_delayed_work(&ap->port_task)) {
0dd4b21f 978 if (ata_msg_ctl(ap))
88574551
TH		 979 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
980 __FUNCTION__);
86e45b6b
TH		 981 flush_workqueue(ata_wq);
982 }
983
ba6a1308 984 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 985 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
ba6a1308 986 spin_unlock_irqrestore(ap->lock, flags);
86e45b6b 987
0dd4b21f
BP		 988 if (ata_msg_ctl(ap))
989 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
86e45b6b
TH		 990}
991
77853bf2 992void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 993{
77853bf2 994 struct completion *waiting = qc->private_data;
a2a7a662 995
a2a7a662 996 complete(waiting);
a2a7a662
TH		 997}
998
999/**
1000 * ata_exec_internal - execute libata internal command
a2a7a662
TH		 1001 * @dev: Device to which the command is sent
1002 * @tf: Taskfile registers for the command and the result
d69cf37d 1003 * @cdb: CDB for packet command
a2a7a662
TH		 1004 * @dma_dir: Data tranfer direction of the command
1005 * @buf: Data buffer of the command
1006 * @buflen: Length of data buffer
1007 *
1008 * Executes libata internal command with timeout. @tf contains
1009 * command on entry and result on return. Timeout and error
1010 * conditions are reported via return value. No recovery action
1011 * is taken after a command times out. It's caller's duty to
1012 * clean up after timeout.
1013 *
1014 * LOCKING:
1015 * None. Should be called with kernel context, might sleep.
551e8889
TH		 1016 *
1017 * RETURNS:
1018 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1019 */
3373efd8 1020unsigned ata_exec_internal(struct ata_device *dev,
1ad8e7f9
TH		 1021 struct ata_taskfile *tf, const u8 *cdb,
1022 int dma_dir, void *buf, unsigned int buflen)
a2a7a662 1023{
3373efd8 1024 struct ata_port *ap = dev->ap;
a2a7a662
TH		 1025 u8 command = tf->command;
1026 struct ata_queued_cmd *qc;
2ab7db1f 1027 unsigned int tag, preempted_tag;
dedaf2b0 1028 u32 preempted_sactive, preempted_qc_active;
60be6b9a 1029 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1030 unsigned long flags;
77853bf2 1031 unsigned int err_mask;
d95a717f 1032 int rc;
a2a7a662 1033
ba6a1308 1034 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1035
e3180499 1036 /* no internal command while frozen */
b51e9e5d 1037 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1038 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH		 1039 return AC_ERR_SYSTEM;
1040 }
1041
2ab7db1f 1042 /* initialize internal qc */
a2a7a662 1043
2ab7db1f
TH		 1044 /* XXX: Tag 0 is used for drivers with legacy EH as some
1045 * drivers choke if any other tag is given. This breaks
1046 * ata_tag_internal() test for those drivers. Don't use new
1047 * EH stuff without converting to it.
1048 */
1049 if (ap->ops->error_handler)
1050 tag = ATA_TAG_INTERNAL;
1051 else
1052 tag = 0;
1053
6cec4a39 1054 if (test_and_set_bit(tag, &ap->qc_allocated))
2ab7db1f 1055 BUG();
f69499f4 1056 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH		 1057
1058 qc->tag = tag;
1059 qc->scsicmd = NULL;
1060 qc->ap = ap;
1061 qc->dev = dev;
1062 ata_qc_reinit(qc);
1063
1064 preempted_tag = ap->active_tag;
dedaf2b0
TH		 1065 preempted_sactive = ap->sactive;
1066 preempted_qc_active = ap->qc_active;
2ab7db1f 1067 ap->active_tag = ATA_TAG_POISON;
dedaf2b0
TH		 1068 ap->sactive = 0;
1069 ap->qc_active = 0;
2ab7db1f
TH		 1070
1071 /* prepare & issue qc */
a2a7a662 1072 qc->tf = *tf;
d69cf37d
TH		 1073 if (cdb)
1074 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1075 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH		 1076 qc->dma_dir = dma_dir;
1077 if (dma_dir != DMA_NONE) {
1078 ata_sg_init_one(qc, buf, buflen);
1079 qc->nsect = buflen / ATA_SECT_SIZE;
1080 }
1081
77853bf2 1082 qc->private_data = &wait;
a2a7a662
TH		 1083 qc->complete_fn = ata_qc_complete_internal;
1084
8e0e694a 1085 ata_qc_issue(qc);
a2a7a662 1086
ba6a1308 1087 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1088
a8601e5f 1089 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
d95a717f
TH		 1090
1091 ata_port_flush_task(ap);
41ade50c 1092
d95a717f 1093 if (!rc) {
ba6a1308 1094 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH		 1095
1096 /* We're racing with irq here. If we lose, the
1097 * following test prevents us from completing the qc
d95a717f
TH		 1098 * twice. If we win, the port is frozen and will be
1099 * cleaned up by ->post_internal_cmd().
a2a7a662 1100 */
77853bf2 1101 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH		 1102 qc->err_mask |= AC_ERR_TIMEOUT;
1103
1104 if (ap->ops->error_handler)
1105 ata_port_freeze(ap);
1106 else
1107 ata_qc_complete(qc);
f15a1daf 1108
0dd4b21f
BP		 1109 if (ata_msg_warn(ap))
1110 ata_dev_printk(dev, KERN_WARNING,
88574551 1111 "qc timeout (cmd 0x%x)\n", command);
a2a7a662
TH		 1112 }
1113
ba6a1308 1114 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH		 1115 }
1116
d95a717f
TH		 1117 /* do post_internal_cmd */
1118 if (ap->ops->post_internal_cmd)
1119 ap->ops->post_internal_cmd(qc);
1120
1121 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
0dd4b21f 1122 if (ata_msg_warn(ap))
88574551 1123 ata_dev_printk(dev, KERN_WARNING,
0dd4b21f 1124 "zero err_mask for failed "
88574551 1125 "internal command, assuming AC_ERR_OTHER\n");
d95a717f
TH		 1126 qc->err_mask |= AC_ERR_OTHER;
1127 }
1128
15869303 1129 /* finish up */
ba6a1308 1130 spin_lock_irqsave(ap->lock, flags);
15869303 1131
e61e0672 1132 *tf = qc->result_tf;
77853bf2
TH		 1133 err_mask = qc->err_mask;
1134
1135 ata_qc_free(qc);
2ab7db1f 1136 ap->active_tag = preempted_tag;
dedaf2b0
TH		 1137 ap->sactive = preempted_sactive;
1138 ap->qc_active = preempted_qc_active;
77853bf2 1139
1f7dd3e9
TH		 1140 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1141 * Until those drivers are fixed, we detect the condition
1142 * here, fail the command with AC_ERR_SYSTEM and reenable the
1143 * port.
1144 *
1145 * Note that this doesn't change any behavior as internal
1146 * command failure results in disabling the device in the
1147 * higher layer for LLDDs without new reset/EH callbacks.
1148 *
1149 * Kill the following code as soon as those drivers are fixed.
1150 */
198e0fed 1151 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1152 err_mask |= AC_ERR_SYSTEM;
1153 ata_port_probe(ap);
1154 }
1155
ba6a1308 1156 spin_unlock_irqrestore(ap->lock, flags);
15869303 1157
77853bf2 1158 return err_mask;
a2a7a662
TH		 1159}
1160
977e6b9f
TH		 1161/**
1162 * ata_do_simple_cmd - execute simple internal command
1163 * @dev: Device to which the command is sent
1164 * @cmd: Opcode to execute
1165 *
1166 * Execute a 'simple' command, that only consists of the opcode
1167 * 'cmd' itself, without filling any other registers
1168 *
1169 * LOCKING:
1170 * Kernel thread context (may sleep).
1171 *
1172 * RETURNS:
1173 * Zero on success, AC_ERR_* mask on failure
e58eb583 1174 */
77b08fb5 1175unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH		 1176{
1177 struct ata_taskfile tf;
e58eb583
TH		 1178
1179 ata_tf_init(dev, &tf);
1180
1181 tf.command = cmd;
1182 tf.flags |= ATA_TFLAG_DEVICE;
1183 tf.protocol = ATA_PROT_NODATA;
1184
977e6b9f 1185 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
e58eb583
TH		 1186}
1187
1bc4ccff
AC		 1188/**
1189 * ata_pio_need_iordy - check if iordy needed
1190 * @adev: ATA device
1191 *
1192 * Check if the current speed of the device requires IORDY. Used
1193 * by various controllers for chip configuration.
1194 */
1195
1196unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1197{
1198 int pio;
1199 int speed = adev->pio_mode - XFER_PIO_0;
1200
1201 if (speed < 2)
1202 return 0;
1203 if (speed > 2)
1204 return 1;
2e9edbf8 1205
1bc4ccff
AC		 1206 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1207
1208 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1209 pio = adev->id[ATA_ID_EIDE_PIO];
1210 /* Is the speed faster than the drive allows non IORDY ? */
1211 if (pio) {
1212 /* This is cycle times not frequency - watch the logic! */
1213 if (pio > 240) /* PIO2 is 240nS per cycle */
1214 return 1;
1215 return 0;
1216 }
1217 }
1218 return 0;
1219}
1220
1da177e4 1221/**
49016aca 1222 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH		 1223 * @dev: target device
1224 * @p_class: pointer to class of the target device (may be changed)
1225 * @post_reset: is this read ID post-reset?
fe635c7e 1226 * @id: buffer to read IDENTIFY data into
1da177e4 1227 *
49016aca
TH		 1228 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1229 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1230 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1231 * for pre-ATA4 drives.
1da177e4
LT		 1232 *
1233 * LOCKING:
49016aca
TH		 1234 * Kernel thread context (may sleep)
1235 *
1236 * RETURNS:
1237 * 0 on success, -errno otherwise.
1da177e4 1238 */
a9beec95
TH		 1239int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1240 int post_reset, u16 *id)
1da177e4 1241{
3373efd8 1242 struct ata_port *ap = dev->ap;
49016aca 1243 unsigned int class = *p_class;
a0123703 1244 struct ata_taskfile tf;
49016aca
TH		 1245 unsigned int err_mask = 0;
1246 const char *reason;
1247 int rc;
1da177e4 1248
0dd4b21f 1249 if (ata_msg_ctl(ap))
88574551
TH		 1250 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1251 __FUNCTION__, ap->id, dev->devno);
1da177e4 1252
49016aca 1253 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1254
49016aca 1255 retry:
3373efd8 1256 ata_tf_init(dev, &tf);
a0123703 1257
49016aca
TH		 1258 switch (class) {
1259 case ATA_DEV_ATA:
a0123703 1260 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1261 break;
1262 case ATA_DEV_ATAPI:
a0123703 1263 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1264 break;
1265 default:
1266 rc = -ENODEV;
1267 reason = "unsupported class";
1268 goto err_out;
1da177e4
LT		 1269 }
1270
a0123703 1271 tf.protocol = ATA_PROT_PIO;
1da177e4 1272
3373efd8 1273 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1274 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1275 if (err_mask) {
49016aca
TH		 1276 rc = -EIO;
1277 reason = "I/O error";
1da177e4
LT		 1278 goto err_out;
1279 }
1280
49016aca 1281 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1282
49016aca 1283 /* sanity check */
a4f5749b
TH		 1284 rc = -EINVAL;
1285 reason = "device reports illegal type";
1286
1287 if (class == ATA_DEV_ATA) {
1288 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1289 goto err_out;
1290 } else {
1291 if (ata_id_is_ata(id))
1292 goto err_out;
49016aca
TH		 1293 }
1294
1295 if (post_reset && class == ATA_DEV_ATA) {
1296 /*
1297 * The exact sequence expected by certain pre-ATA4 drives is:
1298 * SRST RESET
1299 * IDENTIFY
1300 * INITIALIZE DEVICE PARAMETERS
1301 * anything else..
1302 * Some drives were very specific about that exact sequence.
1303 */
1304 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 1305 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH		 1306 if (err_mask) {
1307 rc = -EIO;
1308 reason = "INIT_DEV_PARAMS failed";
1309 goto err_out;
1310 }
1311
1312 /* current CHS translation info (id[53-58]) might be
1313 * changed. reread the identify device info.
1314 */
1315 post_reset = 0;
1316 goto retry;
1317 }
1318 }
1319
1320 *p_class = class;
fe635c7e 1321
49016aca
TH		 1322 return 0;
1323
1324 err_out:
88574551 1325 if (ata_msg_warn(ap))
0dd4b21f 1326 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
88574551 1327 "(%s, err_mask=0x%x)\n", reason, err_mask);
49016aca
TH		 1328 return rc;
1329}
1330
3373efd8 1331static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 1332{
3373efd8 1333 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH		 1334}
1335
a6e6ce8e
TH		 1336static void ata_dev_config_ncq(struct ata_device *dev,
1337 char *desc, size_t desc_sz)
1338{
1339 struct ata_port *ap = dev->ap;
1340 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1341
1342 if (!ata_id_has_ncq(dev->id)) {
1343 desc[0] = '\0';
1344 return;
1345 }
1346
1347 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 1348 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH		 1349 dev->flags |= ATA_DFLAG_NCQ;
1350 }
1351
1352 if (hdepth >= ddepth)
1353 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1354 else
1355 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1356}
1357
e6d902a3
BK		 1358static void ata_set_port_max_cmd_len(struct ata_port *ap)
1359{
1360 int i;
1361
cca3974e
JG		 1362 if (ap->scsi_host) {
1363 unsigned int len = 0;
1364
e6d902a3 1365 for (i = 0; i < ATA_MAX_DEVICES; i++)
cca3974e
JG		 1366 len = max(len, ap->device[i].cdb_len);
1367
1368 ap->scsi_host->max_cmd_len = len;
e6d902a3
BK		 1369 }
1370}
1371
49016aca 1372/**
ffeae418 1373 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418 1374 * @dev: Target device to configure
4c2d721a 1375 * @print_info: Enable device info printout
ffeae418
TH		 1376 *
1377 * Configure @dev according to @dev->id. Generic and low-level
1378 * driver specific fixups are also applied.
49016aca
TH		 1379 *
1380 * LOCKING:
ffeae418
TH		 1381 * Kernel thread context (may sleep)
1382 *
1383 * RETURNS:
1384 * 0 on success, -errno otherwise
49016aca 1385 */
a9beec95 1386int ata_dev_configure(struct ata_device *dev, int print_info)
49016aca 1387{
3373efd8 1388 struct ata_port *ap = dev->ap;
1148c3a7 1389 const u16 *id = dev->id;
ff8854b2 1390 unsigned int xfer_mask;
b352e57d 1391 char revbuf[7]; /* XYZ-99\0 */
e6d902a3 1392 int rc;
49016aca 1393
0dd4b21f 1394 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
88574551
TH		 1395 ata_dev_printk(dev, KERN_INFO,
1396 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1397 __FUNCTION__, ap->id, dev->devno);
ffeae418 1398 return 0;
49016aca
TH		 1399 }
1400
0dd4b21f 1401 if (ata_msg_probe(ap))
88574551
TH		 1402 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1403 __FUNCTION__, ap->id, dev->devno);
1da177e4 1404
c39f5ebe 1405 /* print device capabilities */
0dd4b21f 1406 if (ata_msg_probe(ap))
88574551
TH		 1407 ata_dev_printk(dev, KERN_DEBUG,
1408 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1409 "85:%04x 86:%04x 87:%04x 88:%04x\n",
0dd4b21f 1410 __FUNCTION__,
f15a1daf
TH		 1411 id[49], id[82], id[83], id[84],
1412 id[85], id[86], id[87], id[88]);
c39f5ebe 1413
208a9933 1414 /* initialize to-be-configured parameters */
ea1dd4e1 1415 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1416 dev->max_sectors = 0;
1417 dev->cdb_len = 0;
1418 dev->n_sectors = 0;
1419 dev->cylinders = 0;
1420 dev->heads = 0;
1421 dev->sectors = 0;
1422
1da177e4
LT		 1423 /*
1424 * common ATA, ATAPI feature tests
1425 */
1426
ff8854b2 1427 /* find max transfer mode; for printk only */
1148c3a7 1428 xfer_mask = ata_id_xfermask(id);
1da177e4 1429
0dd4b21f
BP		 1430 if (ata_msg_probe(ap))
1431 ata_dump_id(id);
1da177e4
LT		 1432
1433 /* ATA-specific feature tests */
1434 if (dev->class == ATA_DEV_ATA) {
b352e57d
AC		 1435 if (ata_id_is_cfa(id)) {
1436 if (id[162] & 1) /* CPRM may make this media unusable */
1437 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1438 ap->id, dev->devno);
1439 snprintf(revbuf, 7, "CFA");
1440 }
1441 else
1442 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1443
1148c3a7 1444 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1445
1148c3a7 1446 if (ata_id_has_lba(id)) {
4c2d721a 1447 const char *lba_desc;
a6e6ce8e 1448 char ncq_desc[20];
8bf62ece 1449
4c2d721a
TH		 1450 lba_desc = "LBA";
1451 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1452 if (ata_id_has_lba48(id)) {
8bf62ece 1453 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1454 lba_desc = "LBA48";
1455 }
8bf62ece 1456
a6e6ce8e
TH		 1457 /* config NCQ */
1458 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1459
8bf62ece 1460 /* print device info to dmesg */
5afc8142 1461 if (ata_msg_drv(ap) && print_info)
b352e57d 1462 ata_dev_printk(dev, KERN_INFO, "%s, "
a6e6ce8e 1463 "max %s, %Lu sectors: %s %s\n",
b352e57d 1464 revbuf,
f15a1daf
TH		 1465 ata_mode_string(xfer_mask),
1466 (unsigned long long)dev->n_sectors,
a6e6ce8e 1467 lba_desc, ncq_desc);
ffeae418 1468 } else {
8bf62ece
AL		 1469 /* CHS */
1470
1471 /* Default translation */
1148c3a7
TH		 1472 dev->cylinders = id[1];
1473 dev->heads = id[3];
1474 dev->sectors = id[6];
8bf62ece 1475
1148c3a7 1476 if (ata_id_current_chs_valid(id)) {
8bf62ece 1477 /* Current CHS translation is valid. */
1148c3a7
TH		 1478 dev->cylinders = id[54];
1479 dev->heads = id[55];
1480 dev->sectors = id[56];
8bf62ece
AL		 1481 }
1482
1483 /* print device info to dmesg */
5afc8142 1484 if (ata_msg_drv(ap) && print_info)
b352e57d 1485 ata_dev_printk(dev, KERN_INFO, "%s, "
f15a1daf 1486 "max %s, %Lu sectors: CHS %u/%u/%u\n",
b352e57d 1487 revbuf,
f15a1daf
TH		 1488 ata_mode_string(xfer_mask),
1489 (unsigned long long)dev->n_sectors,
88574551
TH		 1490 dev->cylinders, dev->heads,
1491 dev->sectors);
1da177e4
LT		 1492 }
1493
07f6f7d0
AL		 1494 if (dev->id[59] & 0x100) {
1495 dev->multi_count = dev->id[59] & 0xff;
5afc8142 1496 if (ata_msg_drv(ap) && print_info)
88574551
TH		 1497 ata_dev_printk(dev, KERN_INFO,
1498 "ata%u: dev %u multi count %u\n",
1499 ap->id, dev->devno, dev->multi_count);
07f6f7d0
AL		 1500 }
1501
6e7846e9 1502 dev->cdb_len = 16;
1da177e4
LT		 1503 }
1504
1505 /* ATAPI-specific feature tests */
2c13b7ce 1506 else if (dev->class == ATA_DEV_ATAPI) {
08a556db
AL		 1507 char *cdb_intr_string = "";
1508
1148c3a7 1509 rc = atapi_cdb_len(id);
1da177e4 1510 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 1511 if (ata_msg_warn(ap))
88574551
TH		 1512 ata_dev_printk(dev, KERN_WARNING,
1513 "unsupported CDB len\n");
ffeae418 1514 rc = -EINVAL;
1da177e4
LT		 1515 goto err_out_nosup;
1516 }
6e7846e9 1517 dev->cdb_len = (unsigned int) rc;
1da177e4 1518
08a556db 1519 if (ata_id_cdb_intr(dev->id)) {
312f7da2 1520 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL		 1521 cdb_intr_string = ", CDB intr";
1522 }
312f7da2 1523
1da177e4 1524 /* print device info to dmesg */
5afc8142 1525 if (ata_msg_drv(ap) && print_info)
12436c30
TH		 1526 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1527 ata_mode_string(xfer_mask),
1528 cdb_intr_string);
1da177e4
LT		 1529 }
1530
93590859
AC		 1531 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1532 /* Let the user know. We don't want to disallow opens for
1533 rescue purposes, or in case the vendor is just a blithering
1534 idiot */
1535 if (print_info) {
1536 ata_dev_printk(dev, KERN_WARNING,
1537"Drive reports diagnostics failure. This may indicate a drive\n");
1538 ata_dev_printk(dev, KERN_WARNING,
1539"fault or invalid emulation. Contact drive vendor for information.\n");
1540 }
1541 }
1542
e6d902a3 1543 ata_set_port_max_cmd_len(ap);
6e7846e9 1544
4b2f3ede 1545 /* limit bridge transfers to udma5, 200 sectors */
3373efd8 1546 if (ata_dev_knobble(dev)) {
5afc8142 1547 if (ata_msg_drv(ap) && print_info)
f15a1daf
TH		 1548 ata_dev_printk(dev, KERN_INFO,
1549 "applying bridge limits\n");
5a529139 1550 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1551 dev->max_sectors = ATA_MAX_SECTORS;
1552 }
1553
1554 if (ap->ops->dev_config)
1555 ap->ops->dev_config(ap, dev);
1556
0dd4b21f
BP		 1557 if (ata_msg_probe(ap))
1558 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1559 __FUNCTION__, ata_chk_status(ap));
ffeae418 1560 return 0;
1da177e4
LT		 1561
1562err_out_nosup:
0dd4b21f 1563 if (ata_msg_probe(ap))
88574551
TH		 1564 ata_dev_printk(dev, KERN_DEBUG,
1565 "%s: EXIT, err\n", __FUNCTION__);
ffeae418 1566 return rc;
1da177e4
LT		 1567}
1568
1569/**
1570 * ata_bus_probe - Reset and probe ATA bus
1571 * @ap: Bus to probe
1572 *
0cba632b
JG		 1573 * Master ATA bus probing function. Initiates a hardware-dependent
1574 * bus reset, then attempts to identify any devices found on
1575 * the bus.
1576 *
1da177e4 1577 * LOCKING:
0cba632b 1578 * PCI/etc. bus probe sem.
1da177e4
LT		 1579 *
1580 * RETURNS:
96072e69 1581 * Zero on success, negative errno otherwise.
1da177e4
LT		 1582 */
1583
80289167 1584int ata_bus_probe(struct ata_port *ap)
1da177e4 1585{
28ca5c57 1586 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1587 int tries[ATA_MAX_DEVICES];
1588 int i, rc, down_xfermask;
e82cbdb9 1589 struct ata_device *dev;
1da177e4 1590
28ca5c57 1591 ata_port_probe(ap);
c19ba8af 1592
14d2bac1
TH		 1593 for (i = 0; i < ATA_MAX_DEVICES; i++)
1594 tries[i] = ATA_PROBE_MAX_TRIES;
1595
1596 retry:
1597 down_xfermask = 0;
1598
2044470c 1599 /* reset and determine device classes */
52783c5d 1600 ap->ops->phy_reset(ap);
2061a47a 1601
52783c5d
TH		 1602 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1603 dev = &ap->device[i];
c19ba8af 1604
52783c5d
TH		 1605 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1606 dev->class != ATA_DEV_UNKNOWN)
1607 classes[dev->devno] = dev->class;
1608 else
1609 classes[dev->devno] = ATA_DEV_NONE;
2044470c 1610
52783c5d 1611 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 1612 }
1da177e4 1613
52783c5d 1614 ata_port_probe(ap);
2044470c 1615
b6079ca4
AC		 1616 /* after the reset the device state is PIO 0 and the controller
1617 state is undefined. Record the mode */
1618
1619 for (i = 0; i < ATA_MAX_DEVICES; i++)
1620 ap->device[i].pio_mode = XFER_PIO_0;
1621
28ca5c57 1622 /* read IDENTIFY page and configure devices */
1da177e4 1623 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1624 dev = &ap->device[i];
28ca5c57 1625
ec573755
TH		 1626 if (tries[i])
1627 dev->class = classes[i];
ffeae418 1628
14d2bac1 1629 if (!ata_dev_enabled(dev))
ffeae418 1630 continue;
ffeae418 1631
3373efd8 1632 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
14d2bac1
TH		 1633 if (rc)
1634 goto fail;
1635
3373efd8 1636 rc = ata_dev_configure(dev, 1);
14d2bac1
TH		 1637 if (rc)
1638 goto fail;
1da177e4
LT		 1639 }
1640
e82cbdb9 1641 /* configure transfer mode */
3adcebb2 1642 rc = ata_set_mode(ap, &dev);
51713d35
TH		 1643 if (rc) {
1644 down_xfermask = 1;
1645 goto fail;
e82cbdb9 1646 }
1da177e4 1647
e82cbdb9
TH		 1648 for (i = 0; i < ATA_MAX_DEVICES; i++)
1649 if (ata_dev_enabled(&ap->device[i]))
1650 return 0;
1da177e4 1651
e82cbdb9
TH		 1652 /* no device present, disable port */
1653 ata_port_disable(ap);
1da177e4 1654 ap->ops->port_disable(ap);
96072e69 1655 return -ENODEV;
14d2bac1
TH		 1656
1657 fail:
1658 switch (rc) {
1659 case -EINVAL:
1660 case -ENODEV:
1661 tries[dev->devno] = 0;
1662 break;
1663 case -EIO:
3c567b7d 1664 sata_down_spd_limit(ap);
14d2bac1
TH		 1665 /* fall through */
1666 default:
1667 tries[dev->devno]--;
1668 if (down_xfermask &&
3373efd8 1669 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
14d2bac1
TH		 1670 tries[dev->devno] = 0;
1671 }
1672
ec573755 1673 if (!tries[dev->devno]) {
3373efd8
TH		 1674 ata_down_xfermask_limit(dev, 1);
1675 ata_dev_disable(dev);
ec573755
TH		 1676 }
1677
14d2bac1 1678 goto retry;
1da177e4
LT		 1679}
1680
1681/**
0cba632b
JG		 1682 * ata_port_probe - Mark port as enabled
1683 * @ap: Port for which we indicate enablement
1da177e4 1684 *
0cba632b
JG		 1685 * Modify @ap data structure such that the system
1686 * thinks that the entire port is enabled.
1687 *
cca3974e 1688 * LOCKING: host lock, or some other form of
0cba632b 1689 * serialization.
1da177e4
LT		 1690 */
1691
1692void ata_port_probe(struct ata_port *ap)
1693{
198e0fed 1694 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1695}
1696
3be680b7
TH		 1697/**
1698 * sata_print_link_status - Print SATA link status
1699 * @ap: SATA port to printk link status about
1700 *
1701 * This function prints link speed and status of a SATA link.
1702 *
1703 * LOCKING:
1704 * None.
1705 */
1706static void sata_print_link_status(struct ata_port *ap)
1707{
6d5f9732 1708 u32 sstatus, scontrol, tmp;
3be680b7 1709
81952c54 1710 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
3be680b7 1711 return;
81952c54 1712 sata_scr_read(ap, SCR_CONTROL, &scontrol);
3be680b7 1713
81952c54 1714 if (ata_port_online(ap)) {
3be680b7 1715 tmp = (sstatus >> 4) & 0xf;
f15a1daf
TH		 1716 ata_port_printk(ap, KERN_INFO,
1717 "SATA link up %s (SStatus %X SControl %X)\n",
1718 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1719 } else {
f15a1daf
TH		 1720 ata_port_printk(ap, KERN_INFO,
1721 "SATA link down (SStatus %X SControl %X)\n",
1722 sstatus, scontrol);
3be680b7
TH		 1723 }
1724}
1725
1da177e4 1726/**
780a87f7
JG		 1727 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1728 * @ap: SATA port associated with target SATA PHY.
1da177e4 1729 *
780a87f7
JG		 1730 * This function issues commands to standard SATA Sxxx
1731 * PHY registers, to wake up the phy (and device), and
1732 * clear any reset condition.
1da177e4
LT		 1733 *
1734 * LOCKING:
0cba632b 1735 * PCI/etc. bus probe sem.
1da177e4
LT		 1736 *
1737 */
1738void __sata_phy_reset(struct ata_port *ap)
1739{
1740 u32 sstatus;
1741 unsigned long timeout = jiffies + (HZ * 5);
1742
1743 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e 1744 /* issue phy wake/reset */
81952c54 1745 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1746 /* Couldn't find anything in SATA I/II specs, but
1747 * AHCI-1.1 10.4.2 says at least 1 ms. */
1748 mdelay(1);
1da177e4 1749 }
81952c54
TH		 1750 /* phy wake/clear reset */
1751 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1da177e4
LT		 1752
1753 /* wait for phy to become ready, if necessary */
1754 do {
1755 msleep(200);
81952c54 1756 sata_scr_read(ap, SCR_STATUS, &sstatus);
1da177e4
LT		 1757 if ((sstatus & 0xf) != 1)
1758 break;
1759 } while (time_before(jiffies, timeout));
1760
3be680b7
TH		 1761 /* print link status */
1762 sata_print_link_status(ap);
656563e3 1763
3be680b7 1764 /* TODO: phy layer with polling, timeouts, etc. */
81952c54 1765 if (!ata_port_offline(ap))
1da177e4 1766 ata_port_probe(ap);
3be680b7 1767 else
1da177e4 1768 ata_port_disable(ap);
1da177e4 1769
198e0fed 1770 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1771 return;
1772
1773 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1774 ata_port_disable(ap);
1775 return;
1776 }
1777
1778 ap->cbl = ATA_CBL_SATA;
1779}
1780
1781/**
780a87f7
JG		 1782 * sata_phy_reset - Reset SATA bus.
1783 * @ap: SATA port associated with target SATA PHY.
1da177e4 1784 *
780a87f7
JG		 1785 * This function resets the SATA bus, and then probes
1786 * the bus for devices.
1da177e4
LT		 1787 *
1788 * LOCKING:
0cba632b 1789 * PCI/etc. bus probe sem.
1da177e4
LT		 1790 *
1791 */
1792void sata_phy_reset(struct ata_port *ap)
1793{
1794 __sata_phy_reset(ap);
198e0fed 1795 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1796 return;
1797 ata_bus_reset(ap);
1798}
1799
ebdfca6e
AC		 1800/**
1801 * ata_dev_pair - return other device on cable
ebdfca6e
AC		 1802 * @adev: device
1803 *
1804 * Obtain the other device on the same cable, or if none is
1805 * present NULL is returned
1806 */
2e9edbf8 1807
3373efd8 1808struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 1809{
3373efd8 1810 struct ata_port *ap = adev->ap;
ebdfca6e 1811 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1812 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1813 return NULL;
1814 return pair;
1815}
1816
1da177e4 1817/**
780a87f7
JG		 1818 * ata_port_disable - Disable port.
1819 * @ap: Port to be disabled.
1da177e4 1820 *
780a87f7
JG		 1821 * Modify @ap data structure such that the system
1822 * thinks that the entire port is disabled, and should
1823 * never attempt to probe or communicate with devices
1824 * on this port.
1825 *
cca3974e 1826 * LOCKING: host lock, or some other form of
780a87f7 1827 * serialization.
1da177e4
LT		 1828 */
1829
1830void ata_port_disable(struct ata_port *ap)
1831{
1832 ap->device[0].class = ATA_DEV_NONE;
1833 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1834 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1835}
1836
1c3fae4d 1837/**
3c567b7d 1838 * sata_down_spd_limit - adjust SATA spd limit downward
1c3fae4d
TH		 1839 * @ap: Port to adjust SATA spd limit for
1840 *
1841 * Adjust SATA spd limit of @ap downward. Note that this
1842 * function only adjusts the limit. The change must be applied
3c567b7d 1843 * using sata_set_spd().
1c3fae4d
TH		 1844 *
1845 * LOCKING:
1846 * Inherited from caller.
1847 *
1848 * RETURNS:
1849 * 0 on success, negative errno on failure
1850 */
3c567b7d 1851int sata_down_spd_limit(struct ata_port *ap)
1c3fae4d 1852{
81952c54
TH		 1853 u32 sstatus, spd, mask;
1854 int rc, highbit;
1c3fae4d 1855
81952c54
TH		 1856 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1857 if (rc)
1858 return rc;
1c3fae4d
TH		 1859
1860 mask = ap->sata_spd_limit;
1861 if (mask <= 1)
1862 return -EINVAL;
1863 highbit = fls(mask) - 1;
1864 mask &= ~(1 << highbit);
1865
81952c54 1866 spd = (sstatus >> 4) & 0xf;
1c3fae4d
TH		 1867 if (spd <= 1)
1868 return -EINVAL;
1869 spd--;
1870 mask &= (1 << spd) - 1;
1871 if (!mask)
1872 return -EINVAL;
1873
1874 ap->sata_spd_limit = mask;
1875
f15a1daf
TH		 1876 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1877 sata_spd_string(fls(mask)));
1c3fae4d
TH		 1878
1879 return 0;
1880}
1881
3c567b7d 1882static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1c3fae4d
TH		 1883{
1884 u32 spd, limit;
1885
1886 if (ap->sata_spd_limit == UINT_MAX)
1887 limit = 0;
1888 else
1889 limit = fls(ap->sata_spd_limit);
1890
1891 spd = (*scontrol >> 4) & 0xf;
1892 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1893
1894 return spd != limit;
1895}
1896
1897/**
3c567b7d 1898 * sata_set_spd_needed - is SATA spd configuration needed
1c3fae4d
TH		 1899 * @ap: Port in question
1900 *
1901 * Test whether the spd limit in SControl matches
1902 * @ap->sata_spd_limit. This function is used to determine
1903 * whether hardreset is necessary to apply SATA spd
1904 * configuration.
1905 *
1906 * LOCKING:
1907 * Inherited from caller.
1908 *
1909 * RETURNS:
1910 * 1 if SATA spd configuration is needed, 0 otherwise.
1911 */
3c567b7d 1912int sata_set_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1913{
1914 u32 scontrol;
1915
81952c54 1916 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1c3fae4d
TH		 1917 return 0;
1918
3c567b7d 1919 return __sata_set_spd_needed(ap, &scontrol);
1c3fae4d
TH		 1920}
1921
1922/**
3c567b7d 1923 * sata_set_spd - set SATA spd according to spd limit
1c3fae4d
TH		 1924 * @ap: Port to set SATA spd for
1925 *
1926 * Set SATA spd of @ap according to sata_spd_limit.
1927 *
1928 * LOCKING:
1929 * Inherited from caller.
1930 *
1931 * RETURNS:
1932 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 1933 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 1934 */
3c567b7d 1935int sata_set_spd(struct ata_port *ap)
1c3fae4d
TH		 1936{
1937 u32 scontrol;
81952c54 1938 int rc;
1c3fae4d 1939
81952c54
TH		 1940 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1941 return rc;
1c3fae4d 1942
3c567b7d 1943 if (!__sata_set_spd_needed(ap, &scontrol))
1c3fae4d
TH		 1944 return 0;
1945
81952c54
TH		 1946 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1947 return rc;
1948
1c3fae4d
TH		 1949 return 1;
1950}
1951
452503f9
AC		 1952/*
1953 * This mode timing computation functionality is ported over from
1954 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1955 */
1956/*
b352e57d 1957 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 1958 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC		 1959 * for UDMA6, which is currently supported only by Maxtor drives.
1960 *
1961 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC		 1962 */
1963
1964static const struct ata_timing ata_timing[] = {
1965
1966 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1967 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1968 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1969 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1970
b352e57d
AC		 1971 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
1972 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
452503f9
AC		 1973 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1974 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1975 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1976
1977/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1978
452503f9
AC		 1979 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1980 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1981 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1982
452503f9
AC		 1983 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1984 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1985 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1986
b352e57d
AC		 1987 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
1988 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
452503f9
AC		 1989 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1990 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1991
1992 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1993 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1994 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1995
1996/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1997
1998 { 0xFF }
1999};
2000
2001#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2002#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2003
2004static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2005{
2006 q->setup = EZ(t->setup * 1000, T);
2007 q->act8b = EZ(t->act8b * 1000, T);
2008 q->rec8b = EZ(t->rec8b * 1000, T);
2009 q->cyc8b = EZ(t->cyc8b * 1000, T);
2010 q->active = EZ(t->active * 1000, T);
2011 q->recover = EZ(t->recover * 1000, T);
2012 q->cycle = EZ(t->cycle * 1000, T);
2013 q->udma = EZ(t->udma * 1000, UT);
2014}
2015
2016void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2017 struct ata_timing *m, unsigned int what)
2018{
2019 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2020 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2021 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2022 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2023 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2024 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2025 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2026 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2027}
2028
2029static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2030{
2031 const struct ata_timing *t;
2032
2033 for (t = ata_timing; t->mode != speed; t++)
91190758 2034 if (t->mode == 0xFF)
452503f9 2035 return NULL;
2e9edbf8 2036 return t;
452503f9
AC		 2037}
2038
2039int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2040 struct ata_timing *t, int T, int UT)
2041{
2042 const struct ata_timing *s;
2043 struct ata_timing p;
2044
2045 /*
2e9edbf8 2046 * Find the mode.
75b1f2f8 2047 */
452503f9
AC		 2048
2049 if (!(s = ata_timing_find_mode(speed)))
2050 return -EINVAL;
2051
75b1f2f8
AL		 2052 memcpy(t, s, sizeof(*s));
2053
452503f9
AC		 2054 /*
2055 * If the drive is an EIDE drive, it can tell us it needs extended
2056 * PIO/MW_DMA cycle timing.
2057 */
2058
2059 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2060 memset(&p, 0, sizeof(p));
2061 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2062 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2063 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2064 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2065 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2066 }
2067 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2068 }
2069
2070 /*
2071 * Convert the timing to bus clock counts.
2072 */
2073
75b1f2f8 2074 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 2075
2076 /*
c893a3ae
RD		 2077 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2078 * S.M.A.R.T * and some other commands. We have to ensure that the
2079 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 2080 */
2081
2082 if (speed > XFER_PIO_4) {
2083 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2084 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2085 }
2086
2087 /*
c893a3ae 2088 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 2089 */
2090
2091 if (t->act8b + t->rec8b < t->cyc8b) {
2092 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2093 t->rec8b = t->cyc8b - t->act8b;
2094 }
2095
2096 if (t->active + t->recover < t->cycle) {
2097 t->active += (t->cycle - (t->active + t->recover)) / 2;
2098 t->recover = t->cycle - t->active;
2099 }
2100
2101 return 0;
2102}
2103
cf176e1a
TH		 2104/**
2105 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a
TH		 2106 * @dev: Device to adjust xfer masks
2107 * @force_pio0: Force PIO0
2108 *
2109 * Adjust xfer masks of @dev downward. Note that this function
2110 * does not apply the change. Invoking ata_set_mode() afterwards
2111 * will apply the limit.
2112 *
2113 * LOCKING:
2114 * Inherited from caller.
2115 *
2116 * RETURNS:
2117 * 0 on success, negative errno on failure
2118 */
3373efd8 2119int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
cf176e1a
TH		 2120{
2121 unsigned long xfer_mask;
2122 int highbit;
2123
2124 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2125 dev->udma_mask);
2126
2127 if (!xfer_mask)
2128 goto fail;
2129 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2130 if (xfer_mask & ATA_MASK_UDMA)
2131 xfer_mask &= ~ATA_MASK_MWDMA;
2132
2133 highbit = fls(xfer_mask) - 1;
2134 xfer_mask &= ~(1 << highbit);
2135 if (force_pio0)
2136 xfer_mask &= 1 << ATA_SHIFT_PIO;
2137 if (!xfer_mask)
2138 goto fail;
2139
2140 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2141 &dev->udma_mask);
2142
f15a1daf
TH		 2143 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2144 ata_mode_string(xfer_mask));
cf176e1a
TH		 2145
2146 return 0;
2147
2148 fail:
2149 return -EINVAL;
2150}
2151
3373efd8 2152static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 2153{
83206a29
TH		 2154 unsigned int err_mask;
2155 int rc;
1da177e4 2156
e8384607 2157 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 2158 if (dev->xfer_shift == ATA_SHIFT_PIO)
2159 dev->flags |= ATA_DFLAG_PIO;
2160
3373efd8 2161 err_mask = ata_dev_set_xfermode(dev);
83206a29 2162 if (err_mask) {
f15a1daf
TH		 2163 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2164 "(err_mask=0x%x)\n", err_mask);
83206a29
TH		 2165 return -EIO;
2166 }
1da177e4 2167
3373efd8 2168 rc = ata_dev_revalidate(dev, 0);
5eb45c02 2169 if (rc)
83206a29 2170 return rc;
48a8a14f 2171
23e71c3d
TH		 2172 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2173 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 2174
f15a1daf
TH		 2175 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2176 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 2177 return 0;
1da177e4
LT		 2178}
2179
1da177e4
LT		 2180/**
2181 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2182 * @ap: port on which timings will be programmed
e82cbdb9 2183 * @r_failed_dev: out paramter for failed device
1da177e4 2184 *
e82cbdb9
TH		 2185 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2186 * ata_set_mode() fails, pointer to the failing device is
2187 * returned in @r_failed_dev.
780a87f7 2188 *
1da177e4 2189 * LOCKING:
0cba632b 2190 * PCI/etc. bus probe sem.
e82cbdb9
TH		 2191 *
2192 * RETURNS:
2193 * 0 on success, negative errno otherwise
1da177e4 2194 */
1ad8e7f9 2195int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 2196{
e8e0619f 2197 struct ata_device *dev;
e82cbdb9 2198 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 2199
3adcebb2
TH		 2200 /* has private set_mode? */
2201 if (ap->ops->set_mode) {
2202 /* FIXME: make ->set_mode handle no device case and
2203 * return error code and failing device on failure.
2204 */
2205 for (i = 0; i < ATA_MAX_DEVICES; i++) {
02670bf3 2206 if (ata_dev_ready(&ap->device[i])) {
3adcebb2
TH		 2207 ap->ops->set_mode(ap);
2208 break;
2209 }
2210 }
2211 return 0;
2212 }
2213
a6d5a51c
TH		 2214 /* step 1: calculate xfer_mask */
2215 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2216 unsigned int pio_mask, dma_mask;
a6d5a51c 2217
e8e0619f
TH		 2218 dev = &ap->device[i];
2219
e1211e3f 2220 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2221 continue;
2222
3373efd8 2223 ata_dev_xfermask(dev);
1da177e4 2224
acf356b1
TH		 2225 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2226 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2227 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2228 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2229
4f65977d 2230 found = 1;
5444a6f4
AC		 2231 if (dev->dma_mode)
2232 used_dma = 1;
a6d5a51c 2233 }
4f65977d 2234 if (!found)
e82cbdb9 2235 goto out;
a6d5a51c
TH		 2236
2237 /* step 2: always set host PIO timings */
e8e0619f
TH		 2238 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2239 dev = &ap->device[i];
2240 if (!ata_dev_enabled(dev))
2241 continue;
2242
2243 if (!dev->pio_mode) {
f15a1daf 2244 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
e8e0619f 2245 rc = -EINVAL;
e82cbdb9 2246 goto out;
e8e0619f
TH		 2247 }
2248
2249 dev->xfer_mode = dev->pio_mode;
2250 dev->xfer_shift = ATA_SHIFT_PIO;
2251 if (ap->ops->set_piomode)
2252 ap->ops->set_piomode(ap, dev);
2253 }
1da177e4 2254
a6d5a51c 2255 /* step 3: set host DMA timings */
e8e0619f
TH		 2256 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2257 dev = &ap->device[i];
2258
2259 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2260 continue;
2261
2262 dev->xfer_mode = dev->dma_mode;
2263 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2264 if (ap->ops->set_dmamode)
2265 ap->ops->set_dmamode(ap, dev);
2266 }
1da177e4
LT		 2267
2268 /* step 4: update devices' xfer mode */
83206a29 2269 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2270 dev = &ap->device[i];
1da177e4 2271
02670bf3
TH		 2272 /* don't udpate suspended devices' xfer mode */
2273 if (!ata_dev_ready(dev))
83206a29
TH		 2274 continue;
2275
3373efd8 2276 rc = ata_dev_set_mode(dev);
5bbc53f4 2277 if (rc)
e82cbdb9 2278 goto out;
83206a29 2279 }
1da177e4 2280
e8e0619f
TH		 2281 /* Record simplex status. If we selected DMA then the other
2282 * host channels are not permitted to do so.
5444a6f4 2283 */
cca3974e
JG		 2284 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2285 ap->host->simplex_claimed = 1;
5444a6f4 2286
e8e0619f 2287 /* step5: chip specific finalisation */
1da177e4
LT		 2288 if (ap->ops->post_set_mode)
2289 ap->ops->post_set_mode(ap);
2290
e82cbdb9
TH		 2291 out:
2292 if (rc)
2293 *r_failed_dev = dev;
2294 return rc;
1da177e4
LT		 2295}
2296
1fdffbce
JG		 2297/**
2298 * ata_tf_to_host - issue ATA taskfile to host controller
2299 * @ap: port to which command is being issued
2300 * @tf: ATA taskfile register set
2301 *
2302 * Issues ATA taskfile register set to ATA host controller,
2303 * with proper synchronization with interrupt handler and
2304 * other threads.
2305 *
2306 * LOCKING:
cca3974e 2307 * spin_lock_irqsave(host lock)
1fdffbce
JG		 2308 */
2309
2310static inline void ata_tf_to_host(struct ata_port *ap,
2311 const struct ata_taskfile *tf)
2312{
2313 ap->ops->tf_load(ap, tf);
2314 ap->ops->exec_command(ap, tf);
2315}
2316
1da177e4
LT		 2317/**
2318 * ata_busy_sleep - sleep until BSY clears, or timeout
2319 * @ap: port containing status register to be polled
2320 * @tmout_pat: impatience timeout
2321 * @tmout: overall timeout
2322 *
780a87f7
JG		 2323 * Sleep until ATA Status register bit BSY clears,
2324 * or a timeout occurs.
2325 *
2326 * LOCKING: None.
1da177e4
LT		 2327 */
2328
6f8b9958
TH		 2329unsigned int ata_busy_sleep (struct ata_port *ap,
2330 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2331{
2332 unsigned long timer_start, timeout;
2333 u8 status;
2334
2335 status = ata_busy_wait(ap, ATA_BUSY, 300);
2336 timer_start = jiffies;
2337 timeout = timer_start + tmout_pat;
2338 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2339 msleep(50);
2340 status = ata_busy_wait(ap, ATA_BUSY, 3);
2341 }
2342
2343 if (status & ATA_BUSY)
f15a1daf 2344 ata_port_printk(ap, KERN_WARNING,
35aa7a43
JG		 2345 "port is slow to respond, please be patient "
2346 "(Status 0x%x)\n", status);
1da177e4
LT		 2347
2348 timeout = timer_start + tmout;
2349 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2350 msleep(50);
2351 status = ata_chk_status(ap);
2352 }
2353
2354 if (status & ATA_BUSY) {
f15a1daf 2355 ata_port_printk(ap, KERN_ERR, "port failed to respond "
35aa7a43
JG		 2356 "(%lu secs, Status 0x%x)\n",
2357 tmout / HZ, status);
1da177e4
LT		 2358 return 1;
2359 }
2360
2361 return 0;
2362}
2363
2364static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2365{
2366 struct ata_ioports *ioaddr = &ap->ioaddr;
2367 unsigned int dev0 = devmask & (1 << 0);
2368 unsigned int dev1 = devmask & (1 << 1);
2369 unsigned long timeout;
2370
2371 /* if device 0 was found in ata_devchk, wait for its
2372 * BSY bit to clear
2373 */
2374 if (dev0)
2375 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2376
2377 /* if device 1 was found in ata_devchk, wait for
2378 * register access, then wait for BSY to clear
2379 */
2380 timeout = jiffies + ATA_TMOUT_BOOT;
2381 while (dev1) {
2382 u8 nsect, lbal;
2383
2384 ap->ops->dev_select(ap, 1);
2385 if (ap->flags & ATA_FLAG_MMIO) {
2386 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2387 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2388 } else {
2389 nsect = inb(ioaddr->nsect_addr);
2390 lbal = inb(ioaddr->lbal_addr);
2391 }
2392 if ((nsect == 1) && (lbal == 1))
2393 break;
2394 if (time_after(jiffies, timeout)) {
2395 dev1 = 0;
2396 break;
2397 }
2398 msleep(50); /* give drive a breather */
2399 }
2400 if (dev1)
2401 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2402
2403 /* is all this really necessary? */
2404 ap->ops->dev_select(ap, 0);
2405 if (dev1)
2406 ap->ops->dev_select(ap, 1);
2407 if (dev0)
2408 ap->ops->dev_select(ap, 0);
2409}
2410
1da177e4
LT		 2411static unsigned int ata_bus_softreset(struct ata_port *ap,
2412 unsigned int devmask)
2413{
2414 struct ata_ioports *ioaddr = &ap->ioaddr;
2415
2416 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2417
2418 /* software reset. causes dev0 to be selected */
2419 if (ap->flags & ATA_FLAG_MMIO) {
2420 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2421 udelay(20); /* FIXME: flush */
2422 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2423 udelay(20); /* FIXME: flush */
2424 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2425 } else {
2426 outb(ap->ctl, ioaddr->ctl_addr);
2427 udelay(10);
2428 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2429 udelay(10);
2430 outb(ap->ctl, ioaddr->ctl_addr);
2431 }
2432
2433 /* spec mandates ">= 2ms" before checking status.
2434 * We wait 150ms, because that was the magic delay used for
2435 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2436 * between when the ATA command register is written, and then
2437 * status is checked. Because waiting for "a while" before
2438 * checking status is fine, post SRST, we perform this magic
2439 * delay here as well.
09c7ad79
AC		 2440 *
2441 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2442 */
2443 msleep(150);
2444
2e9edbf8 2445 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2446 * the bus shows 0xFF because the odd clown forgets the D7
2447 * pulldown resistor.
2448 */
987d2f05 2449 if (ata_check_status(ap) == 0xFF) {
f15a1daf 2450 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
298a41ca 2451 return AC_ERR_OTHER;
987d2f05 2452 }
09c7ad79 2453
1da177e4
LT		 2454 ata_bus_post_reset(ap, devmask);
2455
2456 return 0;
2457}
2458
2459/**
2460 * ata_bus_reset - reset host port and associated ATA channel
2461 * @ap: port to reset
2462 *
2463 * This is typically the first time we actually start issuing
2464 * commands to the ATA channel. We wait for BSY to clear, then
2465 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2466 * result. Determine what devices, if any, are on the channel
2467 * by looking at the device 0/1 error register. Look at the signature
2468 * stored in each device's taskfile registers, to determine if
2469 * the device is ATA or ATAPI.
2470 *
2471 * LOCKING:
0cba632b 2472 * PCI/etc. bus probe sem.
cca3974e 2473 * Obtains host lock.
1da177e4
LT		 2474 *
2475 * SIDE EFFECTS:
198e0fed 2476 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2477 */
2478
2479void ata_bus_reset(struct ata_port *ap)
2480{
2481 struct ata_ioports *ioaddr = &ap->ioaddr;
2482 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2483 u8 err;
aec5c3c1 2484 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2485
2486 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2487
2488 /* determine if device 0/1 are present */
2489 if (ap->flags & ATA_FLAG_SATA_RESET)
2490 dev0 = 1;
2491 else {
2492 dev0 = ata_devchk(ap, 0);
2493 if (slave_possible)
2494 dev1 = ata_devchk(ap, 1);
2495 }
2496
2497 if (dev0)
2498 devmask |= (1 << 0);
2499 if (dev1)
2500 devmask |= (1 << 1);
2501
2502 /* select device 0 again */
2503 ap->ops->dev_select(ap, 0);
2504
2505 /* issue bus reset */
2506 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2507 if (ata_bus_softreset(ap, devmask))
2508 goto err_out;
1da177e4
LT		 2509
2510 /*
2511 * determine by signature whether we have ATA or ATAPI devices
2512 */
b4dc7623 2513 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2514 if ((slave_possible) && (err != 0x81))
b4dc7623 2515 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2516
2517 /* re-enable interrupts */
2518 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2519 ata_irq_on(ap);
2520
2521 /* is double-select really necessary? */
2522 if (ap->device[1].class != ATA_DEV_NONE)
2523 ap->ops->dev_select(ap, 1);
2524 if (ap->device[0].class != ATA_DEV_NONE)
2525 ap->ops->dev_select(ap, 0);
2526
2527 /* if no devices were detected, disable this port */
2528 if ((ap->device[0].class == ATA_DEV_NONE) &&
2529 (ap->device[1].class == ATA_DEV_NONE))
2530 goto err_out;
2531
2532 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2533 /* set up device control for ATA_FLAG_SATA_RESET */
2534 if (ap->flags & ATA_FLAG_MMIO)
2535 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2536 else
2537 outb(ap->ctl, ioaddr->ctl_addr);
2538 }
2539
2540 DPRINTK("EXIT\n");
2541 return;
2542
2543err_out:
f15a1daf 2544 ata_port_printk(ap, KERN_ERR, "disabling port\n");
1da177e4
LT		 2545 ap->ops->port_disable(ap);
2546
2547 DPRINTK("EXIT\n");
2548}
2549
d7bb4cc7
TH		 2550/**
2551 * sata_phy_debounce - debounce SATA phy status
2552 * @ap: ATA port to debounce SATA phy status for
2553 * @params: timing parameters { interval, duratinon, timeout } in msec
2554 *
2555 * Make sure SStatus of @ap reaches stable state, determined by
2556 * holding the same value where DET is not 1 for @duration polled
2557 * every @interval, before @timeout. Timeout constraints the
2558 * beginning of the stable state. Because, after hot unplugging,
2559 * DET gets stuck at 1 on some controllers, this functions waits
2560 * until timeout then returns 0 if DET is stable at 1.
2561 *
2562 * LOCKING:
2563 * Kernel thread context (may sleep)
2564 *
2565 * RETURNS:
2566 * 0 on success, -errno on failure.
2567 */
2568int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
7a7921e8 2569{
d7bb4cc7
TH		 2570 unsigned long interval_msec = params[0];
2571 unsigned long duration = params[1] * HZ / 1000;
2572 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2573 unsigned long last_jiffies;
2574 u32 last, cur;
2575 int rc;
2576
2577 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2578 return rc;
2579 cur &= 0xf;
2580
2581 last = cur;
2582 last_jiffies = jiffies;
2583
2584 while (1) {
2585 msleep(interval_msec);
2586 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2587 return rc;
2588 cur &= 0xf;
2589
2590 /* DET stable? */
2591 if (cur == last) {
2592 if (cur == 1 && time_before(jiffies, timeout))
2593 continue;
2594 if (time_after(jiffies, last_jiffies + duration))
2595 return 0;
2596 continue;
2597 }
2598
2599 /* unstable, start over */
2600 last = cur;
2601 last_jiffies = jiffies;
2602
2603 /* check timeout */
2604 if (time_after(jiffies, timeout))
2605 return -EBUSY;
2606 }
2607}
2608
2609/**
2610 * sata_phy_resume - resume SATA phy
2611 * @ap: ATA port to resume SATA phy for
2612 * @params: timing parameters { interval, duratinon, timeout } in msec
2613 *
2614 * Resume SATA phy of @ap and debounce it.
2615 *
2616 * LOCKING:
2617 * Kernel thread context (may sleep)
2618 *
2619 * RETURNS:
2620 * 0 on success, -errno on failure.
2621 */
2622int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2623{
2624 u32 scontrol;
81952c54
TH		 2625 int rc;
2626
2627 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2628 return rc;
7a7921e8 2629
852ee16a 2630 scontrol = (scontrol & 0x0f0) | 0x300;
81952c54
TH		 2631
2632 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2633 return rc;
7a7921e8 2634
d7bb4cc7
TH		 2635 /* Some PHYs react badly if SStatus is pounded immediately
2636 * after resuming. Delay 200ms before debouncing.
2637 */
2638 msleep(200);
7a7921e8 2639
d7bb4cc7 2640 return sata_phy_debounce(ap, params);
7a7921e8
TH		 2641}
2642
f5914a46
TH		 2643static void ata_wait_spinup(struct ata_port *ap)
2644{
2645 struct ata_eh_context *ehc = &ap->eh_context;
2646 unsigned long end, secs;
2647 int rc;
2648
2649 /* first, debounce phy if SATA */
2650 if (ap->cbl == ATA_CBL_SATA) {
e9c83914 2651 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
f5914a46
TH		 2652
2653 /* if debounced successfully and offline, no need to wait */
2654 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2655 return;
2656 }
2657
2658 /* okay, let's give the drive time to spin up */
2659 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2660 secs = ((end - jiffies) + HZ - 1) / HZ;
2661
2662 if (time_after(jiffies, end))
2663 return;
2664
2665 if (secs > 5)
2666 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2667 "(%lu secs)\n", secs);
2668
2669 schedule_timeout_uninterruptible(end - jiffies);
2670}
2671
2672/**
2673 * ata_std_prereset - prepare for reset
2674 * @ap: ATA port to be reset
2675 *
2676 * @ap is about to be reset. Initialize it.
2677 *
2678 * LOCKING:
2679 * Kernel thread context (may sleep)
2680 *
2681 * RETURNS:
2682 * 0 on success, -errno otherwise.
2683 */
2684int ata_std_prereset(struct ata_port *ap)
2685{
2686 struct ata_eh_context *ehc = &ap->eh_context;
e9c83914 2687 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH		 2688 int rc;
2689
28324304
TH		 2690 /* handle link resume & hotplug spinup */
2691 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2692 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2693 ehc->i.action |= ATA_EH_HARDRESET;
2694
2695 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2696 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2697 ata_wait_spinup(ap);
f5914a46
TH		 2698
2699 /* if we're about to do hardreset, nothing more to do */
2700 if (ehc->i.action & ATA_EH_HARDRESET)
2701 return 0;
2702
2703 /* if SATA, resume phy */
2704 if (ap->cbl == ATA_CBL_SATA) {
f5914a46
TH		 2705 rc = sata_phy_resume(ap, timing);
2706 if (rc && rc != -EOPNOTSUPP) {
2707 /* phy resume failed */
2708 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2709 "link for reset (errno=%d)\n", rc);
2710 return rc;
2711 }
2712 }
2713
2714 /* Wait for !BSY if the controller can wait for the first D2H
2715 * Reg FIS and we don't know that no device is attached.
2716 */
2717 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2718 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2719
2720 return 0;
2721}
2722
c2bd5804
TH		 2723/**
2724 * ata_std_softreset - reset host port via ATA SRST
2725 * @ap: port to reset
c2bd5804
TH		 2726 * @classes: resulting classes of attached devices
2727 *
52783c5d 2728 * Reset host port using ATA SRST.
c2bd5804
TH		 2729 *
2730 * LOCKING:
2731 * Kernel thread context (may sleep)
2732 *
2733 * RETURNS:
2734 * 0 on success, -errno otherwise.
2735 */
2bf2cb26 2736int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
c2bd5804
TH		 2737{
2738 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2739 unsigned int devmask = 0, err_mask;
2740 u8 err;
2741
2742 DPRINTK("ENTER\n");
2743
81952c54 2744 if (ata_port_offline(ap)) {
3a39746a
TH		 2745 classes[0] = ATA_DEV_NONE;
2746 goto out;
2747 }
2748
c2bd5804
TH		 2749 /* determine if device 0/1 are present */
2750 if (ata_devchk(ap, 0))
2751 devmask |= (1 << 0);
2752 if (slave_possible && ata_devchk(ap, 1))
2753 devmask |= (1 << 1);
2754
c2bd5804
TH		 2755 /* select device 0 again */
2756 ap->ops->dev_select(ap, 0);
2757
2758 /* issue bus reset */
2759 DPRINTK("about to softreset, devmask=%x\n", devmask);
2760 err_mask = ata_bus_softreset(ap, devmask);
2761 if (err_mask) {
f15a1daf
TH		 2762 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2763 err_mask);
c2bd5804
TH		 2764 return -EIO;
2765 }
2766
2767 /* determine by signature whether we have ATA or ATAPI devices */
2768 classes[0] = ata_dev_try_classify(ap, 0, &err);
2769 if (slave_possible && err != 0x81)
2770 classes[1] = ata_dev_try_classify(ap, 1, &err);
2771
3a39746a 2772 out:
c2bd5804
TH		 2773 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2774 return 0;
2775}
2776
2777/**
2778 * sata_std_hardreset - reset host port via SATA phy reset
2779 * @ap: port to reset
c2bd5804
TH		 2780 * @class: resulting class of attached device
2781 *
2782 * SATA phy-reset host port using DET bits of SControl register.
c2bd5804
TH		 2783 *
2784 * LOCKING:
2785 * Kernel thread context (may sleep)
2786 *
2787 * RETURNS:
2788 * 0 on success, -errno otherwise.
2789 */
2bf2cb26 2790int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
c2bd5804 2791{
e9c83914
TH		 2792 struct ata_eh_context *ehc = &ap->eh_context;
2793 const unsigned long *timing = sata_ehc_deb_timing(ehc);
852ee16a 2794 u32 scontrol;
81952c54 2795 int rc;
852ee16a 2796
c2bd5804
TH		 2797 DPRINTK("ENTER\n");
2798
3c567b7d 2799 if (sata_set_spd_needed(ap)) {
1c3fae4d
TH		 2800 /* SATA spec says nothing about how to reconfigure
2801 * spd. To be on the safe side, turn off phy during
2802 * reconfiguration. This works for at least ICH7 AHCI
2803 * and Sil3124.
2804 */
81952c54
TH		 2805 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2806 return rc;
2807
a34b6fc0 2808 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54
TH		 2809
2810 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2811 return rc;
1c3fae4d 2812
3c567b7d 2813 sata_set_spd(ap);
1c3fae4d
TH		 2814 }
2815
2816 /* issue phy wake/reset */
81952c54
TH		 2817 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2818 return rc;
2819
852ee16a 2820 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54
TH		 2821
2822 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2823 return rc;
c2bd5804 2824
1c3fae4d 2825 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2826 * 10.4.2 says at least 1 ms.
2827 */
2828 msleep(1);
2829
1c3fae4d 2830 /* bring phy back */
e9c83914 2831 sata_phy_resume(ap, timing);
c2bd5804 2832
c2bd5804 2833 /* TODO: phy layer with polling, timeouts, etc. */
81952c54 2834 if (ata_port_offline(ap)) {
c2bd5804
TH		 2835 *class = ATA_DEV_NONE;
2836 DPRINTK("EXIT, link offline\n");
2837 return 0;
2838 }
2839
2840 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
f15a1daf
TH		 2841 ata_port_printk(ap, KERN_ERR,
2842 "COMRESET failed (device not ready)\n");
c2bd5804
TH		 2843 return -EIO;
2844 }
2845
3a39746a
TH		 2846 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2847
c2bd5804
TH		 2848 *class = ata_dev_try_classify(ap, 0, NULL);
2849
2850 DPRINTK("EXIT, class=%u\n", *class);
2851 return 0;
2852}
2853
2854/**
2855 * ata_std_postreset - standard postreset callback
2856 * @ap: the target ata_port
2857 * @classes: classes of attached devices
2858 *
2859 * This function is invoked after a successful reset. Note that
2860 * the device might have been reset more than once using
2861 * different reset methods before postreset is invoked.
c2bd5804 2862 *
c2bd5804
TH		 2863 * LOCKING:
2864 * Kernel thread context (may sleep)
2865 */
2866void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2867{
dc2b3515
TH		 2868 u32 serror;
2869
c2bd5804
TH		 2870 DPRINTK("ENTER\n");
2871
c2bd5804 2872 /* print link status */
81952c54 2873 sata_print_link_status(ap);
c2bd5804 2874
dc2b3515
TH		 2875 /* clear SError */
2876 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2877 sata_scr_write(ap, SCR_ERROR, serror);
2878
3a39746a 2879 /* re-enable interrupts */
e3180499
TH		 2880 if (!ap->ops->error_handler) {
2881 /* FIXME: hack. create a hook instead */
2882 if (ap->ioaddr.ctl_addr)
2883 ata_irq_on(ap);
2884 }
c2bd5804
TH		 2885
2886 /* is double-select really necessary? */
2887 if (classes[0] != ATA_DEV_NONE)
2888 ap->ops->dev_select(ap, 1);
2889 if (classes[1] != ATA_DEV_NONE)
2890 ap->ops->dev_select(ap, 0);
2891
3a39746a
TH		 2892 /* bail out if no device is present */
2893 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2894 DPRINTK("EXIT, no device\n");
2895 return;
2896 }
2897
2898 /* set up device control */
2899 if (ap->ioaddr.ctl_addr) {
2900 if (ap->flags & ATA_FLAG_MMIO)
2901 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2902 else
2903 outb(ap->ctl, ap->ioaddr.ctl_addr);
2904 }
c2bd5804
TH		 2905
2906 DPRINTK("EXIT\n");
2907}
2908
623a3128
TH		 2909/**
2910 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH		 2911 * @dev: device to compare against
2912 * @new_class: class of the new device
2913 * @new_id: IDENTIFY page of the new device
2914 *
2915 * Compare @new_class and @new_id against @dev and determine
2916 * whether @dev is the device indicated by @new_class and
2917 * @new_id.
2918 *
2919 * LOCKING:
2920 * None.
2921 *
2922 * RETURNS:
2923 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2924 */
3373efd8
TH		 2925static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2926 const u16 *new_id)
623a3128
TH		 2927{
2928 const u16 *old_id = dev->id;
2929 unsigned char model[2][41], serial[2][21];
2930 u64 new_n_sectors;
2931
2932 if (dev->class != new_class) {
f15a1daf
TH		 2933 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2934 dev->class, new_class);
623a3128
TH		 2935 return 0;
2936 }
2937
2938 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2939 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2940 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2941 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2942 new_n_sectors = ata_id_n_sectors(new_id);
2943
2944 if (strcmp(model[0], model[1])) {
f15a1daf
TH		 2945 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2946 "'%s' != '%s'\n", model[0], model[1]);
623a3128
TH		 2947 return 0;
2948 }
2949
2950 if (strcmp(serial[0], serial[1])) {
f15a1daf
TH		 2951 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2952 "'%s' != '%s'\n", serial[0], serial[1]);
623a3128
TH		 2953 return 0;
2954 }
2955
2956 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
f15a1daf
TH		 2957 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2958 "%llu != %llu\n",
2959 (unsigned long long)dev->n_sectors,
2960 (unsigned long long)new_n_sectors);
623a3128
TH		 2961 return 0;
2962 }
2963
2964 return 1;
2965}
2966
2967/**
2968 * ata_dev_revalidate - Revalidate ATA device
623a3128
TH		 2969 * @dev: device to revalidate
2970 * @post_reset: is this revalidation after reset?
2971 *
2972 * Re-read IDENTIFY page and make sure @dev is still attached to
2973 * the port.
2974 *
2975 * LOCKING:
2976 * Kernel thread context (may sleep)
2977 *
2978 * RETURNS:
2979 * 0 on success, negative errno otherwise
2980 */
3373efd8 2981int ata_dev_revalidate(struct ata_device *dev, int post_reset)
623a3128 2982{
5eb45c02 2983 unsigned int class = dev->class;
f15a1daf 2984 u16 *id = (void *)dev->ap->sector_buf;
623a3128
TH		 2985 int rc;
2986
5eb45c02
TH		 2987 if (!ata_dev_enabled(dev)) {
2988 rc = -ENODEV;
2989 goto fail;
2990 }
623a3128 2991
fe635c7e 2992 /* read ID data */
3373efd8 2993 rc = ata_dev_read_id(dev, &class, post_reset, id);
623a3128
TH		 2994 if (rc)
2995 goto fail;
2996
2997 /* is the device still there? */
3373efd8 2998 if (!ata_dev_same_device(dev, class, id)) {
623a3128
TH		 2999 rc = -ENODEV;
3000 goto fail;
3001 }
3002
fe635c7e 3003 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
623a3128
TH		 3004
3005 /* configure device according to the new ID */
3373efd8 3006 rc = ata_dev_configure(dev, 0);
5eb45c02
TH		 3007 if (rc == 0)
3008 return 0;
623a3128
TH		 3009
3010 fail:
f15a1daf 3011 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
623a3128
TH		 3012 return rc;
3013}
3014
98ac62de 3015static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 3016 "WDC AC11000H", NULL,
3017 "WDC AC22100H", NULL,
3018 "WDC AC32500H", NULL,
3019 "WDC AC33100H", NULL,
3020 "WDC AC31600H", NULL,
3021 "WDC AC32100H", "24.09P07",
3022 "WDC AC23200L", "21.10N21",
3023 "Compaq CRD-8241B", NULL,
3024 "CRD-8400B", NULL,
3025 "CRD-8480B", NULL,
3026 "CRD-8482B", NULL,
3027 "CRD-84", NULL,
3028 "SanDisk SDP3B", NULL,
3029 "SanDisk SDP3B-64", NULL,
3030 "SANYO CD-ROM CRD", NULL,
3031 "HITACHI CDR-8", NULL,
2e9edbf8 3032 "HITACHI CDR-8335", NULL,
f4b15fef 3033 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 3034 "Toshiba CD-ROM XM-6202B", NULL,
3035 "TOSHIBA CD-ROM XM-1702BC", NULL,
3036 "CD-532E-A", NULL,
3037 "E-IDE CD-ROM CR-840", NULL,
3038 "CD-ROM Drive/F5A", NULL,
3039 "WPI CDD-820", NULL,
f4b15fef 3040 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 3041 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 3042 "SanDisk SDP3B-64", NULL,
3043 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
3044 "_NEC DV5800A", NULL,
3045 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 3046};
2e9edbf8 3047
f4b15fef
AC		 3048static int ata_strim(char *s, size_t len)
3049{
3050 len = strnlen(s, len);
3051
3052 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3053 while ((len > 0) && (s[len - 1] == ' ')) {
3054 len--;
3055 s[len] = 0;
3056 }
3057 return len;
3058}
1da177e4 3059
057ace5e 3060static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 3061{
f4b15fef
AC		 3062 unsigned char model_num[40];
3063 unsigned char model_rev[16];
3064 unsigned int nlen, rlen;
1da177e4
LT		 3065 int i;
3066
3a778275
AL		 3067 /* We don't support polling DMA.
3068 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3069 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3070 */
3071 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3072 (dev->flags & ATA_DFLAG_CDB_INTR))
3073 return 1;
3074
f4b15fef
AC		 3075 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3076 sizeof(model_num));
3077 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3078 sizeof(model_rev));
3079 nlen = ata_strim(model_num, sizeof(model_num));
3080 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 3081
f4b15fef
AC		 3082 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3083 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3084 if (ata_dma_blacklist[i+1] == NULL)
3085 return 1;
3086 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3087 return 1;
3088 }
3089 }
1da177e4
LT		 3090 return 0;
3091}
3092
a6d5a51c
TH		 3093/**
3094 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH		 3095 * @dev: Device to compute xfermask for
3096 *
acf356b1
TH		 3097 * Compute supported xfermask of @dev and store it in
3098 * dev->*_mask. This function is responsible for applying all
3099 * known limits including host controller limits, device
3100 * blacklist, etc...
a6d5a51c
TH		 3101 *
3102 * LOCKING:
3103 * None.
a6d5a51c 3104 */
3373efd8 3105static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 3106{
3373efd8 3107 struct ata_port *ap = dev->ap;
cca3974e 3108 struct ata_host *host = ap->host;
a6d5a51c 3109 unsigned long xfer_mask;
1da177e4 3110
37deecb5 3111 /* controller modes available */
565083e1
TH		 3112 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3113 ap->mwdma_mask, ap->udma_mask);
3114
3115 /* Apply cable rule here. Don't apply it early because when
3116 * we handle hot plug the cable type can itself change.
3117 */
3118 if (ap->cbl == ATA_CBL_PATA40)
3119 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 3120
37deecb5
TH		 3121 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3122 dev->mwdma_mask, dev->udma_mask);
3123 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 3124
b352e57d
AC		 3125 /*
3126 * CFA Advanced TrueIDE timings are not allowed on a shared
3127 * cable
3128 */
3129 if (ata_dev_pair(dev)) {
3130 /* No PIO5 or PIO6 */
3131 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3132 /* No MWDMA3 or MWDMA 4 */
3133 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3134 }
3135
37deecb5
TH		 3136 if (ata_dma_blacklisted(dev)) {
3137 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
f15a1daf
TH		 3138 ata_dev_printk(dev, KERN_WARNING,
3139 "device is on DMA blacklist, disabling DMA\n");
37deecb5 3140 }
a6d5a51c 3141
cca3974e 3142 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
37deecb5
TH		 3143 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3144 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3145 "other device, disabling DMA\n");
5444a6f4 3146 }
565083e1 3147
5444a6f4
AC		 3148 if (ap->ops->mode_filter)
3149 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3150
565083e1
TH		 3151 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3152 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 3153}
3154
1da177e4
LT		 3155/**
3156 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT		 3157 * @dev: Device to which command will be sent
3158 *
780a87f7
JG		 3159 * Issue SET FEATURES - XFER MODE command to device @dev
3160 * on port @ap.
3161 *
1da177e4 3162 * LOCKING:
0cba632b 3163 * PCI/etc. bus probe sem.
83206a29
TH		 3164 *
3165 * RETURNS:
3166 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 3167 */
3168
3373efd8 3169static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 3170{
a0123703 3171 struct ata_taskfile tf;
83206a29 3172 unsigned int err_mask;
1da177e4
LT		 3173
3174 /* set up set-features taskfile */
3175 DPRINTK("set features - xfer mode\n");
3176
3373efd8 3177 ata_tf_init(dev, &tf);
a0123703
TH		 3178 tf.command = ATA_CMD_SET_FEATURES;
3179 tf.feature = SETFEATURES_XFER;
3180 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3181 tf.protocol = ATA_PROT_NODATA;
3182 tf.nsect = dev->xfer_mode;
1da177e4 3183
3373efd8 3184 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 3185
83206a29
TH		 3186 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3187 return err_mask;
1da177e4
LT		 3188}
3189
8bf62ece
AL		 3190/**
3191 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 3192 * @dev: Device to which command will be sent
e2a7f77a
RD		 3193 * @heads: Number of heads (taskfile parameter)
3194 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL		 3195 *
3196 * LOCKING:
6aff8f1f
TH		 3197 * Kernel thread context (may sleep)
3198 *
3199 * RETURNS:
3200 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 3201 */
3373efd8
TH		 3202static unsigned int ata_dev_init_params(struct ata_device *dev,
3203 u16 heads, u16 sectors)
8bf62ece 3204{
a0123703 3205 struct ata_taskfile tf;
6aff8f1f 3206 unsigned int err_mask;
8bf62ece
AL		 3207
3208 /* Number of sectors per track 1-255. Number of heads 1-16 */
3209 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3210 return AC_ERR_INVALID;
8bf62ece
AL		 3211
3212 /* set up init dev params taskfile */
3213 DPRINTK("init dev params \n");
3214
3373efd8 3215 ata_tf_init(dev, &tf);
a0123703
TH		 3216 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3217 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3218 tf.protocol = ATA_PROT_NODATA;
3219 tf.nsect = sectors;
3220 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3221
3373efd8 3222 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3223
6aff8f1f
TH		 3224 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3225 return err_mask;
8bf62ece
AL		 3226}
3227
1da177e4 3228/**
0cba632b
JG		 3229 * ata_sg_clean - Unmap DMA memory associated with command
3230 * @qc: Command containing DMA memory to be released
3231 *
3232 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3233 *
3234 * LOCKING:
cca3974e 3235 * spin_lock_irqsave(host lock)
1da177e4
LT		 3236 */
3237
3238static void ata_sg_clean(struct ata_queued_cmd *qc)
3239{
3240 struct ata_port *ap = qc->ap;
cedc9a47 3241 struct scatterlist *sg = qc->__sg;
1da177e4 3242 int dir = qc->dma_dir;
cedc9a47 3243 void *pad_buf = NULL;
1da177e4 3244
a4631474
TH		 3245 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3246 WARN_ON(sg == NULL);
1da177e4
LT		 3247
3248 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3249 WARN_ON(qc->n_elem > 1);
1da177e4 3250
2c13b7ce 3251 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3252
cedc9a47
JG		 3253 /* if we padded the buffer out to 32-bit bound, and data
3254 * xfer direction is from-device, we must copy from the
3255 * pad buffer back into the supplied buffer
3256 */
3257 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3258 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3259
3260 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3261 if (qc->n_elem)
2f1f610b 3262 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3263 /* restore last sg */
3264 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3265 if (pad_buf) {
3266 struct scatterlist *psg = &qc->pad_sgent;
3267 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3268 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3269 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3270 }
3271 } else {
2e242fa9 3272 if (qc->n_elem)
2f1f610b 3273 dma_unmap_single(ap->dev,
e1410f2d
JG		 3274 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3275 dir);
cedc9a47
JG		 3276 /* restore sg */
3277 sg->length += qc->pad_len;
3278 if (pad_buf)
3279 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3280 pad_buf, qc->pad_len);
3281 }
1da177e4
LT		 3282
3283 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3284 qc->__sg = NULL;
1da177e4
LT		 3285}
3286
3287/**
3288 * ata_fill_sg - Fill PCI IDE PRD table
3289 * @qc: Metadata associated with taskfile to be transferred
3290 *
780a87f7
JG		 3291 * Fill PCI IDE PRD (scatter-gather) table with segments
3292 * associated with the current disk command.
3293 *
1da177e4 3294 * LOCKING:
cca3974e 3295 * spin_lock_irqsave(host lock)
1da177e4
LT		 3296 *
3297 */
3298static void ata_fill_sg(struct ata_queued_cmd *qc)
3299{
1da177e4 3300 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3301 struct scatterlist *sg;
3302 unsigned int idx;
1da177e4 3303
a4631474 3304 WARN_ON(qc->__sg == NULL);
f131883e 3305 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3306
3307 idx = 0;
cedc9a47 3308 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3309 u32 addr, offset;
3310 u32 sg_len, len;
3311
3312 /* determine if physical DMA addr spans 64K boundary.
3313 * Note h/w doesn't support 64-bit, so we unconditionally
3314 * truncate dma_addr_t to u32.
3315 */
3316 addr = (u32) sg_dma_address(sg);
3317 sg_len = sg_dma_len(sg);
3318
3319 while (sg_len) {
3320 offset = addr & 0xffff;
3321 len = sg_len;
3322 if ((offset + sg_len) > 0x10000)
3323 len = 0x10000 - offset;
3324
3325 ap->prd[idx].addr = cpu_to_le32(addr);
3326 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3327 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3328
3329 idx++;
3330 sg_len -= len;
3331 addr += len;
3332 }
3333 }
3334
3335 if (idx)
3336 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3337}
3338/**
3339 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3340 * @qc: Metadata associated with taskfile to check
3341 *
780a87f7
JG		 3342 * Allow low-level driver to filter ATA PACKET commands, returning
3343 * a status indicating whether or not it is OK to use DMA for the
3344 * supplied PACKET command.
3345 *
1da177e4 3346 * LOCKING:
cca3974e 3347 * spin_lock_irqsave(host lock)
0cba632b 3348 *
1da177e4
LT		 3349 * RETURNS: 0 when ATAPI DMA can be used
3350 * nonzero otherwise
3351 */
3352int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3353{
3354 struct ata_port *ap = qc->ap;
3355 int rc = 0; /* Assume ATAPI DMA is OK by default */
3356
3357 if (ap->ops->check_atapi_dma)
3358 rc = ap->ops->check_atapi_dma(qc);
3359
3360 return rc;
3361}
3362/**
3363 * ata_qc_prep - Prepare taskfile for submission
3364 * @qc: Metadata associated with taskfile to be prepared
3365 *
780a87f7
JG		 3366 * Prepare ATA taskfile for submission.
3367 *
1da177e4 3368 * LOCKING:
cca3974e 3369 * spin_lock_irqsave(host lock)
1da177e4
LT		 3370 */
3371void ata_qc_prep(struct ata_queued_cmd *qc)
3372{
3373 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3374 return;
3375
3376 ata_fill_sg(qc);
3377}
3378
e46834cd
BK		 3379void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3380
0cba632b
JG		 3381/**
3382 * ata_sg_init_one - Associate command with memory buffer
3383 * @qc: Command to be associated
3384 * @buf: Memory buffer
3385 * @buflen: Length of memory buffer, in bytes.
3386 *
3387 * Initialize the data-related elements of queued_cmd @qc
3388 * to point to a single memory buffer, @buf of byte length @buflen.
3389 *
3390 * LOCKING:
cca3974e 3391 * spin_lock_irqsave(host lock)
0cba632b
JG		 3392 */
3393
1da177e4
LT		 3394void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3395{
3396 struct scatterlist *sg;
3397
3398 qc->flags |= ATA_QCFLAG_SINGLE;
3399
3400 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3401 qc->__sg = &qc->sgent;
1da177e4 3402 qc->n_elem = 1;
cedc9a47 3403 qc->orig_n_elem = 1;
1da177e4 3404 qc->buf_virt = buf;
233277ca 3405 qc->nbytes = buflen;
1da177e4 3406
cedc9a47 3407 sg = qc->__sg;
f0612bbc 3408 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3409}
3410
0cba632b
JG		 3411/**
3412 * ata_sg_init - Associate command with scatter-gather table.
3413 * @qc: Command to be associated
3414 * @sg: Scatter-gather table.
3415 * @n_elem: Number of elements in s/g table.
3416 *
3417 * Initialize the data-related elements of queued_cmd @qc
3418 * to point to a scatter-gather table @sg, containing @n_elem
3419 * elements.
3420 *
3421 * LOCKING:
cca3974e 3422 * spin_lock_irqsave(host lock)
0cba632b
JG		 3423 */
3424
1da177e4
LT		 3425void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3426 unsigned int n_elem)
3427{
3428 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3429 qc->__sg = sg;
1da177e4 3430 qc->n_elem = n_elem;
cedc9a47 3431 qc->orig_n_elem = n_elem;
1da177e4
LT		 3432}
3433
3434/**
0cba632b
JG		 3435 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3436 * @qc: Command with memory buffer to be mapped.
3437 *
3438 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3439 *
3440 * LOCKING:
cca3974e 3441 * spin_lock_irqsave(host lock)
1da177e4
LT		 3442 *
3443 * RETURNS:
0cba632b 3444 * Zero on success, negative on error.
1da177e4
LT		 3445 */
3446
3447static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3448{
3449 struct ata_port *ap = qc->ap;
3450 int dir = qc->dma_dir;
cedc9a47 3451 struct scatterlist *sg = qc->__sg;
1da177e4 3452 dma_addr_t dma_address;
2e242fa9 3453 int trim_sg = 0;
1da177e4 3454
cedc9a47
JG		 3455 /* we must lengthen transfers to end on a 32-bit boundary */
3456 qc->pad_len = sg->length & 3;
3457 if (qc->pad_len) {
3458 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3459 struct scatterlist *psg = &qc->pad_sgent;
3460
a4631474 3461 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3462
3463 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3464
3465 if (qc->tf.flags & ATA_TFLAG_WRITE)
3466 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3467 qc->pad_len);
3468
3469 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3470 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3471 /* trim sg */
3472 sg->length -= qc->pad_len;
2e242fa9
TH		 3473 if (sg->length == 0)
3474 trim_sg = 1;
cedc9a47
JG		 3475
3476 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3477 sg->length, qc->pad_len);
3478 }
3479
2e242fa9
TH		 3480 if (trim_sg) {
3481 qc->n_elem--;
e1410f2d
JG		 3482 goto skip_map;
3483 }
3484
2f1f610b 3485 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3486 sg->length, dir);
537a95d9
TH		 3487 if (dma_mapping_error(dma_address)) {
3488 /* restore sg */
3489 sg->length += qc->pad_len;
1da177e4 3490 return -1;
537a95d9 3491 }
1da177e4
LT		 3492
3493 sg_dma_address(sg) = dma_address;
32529e01 3494 sg_dma_len(sg) = sg->length;
1da177e4 3495
2e242fa9 3496skip_map:
1da177e4
LT		 3497 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3498 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3499
3500 return 0;
3501}
3502
3503/**
0cba632b
JG		 3504 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3505 * @qc: Command with scatter-gather table to be mapped.
3506 *
3507 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3508 *
3509 * LOCKING:
cca3974e 3510 * spin_lock_irqsave(host lock)
1da177e4
LT		 3511 *
3512 * RETURNS:
0cba632b 3513 * Zero on success, negative on error.
1da177e4
LT		 3514 *
3515 */
3516
3517static int ata_sg_setup(struct ata_queued_cmd *qc)
3518{
3519 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3520 struct scatterlist *sg = qc->__sg;
3521 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3522 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3523
3524 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3525 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3526
cedc9a47
JG		 3527 /* we must lengthen transfers to end on a 32-bit boundary */
3528 qc->pad_len = lsg->length & 3;
3529 if (qc->pad_len) {
3530 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3531 struct scatterlist *psg = &qc->pad_sgent;
3532 unsigned int offset;
3533
a4631474 3534 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3535
3536 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3537
3538 /*
3539 * psg->page/offset are used to copy to-be-written
3540 * data in this function or read data in ata_sg_clean.
3541 */
3542 offset = lsg->offset + lsg->length - qc->pad_len;
3543 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3544 psg->offset = offset_in_page(offset);
3545
3546 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3547 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3548 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3549 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3550 }
3551
3552 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3553 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3554 /* trim last sg */
3555 lsg->length -= qc->pad_len;
e1410f2d
JG		 3556 if (lsg->length == 0)
3557 trim_sg = 1;
cedc9a47
JG		 3558
3559 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3560 qc->n_elem - 1, lsg->length, qc->pad_len);
3561 }
3562
e1410f2d
JG		 3563 pre_n_elem = qc->n_elem;
3564 if (trim_sg && pre_n_elem)
3565 pre_n_elem--;
3566
3567 if (!pre_n_elem) {
3568 n_elem = 0;
3569 goto skip_map;
3570 }
3571
1da177e4 3572 dir = qc->dma_dir;
2f1f610b 3573 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3574 if (n_elem < 1) {
3575 /* restore last sg */
3576 lsg->length += qc->pad_len;
1da177e4 3577 return -1;
537a95d9 3578 }
1da177e4
LT		 3579
3580 DPRINTK("%d sg elements mapped\n", n_elem);
3581
e1410f2d 3582skip_map:
1da177e4
LT		 3583 qc->n_elem = n_elem;
3584
3585 return 0;
3586}
3587
0baab86b 3588/**
c893a3ae 3589 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3590 * @buf: Buffer to swap
3591 * @buf_words: Number of 16-bit words in buffer.
3592 *
3593 * Swap halves of 16-bit words if needed to convert from
3594 * little-endian byte order to native cpu byte order, or
3595 * vice-versa.
3596 *
3597 * LOCKING:
6f0ef4fa 3598 * Inherited from caller.
0baab86b 3599 */
1da177e4
LT		 3600void swap_buf_le16(u16 *buf, unsigned int buf_words)
3601{
3602#ifdef __BIG_ENDIAN
3603 unsigned int i;
3604
3605 for (i = 0; i < buf_words; i++)
3606 buf[i] = le16_to_cpu(buf[i]);
3607#endif /* __BIG_ENDIAN */
3608}
3609
6ae4cfb5
AL		 3610/**
3611 * ata_mmio_data_xfer - Transfer data by MMIO
bf717b11 3612 * @adev: device for this I/O
6ae4cfb5
AL		 3613 * @buf: data buffer
3614 * @buflen: buffer length
344babaa 3615 * @write_data: read/write
6ae4cfb5
AL		 3616 *
3617 * Transfer data from/to the device data register by MMIO.
3618 *
3619 * LOCKING:
3620 * Inherited from caller.
6ae4cfb5
AL		 3621 */
3622
88574551 3623void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
a6b2c5d4 3624 unsigned int buflen, int write_data)
1da177e4 3625{
a6b2c5d4 3626 struct ata_port *ap = adev->ap;
1da177e4
LT		 3627 unsigned int i;
3628 unsigned int words = buflen >> 1;
3629 u16 *buf16 = (u16 *) buf;
3630 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3631
6ae4cfb5 3632 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3633 if (write_data) {
3634 for (i = 0; i < words; i++)
3635 writew(le16_to_cpu(buf16[i]), mmio);
3636 } else {
3637 for (i = 0; i < words; i++)
3638 buf16[i] = cpu_to_le16(readw(mmio));
3639 }
6ae4cfb5
AL		 3640
3641 /* Transfer trailing 1 byte, if any. */
3642 if (unlikely(buflen & 0x01)) {
3643 u16 align_buf[1] = { 0 };
3644 unsigned char *trailing_buf = buf + buflen - 1;
3645
3646 if (write_data) {
3647 memcpy(align_buf, trailing_buf, 1);
3648 writew(le16_to_cpu(align_buf[0]), mmio);
3649 } else {
3650 align_buf[0] = cpu_to_le16(readw(mmio));
3651 memcpy(trailing_buf, align_buf, 1);
3652 }
3653 }
1da177e4
LT		 3654}
3655
6ae4cfb5
AL		 3656/**
3657 * ata_pio_data_xfer - Transfer data by PIO
a6b2c5d4 3658 * @adev: device to target
6ae4cfb5
AL		 3659 * @buf: data buffer
3660 * @buflen: buffer length
344babaa 3661 * @write_data: read/write
6ae4cfb5
AL		 3662 *
3663 * Transfer data from/to the device data register by PIO.
3664 *
3665 * LOCKING:
3666 * Inherited from caller.
6ae4cfb5
AL		 3667 */
3668
88574551 3669void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
a6b2c5d4 3670 unsigned int buflen, int write_data)
1da177e4 3671{
a6b2c5d4 3672 struct ata_port *ap = adev->ap;
6ae4cfb5 3673 unsigned int words = buflen >> 1;
1da177e4 3674
6ae4cfb5 3675 /* Transfer multiple of 2 bytes */
1da177e4 3676 if (write_data)
6ae4cfb5 3677 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3678 else
6ae4cfb5
AL		 3679 insw(ap->ioaddr.data_addr, buf, words);
3680
3681 /* Transfer trailing 1 byte, if any. */
3682 if (unlikely(buflen & 0x01)) {
3683 u16 align_buf[1] = { 0 };
3684 unsigned char *trailing_buf = buf + buflen - 1;
3685
3686 if (write_data) {
3687 memcpy(align_buf, trailing_buf, 1);
3688 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3689 } else {
3690 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3691 memcpy(trailing_buf, align_buf, 1);
3692 }
3693 }
1da177e4
LT		 3694}
3695
75e99585
AC		 3696/**
3697 * ata_pio_data_xfer_noirq - Transfer data by PIO
3698 * @adev: device to target
3699 * @buf: data buffer
3700 * @buflen: buffer length
3701 * @write_data: read/write
3702 *
88574551 3703 * Transfer data from/to the device data register by PIO. Do the
75e99585
AC		 3704 * transfer with interrupts disabled.
3705 *
3706 * LOCKING:
3707 * Inherited from caller.
3708 */
3709
3710void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3711 unsigned int buflen, int write_data)
3712{
3713 unsigned long flags;
3714 local_irq_save(flags);
3715 ata_pio_data_xfer(adev, buf, buflen, write_data);
3716 local_irq_restore(flags);
3717}
3718
3719
6ae4cfb5
AL		 3720/**
3721 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3722 * @qc: Command on going
3723 *
3724 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3725 *
3726 * LOCKING:
3727 * Inherited from caller.
3728 */
3729
1da177e4
LT		 3730static void ata_pio_sector(struct ata_queued_cmd *qc)
3731{
3732 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3733 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3734 struct ata_port *ap = qc->ap;
3735 struct page *page;
3736 unsigned int offset;
3737 unsigned char *buf;
3738
3739 if (qc->cursect == (qc->nsect - 1))
14be71f4 3740 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3741
3742 page = sg[qc->cursg].page;
3743 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3744
3745 /* get the current page and offset */
3746 page = nth_page(page, (offset >> PAGE_SHIFT));
3747 offset %= PAGE_SIZE;
3748
1da177e4
LT		 3749 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3750
91b8b313
AL		 3751 if (PageHighMem(page)) {
3752 unsigned long flags;
3753
a6b2c5d4 3754 /* FIXME: use a bounce buffer */
91b8b313
AL		 3755 local_irq_save(flags);
3756 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3757
91b8b313 3758 /* do the actual data transfer */
a6b2c5d4 3759 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
1da177e4 3760
91b8b313
AL		 3761 kunmap_atomic(buf, KM_IRQ0);
3762 local_irq_restore(flags);
3763 } else {
3764 buf = page_address(page);
a6b2c5d4 3765 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
91b8b313 3766 }
1da177e4
LT		 3767
3768 qc->cursect++;
3769 qc->cursg_ofs++;
3770
32529e01 3771 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3772 qc->cursg++;
3773 qc->cursg_ofs = 0;
3774 }
1da177e4 3775}
1da177e4 3776
07f6f7d0
AL		 3777/**
3778 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3779 * @qc: Command on going
3780 *
c81e29b4 3781 * Transfer one or many ATA_SECT_SIZE of data from/to the
07f6f7d0
AL		 3782 * ATA device for the DRQ request.
3783 *
3784 * LOCKING:
3785 * Inherited from caller.
3786 */
1da177e4 3787
07f6f7d0
AL		 3788static void ata_pio_sectors(struct ata_queued_cmd *qc)
3789{
3790 if (is_multi_taskfile(&qc->tf)) {
3791 /* READ/WRITE MULTIPLE */
3792 unsigned int nsect;
3793
587005de 3794 WARN_ON(qc->dev->multi_count == 0);
1da177e4 3795
07f6f7d0
AL		 3796 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3797 while (nsect--)
3798 ata_pio_sector(qc);
3799 } else
3800 ata_pio_sector(qc);
3801}
3802
c71c1857
AL		 3803/**
3804 * atapi_send_cdb - Write CDB bytes to hardware
3805 * @ap: Port to which ATAPI device is attached.
3806 * @qc: Taskfile currently active
3807 *
3808 * When device has indicated its readiness to accept
3809 * a CDB, this function is called. Send the CDB.
3810 *
3811 * LOCKING:
3812 * caller.
3813 */
3814
3815static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3816{
3817 /* send SCSI cdb */
3818 DPRINTK("send cdb\n");
db024d53 3819 WARN_ON(qc->dev->cdb_len < 12);
c71c1857 3820
a6b2c5d4 3821 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
c71c1857
AL		 3822 ata_altstatus(ap); /* flush */
3823
3824 switch (qc->tf.protocol) {
3825 case ATA_PROT_ATAPI:
3826 ap->hsm_task_state = HSM_ST;
3827 break;
3828 case ATA_PROT_ATAPI_NODATA:
3829 ap->hsm_task_state = HSM_ST_LAST;
3830 break;
3831 case ATA_PROT_ATAPI_DMA:
3832 ap->hsm_task_state = HSM_ST_LAST;
3833 /* initiate bmdma */
3834 ap->ops->bmdma_start(qc);
3835 break;
3836 }
1da177e4
LT		 3837}
3838
6ae4cfb5
AL		 3839/**
3840 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3841 * @qc: Command on going
3842 * @bytes: number of bytes
3843 *
3844 * Transfer Transfer data from/to the ATAPI device.
3845 *
3846 * LOCKING:
3847 * Inherited from caller.
3848 *
3849 */
3850
1da177e4
LT		 3851static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3852{
3853 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3854 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3855 struct ata_port *ap = qc->ap;
3856 struct page *page;
3857 unsigned char *buf;
3858 unsigned int offset, count;
3859
563a6e1f 3860 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3861 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3862
3863next_sg:
563a6e1f 3864 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3865 /*
563a6e1f
AL		 3866 * The end of qc->sg is reached and the device expects
3867 * more data to transfer. In order not to overrun qc->sg
3868 * and fulfill length specified in the byte count register,
3869 * - for read case, discard trailing data from the device
3870 * - for write case, padding zero data to the device
3871 */
3872 u16 pad_buf[1] = { 0 };
3873 unsigned int words = bytes >> 1;
3874 unsigned int i;
3875
3876 if (words) /* warning if bytes > 1 */
f15a1daf
TH		 3877 ata_dev_printk(qc->dev, KERN_WARNING,
3878 "%u bytes trailing data\n", bytes);
563a6e1f
AL		 3879
3880 for (i = 0; i < words; i++)
a6b2c5d4 3881 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
563a6e1f 3882
14be71f4 3883 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3884 return;
3885 }
3886
cedc9a47 3887 sg = &qc->__sg[qc->cursg];
1da177e4 3888
1da177e4
LT		 3889 page = sg->page;
3890 offset = sg->offset + qc->cursg_ofs;
3891
3892 /* get the current page and offset */
3893 page = nth_page(page, (offset >> PAGE_SHIFT));
3894 offset %= PAGE_SIZE;
3895
6952df03 3896 /* don't overrun current sg */
32529e01 3897 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3898
3899 /* don't cross page boundaries */
3900 count = min(count, (unsigned int)PAGE_SIZE - offset);
3901
7282aa4b
AL		 3902 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3903
91b8b313
AL		 3904 if (PageHighMem(page)) {
3905 unsigned long flags;
3906
a6b2c5d4 3907 /* FIXME: use bounce buffer */
91b8b313
AL		 3908 local_irq_save(flags);
3909 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3910
91b8b313 3911 /* do the actual data transfer */
a6b2c5d4 3912 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
7282aa4b 3913
91b8b313
AL		 3914 kunmap_atomic(buf, KM_IRQ0);
3915 local_irq_restore(flags);
3916 } else {
3917 buf = page_address(page);
a6b2c5d4 3918 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
91b8b313 3919 }
1da177e4
LT		 3920
3921 bytes -= count;
3922 qc->curbytes += count;
3923 qc->cursg_ofs += count;
3924
32529e01 3925 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3926 qc->cursg++;
3927 qc->cursg_ofs = 0;
3928 }
3929
563a6e1f 3930 if (bytes)
1da177e4 3931 goto next_sg;
1da177e4
LT		 3932}
3933
6ae4cfb5
AL		 3934/**
3935 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3936 * @qc: Command on going
3937 *
3938 * Transfer Transfer data from/to the ATAPI device.
3939 *
3940 * LOCKING:
3941 * Inherited from caller.
6ae4cfb5
AL		 3942 */
3943
1da177e4
LT		 3944static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3945{
3946 struct ata_port *ap = qc->ap;
3947 struct ata_device *dev = qc->dev;
3948 unsigned int ireason, bc_lo, bc_hi, bytes;
3949 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3950
eec4c3f3
AL		 3951 /* Abuse qc->result_tf for temp storage of intermediate TF
3952 * here to save some kernel stack usage.
3953 * For normal completion, qc->result_tf is not relevant. For
3954 * error, qc->result_tf is later overwritten by ata_qc_complete().
3955 * So, the correctness of qc->result_tf is not affected.
3956 */
3957 ap->ops->tf_read(ap, &qc->result_tf);
3958 ireason = qc->result_tf.nsect;
3959 bc_lo = qc->result_tf.lbam;
3960 bc_hi = qc->result_tf.lbah;
1da177e4
LT		 3961 bytes = (bc_hi << 8) | bc_lo;
3962
3963 /* shall be cleared to zero, indicating xfer of data */
3964 if (ireason & (1 << 0))
3965 goto err_out;
3966
3967 /* make sure transfer direction matches expected */
3968 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3969 if (do_write != i_write)
3970 goto err_out;
3971
312f7da2
AL		 3972 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3973
1da177e4
LT		 3974 __atapi_pio_bytes(qc, bytes);
3975
3976 return;
3977
3978err_out:
f15a1daf 3979 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
11a56d24 3980 qc->err_mask |= AC_ERR_HSM;
14be71f4 3981 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3982}
3983
3984/**
c234fb00
AL		 3985 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3986 * @ap: the target ata_port
3987 * @qc: qc on going
1da177e4 3988 *
c234fb00
AL		 3989 * RETURNS:
3990 * 1 if ok in workqueue, 0 otherwise.
1da177e4 3991 */
c234fb00
AL		 3992
3993static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
1da177e4 3994{
c234fb00
AL		 3995 if (qc->tf.flags & ATA_TFLAG_POLLING)
3996 return 1;
1da177e4 3997
c234fb00
AL		 3998 if (ap->hsm_task_state == HSM_ST_FIRST) {
3999 if (qc->tf.protocol == ATA_PROT_PIO &&
4000 (qc->tf.flags & ATA_TFLAG_WRITE))
4001 return 1;
1da177e4 4002
c234fb00
AL		 4003 if (is_atapi_taskfile(&qc->tf) &&
4004 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4005 return 1;
fe79e683
AL		 4006 }
4007
c234fb00
AL		 4008 return 0;
4009}
1da177e4 4010
c17ea20d
TH		 4011/**
4012 * ata_hsm_qc_complete - finish a qc running on standard HSM
4013 * @qc: Command to complete
4014 * @in_wq: 1 if called from workqueue, 0 otherwise
4015 *
4016 * Finish @qc which is running on standard HSM.
4017 *
4018 * LOCKING:
cca3974e 4019 * If @in_wq is zero, spin_lock_irqsave(host lock).
c17ea20d
TH		 4020 * Otherwise, none on entry and grabs host lock.
4021 */
4022static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4023{
4024 struct ata_port *ap = qc->ap;
4025 unsigned long flags;
4026
4027 if (ap->ops->error_handler) {
4028 if (in_wq) {
ba6a1308 4029 spin_lock_irqsave(ap->lock, flags);
c17ea20d 4030
cca3974e
JG		 4031 /* EH might have kicked in while host lock is
4032 * released.
c17ea20d
TH		 4033 */
4034 qc = ata_qc_from_tag(ap, qc->tag);
4035 if (qc) {
4036 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4037 ata_irq_on(ap);
4038 ata_qc_complete(qc);
4039 } else
4040 ata_port_freeze(ap);
4041 }
4042
ba6a1308 4043 spin_unlock_irqrestore(ap->lock, flags);
c17ea20d
TH		 4044 } else {
4045 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4046 ata_qc_complete(qc);
4047 else
4048 ata_port_freeze(ap);
4049 }
4050 } else {
4051 if (in_wq) {
ba6a1308 4052 spin_lock_irqsave(ap->lock, flags);
c17ea20d
TH		 4053 ata_irq_on(ap);
4054 ata_qc_complete(qc);
ba6a1308 4055 spin_unlock_irqrestore(ap->lock, flags);
c17ea20d
TH		 4056 } else
4057 ata_qc_complete(qc);
4058 }
1da177e4 4059
c81e29b4 4060 ata_altstatus(ap); /* flush */
c17ea20d
TH		 4061}
4062
bb5cb290
AL		 4063/**
4064 * ata_hsm_move - move the HSM to the next state.
4065 * @ap: the target ata_port
4066 * @qc: qc on going
4067 * @status: current device status
4068 * @in_wq: 1 if called from workqueue, 0 otherwise
4069 *
4070 * RETURNS:
4071 * 1 when poll next status needed, 0 otherwise.
4072 */
9a1004d0
TH		 4073int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4074 u8 status, int in_wq)
e2cec771 4075{
bb5cb290
AL		 4076 unsigned long flags = 0;
4077 int poll_next;
4078
6912ccd5
AL		 4079 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4080
bb5cb290
AL		 4081 /* Make sure ata_qc_issue_prot() does not throw things
4082 * like DMA polling into the workqueue. Notice that
4083 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4084 */
c234fb00 4085 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
bb5cb290 4086
e2cec771 4087fsm_start:
999bb6f4
AL		 4088 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4089 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4090
e2cec771
AL		 4091 switch (ap->hsm_task_state) {
4092 case HSM_ST_FIRST:
bb5cb290
AL		 4093 /* Send first data block or PACKET CDB */
4094
4095 /* If polling, we will stay in the work queue after
4096 * sending the data. Otherwise, interrupt handler
4097 * takes over after sending the data.
4098 */
4099 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4100
e2cec771 4101 /* check device status */
3655d1d3
AL		 4102 if (unlikely((status & ATA_DRQ) == 0)) {
4103 /* handle BSY=0, DRQ=0 as error */
4104 if (likely(status & (ATA_ERR | ATA_DF)))
4105 /* device stops HSM for abort/error */
4106 qc->err_mask |= AC_ERR_DEV;
4107 else
4108 /* HSM violation. Let EH handle this */
4109 qc->err_mask |= AC_ERR_HSM;
4110
14be71f4 4111 ap->hsm_task_state = HSM_ST_ERR;
e2cec771 4112 goto fsm_start;
1da177e4
LT		 4113 }
4114
71601958
AL		 4115 /* Device should not ask for data transfer (DRQ=1)
4116 * when it finds something wrong.
eee6c32f
AL		 4117 * We ignore DRQ here and stop the HSM by
4118 * changing hsm_task_state to HSM_ST_ERR and
4119 * let the EH abort the command or reset the device.
71601958
AL		 4120 */
4121 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4122 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4123 ap->id, status);
3655d1d3 4124 qc->err_mask |= AC_ERR_HSM;
eee6c32f
AL		 4125 ap->hsm_task_state = HSM_ST_ERR;
4126 goto fsm_start;
71601958 4127 }
1da177e4 4128
bb5cb290
AL		 4129 /* Send the CDB (atapi) or the first data block (ata pio out).
4130 * During the state transition, interrupt handler shouldn't
4131 * be invoked before the data transfer is complete and
4132 * hsm_task_state is changed. Hence, the following locking.
4133 */
4134 if (in_wq)
ba6a1308 4135 spin_lock_irqsave(ap->lock, flags);
1da177e4 4136
bb5cb290
AL		 4137 if (qc->tf.protocol == ATA_PROT_PIO) {
4138 /* PIO data out protocol.
4139 * send first data block.
4140 */
0565c26d 4141
bb5cb290
AL		 4142 /* ata_pio_sectors() might change the state
4143 * to HSM_ST_LAST. so, the state is changed here
4144 * before ata_pio_sectors().
4145 */
4146 ap->hsm_task_state = HSM_ST;
4147 ata_pio_sectors(qc);
4148 ata_altstatus(ap); /* flush */
4149 } else
4150 /* send CDB */
4151 atapi_send_cdb(ap, qc);
4152
4153 if (in_wq)
ba6a1308 4154 spin_unlock_irqrestore(ap->lock, flags);
bb5cb290
AL		 4155
4156 /* if polling, ata_pio_task() handles the rest.
4157 * otherwise, interrupt handler takes over from here.
4158 */
e2cec771 4159 break;
1c848984 4160
e2cec771
AL		 4161 case HSM_ST:
4162 /* complete command or read/write the data register */
4163 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4164 /* ATAPI PIO protocol */
4165 if ((status & ATA_DRQ) == 0) {
3655d1d3
AL		 4166 /* No more data to transfer or device error.
4167 * Device error will be tagged in HSM_ST_LAST.
4168 */
e2cec771
AL		 4169 ap->hsm_task_state = HSM_ST_LAST;
4170 goto fsm_start;
4171 }
1da177e4 4172
71601958
AL		 4173 /* Device should not ask for data transfer (DRQ=1)
4174 * when it finds something wrong.
eee6c32f
AL		 4175 * We ignore DRQ here and stop the HSM by
4176 * changing hsm_task_state to HSM_ST_ERR and
4177 * let the EH abort the command or reset the device.
71601958
AL		 4178 */
4179 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4180 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4181 ap->id, status);
3655d1d3 4182 qc->err_mask |= AC_ERR_HSM;
eee6c32f
AL		 4183 ap->hsm_task_state = HSM_ST_ERR;
4184 goto fsm_start;
71601958 4185 }
1da177e4 4186
e2cec771 4187 atapi_pio_bytes(qc);
7fb6ec28 4188
e2cec771
AL		 4189 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4190 /* bad ireason reported by device */
4191 goto fsm_start;
1da177e4 4192
e2cec771
AL		 4193 } else {
4194 /* ATA PIO protocol */
4195 if (unlikely((status & ATA_DRQ) == 0)) {
4196 /* handle BSY=0, DRQ=0 as error */
3655d1d3
AL		 4197 if (likely(status & (ATA_ERR | ATA_DF)))
4198 /* device stops HSM for abort/error */
4199 qc->err_mask |= AC_ERR_DEV;
4200 else
4201 /* HSM violation. Let EH handle this */
4202 qc->err_mask |= AC_ERR_HSM;
4203
e2cec771
AL		 4204 ap->hsm_task_state = HSM_ST_ERR;
4205 goto fsm_start;
4206 }
1da177e4 4207
eee6c32f
AL		 4208 /* For PIO reads, some devices may ask for
4209 * data transfer (DRQ=1) alone with ERR=1.
4210 * We respect DRQ here and transfer one
4211 * block of junk data before changing the
4212 * hsm_task_state to HSM_ST_ERR.
4213 *
4214 * For PIO writes, ERR=1 DRQ=1 doesn't make
4215 * sense since the data block has been
4216 * transferred to the device.
71601958
AL		 4217 */
4218 if (unlikely(status & (ATA_ERR | ATA_DF))) {
71601958
AL		 4219 /* data might be corrputed */
4220 qc->err_mask |= AC_ERR_DEV;
eee6c32f
AL		 4221
4222 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4223 ata_pio_sectors(qc);
4224 ata_altstatus(ap);
4225 status = ata_wait_idle(ap);
4226 }
4227
3655d1d3
AL		 4228 if (status & (ATA_BUSY | ATA_DRQ))
4229 qc->err_mask |= AC_ERR_HSM;
4230
eee6c32f
AL		 4231 /* ata_pio_sectors() might change the
4232 * state to HSM_ST_LAST. so, the state
4233 * is changed after ata_pio_sectors().
4234 */
4235 ap->hsm_task_state = HSM_ST_ERR;
4236 goto fsm_start;
71601958
AL		 4237 }
4238
e2cec771
AL		 4239 ata_pio_sectors(qc);
4240
4241 if (ap->hsm_task_state == HSM_ST_LAST &&
4242 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4243 /* all data read */
4244 ata_altstatus(ap);
52a32205 4245 status = ata_wait_idle(ap);
e2cec771
AL		 4246 goto fsm_start;
4247 }
4248 }
4249
4250 ata_altstatus(ap); /* flush */
bb5cb290 4251 poll_next = 1;
1da177e4
LT		 4252 break;
4253
14be71f4 4254 case HSM_ST_LAST:
6912ccd5
AL		 4255 if (unlikely(!ata_ok(status))) {
4256 qc->err_mask |= __ac_err_mask(status);
e2cec771
AL		 4257 ap->hsm_task_state = HSM_ST_ERR;
4258 goto fsm_start;
4259 }
4260
4261 /* no more data to transfer */
4332a771
AL		 4262 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4263 ap->id, qc->dev->devno, status);
e2cec771 4264
6912ccd5
AL		 4265 WARN_ON(qc->err_mask);
4266
e2cec771 4267 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 4268
e2cec771 4269 /* complete taskfile transaction */
c17ea20d 4270 ata_hsm_qc_complete(qc, in_wq);
bb5cb290
AL		 4271
4272 poll_next = 0;
1da177e4
LT		 4273 break;
4274
14be71f4 4275 case HSM_ST_ERR:
e2cec771
AL		 4276 /* make sure qc->err_mask is available to
4277 * know what's wrong and recover
4278 */
4279 WARN_ON(qc->err_mask == 0);
4280
4281 ap->hsm_task_state = HSM_ST_IDLE;
bb5cb290 4282
999bb6f4 4283 /* complete taskfile transaction */
c17ea20d 4284 ata_hsm_qc_complete(qc, in_wq);
bb5cb290
AL		 4285
4286 poll_next = 0;
e2cec771
AL		 4287 break;
4288 default:
bb5cb290 4289 poll_next = 0;
6912ccd5 4290 BUG();
1da177e4
LT		 4291 }
4292
bb5cb290 4293 return poll_next;
1da177e4
LT		 4294}
4295
65f27f38 4296static void ata_pio_task(struct work_struct *work)
8061f5f0 4297{
65f27f38
DH		 4298 struct ata_port *ap =
4299 container_of(work, struct ata_port, port_task.work);
4300 struct ata_queued_cmd *qc = ap->port_task_data;
8061f5f0 4301 u8 status;
a1af3734 4302 int poll_next;
8061f5f0 4303
7fb6ec28 4304fsm_start:
a1af3734 4305 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
8061f5f0 4306
a1af3734
AL		 4307 /*
4308 * This is purely heuristic. This is a fast path.
4309 * Sometimes when we enter, BSY will be cleared in
4310 * a chk-status or two. If not, the drive is probably seeking
4311 * or something. Snooze for a couple msecs, then
4312 * chk-status again. If still busy, queue delayed work.
4313 */
4314 status = ata_busy_wait(ap, ATA_BUSY, 5);
4315 if (status & ATA_BUSY) {
4316 msleep(2);
4317 status = ata_busy_wait(ap, ATA_BUSY, 10);
4318 if (status & ATA_BUSY) {
31ce6dae 4319 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
a1af3734
AL		 4320 return;
4321 }
8061f5f0
TH		 4322 }
4323
a1af3734
AL		 4324 /* move the HSM */
4325 poll_next = ata_hsm_move(ap, qc, status, 1);
8061f5f0 4326
a1af3734
AL		 4327 /* another command or interrupt handler
4328 * may be running at this point.
4329 */
4330 if (poll_next)
7fb6ec28 4331 goto fsm_start;
8061f5f0
TH		 4332}
4333
1da177e4
LT		 4334/**
4335 * ata_qc_new - Request an available ATA command, for queueing
4336 * @ap: Port associated with device @dev
4337 * @dev: Device from whom we request an available command structure
4338 *
4339 * LOCKING:
0cba632b 4340 * None.
1da177e4
LT		 4341 */
4342
4343static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4344{
4345 struct ata_queued_cmd *qc = NULL;
4346 unsigned int i;
4347
e3180499 4348 /* no command while frozen */
b51e9e5d 4349 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
e3180499
TH		 4350 return NULL;
4351
2ab7db1f
TH		 4352 /* the last tag is reserved for internal command. */
4353 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
6cec4a39 4354 if (!test_and_set_bit(i, &ap->qc_allocated)) {
f69499f4 4355 qc = __ata_qc_from_tag(ap, i);
1da177e4
LT		 4356 break;
4357 }
4358
4359 if (qc)
4360 qc->tag = i;
4361
4362 return qc;
4363}
4364
4365/**
4366 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT		 4367 * @dev: Device from whom we request an available command structure
4368 *
4369 * LOCKING:
0cba632b 4370 * None.
1da177e4
LT		 4371 */
4372
3373efd8 4373struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4374{
3373efd8 4375 struct ata_port *ap = dev->ap;
1da177e4
LT		 4376 struct ata_queued_cmd *qc;
4377
4378 qc = ata_qc_new(ap);
4379 if (qc) {
1da177e4
LT		 4380 qc->scsicmd = NULL;
4381 qc->ap = ap;
4382 qc->dev = dev;
1da177e4 4383
2c13b7ce 4384 ata_qc_reinit(qc);
1da177e4
LT		 4385 }
4386
4387 return qc;
4388}
4389
1da177e4
LT		 4390/**
4391 * ata_qc_free - free unused ata_queued_cmd
4392 * @qc: Command to complete
4393 *
4394 * Designed to free unused ata_queued_cmd object
4395 * in case something prevents using it.
4396 *
4397 * LOCKING:
cca3974e 4398 * spin_lock_irqsave(host lock)
1da177e4
LT		 4399 */
4400void ata_qc_free(struct ata_queued_cmd *qc)
4401{
4ba946e9
TH		 4402 struct ata_port *ap = qc->ap;
4403 unsigned int tag;
4404
a4631474 4405 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4406
4ba946e9
TH		 4407 qc->flags = 0;
4408 tag = qc->tag;
4409 if (likely(ata_tag_valid(tag))) {
4ba946e9 4410 qc->tag = ATA_TAG_POISON;
6cec4a39 4411 clear_bit(tag, &ap->qc_allocated);
4ba946e9 4412 }
1da177e4
LT		 4413}
4414
76014427 4415void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4416{
dedaf2b0
TH		 4417 struct ata_port *ap = qc->ap;
4418
a4631474
TH		 4419 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4420 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4421
4422 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4423 ata_sg_clean(qc);
4424
7401abf2 4425 /* command should be marked inactive atomically with qc completion */
dedaf2b0
TH		 4426 if (qc->tf.protocol == ATA_PROT_NCQ)
4427 ap->sactive &= ~(1 << qc->tag);
4428 else
4429 ap->active_tag = ATA_TAG_POISON;
7401abf2 4430
3f3791d3
AL		 4431 /* atapi: mark qc as inactive to prevent the interrupt handler
4432 * from completing the command twice later, before the error handler
4433 * is called. (when rc != 0 and atapi request sense is needed)
4434 */
4435 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4436 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4437
1da177e4 4438 /* call completion callback */
77853bf2 4439 qc->complete_fn(qc);
1da177e4
LT		 4440}
4441
f686bcb8
TH		 4442/**
4443 * ata_qc_complete - Complete an active ATA command
4444 * @qc: Command to complete
4445 * @err_mask: ATA Status register contents
4446 *
4447 * Indicate to the mid and upper layers that an ATA
4448 * command has completed, with either an ok or not-ok status.
4449 *
4450 * LOCKING:
cca3974e 4451 * spin_lock_irqsave(host lock)
f686bcb8
TH		 4452 */
4453void ata_qc_complete(struct ata_queued_cmd *qc)
4454{
4455 struct ata_port *ap = qc->ap;
4456
4457 /* XXX: New EH and old EH use different mechanisms to
4458 * synchronize EH with regular execution path.
4459 *
4460 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4461 * Normal execution path is responsible for not accessing a
4462 * failed qc. libata core enforces the rule by returning NULL
4463 * from ata_qc_from_tag() for failed qcs.
4464 *
4465 * Old EH depends on ata_qc_complete() nullifying completion
4466 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4467 * not synchronize with interrupt handler. Only PIO task is
4468 * taken care of.
4469 */
4470 if (ap->ops->error_handler) {
b51e9e5d 4471 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
f686bcb8
TH		 4472
4473 if (unlikely(qc->err_mask))
4474 qc->flags |= ATA_QCFLAG_FAILED;
4475
4476 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4477 if (!ata_tag_internal(qc->tag)) {
4478 /* always fill result TF for failed qc */
4479 ap->ops->tf_read(ap, &qc->result_tf);
4480 ata_qc_schedule_eh(qc);
4481 return;
4482 }
4483 }
4484
4485 /* read result TF if requested */
4486 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4487 ap->ops->tf_read(ap, &qc->result_tf);
4488
4489 __ata_qc_complete(qc);
4490 } else {
4491 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4492 return;
4493
4494 /* read result TF if failed or requested */
4495 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4496 ap->ops->tf_read(ap, &qc->result_tf);
4497
4498 __ata_qc_complete(qc);
4499 }
4500}
4501
dedaf2b0
TH		 4502/**
4503 * ata_qc_complete_multiple - Complete multiple qcs successfully
4504 * @ap: port in question
4505 * @qc_active: new qc_active mask
4506 * @finish_qc: LLDD callback invoked before completing a qc
4507 *
4508 * Complete in-flight commands. This functions is meant to be
4509 * called from low-level driver's interrupt routine to complete
4510 * requests normally. ap->qc_active and @qc_active is compared
4511 * and commands are completed accordingly.
4512 *
4513 * LOCKING:
cca3974e 4514 * spin_lock_irqsave(host lock)
dedaf2b0
TH		 4515 *
4516 * RETURNS:
4517 * Number of completed commands on success, -errno otherwise.
4518 */
4519int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4520 void (*finish_qc)(struct ata_queued_cmd *))
4521{
4522 int nr_done = 0;
4523 u32 done_mask;
4524 int i;
4525
4526 done_mask = ap->qc_active ^ qc_active;
4527
4528 if (unlikely(done_mask & qc_active)) {
4529 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4530 "(%08x->%08x)\n", ap->qc_active, qc_active);
4531 return -EINVAL;
4532 }
4533
4534 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4535 struct ata_queued_cmd *qc;
4536
4537 if (!(done_mask & (1 << i)))
4538 continue;
4539
4540 if ((qc = ata_qc_from_tag(ap, i))) {
4541 if (finish_qc)
4542 finish_qc(qc);
4543 ata_qc_complete(qc);
4544 nr_done++;
4545 }
4546 }
4547
4548 return nr_done;
4549}
4550
1da177e4
LT		 4551static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4552{
4553 struct ata_port *ap = qc->ap;
4554
4555 switch (qc->tf.protocol) {
3dc1d881 4556 case ATA_PROT_NCQ:
1da177e4
LT		 4557 case ATA_PROT_DMA:
4558 case ATA_PROT_ATAPI_DMA:
4559 return 1;
4560
4561 case ATA_PROT_ATAPI:
4562 case ATA_PROT_PIO:
1da177e4
LT		 4563 if (ap->flags & ATA_FLAG_PIO_DMA)
4564 return 1;
4565
4566 /* fall through */
4567
4568 default:
4569 return 0;
4570 }
4571
4572 /* never reached */
4573}
4574
4575/**
4576 * ata_qc_issue - issue taskfile to device
4577 * @qc: command to issue to device
4578 *
4579 * Prepare an ATA command to submission to device.
4580 * This includes mapping the data into a DMA-able
4581 * area, filling in the S/G table, and finally
4582 * writing the taskfile to hardware, starting the command.
4583 *
4584 * LOCKING:
cca3974e 4585 * spin_lock_irqsave(host lock)
1da177e4 4586 */
8e0e694a 4587void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4588{
4589 struct ata_port *ap = qc->ap;
4590
dedaf2b0
TH		 4591 /* Make sure only one non-NCQ command is outstanding. The
4592 * check is skipped for old EH because it reuses active qc to
4593 * request ATAPI sense.
4594 */
4595 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4596
4597 if (qc->tf.protocol == ATA_PROT_NCQ) {
4598 WARN_ON(ap->sactive & (1 << qc->tag));
4599 ap->sactive |= 1 << qc->tag;
4600 } else {
4601 WARN_ON(ap->sactive);
4602 ap->active_tag = qc->tag;
4603 }
4604
e4a70e76 4605 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 4606 ap->qc_active |= 1 << qc->tag;
e4a70e76 4607
1da177e4
LT		 4608 if (ata_should_dma_map(qc)) {
4609 if (qc->flags & ATA_QCFLAG_SG) {
4610 if (ata_sg_setup(qc))
8e436af9 4611 goto sg_err;
1da177e4
LT		 4612 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4613 if (ata_sg_setup_one(qc))
8e436af9 4614 goto sg_err;
1da177e4
LT		 4615 }
4616 } else {
4617 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4618 }
4619
4620 ap->ops->qc_prep(qc);
4621
8e0e694a
TH		 4622 qc->err_mask |= ap->ops->qc_issue(qc);
4623 if (unlikely(qc->err_mask))
4624 goto err;
4625 return;
1da177e4 4626
8e436af9
TH		 4627sg_err:
4628 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4629 qc->err_mask |= AC_ERR_SYSTEM;
4630err:
4631 ata_qc_complete(qc);
1da177e4
LT		 4632}
4633
4634/**
4635 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4636 * @qc: command to issue to device
4637 *
4638 * Using various libata functions and hooks, this function
4639 * starts an ATA command. ATA commands are grouped into
4640 * classes called "protocols", and issuing each type of protocol
4641 * is slightly different.
4642 *
0baab86b
EF		 4643 * May be used as the qc_issue() entry in ata_port_operations.
4644 *
1da177e4 4645 * LOCKING:
cca3974e 4646 * spin_lock_irqsave(host lock)
1da177e4
LT		 4647 *
4648 * RETURNS:
9a3d9eb0 4649 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4650 */
4651
9a3d9eb0 4652unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4653{
4654 struct ata_port *ap = qc->ap;
4655
e50362ec
AL		 4656 /* Use polling pio if the LLD doesn't handle
4657 * interrupt driven pio and atapi CDB interrupt.
4658 */
4659 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4660 switch (qc->tf.protocol) {
4661 case ATA_PROT_PIO:
4662 case ATA_PROT_ATAPI:
4663 case ATA_PROT_ATAPI_NODATA:
4664 qc->tf.flags |= ATA_TFLAG_POLLING;
4665 break;
4666 case ATA_PROT_ATAPI_DMA:
4667 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3a778275 4668 /* see ata_dma_blacklisted() */
e50362ec
AL		 4669 BUG();
4670 break;
4671 default:
4672 break;
4673 }
4674 }
4675
312f7da2 4676 /* select the device */
1da177e4
LT		 4677 ata_dev_select(ap, qc->dev->devno, 1, 0);
4678
312f7da2 4679 /* start the command */
1da177e4
LT		 4680 switch (qc->tf.protocol) {
4681 case ATA_PROT_NODATA:
312f7da2
AL		 4682 if (qc->tf.flags & ATA_TFLAG_POLLING)
4683 ata_qc_set_polling(qc);
4684
e5338254 4685 ata_tf_to_host(ap, &qc->tf);
312f7da2
AL		 4686 ap->hsm_task_state = HSM_ST_LAST;
4687
4688 if (qc->tf.flags & ATA_TFLAG_POLLING)
31ce6dae 4689 ata_port_queue_task(ap, ata_pio_task, qc, 0);
312f7da2 4690
1da177e4
LT		 4691 break;
4692
4693 case ATA_PROT_DMA:
587005de 4694 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4695
1da177e4
LT		 4696 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4697 ap->ops->bmdma_setup(qc); /* set up bmdma */
4698 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 4699 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 4700 break;
4701
312f7da2
AL		 4702 case ATA_PROT_PIO:
4703 if (qc->tf.flags & ATA_TFLAG_POLLING)
4704 ata_qc_set_polling(qc);
1da177e4 4705
e5338254 4706 ata_tf_to_host(ap, &qc->tf);
312f7da2 4707
54f00389
AL		 4708 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4709 /* PIO data out protocol */
4710 ap->hsm_task_state = HSM_ST_FIRST;
31ce6dae 4711 ata_port_queue_task(ap, ata_pio_task, qc, 0);
54f00389
AL		 4712
4713 /* always send first data block using
e27486db 4714 * the ata_pio_task() codepath.
54f00389 4715 */
312f7da2 4716 } else {
54f00389
AL		 4717 /* PIO data in protocol */
4718 ap->hsm_task_state = HSM_ST;
4719
4720 if (qc->tf.flags & ATA_TFLAG_POLLING)
31ce6dae 4721 ata_port_queue_task(ap, ata_pio_task, qc, 0);
54f00389
AL		 4722
4723 /* if polling, ata_pio_task() handles the rest.
4724 * otherwise, interrupt handler takes over from here.
4725 */
312f7da2
AL		 4726 }
4727
1da177e4
LT		 4728 break;
4729
1da177e4 4730 case ATA_PROT_ATAPI:
1da177e4 4731 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 4732 if (qc->tf.flags & ATA_TFLAG_POLLING)
4733 ata_qc_set_polling(qc);
4734
e5338254 4735 ata_tf_to_host(ap, &qc->tf);
f6ef65e6 4736
312f7da2
AL		 4737 ap->hsm_task_state = HSM_ST_FIRST;
4738
4739 /* send cdb by polling if no cdb interrupt */
4740 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4741 (qc->tf.flags & ATA_TFLAG_POLLING))
31ce6dae 4742 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4743 break;
4744
4745 case ATA_PROT_ATAPI_DMA:
587005de 4746 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4747
1da177e4
LT		 4748 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4749 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 4750 ap->hsm_task_state = HSM_ST_FIRST;
4751
4752 /* send cdb by polling if no cdb interrupt */
4753 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
31ce6dae 4754 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4755 break;
4756
4757 default:
4758 WARN_ON(1);
9a3d9eb0 4759 return AC_ERR_SYSTEM;
1da177e4
LT		 4760 }
4761
4762 return 0;
4763}
4764
1da177e4
LT		 4765/**
4766 * ata_host_intr - Handle host interrupt for given (port, task)
4767 * @ap: Port on which interrupt arrived (possibly...)
4768 * @qc: Taskfile currently active in engine
4769 *
4770 * Handle host interrupt for given queued command. Currently,
4771 * only DMA interrupts are handled. All other commands are
4772 * handled via polling with interrupts disabled (nIEN bit).
4773 *
4774 * LOCKING:
cca3974e 4775 * spin_lock_irqsave(host lock)
1da177e4
LT		 4776 *
4777 * RETURNS:
4778 * One if interrupt was handled, zero if not (shared irq).
4779 */
4780
4781inline unsigned int ata_host_intr (struct ata_port *ap,
4782 struct ata_queued_cmd *qc)
4783{
312f7da2 4784 u8 status, host_stat = 0;
1da177e4 4785
312f7da2
AL		 4786 VPRINTK("ata%u: protocol %d task_state %d\n",
4787 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 4788
312f7da2
AL		 4789 /* Check whether we are expecting interrupt in this state */
4790 switch (ap->hsm_task_state) {
4791 case HSM_ST_FIRST:
6912ccd5
AL		 4792 /* Some pre-ATAPI-4 devices assert INTRQ
4793 * at this state when ready to receive CDB.
4794 */
1da177e4 4795
312f7da2
AL		 4796 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4797 * The flag was turned on only for atapi devices.
4798 * No need to check is_atapi_taskfile(&qc->tf) again.
4799 */
4800 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 4801 goto idle_irq;
1da177e4 4802 break;
312f7da2
AL		 4803 case HSM_ST_LAST:
4804 if (qc->tf.protocol == ATA_PROT_DMA ||
4805 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4806 /* check status of DMA engine */
4807 host_stat = ap->ops->bmdma_status(ap);
4808 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4809
4810 /* if it's not our irq... */
4811 if (!(host_stat & ATA_DMA_INTR))
4812 goto idle_irq;
4813
4814 /* before we do anything else, clear DMA-Start bit */
4815 ap->ops->bmdma_stop(qc);
a4f16610
AL		 4816
4817 if (unlikely(host_stat & ATA_DMA_ERR)) {
4818 /* error when transfering data to/from memory */
4819 qc->err_mask |= AC_ERR_HOST_BUS;
4820 ap->hsm_task_state = HSM_ST_ERR;
4821 }
312f7da2
AL		 4822 }
4823 break;
4824 case HSM_ST:
4825 break;
1da177e4
LT		 4826 default:
4827 goto idle_irq;
4828 }
4829
312f7da2
AL		 4830 /* check altstatus */
4831 status = ata_altstatus(ap);
4832 if (status & ATA_BUSY)
4833 goto idle_irq;
1da177e4 4834
312f7da2
AL		 4835 /* check main status, clearing INTRQ */
4836 status = ata_chk_status(ap);
4837 if (unlikely(status & ATA_BUSY))
4838 goto idle_irq;
1da177e4 4839
312f7da2
AL		 4840 /* ack bmdma irq events */
4841 ap->ops->irq_clear(ap);
1da177e4 4842
bb5cb290 4843 ata_hsm_move(ap, qc, status, 0);
1da177e4
LT		 4844 return 1; /* irq handled */
4845
4846idle_irq:
4847 ap->stats.idle_irq++;
4848
4849#ifdef ATA_IRQ_TRAP
4850 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4 4851 ata_irq_ack(ap, 0); /* debug trap */
f15a1daf 4852 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
23cfce89 4853 return 1;
1da177e4
LT		 4854 }
4855#endif
4856 return 0; /* irq not handled */
4857}
4858
4859/**
4860 * ata_interrupt - Default ATA host interrupt handler
0cba632b 4861 * @irq: irq line (unused)
cca3974e 4862 * @dev_instance: pointer to our ata_host information structure
1da177e4 4863 *
0cba632b
JG		 4864 * Default interrupt handler for PCI IDE devices. Calls
4865 * ata_host_intr() for each port that is not disabled.
4866 *
1da177e4 4867 * LOCKING:
cca3974e 4868 * Obtains host lock during operation.
1da177e4
LT		 4869 *
4870 * RETURNS:
0cba632b 4871 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4872 */
4873
7d12e780 4874irqreturn_t ata_interrupt (int irq, void *dev_instance)
1da177e4 4875{
cca3974e 4876 struct ata_host *host = dev_instance;
1da177e4
LT		 4877 unsigned int i;
4878 unsigned int handled = 0;
4879 unsigned long flags;
4880
4881 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
cca3974e 4882 spin_lock_irqsave(&host->lock, flags);
1da177e4 4883
cca3974e 4884 for (i = 0; i < host->n_ports; i++) {
1da177e4
LT		 4885 struct ata_port *ap;
4886
cca3974e 4887 ap = host->ports[i];
c1389503 4888 if (ap &&
029f5468 4889 !(ap->flags & ATA_FLAG_DISABLED)) {
1da177e4
LT		 4890 struct ata_queued_cmd *qc;
4891
4892 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4893 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4894 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4895 handled |= ata_host_intr(ap, qc);
4896 }
4897 }
4898
cca3974e 4899 spin_unlock_irqrestore(&host->lock, flags);
1da177e4
LT		 4900
4901 return IRQ_RETVAL(handled);
4902}
4903
34bf2170
TH		 4904/**
4905 * sata_scr_valid - test whether SCRs are accessible
4906 * @ap: ATA port to test SCR accessibility for
4907 *
4908 * Test whether SCRs are accessible for @ap.
4909 *
4910 * LOCKING:
4911 * None.
4912 *
4913 * RETURNS:
4914 * 1 if SCRs are accessible, 0 otherwise.
4915 */
4916int sata_scr_valid(struct ata_port *ap)
4917{
4918 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4919}
4920
4921/**
4922 * sata_scr_read - read SCR register of the specified port
4923 * @ap: ATA port to read SCR for
4924 * @reg: SCR to read
4925 * @val: Place to store read value
4926 *
4927 * Read SCR register @reg of @ap into *@val. This function is
4928 * guaranteed to succeed if the cable type of the port is SATA
4929 * and the port implements ->scr_read.
4930 *
4931 * LOCKING:
4932 * None.
4933 *
4934 * RETURNS:
4935 * 0 on success, negative errno on failure.
4936 */
4937int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4938{
4939 if (sata_scr_valid(ap)) {
4940 *val = ap->ops->scr_read(ap, reg);
4941 return 0;
4942 }
4943 return -EOPNOTSUPP;
4944}
4945
4946/**
4947 * sata_scr_write - write SCR register of the specified port
4948 * @ap: ATA port to write SCR for
4949 * @reg: SCR to write
4950 * @val: value to write
4951 *
4952 * Write @val to SCR register @reg of @ap. This function is
4953 * guaranteed to succeed if the cable type of the port is SATA
4954 * and the port implements ->scr_read.
4955 *
4956 * LOCKING:
4957 * None.
4958 *
4959 * RETURNS:
4960 * 0 on success, negative errno on failure.
4961 */
4962int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4963{
4964 if (sata_scr_valid(ap)) {
4965 ap->ops->scr_write(ap, reg, val);
4966 return 0;
4967 }
4968 return -EOPNOTSUPP;
4969}
4970
4971/**
4972 * sata_scr_write_flush - write SCR register of the specified port and flush
4973 * @ap: ATA port to write SCR for
4974 * @reg: SCR to write
4975 * @val: value to write
4976 *
4977 * This function is identical to sata_scr_write() except that this
4978 * function performs flush after writing to the register.
4979 *
4980 * LOCKING:
4981 * None.
4982 *
4983 * RETURNS:
4984 * 0 on success, negative errno on failure.
4985 */
4986int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4987{
4988 if (sata_scr_valid(ap)) {
4989 ap->ops->scr_write(ap, reg, val);
4990 ap->ops->scr_read(ap, reg);
4991 return 0;
4992 }
4993 return -EOPNOTSUPP;
4994}
4995
4996/**
4997 * ata_port_online - test whether the given port is online
4998 * @ap: ATA port to test
4999 *
5000 * Test whether @ap is online. Note that this function returns 0
5001 * if online status of @ap cannot be obtained, so
5002 * ata_port_online(ap) != !ata_port_offline(ap).
5003 *
5004 * LOCKING:
5005 * None.
5006 *
5007 * RETURNS:
5008 * 1 if the port online status is available and online.
5009 */
5010int ata_port_online(struct ata_port *ap)
5011{
5012 u32 sstatus;
5013
5014 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5015 return 1;
5016 return 0;
5017}
5018
5019/**
5020 * ata_port_offline - test whether the given port is offline
5021 * @ap: ATA port to test
5022 *
5023 * Test whether @ap is offline. Note that this function returns
5024 * 0 if offline status of @ap cannot be obtained, so
5025 * ata_port_online(ap) != !ata_port_offline(ap).
5026 *
5027 * LOCKING:
5028 * None.
5029 *
5030 * RETURNS:
5031 * 1 if the port offline status is available and offline.
5032 */
5033int ata_port_offline(struct ata_port *ap)
5034{
5035 u32 sstatus;
5036
5037 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5038 return 1;
5039 return 0;
5040}
0baab86b 5041
77b08fb5 5042int ata_flush_cache(struct ata_device *dev)
9b847548 5043{
977e6b9f 5044 unsigned int err_mask;
9b847548
JA		 5045 u8 cmd;
5046
5047 if (!ata_try_flush_cache(dev))
5048 return 0;
5049
5050 if (ata_id_has_flush_ext(dev->id))
5051 cmd = ATA_CMD_FLUSH_EXT;
5052 else
5053 cmd = ATA_CMD_FLUSH;
5054
977e6b9f
TH		 5055 err_mask = ata_do_simple_cmd(dev, cmd);
5056 if (err_mask) {
5057 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5058 return -EIO;
5059 }
5060
5061 return 0;
9b847548
JA		 5062}
5063
cca3974e
JG		 5064static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5065 unsigned int action, unsigned int ehi_flags,
5066 int wait)
500530f6
TH		 5067{
5068 unsigned long flags;
5069 int i, rc;
5070
cca3974e
JG		 5071 for (i = 0; i < host->n_ports; i++) {
5072 struct ata_port *ap = host->ports[i];
500530f6
TH		 5073
5074 /* Previous resume operation might still be in
5075 * progress. Wait for PM_PENDING to clear.
5076 */
5077 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5078 ata_port_wait_eh(ap);
5079 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5080 }
5081
5082 /* request PM ops to EH */
5083 spin_lock_irqsave(ap->lock, flags);
5084
5085 ap->pm_mesg = mesg;
5086 if (wait) {
5087 rc = 0;
5088 ap->pm_result = &rc;
5089 }
5090
5091 ap->pflags |= ATA_PFLAG_PM_PENDING;
5092 ap->eh_info.action |= action;
5093 ap->eh_info.flags |= ehi_flags;
5094
5095 ata_port_schedule_eh(ap);
5096
5097 spin_unlock_irqrestore(ap->lock, flags);
5098
5099 /* wait and check result */
5100 if (wait) {
5101 ata_port_wait_eh(ap);
5102 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5103 if (rc)
5104 return rc;
5105 }
5106 }
5107
5108 return 0;
5109}
5110
5111/**
cca3974e
JG		 5112 * ata_host_suspend - suspend host
5113 * @host: host to suspend
500530f6
TH		 5114 * @mesg: PM message
5115 *
cca3974e 5116 * Suspend @host. Actual operation is performed by EH. This
500530f6
TH		 5117 * function requests EH to perform PM operations and waits for EH
5118 * to finish.
5119 *
5120 * LOCKING:
5121 * Kernel thread context (may sleep).
5122 *
5123 * RETURNS:
5124 * 0 on success, -errno on failure.
5125 */
cca3974e 5126int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6
TH		 5127{
5128 int i, j, rc;
5129
cca3974e 5130 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
500530f6
TH		 5131 if (rc)
5132 goto fail;
5133
5134 /* EH is quiescent now. Fail if we have any ready device.
5135 * This happens if hotplug occurs between completion of device
5136 * suspension and here.
5137 */
cca3974e
JG		 5138 for (i = 0; i < host->n_ports; i++) {
5139 struct ata_port *ap = host->ports[i];
500530f6
TH		 5140
5141 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5142 struct ata_device *dev = &ap->device[j];
5143
5144 if (ata_dev_ready(dev)) {
5145 ata_port_printk(ap, KERN_WARNING,
5146 "suspend failed, device %d "
5147 "still active\n", dev->devno);
5148 rc = -EBUSY;
5149 goto fail;
5150 }
5151 }
5152 }
5153
cca3974e 5154 host->dev->power.power_state = mesg;
500530f6
TH		 5155 return 0;
5156
5157 fail:
cca3974e 5158 ata_host_resume(host);
500530f6
TH		 5159 return rc;
5160}
5161
5162/**
cca3974e
JG		 5163 * ata_host_resume - resume host
5164 * @host: host to resume
500530f6 5165 *
cca3974e 5166 * Resume @host. Actual operation is performed by EH. This
500530f6
TH		 5167 * function requests EH to perform PM operations and returns.
5168 * Note that all resume operations are performed parallely.
5169 *
5170 * LOCKING:
5171 * Kernel thread context (may sleep).
5172 */
cca3974e 5173void ata_host_resume(struct ata_host *host)
500530f6 5174{
cca3974e
JG		 5175 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5176 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5177 host->dev->power.power_state = PMSG_ON;
500530f6
TH		 5178}
5179
c893a3ae
RD		 5180/**
5181 * ata_port_start - Set port up for dma.
5182 * @ap: Port to initialize
5183 *
5184 * Called just after data structures for each port are
5185 * initialized. Allocates space for PRD table.
5186 *
5187 * May be used as the port_start() entry in ata_port_operations.
5188 *
5189 * LOCKING:
5190 * Inherited from caller.
5191 */
5192
1da177e4
LT		 5193int ata_port_start (struct ata_port *ap)
5194{
2f1f610b 5195 struct device *dev = ap->dev;
6037d6bb 5196 int rc;
1da177e4
LT		 5197
5198 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5199 if (!ap->prd)
5200 return -ENOMEM;
5201
6037d6bb
JG		 5202 rc = ata_pad_alloc(ap, dev);
5203 if (rc) {
cedc9a47 5204 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 5205 return rc;
cedc9a47
JG		 5206 }
5207
1da177e4
LT		 5208 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5209
5210 return 0;
5211}
5212
0baab86b
EF		 5213
5214/**
5215 * ata_port_stop - Undo ata_port_start()
5216 * @ap: Port to shut down
5217 *
5218 * Frees the PRD table.
5219 *
5220 * May be used as the port_stop() entry in ata_port_operations.
5221 *
5222 * LOCKING:
6f0ef4fa 5223 * Inherited from caller.
0baab86b
EF		 5224 */
5225
1da177e4
LT		 5226void ata_port_stop (struct ata_port *ap)
5227{
2f1f610b 5228 struct device *dev = ap->dev;
1da177e4
LT		 5229
5230 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 5231 ata_pad_free(ap, dev);
1da177e4
LT		 5232}
5233
cca3974e 5234void ata_host_stop (struct ata_host *host)
aa8f0dc6 5235{
cca3974e
JG		 5236 if (host->mmio_base)
5237 iounmap(host->mmio_base);
aa8f0dc6
JG		 5238}
5239
3ef3b43d
TH		 5240/**
5241 * ata_dev_init - Initialize an ata_device structure
5242 * @dev: Device structure to initialize
5243 *
5244 * Initialize @dev in preparation for probing.
5245 *
5246 * LOCKING:
5247 * Inherited from caller.
5248 */
5249void ata_dev_init(struct ata_device *dev)
5250{
5251 struct ata_port *ap = dev->ap;
72fa4b74
TH		 5252 unsigned long flags;
5253
5a04bf4b
TH		 5254 /* SATA spd limit is bound to the first device */
5255 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5256
72fa4b74
TH		 5257 /* High bits of dev->flags are used to record warm plug
5258 * requests which occur asynchronously. Synchronize using
cca3974e 5259 * host lock.
72fa4b74 5260 */
ba6a1308 5261 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5262 dev->flags &= ~ATA_DFLAG_INIT_MASK;
ba6a1308 5263 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5264
72fa4b74
TH		 5265 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5266 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
3ef3b43d
TH		 5267 dev->pio_mask = UINT_MAX;
5268 dev->mwdma_mask = UINT_MAX;
5269 dev->udma_mask = UINT_MAX;
5270}
5271
1da177e4 5272/**
155a8a9c 5273 * ata_port_init - Initialize an ata_port structure
1da177e4 5274 * @ap: Structure to initialize
cca3974e 5275 * @host: Collection of hosts to which @ap belongs
1da177e4
LT		 5276 * @ent: Probe information provided by low-level driver
5277 * @port_no: Port number associated with this ata_port
5278 *
155a8a9c 5279 * Initialize a new ata_port structure.
0cba632b 5280 *
1da177e4 5281 * LOCKING:
0cba632b 5282 * Inherited from caller.
1da177e4 5283 */
cca3974e 5284void ata_port_init(struct ata_port *ap, struct ata_host *host,
155a8a9c 5285 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 5286{
5287 unsigned int i;
5288
cca3974e 5289 ap->lock = &host->lock;
198e0fed 5290 ap->flags = ATA_FLAG_DISABLED;
155a8a9c 5291 ap->id = ata_unique_id++;
1da177e4 5292 ap->ctl = ATA_DEVCTL_OBS;
cca3974e 5293 ap->host = host;
2f1f610b 5294 ap->dev = ent->dev;
1da177e4 5295 ap->port_no = port_no;
fea63e38
TH		 5296 if (port_no == 1 && ent->pinfo2) {
5297 ap->pio_mask = ent->pinfo2->pio_mask;
5298 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5299 ap->udma_mask = ent->pinfo2->udma_mask;
5300 ap->flags |= ent->pinfo2->flags;
5301 ap->ops = ent->pinfo2->port_ops;
5302 } else {
5303 ap->pio_mask = ent->pio_mask;
5304 ap->mwdma_mask = ent->mwdma_mask;
5305 ap->udma_mask = ent->udma_mask;
5306 ap->flags |= ent->port_flags;
5307 ap->ops = ent->port_ops;
5308 }
5a04bf4b 5309 ap->hw_sata_spd_limit = UINT_MAX;
1da177e4
LT		 5310 ap->active_tag = ATA_TAG_POISON;
5311 ap->last_ctl = 0xFF;
bd5d825c
BP		 5312
5313#if defined(ATA_VERBOSE_DEBUG)
5314 /* turn on all debugging levels */
5315 ap->msg_enable = 0x00FF;
5316#elif defined(ATA_DEBUG)
5317 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5318#else
0dd4b21f 5319 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5320#endif
1da177e4 5321
65f27f38
DH		 5322 INIT_DELAYED_WORK(&ap->port_task, NULL);
5323 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5324 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5325 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5326 init_waitqueue_head(&ap->eh_wait_q);
1da177e4 5327
838df628
TH		 5328 /* set cable type */
5329 ap->cbl = ATA_CBL_NONE;
5330 if (ap->flags & ATA_FLAG_SATA)
5331 ap->cbl = ATA_CBL_SATA;
5332
acf356b1
TH		 5333 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5334 struct ata_device *dev = &ap->device[i];
38d87234 5335 dev->ap = ap;
72fa4b74 5336 dev->devno = i;
3ef3b43d 5337 ata_dev_init(dev);
acf356b1 5338 }
1da177e4
LT		 5339
5340#ifdef ATA_IRQ_TRAP
5341 ap->stats.unhandled_irq = 1;
5342 ap->stats.idle_irq = 1;
5343#endif
5344
5345 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5346}
5347
155a8a9c 5348/**
4608c160
TH		 5349 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5350 * @ap: ATA port to initialize SCSI host for
5351 * @shost: SCSI host associated with @ap
155a8a9c 5352 *
4608c160 5353 * Initialize SCSI host @shost associated with ATA port @ap.
155a8a9c
BK		 5354 *
5355 * LOCKING:
5356 * Inherited from caller.
5357 */
4608c160 5358static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
155a8a9c 5359{
cca3974e 5360 ap->scsi_host = shost;
155a8a9c 5361
4608c160
TH		 5362 shost->unique_id = ap->id;
5363 shost->max_id = 16;
5364 shost->max_lun = 1;
5365 shost->max_channel = 1;
5366 shost->max_cmd_len = 12;
155a8a9c
BK		 5367}
5368
1da177e4 5369/**
996139f1 5370 * ata_port_add - Attach low-level ATA driver to system
1da177e4 5371 * @ent: Information provided by low-level driver
cca3974e 5372 * @host: Collections of ports to which we add
1da177e4
LT		 5373 * @port_no: Port number associated with this host
5374 *
0cba632b
JG		 5375 * Attach low-level ATA driver to system.
5376 *
1da177e4 5377 * LOCKING:
0cba632b 5378 * PCI/etc. bus probe sem.
1da177e4
LT		 5379 *
5380 * RETURNS:
0cba632b 5381 * New ata_port on success, for NULL on error.
1da177e4 5382 */
996139f1 5383static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
cca3974e 5384 struct ata_host *host,
1da177e4
LT		 5385 unsigned int port_no)
5386{
996139f1 5387 struct Scsi_Host *shost;
1da177e4 5388 struct ata_port *ap;
1da177e4
LT		 5389
5390 DPRINTK("ENTER\n");
aec5c3c1 5391
52783c5d 5392 if (!ent->port_ops->error_handler &&
cca3974e 5393 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
aec5c3c1
TH		 5394 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5395 port_no);
5396 return NULL;
5397 }
5398
996139f1
JG		 5399 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5400 if (!shost)
1da177e4
LT		 5401 return NULL;
5402
996139f1 5403 shost->transportt = &ata_scsi_transport_template;
30afc84c 5404
996139f1 5405 ap = ata_shost_to_port(shost);
1da177e4 5406
cca3974e 5407 ata_port_init(ap, host, ent, port_no);
996139f1 5408 ata_port_init_shost(ap, shost);
1da177e4 5409
1da177e4 5410 return ap;
1da177e4
LT		 5411}
5412
b03732f0 5413/**
cca3974e
JG		 5414 * ata_sas_host_init - Initialize a host struct
5415 * @host: host to initialize
5416 * @dev: device host is attached to
5417 * @flags: host flags
5418 * @ops: port_ops
b03732f0
BK		 5419 *
5420 * LOCKING:
5421 * PCI/etc. bus probe sem.
5422 *
5423 */
5424
cca3974e
JG		 5425void ata_host_init(struct ata_host *host, struct device *dev,
5426 unsigned long flags, const struct ata_port_operations *ops)
b03732f0 5427{
cca3974e
JG		 5428 spin_lock_init(&host->lock);
5429 host->dev = dev;
5430 host->flags = flags;
5431 host->ops = ops;
b03732f0
BK		 5432}
5433
1da177e4 5434/**
0cba632b
JG		 5435 * ata_device_add - Register hardware device with ATA and SCSI layers
5436 * @ent: Probe information describing hardware device to be registered
5437 *
5438 * This function processes the information provided in the probe
5439 * information struct @ent, allocates the necessary ATA and SCSI
5440 * host information structures, initializes them, and registers
5441 * everything with requisite kernel subsystems.
5442 *
5443 * This function requests irqs, probes the ATA bus, and probes
5444 * the SCSI bus.
1da177e4
LT		 5445 *
5446 * LOCKING:
0cba632b 5447 * PCI/etc. bus probe sem.
1da177e4
LT		 5448 *
5449 * RETURNS:
0cba632b 5450 * Number of ports registered. Zero on error (no ports registered).
1da177e4 5451 */
057ace5e 5452int ata_device_add(const struct ata_probe_ent *ent)
1da177e4 5453{
6d0500df 5454 unsigned int i;
1da177e4 5455 struct device *dev = ent->dev;
cca3974e 5456 struct ata_host *host;
39b07ce6 5457 int rc;
1da177e4
LT		 5458
5459 DPRINTK("ENTER\n");
02f076aa
AC		 5460
5461 if (ent->irq == 0) {
5462 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5463 return 0;
5464 }
1da177e4 5465 /* alloc a container for our list of ATA ports (buses) */
cca3974e
JG		 5466 host = kzalloc(sizeof(struct ata_host) +
5467 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5468 if (!host)
1da177e4 5469 return 0;
1da177e4 5470
cca3974e
JG		 5471 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5472 host->n_ports = ent->n_ports;
5473 host->irq = ent->irq;
5474 host->irq2 = ent->irq2;
5475 host->mmio_base = ent->mmio_base;
5476 host->private_data = ent->private_data;
1da177e4
LT		 5477
5478 /* register each port bound to this device */
cca3974e 5479 for (i = 0; i < host->n_ports; i++) {
1da177e4
LT		 5480 struct ata_port *ap;
5481 unsigned long xfer_mode_mask;
2ec7df04 5482 int irq_line = ent->irq;
1da177e4 5483
cca3974e 5484 ap = ata_port_add(ent, host, i);
c38778c3 5485 host->ports[i] = ap;
1da177e4
LT		 5486 if (!ap)
5487 goto err_out;
5488
dd5b06c4
TH		 5489 /* dummy? */
5490 if (ent->dummy_port_mask & (1 << i)) {
5491 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5492 ap->ops = &ata_dummy_port_ops;
5493 continue;
5494 }
5495
5496 /* start port */
5497 rc = ap->ops->port_start(ap);
5498 if (rc) {
cca3974e
JG		 5499 host->ports[i] = NULL;
5500 scsi_host_put(ap->scsi_host);
dd5b06c4
TH		 5501 goto err_out;
5502 }
5503
2ec7df04
AC		 5504 /* Report the secondary IRQ for second channel legacy */
5505 if (i == 1 && ent->irq2)
5506 irq_line = ent->irq2;
5507
1da177e4
LT		 5508 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5509 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5510 (ap->pio_mask << ATA_SHIFT_PIO);
5511
5512 /* print per-port info to dmesg */
f15a1daf 5513 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
2ec7df04 5514 "ctl 0x%lX bmdma 0x%lX irq %d\n",
f15a1daf
TH		 5515 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5516 ata_mode_string(xfer_mode_mask),
5517 ap->ioaddr.cmd_addr,
5518 ap->ioaddr.ctl_addr,
5519 ap->ioaddr.bmdma_addr,
2ec7df04 5520 irq_line);
1da177e4
LT		 5521
5522 ata_chk_status(ap);
cca3974e 5523 host->ops->irq_clear(ap);
e3180499 5524 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
1da177e4
LT		 5525 }
5526
2ec7df04 5527 /* obtain irq, that may be shared between channels */
39b07ce6 5528 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
cca3974e 5529 DRV_NAME, host);
39b07ce6
JG		 5530 if (rc) {
5531 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5532 ent->irq, rc);
1da177e4 5533 goto err_out;
39b07ce6 5534 }
1da177e4 5535
2ec7df04
AC		 5536 /* do we have a second IRQ for the other channel, eg legacy mode */
5537 if (ent->irq2) {
5538 /* We will get weird core code crashes later if this is true
5539 so trap it now */
5540 BUG_ON(ent->irq == ent->irq2);
5541
5542 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
cca3974e 5543 DRV_NAME, host);
2ec7df04
AC		 5544 if (rc) {
5545 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5546 ent->irq2, rc);
5547 goto err_out_free_irq;
5548 }
5549 }
5550
1da177e4
LT		 5551 /* perform each probe synchronously */
5552 DPRINTK("probe begin\n");
cca3974e
JG		 5553 for (i = 0; i < host->n_ports; i++) {
5554 struct ata_port *ap = host->ports[i];
5a04bf4b 5555 u32 scontrol;
1da177e4
LT		 5556 int rc;
5557
5a04bf4b
TH		 5558 /* init sata_spd_limit to the current value */
5559 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5560 int spd = (scontrol >> 4) & 0xf;
5561 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5562 }
5563 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5564
cca3974e 5565 rc = scsi_add_host(ap->scsi_host, dev);
1da177e4 5566 if (rc) {
f15a1daf 5567 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
1da177e4
LT		 5568 /* FIXME: do something useful here */
5569 /* FIXME: handle unconditional calls to
5570 * scsi_scan_host and ata_host_remove, below,
5571 * at the very least
5572 */
5573 }
3e706399 5574
52783c5d 5575 if (ap->ops->error_handler) {
1cdaf534 5576 struct ata_eh_info *ehi = &ap->eh_info;
3e706399
TH		 5577 unsigned long flags;
5578
5579 ata_port_probe(ap);
5580
5581 /* kick EH for boot probing */
ba6a1308 5582 spin_lock_irqsave(ap->lock, flags);
3e706399 5583
1cdaf534
TH		 5584 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5585 ehi->action |= ATA_EH_SOFTRESET;
5586 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
3e706399 5587
b51e9e5d 5588 ap->pflags |= ATA_PFLAG_LOADING;
3e706399
TH		 5589 ata_port_schedule_eh(ap);
5590
ba6a1308 5591 spin_unlock_irqrestore(ap->lock, flags);
3e706399
TH		 5592
5593 /* wait for EH to finish */
5594 ata_port_wait_eh(ap);
5595 } else {
5596 DPRINTK("ata%u: bus probe begin\n", ap->id);
5597 rc = ata_bus_probe(ap);
5598 DPRINTK("ata%u: bus probe end\n", ap->id);
5599
5600 if (rc) {
5601 /* FIXME: do something useful here?
5602 * Current libata behavior will
5603 * tear down everything when
5604 * the module is removed
5605 * or the h/w is unplugged.
5606 */
5607 }
5608 }
1da177e4
LT		 5609 }
5610
5611 /* probes are done, now scan each port's disk(s) */
c893a3ae 5612 DPRINTK("host probe begin\n");
cca3974e
JG		 5613 for (i = 0; i < host->n_ports; i++) {
5614 struct ata_port *ap = host->ports[i];
1da177e4 5615
644dd0cc 5616 ata_scsi_scan_host(ap);
1da177e4
LT		 5617 }
5618
cca3974e 5619 dev_set_drvdata(dev, host);
1da177e4
LT		 5620
5621 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5622 return ent->n_ports; /* success */
5623
2ec7df04 5624err_out_free_irq:
cca3974e 5625 free_irq(ent->irq, host);
1da177e4 5626err_out:
cca3974e
JG		 5627 for (i = 0; i < host->n_ports; i++) {
5628 struct ata_port *ap = host->ports[i];
77f3f879
TH		 5629 if (ap) {
5630 ap->ops->port_stop(ap);
cca3974e 5631 scsi_host_put(ap->scsi_host);
77f3f879 5632 }
1da177e4 5633 }
6d0500df 5634
cca3974e 5635 kfree(host);
1da177e4
LT		 5636 VPRINTK("EXIT, returning 0\n");
5637 return 0;
5638}
5639
720ba126
TH		 5640/**
5641 * ata_port_detach - Detach ATA port in prepration of device removal
5642 * @ap: ATA port to be detached
5643 *
5644 * Detach all ATA devices and the associated SCSI devices of @ap;
5645 * then, remove the associated SCSI host. @ap is guaranteed to
5646 * be quiescent on return from this function.
5647 *
5648 * LOCKING:
5649 * Kernel thread context (may sleep).
5650 */
5651void ata_port_detach(struct ata_port *ap)
5652{
5653 unsigned long flags;
5654 int i;
5655
5656 if (!ap->ops->error_handler)
c3cf30a9 5657 goto skip_eh;
720ba126
TH		 5658
5659 /* tell EH we're leaving & flush EH */
ba6a1308 5660 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 5661 ap->pflags |= ATA_PFLAG_UNLOADING;
ba6a1308 5662 spin_unlock_irqrestore(ap->lock, flags);
720ba126
TH		 5663
5664 ata_port_wait_eh(ap);
5665
5666 /* EH is now guaranteed to see UNLOADING, so no new device
5667 * will be attached. Disable all existing devices.
5668 */
ba6a1308 5669 spin_lock_irqsave(ap->lock, flags);
720ba126
TH		 5670
5671 for (i = 0; i < ATA_MAX_DEVICES; i++)
5672 ata_dev_disable(&ap->device[i]);
5673
ba6a1308 5674 spin_unlock_irqrestore(ap->lock, flags);
720ba126
TH		 5675
5676 /* Final freeze & EH. All in-flight commands are aborted. EH
5677 * will be skipped and retrials will be terminated with bad
5678 * target.
5679 */
ba6a1308 5680 spin_lock_irqsave(ap->lock, flags);
720ba126 5681 ata_port_freeze(ap); /* won't be thawed */
ba6a1308 5682 spin_unlock_irqrestore(ap->lock, flags);
720ba126
TH		 5683
5684 ata_port_wait_eh(ap);
5685
5686 /* Flush hotplug task. The sequence is similar to
5687 * ata_port_flush_task().
5688 */
5689 flush_workqueue(ata_aux_wq);
5690 cancel_delayed_work(&ap->hotplug_task);
5691 flush_workqueue(ata_aux_wq);
5692
c3cf30a9 5693 skip_eh:
720ba126 5694 /* remove the associated SCSI host */
cca3974e 5695 scsi_remove_host(ap->scsi_host);
720ba126
TH		 5696}
5697
17b14451 5698/**
cca3974e
JG		 5699 * ata_host_remove - PCI layer callback for device removal
5700 * @host: ATA host set that was removed
17b14451 5701 *
2e9edbf8 5702 * Unregister all objects associated with this host set. Free those
17b14451
AC		 5703 * objects.
5704 *
5705 * LOCKING:
5706 * Inherited from calling layer (may sleep).
5707 */
5708
cca3974e 5709void ata_host_remove(struct ata_host *host)
17b14451 5710{
17b14451
AC		 5711 unsigned int i;
5712
cca3974e
JG		 5713 for (i = 0; i < host->n_ports; i++)
5714 ata_port_detach(host->ports[i]);
17b14451 5715
cca3974e
JG		 5716 free_irq(host->irq, host);
5717 if (host->irq2)
5718 free_irq(host->irq2, host);
17b14451 5719
cca3974e
JG		 5720 for (i = 0; i < host->n_ports; i++) {
5721 struct ata_port *ap = host->ports[i];
17b14451 5722
cca3974e 5723 ata_scsi_release(ap->scsi_host);
17b14451
AC		 5724
5725 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5726 struct ata_ioports *ioaddr = &ap->ioaddr;
5727
2ec7df04
AC		 5728 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5729 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5730 release_region(ATA_PRIMARY_CMD, 8);
5731 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5732 release_region(ATA_SECONDARY_CMD, 8);
17b14451
AC		 5733 }
5734
cca3974e 5735 scsi_host_put(ap->scsi_host);
17b14451
AC		 5736 }
5737
cca3974e
JG		 5738 if (host->ops->host_stop)
5739 host->ops->host_stop(host);
17b14451 5740
cca3974e 5741 kfree(host);
17b14451
AC		 5742}
5743
1da177e4
LT		 5744/**
5745 * ata_scsi_release - SCSI layer callback hook for host unload
4f931374 5746 * @shost: libata host to be unloaded
1da177e4
LT		 5747 *
5748 * Performs all duties necessary to shut down a libata port...
5749 * Kill port kthread, disable port, and release resources.
5750 *
5751 * LOCKING:
5752 * Inherited from SCSI layer.
5753 *
5754 * RETURNS:
5755 * One.
5756 */
5757
cca3974e 5758int ata_scsi_release(struct Scsi_Host *shost)
1da177e4 5759{
cca3974e 5760 struct ata_port *ap = ata_shost_to_port(shost);
1da177e4
LT		 5761
5762 DPRINTK("ENTER\n");
5763
5764 ap->ops->port_disable(ap);
6543bc07 5765 ap->ops->port_stop(ap);
1da177e4
LT		 5766
5767 DPRINTK("EXIT\n");
5768 return 1;
5769}
5770
f6d950e2
BK		 5771struct ata_probe_ent *
5772ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5773{
5774 struct ata_probe_ent *probe_ent;
5775
5776 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5777 if (!probe_ent) {
5778 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5779 kobject_name(&(dev->kobj)));
5780 return NULL;
5781 }
5782
5783 INIT_LIST_HEAD(&probe_ent->node);
5784 probe_ent->dev = dev;
5785
5786 probe_ent->sht = port->sht;
cca3974e 5787 probe_ent->port_flags = port->flags;
f6d950e2
BK		 5788 probe_ent->pio_mask = port->pio_mask;
5789 probe_ent->mwdma_mask = port->mwdma_mask;
5790 probe_ent->udma_mask = port->udma_mask;
5791 probe_ent->port_ops = port->port_ops;
d639ca94 5792 probe_ent->private_data = port->private_data;
f6d950e2
BK		 5793
5794 return probe_ent;
5795}
5796
1da177e4
LT		 5797/**
5798 * ata_std_ports - initialize ioaddr with standard port offsets.
5799 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 5800 *
5801 * Utility function which initializes data_addr, error_addr,
5802 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5803 * device_addr, status_addr, and command_addr to standard offsets
5804 * relative to cmd_addr.
5805 *
5806 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5807 */
0baab86b 5808
1da177e4
LT		 5809void ata_std_ports(struct ata_ioports *ioaddr)
5810{
5811 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5812 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5813 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5814 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5815 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5816 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5817 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5818 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5819 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5820 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5821}
5822
0baab86b 5823
374b1873
JG		 5824#ifdef CONFIG_PCI
5825
cca3974e 5826void ata_pci_host_stop (struct ata_host *host)
374b1873 5827{
cca3974e 5828 struct pci_dev *pdev = to_pci_dev(host->dev);
374b1873 5829
cca3974e 5830 pci_iounmap(pdev, host->mmio_base);
374b1873
JG		 5831}
5832
1da177e4
LT		 5833/**
5834 * ata_pci_remove_one - PCI layer callback for device removal
5835 * @pdev: PCI device that was removed
5836 *
5837 * PCI layer indicates to libata via this hook that
6f0ef4fa 5838 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5839 * Handle this by unregistering all objects associated
5840 * with this PCI device. Free those objects. Then finally
5841 * release PCI resources and disable device.
5842 *
5843 * LOCKING:
5844 * Inherited from PCI layer (may sleep).
5845 */
5846
5847void ata_pci_remove_one (struct pci_dev *pdev)
5848{
5849 struct device *dev = pci_dev_to_dev(pdev);
cca3974e 5850 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 5851
cca3974e 5852 ata_host_remove(host);
f0eb62b8 5853
1da177e4
LT		 5854 pci_release_regions(pdev);
5855 pci_disable_device(pdev);
5856 dev_set_drvdata(dev, NULL);
5857}
5858
5859/* move to PCI subsystem */
057ace5e 5860int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5861{
5862 unsigned long tmp = 0;
5863
5864 switch (bits->width) {
5865 case 1: {
5866 u8 tmp8 = 0;
5867 pci_read_config_byte(pdev, bits->reg, &tmp8);
5868 tmp = tmp8;
5869 break;
5870 }
5871 case 2: {
5872 u16 tmp16 = 0;
5873 pci_read_config_word(pdev, bits->reg, &tmp16);
5874 tmp = tmp16;
5875 break;
5876 }
5877 case 4: {
5878 u32 tmp32 = 0;
5879 pci_read_config_dword(pdev, bits->reg, &tmp32);
5880 tmp = tmp32;
5881 break;
5882 }
5883
5884 default:
5885 return -EINVAL;
5886 }
5887
5888 tmp &= bits->mask;
5889
5890 return (tmp == bits->val) ? 1 : 0;
5891}
9b847548 5892
3c5100c1 5893void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA		 5894{
5895 pci_save_state(pdev);
500530f6 5896
3c5100c1 5897 if (mesg.event == PM_EVENT_SUSPEND) {
500530f6
TH		 5898 pci_disable_device(pdev);
5899 pci_set_power_state(pdev, PCI_D3hot);
5900 }
9b847548
JA		 5901}
5902
500530f6 5903void ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548
JA		 5904{
5905 pci_set_power_state(pdev, PCI_D0);
5906 pci_restore_state(pdev);
5907 pci_enable_device(pdev);
5908 pci_set_master(pdev);
500530f6
TH		 5909}
5910
3c5100c1 5911int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 5912{
cca3974e 5913 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH		 5914 int rc = 0;
5915
cca3974e 5916 rc = ata_host_suspend(host, mesg);
500530f6
TH		 5917 if (rc)
5918 return rc;
5919
3c5100c1 5920 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH		 5921
5922 return 0;
5923}
5924
5925int ata_pci_device_resume(struct pci_dev *pdev)
5926{
cca3974e 5927 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH		 5928
5929 ata_pci_device_do_resume(pdev);
cca3974e 5930 ata_host_resume(host);
9b847548
JA		 5931 return 0;
5932}
1da177e4
LT		 5933#endif /* CONFIG_PCI */
5934
5935
1da177e4
LT		 5936static int __init ata_init(void)
5937{
a8601e5f 5938 ata_probe_timeout *= HZ;
1da177e4
LT		 5939 ata_wq = create_workqueue("ata");
5940 if (!ata_wq)
5941 return -ENOMEM;
5942
453b07ac
TH		 5943 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5944 if (!ata_aux_wq) {
5945 destroy_workqueue(ata_wq);
5946 return -ENOMEM;
5947 }
5948
1da177e4
LT		 5949 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5950 return 0;
5951}
5952
5953static void __exit ata_exit(void)
5954{
5955 destroy_workqueue(ata_wq);
453b07ac 5956 destroy_workqueue(ata_aux_wq);
1da177e4
LT		 5957}
5958
a4625085 5959subsys_initcall(ata_init);
1da177e4
LT		 5960module_exit(ata_exit);
5961
67846b30 5962static unsigned long ratelimit_time;
34af946a 5963static DEFINE_SPINLOCK(ata_ratelimit_lock);
67846b30
JG		 5964
5965int ata_ratelimit(void)
5966{
5967 int rc;
5968 unsigned long flags;
5969
5970 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5971
5972 if (time_after(jiffies, ratelimit_time)) {
5973 rc = 1;
5974 ratelimit_time = jiffies + (HZ/5);
5975 } else
5976 rc = 0;
5977
5978 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5979
5980 return rc;
5981}
5982
c22daff4
TH		 5983/**
5984 * ata_wait_register - wait until register value changes
5985 * @reg: IO-mapped register
5986 * @mask: Mask to apply to read register value
5987 * @val: Wait condition
5988 * @interval_msec: polling interval in milliseconds
5989 * @timeout_msec: timeout in milliseconds
5990 *
5991 * Waiting for some bits of register to change is a common
5992 * operation for ATA controllers. This function reads 32bit LE
5993 * IO-mapped register @reg and tests for the following condition.
5994 *
5995 * (*@reg & mask) != val
5996 *
5997 * If the condition is met, it returns; otherwise, the process is
5998 * repeated after @interval_msec until timeout.
5999 *
6000 * LOCKING:
6001 * Kernel thread context (may sleep)
6002 *
6003 * RETURNS:
6004 * The final register value.
6005 */
6006u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6007 unsigned long interval_msec,
6008 unsigned long timeout_msec)
6009{
6010 unsigned long timeout;
6011 u32 tmp;
6012
6013 tmp = ioread32(reg);
6014
6015 /* Calculate timeout _after_ the first read to make sure
6016 * preceding writes reach the controller before starting to
6017 * eat away the timeout.
6018 */
6019 timeout = jiffies + (timeout_msec * HZ) / 1000;
6020
6021 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6022 msleep(interval_msec);
6023 tmp = ioread32(reg);
6024 }
6025
6026 return tmp;
6027}
6028
dd5b06c4
TH		 6029/*
6030 * Dummy port_ops
6031 */
6032static void ata_dummy_noret(struct ata_port *ap) { }
6033static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6034static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6035
6036static u8 ata_dummy_check_status(struct ata_port *ap)
6037{
6038 return ATA_DRDY;
6039}
6040
6041static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6042{
6043 return AC_ERR_SYSTEM;
6044}
6045
6046const struct ata_port_operations ata_dummy_port_ops = {
6047 .port_disable = ata_port_disable,
6048 .check_status = ata_dummy_check_status,
6049 .check_altstatus = ata_dummy_check_status,
6050 .dev_select = ata_noop_dev_select,
6051 .qc_prep = ata_noop_qc_prep,
6052 .qc_issue = ata_dummy_qc_issue,
6053 .freeze = ata_dummy_noret,
6054 .thaw = ata_dummy_noret,
6055 .error_handler = ata_dummy_noret,
6056 .post_internal_cmd = ata_dummy_qc_noret,
6057 .irq_clear = ata_dummy_noret,
6058 .port_start = ata_dummy_ret0,
6059 .port_stop = ata_dummy_noret,
6060};
6061
1da177e4
LT		 6062/*
6063 * libata is essentially a library of internal helper functions for
6064 * low-level ATA host controller drivers. As such, the API/ABI is
6065 * likely to change as new drivers are added and updated.
6066 * Do not depend on ABI/API stability.
6067 */
6068
e9c83914
TH		 6069EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6070EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6071EXPORT_SYMBOL_GPL(sata_deb_timing_long);
dd5b06c4 6072EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
1da177e4
LT		 6073EXPORT_SYMBOL_GPL(ata_std_bios_param);
6074EXPORT_SYMBOL_GPL(ata_std_ports);
cca3974e 6075EXPORT_SYMBOL_GPL(ata_host_init);
1da177e4 6076EXPORT_SYMBOL_GPL(ata_device_add);
720ba126 6077EXPORT_SYMBOL_GPL(ata_port_detach);
cca3974e 6078EXPORT_SYMBOL_GPL(ata_host_remove);
1da177e4
LT		 6079EXPORT_SYMBOL_GPL(ata_sg_init);
6080EXPORT_SYMBOL_GPL(ata_sg_init_one);
9a1004d0 6081EXPORT_SYMBOL_GPL(ata_hsm_move);
f686bcb8 6082EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6083EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
1da177e4 6084EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 6085EXPORT_SYMBOL_GPL(ata_tf_load);
6086EXPORT_SYMBOL_GPL(ata_tf_read);
6087EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6088EXPORT_SYMBOL_GPL(ata_std_dev_select);
6089EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6090EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6091EXPORT_SYMBOL_GPL(ata_check_status);
6092EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 6093EXPORT_SYMBOL_GPL(ata_exec_command);
6094EXPORT_SYMBOL_GPL(ata_port_start);
6095EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 6096EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4 6097EXPORT_SYMBOL_GPL(ata_interrupt);
a6b2c5d4
AC		 6098EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6099EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
75e99585 6100EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
1da177e4 6101EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 6102EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 6103EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6104EXPORT_SYMBOL_GPL(ata_bmdma_start);
6105EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6106EXPORT_SYMBOL_GPL(ata_bmdma_status);
6107EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6d97dbd7
TH		 6108EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6109EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6110EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6111EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6112EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
1da177e4 6113EXPORT_SYMBOL_GPL(ata_port_probe);
3c567b7d 6114EXPORT_SYMBOL_GPL(sata_set_spd);
d7bb4cc7
TH		 6115EXPORT_SYMBOL_GPL(sata_phy_debounce);
6116EXPORT_SYMBOL_GPL(sata_phy_resume);
1da177e4
LT		 6117EXPORT_SYMBOL_GPL(sata_phy_reset);
6118EXPORT_SYMBOL_GPL(__sata_phy_reset);
6119EXPORT_SYMBOL_GPL(ata_bus_reset);
f5914a46 6120EXPORT_SYMBOL_GPL(ata_std_prereset);
c2bd5804
TH		 6121EXPORT_SYMBOL_GPL(ata_std_softreset);
6122EXPORT_SYMBOL_GPL(sata_std_hardreset);
6123EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG		 6124EXPORT_SYMBOL_GPL(ata_dev_classify);
6125EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 6126EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 6127EXPORT_SYMBOL_GPL(ata_ratelimit);
c22daff4 6128EXPORT_SYMBOL_GPL(ata_wait_register);
6f8b9958 6129EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 6130EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 6131EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6132EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6133EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6134EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6135EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
1da177e4
LT		 6136EXPORT_SYMBOL_GPL(ata_scsi_release);
6137EXPORT_SYMBOL_GPL(ata_host_intr);
34bf2170
TH		 6138EXPORT_SYMBOL_GPL(sata_scr_valid);
6139EXPORT_SYMBOL_GPL(sata_scr_read);
6140EXPORT_SYMBOL_GPL(sata_scr_write);
6141EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6142EXPORT_SYMBOL_GPL(ata_port_online);
6143EXPORT_SYMBOL_GPL(ata_port_offline);
cca3974e
JG		 6144EXPORT_SYMBOL_GPL(ata_host_suspend);
6145EXPORT_SYMBOL_GPL(ata_host_resume);
6a62a04d
TH		 6146EXPORT_SYMBOL_GPL(ata_id_string);
6147EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 6148EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6149
1bc4ccff 6150EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 6151EXPORT_SYMBOL_GPL(ata_timing_compute);
6152EXPORT_SYMBOL_GPL(ata_timing_merge);
6153
1da177e4
LT		 6154#ifdef CONFIG_PCI
6155EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 6156EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 6157EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6158EXPORT_SYMBOL_GPL(ata_pci_init_one);
6159EXPORT_SYMBOL_GPL(ata_pci_remove_one);
500530f6
TH		 6160EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6161EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA		 6162EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6163EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 6164EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6165EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 6166#endif /* CONFIG_PCI */
9b847548 6167
9b847548
JA		 6168EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6169EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636 6170
ece1d636 6171EXPORT_SYMBOL_GPL(ata_eng_timeout);
7b70fc03
TH		 6172EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6173EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499
TH		 6174EXPORT_SYMBOL_GPL(ata_port_freeze);
6175EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6176EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH		 6177EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6178EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
022bdb07 6179EXPORT_SYMBOL_GPL(ata_do_eh);
Linux 6.x block layer and io_uring tree(s)