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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
1da177e4 | 52 | #include <scsi/scsi.h> |
193515d5 | 53 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
54 | #include <scsi/scsi_host.h> |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
d7bb4cc7 | 62 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
63 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
64 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
65 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 66 | |
3373efd8 TH |
67 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
68 | u16 heads, u16 sectors); | |
69 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
70 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
71 | |
72 | static unsigned int ata_unique_id = 1; | |
73 | static struct workqueue_struct *ata_wq; | |
74 | ||
453b07ac TH |
75 | struct workqueue_struct *ata_aux_wq; |
76 | ||
418dc1f5 | 77 | int atapi_enabled = 1; |
1623c81e JG |
78 | module_param(atapi_enabled, int, 0444); |
79 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
80 | ||
95de719a AL |
81 | int atapi_dmadir = 0; |
82 | module_param(atapi_dmadir, int, 0444); | |
83 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
84 | ||
c3c013a2 JG |
85 | int libata_fua = 0; |
86 | module_param_named(fua, libata_fua, int, 0444); | |
87 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
88 | ||
a8601e5f AM |
89 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
90 | module_param(ata_probe_timeout, int, 0444); | |
91 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
92 | ||
1da177e4 LT |
93 | MODULE_AUTHOR("Jeff Garzik"); |
94 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
95 | MODULE_LICENSE("GPL"); | |
96 | MODULE_VERSION(DRV_VERSION); | |
97 | ||
0baab86b | 98 | |
1da177e4 LT |
99 | /** |
100 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
101 | * @tf: Taskfile to convert | |
102 | * @fis: Buffer into which data will output | |
103 | * @pmp: Port multiplier port | |
104 | * | |
105 | * Converts a standard ATA taskfile to a Serial ATA | |
106 | * FIS structure (Register - Host to Device). | |
107 | * | |
108 | * LOCKING: | |
109 | * Inherited from caller. | |
110 | */ | |
111 | ||
057ace5e | 112 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
113 | { |
114 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
115 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
116 | bit 7 indicates Command FIS */ | |
117 | fis[2] = tf->command; | |
118 | fis[3] = tf->feature; | |
119 | ||
120 | fis[4] = tf->lbal; | |
121 | fis[5] = tf->lbam; | |
122 | fis[6] = tf->lbah; | |
123 | fis[7] = tf->device; | |
124 | ||
125 | fis[8] = tf->hob_lbal; | |
126 | fis[9] = tf->hob_lbam; | |
127 | fis[10] = tf->hob_lbah; | |
128 | fis[11] = tf->hob_feature; | |
129 | ||
130 | fis[12] = tf->nsect; | |
131 | fis[13] = tf->hob_nsect; | |
132 | fis[14] = 0; | |
133 | fis[15] = tf->ctl; | |
134 | ||
135 | fis[16] = 0; | |
136 | fis[17] = 0; | |
137 | fis[18] = 0; | |
138 | fis[19] = 0; | |
139 | } | |
140 | ||
141 | /** | |
142 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
143 | * @fis: Buffer from which data will be input | |
144 | * @tf: Taskfile to output | |
145 | * | |
e12a1be6 | 146 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
147 | * |
148 | * LOCKING: | |
149 | * Inherited from caller. | |
150 | */ | |
151 | ||
057ace5e | 152 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
153 | { |
154 | tf->command = fis[2]; /* status */ | |
155 | tf->feature = fis[3]; /* error */ | |
156 | ||
157 | tf->lbal = fis[4]; | |
158 | tf->lbam = fis[5]; | |
159 | tf->lbah = fis[6]; | |
160 | tf->device = fis[7]; | |
161 | ||
162 | tf->hob_lbal = fis[8]; | |
163 | tf->hob_lbam = fis[9]; | |
164 | tf->hob_lbah = fis[10]; | |
165 | ||
166 | tf->nsect = fis[12]; | |
167 | tf->hob_nsect = fis[13]; | |
168 | } | |
169 | ||
8cbd6df1 AL |
170 | static const u8 ata_rw_cmds[] = { |
171 | /* pio multi */ | |
172 | ATA_CMD_READ_MULTI, | |
173 | ATA_CMD_WRITE_MULTI, | |
174 | ATA_CMD_READ_MULTI_EXT, | |
175 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
176 | 0, |
177 | 0, | |
178 | 0, | |
179 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
180 | /* pio */ |
181 | ATA_CMD_PIO_READ, | |
182 | ATA_CMD_PIO_WRITE, | |
183 | ATA_CMD_PIO_READ_EXT, | |
184 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
185 | 0, |
186 | 0, | |
187 | 0, | |
188 | 0, | |
8cbd6df1 AL |
189 | /* dma */ |
190 | ATA_CMD_READ, | |
191 | ATA_CMD_WRITE, | |
192 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
193 | ATA_CMD_WRITE_EXT, |
194 | 0, | |
195 | 0, | |
196 | 0, | |
197 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 198 | }; |
1da177e4 LT |
199 | |
200 | /** | |
8cbd6df1 AL |
201 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
202 | * @qc: command to examine and configure | |
1da177e4 | 203 | * |
2e9edbf8 | 204 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 205 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
206 | * |
207 | * LOCKING: | |
208 | * caller. | |
209 | */ | |
9a3dccc4 | 210 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 211 | { |
8cbd6df1 AL |
212 | struct ata_taskfile *tf = &qc->tf; |
213 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 214 | u8 cmd; |
1da177e4 | 215 | |
9a3dccc4 | 216 | int index, fua, lba48, write; |
2e9edbf8 | 217 | |
9a3dccc4 | 218 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
219 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
220 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 221 | |
8cbd6df1 AL |
222 | if (dev->flags & ATA_DFLAG_PIO) { |
223 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 224 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
225 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
226 | /* Unable to use DMA due to host limitation */ | |
227 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 228 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
229 | } else { |
230 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 231 | index = 16; |
8cbd6df1 | 232 | } |
1da177e4 | 233 | |
9a3dccc4 TH |
234 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
235 | if (cmd) { | |
236 | tf->command = cmd; | |
237 | return 0; | |
238 | } | |
239 | return -1; | |
1da177e4 LT |
240 | } |
241 | ||
cb95d562 TH |
242 | /** |
243 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
244 | * @pio_mask: pio_mask | |
245 | * @mwdma_mask: mwdma_mask | |
246 | * @udma_mask: udma_mask | |
247 | * | |
248 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
249 | * unsigned int xfer_mask. | |
250 | * | |
251 | * LOCKING: | |
252 | * None. | |
253 | * | |
254 | * RETURNS: | |
255 | * Packed xfer_mask. | |
256 | */ | |
257 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
258 | unsigned int mwdma_mask, | |
259 | unsigned int udma_mask) | |
260 | { | |
261 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
262 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
263 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
264 | } | |
265 | ||
c0489e4e TH |
266 | /** |
267 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
268 | * @xfer_mask: xfer_mask to unpack | |
269 | * @pio_mask: resulting pio_mask | |
270 | * @mwdma_mask: resulting mwdma_mask | |
271 | * @udma_mask: resulting udma_mask | |
272 | * | |
273 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
274 | * Any NULL distination masks will be ignored. | |
275 | */ | |
276 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
277 | unsigned int *pio_mask, | |
278 | unsigned int *mwdma_mask, | |
279 | unsigned int *udma_mask) | |
280 | { | |
281 | if (pio_mask) | |
282 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
283 | if (mwdma_mask) | |
284 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
285 | if (udma_mask) | |
286 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
287 | } | |
288 | ||
cb95d562 | 289 | static const struct ata_xfer_ent { |
be9a50c8 | 290 | int shift, bits; |
cb95d562 TH |
291 | u8 base; |
292 | } ata_xfer_tbl[] = { | |
293 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
294 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
295 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
296 | { -1, }, | |
297 | }; | |
298 | ||
299 | /** | |
300 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
301 | * @xfer_mask: xfer_mask of interest | |
302 | * | |
303 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
304 | * bit of @xfer_mask is considered. | |
305 | * | |
306 | * LOCKING: | |
307 | * None. | |
308 | * | |
309 | * RETURNS: | |
310 | * Matching XFER_* value, 0 if no match found. | |
311 | */ | |
312 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
313 | { | |
314 | int highbit = fls(xfer_mask) - 1; | |
315 | const struct ata_xfer_ent *ent; | |
316 | ||
317 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
318 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
319 | return ent->base + highbit - ent->shift; | |
320 | return 0; | |
321 | } | |
322 | ||
323 | /** | |
324 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
325 | * @xfer_mode: XFER_* of interest | |
326 | * | |
327 | * Return matching xfer_mask for @xfer_mode. | |
328 | * | |
329 | * LOCKING: | |
330 | * None. | |
331 | * | |
332 | * RETURNS: | |
333 | * Matching xfer_mask, 0 if no match found. | |
334 | */ | |
335 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
336 | { | |
337 | const struct ata_xfer_ent *ent; | |
338 | ||
339 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
340 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
341 | return 1 << (ent->shift + xfer_mode - ent->base); | |
342 | return 0; | |
343 | } | |
344 | ||
345 | /** | |
346 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
347 | * @xfer_mode: XFER_* of interest | |
348 | * | |
349 | * Return matching xfer_shift for @xfer_mode. | |
350 | * | |
351 | * LOCKING: | |
352 | * None. | |
353 | * | |
354 | * RETURNS: | |
355 | * Matching xfer_shift, -1 if no match found. | |
356 | */ | |
357 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
358 | { | |
359 | const struct ata_xfer_ent *ent; | |
360 | ||
361 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
362 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
363 | return ent->shift; | |
364 | return -1; | |
365 | } | |
366 | ||
1da177e4 | 367 | /** |
1da7b0d0 TH |
368 | * ata_mode_string - convert xfer_mask to string |
369 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
370 | * |
371 | * Determine string which represents the highest speed | |
1da7b0d0 | 372 | * (highest bit in @modemask). |
1da177e4 LT |
373 | * |
374 | * LOCKING: | |
375 | * None. | |
376 | * | |
377 | * RETURNS: | |
378 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 379 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 380 | */ |
1da7b0d0 | 381 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 382 | { |
75f554bc TH |
383 | static const char * const xfer_mode_str[] = { |
384 | "PIO0", | |
385 | "PIO1", | |
386 | "PIO2", | |
387 | "PIO3", | |
388 | "PIO4", | |
b352e57d AC |
389 | "PIO5", |
390 | "PIO6", | |
75f554bc TH |
391 | "MWDMA0", |
392 | "MWDMA1", | |
393 | "MWDMA2", | |
b352e57d AC |
394 | "MWDMA3", |
395 | "MWDMA4", | |
75f554bc TH |
396 | "UDMA/16", |
397 | "UDMA/25", | |
398 | "UDMA/33", | |
399 | "UDMA/44", | |
400 | "UDMA/66", | |
401 | "UDMA/100", | |
402 | "UDMA/133", | |
403 | "UDMA7", | |
404 | }; | |
1da7b0d0 | 405 | int highbit; |
1da177e4 | 406 | |
1da7b0d0 TH |
407 | highbit = fls(xfer_mask) - 1; |
408 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
409 | return xfer_mode_str[highbit]; | |
1da177e4 | 410 | return "<n/a>"; |
1da177e4 LT |
411 | } |
412 | ||
4c360c81 TH |
413 | static const char *sata_spd_string(unsigned int spd) |
414 | { | |
415 | static const char * const spd_str[] = { | |
416 | "1.5 Gbps", | |
417 | "3.0 Gbps", | |
418 | }; | |
419 | ||
420 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
421 | return "<unknown>"; | |
422 | return spd_str[spd - 1]; | |
423 | } | |
424 | ||
3373efd8 | 425 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 426 | { |
0dd4b21f | 427 | if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { |
f15a1daf | 428 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
429 | dev->class++; |
430 | } | |
431 | } | |
432 | ||
1da177e4 LT |
433 | /** |
434 | * ata_pio_devchk - PATA device presence detection | |
435 | * @ap: ATA channel to examine | |
436 | * @device: Device to examine (starting at zero) | |
437 | * | |
438 | * This technique was originally described in | |
439 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
440 | * later found its way into the ATA/ATAPI spec. | |
441 | * | |
442 | * Write a pattern to the ATA shadow registers, | |
443 | * and if a device is present, it will respond by | |
444 | * correctly storing and echoing back the | |
445 | * ATA shadow register contents. | |
446 | * | |
447 | * LOCKING: | |
448 | * caller. | |
449 | */ | |
450 | ||
451 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
452 | unsigned int device) | |
453 | { | |
454 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
455 | u8 nsect, lbal; | |
456 | ||
457 | ap->ops->dev_select(ap, device); | |
458 | ||
459 | outb(0x55, ioaddr->nsect_addr); | |
460 | outb(0xaa, ioaddr->lbal_addr); | |
461 | ||
462 | outb(0xaa, ioaddr->nsect_addr); | |
463 | outb(0x55, ioaddr->lbal_addr); | |
464 | ||
465 | outb(0x55, ioaddr->nsect_addr); | |
466 | outb(0xaa, ioaddr->lbal_addr); | |
467 | ||
468 | nsect = inb(ioaddr->nsect_addr); | |
469 | lbal = inb(ioaddr->lbal_addr); | |
470 | ||
471 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
472 | return 1; /* we found a device */ | |
473 | ||
474 | return 0; /* nothing found */ | |
475 | } | |
476 | ||
477 | /** | |
478 | * ata_mmio_devchk - PATA device presence detection | |
479 | * @ap: ATA channel to examine | |
480 | * @device: Device to examine (starting at zero) | |
481 | * | |
482 | * This technique was originally described in | |
483 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
484 | * later found its way into the ATA/ATAPI spec. | |
485 | * | |
486 | * Write a pattern to the ATA shadow registers, | |
487 | * and if a device is present, it will respond by | |
488 | * correctly storing and echoing back the | |
489 | * ATA shadow register contents. | |
490 | * | |
491 | * LOCKING: | |
492 | * caller. | |
493 | */ | |
494 | ||
495 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
496 | unsigned int device) | |
497 | { | |
498 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
499 | u8 nsect, lbal; | |
500 | ||
501 | ap->ops->dev_select(ap, device); | |
502 | ||
503 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
504 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
505 | ||
506 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
507 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
508 | ||
509 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
510 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
511 | ||
512 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
513 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
514 | ||
515 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
516 | return 1; /* we found a device */ | |
517 | ||
518 | return 0; /* nothing found */ | |
519 | } | |
520 | ||
521 | /** | |
522 | * ata_devchk - PATA device presence detection | |
523 | * @ap: ATA channel to examine | |
524 | * @device: Device to examine (starting at zero) | |
525 | * | |
526 | * Dispatch ATA device presence detection, depending | |
527 | * on whether we are using PIO or MMIO to talk to the | |
528 | * ATA shadow registers. | |
529 | * | |
530 | * LOCKING: | |
531 | * caller. | |
532 | */ | |
533 | ||
534 | static unsigned int ata_devchk(struct ata_port *ap, | |
535 | unsigned int device) | |
536 | { | |
537 | if (ap->flags & ATA_FLAG_MMIO) | |
538 | return ata_mmio_devchk(ap, device); | |
539 | return ata_pio_devchk(ap, device); | |
540 | } | |
541 | ||
542 | /** | |
543 | * ata_dev_classify - determine device type based on ATA-spec signature | |
544 | * @tf: ATA taskfile register set for device to be identified | |
545 | * | |
546 | * Determine from taskfile register contents whether a device is | |
547 | * ATA or ATAPI, as per "Signature and persistence" section | |
548 | * of ATA/PI spec (volume 1, sect 5.14). | |
549 | * | |
550 | * LOCKING: | |
551 | * None. | |
552 | * | |
553 | * RETURNS: | |
554 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
555 | * the event of failure. | |
556 | */ | |
557 | ||
057ace5e | 558 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
559 | { |
560 | /* Apple's open source Darwin code hints that some devices only | |
561 | * put a proper signature into the LBA mid/high registers, | |
562 | * So, we only check those. It's sufficient for uniqueness. | |
563 | */ | |
564 | ||
565 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
566 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
567 | DPRINTK("found ATA device by sig\n"); | |
568 | return ATA_DEV_ATA; | |
569 | } | |
570 | ||
571 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
572 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
573 | DPRINTK("found ATAPI device by sig\n"); | |
574 | return ATA_DEV_ATAPI; | |
575 | } | |
576 | ||
577 | DPRINTK("unknown device\n"); | |
578 | return ATA_DEV_UNKNOWN; | |
579 | } | |
580 | ||
581 | /** | |
582 | * ata_dev_try_classify - Parse returned ATA device signature | |
583 | * @ap: ATA channel to examine | |
584 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 585 | * @r_err: Value of error register on completion |
1da177e4 LT |
586 | * |
587 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
588 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
589 | * shadow registers, indicating the results of device detection | |
590 | * and diagnostics. | |
591 | * | |
592 | * Select the ATA device, and read the values from the ATA shadow | |
593 | * registers. Then parse according to the Error register value, | |
594 | * and the spec-defined values examined by ata_dev_classify(). | |
595 | * | |
596 | * LOCKING: | |
597 | * caller. | |
b4dc7623 TH |
598 | * |
599 | * RETURNS: | |
600 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
601 | */ |
602 | ||
b4dc7623 TH |
603 | static unsigned int |
604 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 605 | { |
1da177e4 LT |
606 | struct ata_taskfile tf; |
607 | unsigned int class; | |
608 | u8 err; | |
609 | ||
610 | ap->ops->dev_select(ap, device); | |
611 | ||
612 | memset(&tf, 0, sizeof(tf)); | |
613 | ||
1da177e4 | 614 | ap->ops->tf_read(ap, &tf); |
0169e284 | 615 | err = tf.feature; |
b4dc7623 TH |
616 | if (r_err) |
617 | *r_err = err; | |
1da177e4 | 618 | |
93590859 AC |
619 | /* see if device passed diags: if master then continue and warn later */ |
620 | if (err == 0 && device == 0) | |
621 | /* diagnostic fail : do nothing _YET_ */ | |
622 | ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; | |
623 | else if (err == 1) | |
1da177e4 LT |
624 | /* do nothing */ ; |
625 | else if ((device == 0) && (err == 0x81)) | |
626 | /* do nothing */ ; | |
627 | else | |
b4dc7623 | 628 | return ATA_DEV_NONE; |
1da177e4 | 629 | |
b4dc7623 | 630 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 631 | class = ata_dev_classify(&tf); |
b4dc7623 | 632 | |
1da177e4 | 633 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 634 | return ATA_DEV_NONE; |
1da177e4 | 635 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
636 | return ATA_DEV_NONE; |
637 | return class; | |
1da177e4 LT |
638 | } |
639 | ||
640 | /** | |
6a62a04d | 641 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
642 | * @id: IDENTIFY DEVICE results we will examine |
643 | * @s: string into which data is output | |
644 | * @ofs: offset into identify device page | |
645 | * @len: length of string to return. must be an even number. | |
646 | * | |
647 | * The strings in the IDENTIFY DEVICE page are broken up into | |
648 | * 16-bit chunks. Run through the string, and output each | |
649 | * 8-bit chunk linearly, regardless of platform. | |
650 | * | |
651 | * LOCKING: | |
652 | * caller. | |
653 | */ | |
654 | ||
6a62a04d TH |
655 | void ata_id_string(const u16 *id, unsigned char *s, |
656 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
657 | { |
658 | unsigned int c; | |
659 | ||
660 | while (len > 0) { | |
661 | c = id[ofs] >> 8; | |
662 | *s = c; | |
663 | s++; | |
664 | ||
665 | c = id[ofs] & 0xff; | |
666 | *s = c; | |
667 | s++; | |
668 | ||
669 | ofs++; | |
670 | len -= 2; | |
671 | } | |
672 | } | |
673 | ||
0e949ff3 | 674 | /** |
6a62a04d | 675 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
676 | * @id: IDENTIFY DEVICE results we will examine |
677 | * @s: string into which data is output | |
678 | * @ofs: offset into identify device page | |
679 | * @len: length of string to return. must be an odd number. | |
680 | * | |
6a62a04d | 681 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
682 | * trims trailing spaces and terminates the resulting string with |
683 | * null. @len must be actual maximum length (even number) + 1. | |
684 | * | |
685 | * LOCKING: | |
686 | * caller. | |
687 | */ | |
6a62a04d TH |
688 | void ata_id_c_string(const u16 *id, unsigned char *s, |
689 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
690 | { |
691 | unsigned char *p; | |
692 | ||
693 | WARN_ON(!(len & 1)); | |
694 | ||
6a62a04d | 695 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
696 | |
697 | p = s + strnlen(s, len - 1); | |
698 | while (p > s && p[-1] == ' ') | |
699 | p--; | |
700 | *p = '\0'; | |
701 | } | |
0baab86b | 702 | |
2940740b TH |
703 | static u64 ata_id_n_sectors(const u16 *id) |
704 | { | |
705 | if (ata_id_has_lba(id)) { | |
706 | if (ata_id_has_lba48(id)) | |
707 | return ata_id_u64(id, 100); | |
708 | else | |
709 | return ata_id_u32(id, 60); | |
710 | } else { | |
711 | if (ata_id_current_chs_valid(id)) | |
712 | return ata_id_u32(id, 57); | |
713 | else | |
714 | return id[1] * id[3] * id[6]; | |
715 | } | |
716 | } | |
717 | ||
0baab86b EF |
718 | /** |
719 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
720 | * @ap: ATA channel to manipulate | |
721 | * @device: ATA device (numbered from zero) to select | |
722 | * | |
723 | * This function performs no actual function. | |
724 | * | |
725 | * May be used as the dev_select() entry in ata_port_operations. | |
726 | * | |
727 | * LOCKING: | |
728 | * caller. | |
729 | */ | |
1da177e4 LT |
730 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
731 | { | |
732 | } | |
733 | ||
0baab86b | 734 | |
1da177e4 LT |
735 | /** |
736 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
737 | * @ap: ATA channel to manipulate | |
738 | * @device: ATA device (numbered from zero) to select | |
739 | * | |
740 | * Use the method defined in the ATA specification to | |
741 | * make either device 0, or device 1, active on the | |
0baab86b EF |
742 | * ATA channel. Works with both PIO and MMIO. |
743 | * | |
744 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
745 | * |
746 | * LOCKING: | |
747 | * caller. | |
748 | */ | |
749 | ||
750 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
751 | { | |
752 | u8 tmp; | |
753 | ||
754 | if (device == 0) | |
755 | tmp = ATA_DEVICE_OBS; | |
756 | else | |
757 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
758 | ||
759 | if (ap->flags & ATA_FLAG_MMIO) { | |
760 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
761 | } else { | |
762 | outb(tmp, ap->ioaddr.device_addr); | |
763 | } | |
764 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
765 | } | |
766 | ||
767 | /** | |
768 | * ata_dev_select - Select device 0/1 on ATA bus | |
769 | * @ap: ATA channel to manipulate | |
770 | * @device: ATA device (numbered from zero) to select | |
771 | * @wait: non-zero to wait for Status register BSY bit to clear | |
772 | * @can_sleep: non-zero if context allows sleeping | |
773 | * | |
774 | * Use the method defined in the ATA specification to | |
775 | * make either device 0, or device 1, active on the | |
776 | * ATA channel. | |
777 | * | |
778 | * This is a high-level version of ata_std_dev_select(), | |
779 | * which additionally provides the services of inserting | |
780 | * the proper pauses and status polling, where needed. | |
781 | * | |
782 | * LOCKING: | |
783 | * caller. | |
784 | */ | |
785 | ||
786 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
787 | unsigned int wait, unsigned int can_sleep) | |
788 | { | |
88574551 | 789 | if (ata_msg_probe(ap)) |
0dd4b21f | 790 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: " |
88574551 | 791 | "device %u, wait %u\n", ap->id, device, wait); |
1da177e4 LT |
792 | |
793 | if (wait) | |
794 | ata_wait_idle(ap); | |
795 | ||
796 | ap->ops->dev_select(ap, device); | |
797 | ||
798 | if (wait) { | |
799 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
800 | msleep(150); | |
801 | ata_wait_idle(ap); | |
802 | } | |
803 | } | |
804 | ||
805 | /** | |
806 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 807 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 808 | * |
0bd3300a TH |
809 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
810 | * page. | |
1da177e4 LT |
811 | * |
812 | * LOCKING: | |
813 | * caller. | |
814 | */ | |
815 | ||
0bd3300a | 816 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
817 | { |
818 | DPRINTK("49==0x%04x " | |
819 | "53==0x%04x " | |
820 | "63==0x%04x " | |
821 | "64==0x%04x " | |
822 | "75==0x%04x \n", | |
0bd3300a TH |
823 | id[49], |
824 | id[53], | |
825 | id[63], | |
826 | id[64], | |
827 | id[75]); | |
1da177e4 LT |
828 | DPRINTK("80==0x%04x " |
829 | "81==0x%04x " | |
830 | "82==0x%04x " | |
831 | "83==0x%04x " | |
832 | "84==0x%04x \n", | |
0bd3300a TH |
833 | id[80], |
834 | id[81], | |
835 | id[82], | |
836 | id[83], | |
837 | id[84]); | |
1da177e4 LT |
838 | DPRINTK("88==0x%04x " |
839 | "93==0x%04x\n", | |
0bd3300a TH |
840 | id[88], |
841 | id[93]); | |
1da177e4 LT |
842 | } |
843 | ||
cb95d562 TH |
844 | /** |
845 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
846 | * @id: IDENTIFY data to compute xfer mask from | |
847 | * | |
848 | * Compute the xfermask for this device. This is not as trivial | |
849 | * as it seems if we must consider early devices correctly. | |
850 | * | |
851 | * FIXME: pre IDE drive timing (do we care ?). | |
852 | * | |
853 | * LOCKING: | |
854 | * None. | |
855 | * | |
856 | * RETURNS: | |
857 | * Computed xfermask | |
858 | */ | |
859 | static unsigned int ata_id_xfermask(const u16 *id) | |
860 | { | |
861 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
862 | ||
863 | /* Usual case. Word 53 indicates word 64 is valid */ | |
864 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
865 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
866 | pio_mask <<= 3; | |
867 | pio_mask |= 0x7; | |
868 | } else { | |
869 | /* If word 64 isn't valid then Word 51 high byte holds | |
870 | * the PIO timing number for the maximum. Turn it into | |
871 | * a mask. | |
872 | */ | |
873 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
874 | ||
875 | /* But wait.. there's more. Design your standards by | |
876 | * committee and you too can get a free iordy field to | |
877 | * process. However its the speeds not the modes that | |
878 | * are supported... Note drivers using the timing API | |
879 | * will get this right anyway | |
880 | */ | |
881 | } | |
882 | ||
883 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 884 | |
b352e57d AC |
885 | if (ata_id_is_cfa(id)) { |
886 | /* | |
887 | * Process compact flash extended modes | |
888 | */ | |
889 | int pio = id[163] & 0x7; | |
890 | int dma = (id[163] >> 3) & 7; | |
891 | ||
892 | if (pio) | |
893 | pio_mask |= (1 << 5); | |
894 | if (pio > 1) | |
895 | pio_mask |= (1 << 6); | |
896 | if (dma) | |
897 | mwdma_mask |= (1 << 3); | |
898 | if (dma > 1) | |
899 | mwdma_mask |= (1 << 4); | |
900 | } | |
901 | ||
fb21f0d0 TH |
902 | udma_mask = 0; |
903 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
904 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
905 | |
906 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
907 | } | |
908 | ||
86e45b6b TH |
909 | /** |
910 | * ata_port_queue_task - Queue port_task | |
911 | * @ap: The ata_port to queue port_task for | |
e2a7f77a RD |
912 | * @fn: workqueue function to be scheduled |
913 | * @data: data value to pass to workqueue function | |
914 | * @delay: delay time for workqueue function | |
86e45b6b TH |
915 | * |
916 | * Schedule @fn(@data) for execution after @delay jiffies using | |
917 | * port_task. There is one port_task per port and it's the | |
918 | * user(low level driver)'s responsibility to make sure that only | |
919 | * one task is active at any given time. | |
920 | * | |
921 | * libata core layer takes care of synchronization between | |
922 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
923 | * synchronization. | |
924 | * | |
925 | * LOCKING: | |
926 | * Inherited from caller. | |
927 | */ | |
928 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
929 | unsigned long delay) | |
930 | { | |
931 | int rc; | |
932 | ||
b51e9e5d | 933 | if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
934 | return; |
935 | ||
936 | PREPARE_WORK(&ap->port_task, fn, data); | |
937 | ||
938 | if (!delay) | |
939 | rc = queue_work(ata_wq, &ap->port_task); | |
940 | else | |
941 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
942 | ||
943 | /* rc == 0 means that another user is using port task */ | |
944 | WARN_ON(rc == 0); | |
945 | } | |
946 | ||
947 | /** | |
948 | * ata_port_flush_task - Flush port_task | |
949 | * @ap: The ata_port to flush port_task for | |
950 | * | |
951 | * After this function completes, port_task is guranteed not to | |
952 | * be running or scheduled. | |
953 | * | |
954 | * LOCKING: | |
955 | * Kernel thread context (may sleep) | |
956 | */ | |
957 | void ata_port_flush_task(struct ata_port *ap) | |
958 | { | |
959 | unsigned long flags; | |
960 | ||
961 | DPRINTK("ENTER\n"); | |
962 | ||
ba6a1308 | 963 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 964 | ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 965 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b TH |
966 | |
967 | DPRINTK("flush #1\n"); | |
968 | flush_workqueue(ata_wq); | |
969 | ||
970 | /* | |
971 | * At this point, if a task is running, it's guaranteed to see | |
972 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
973 | * Cancel and flush. | |
974 | */ | |
975 | if (!cancel_delayed_work(&ap->port_task)) { | |
0dd4b21f | 976 | if (ata_msg_ctl(ap)) |
88574551 TH |
977 | ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", |
978 | __FUNCTION__); | |
86e45b6b TH |
979 | flush_workqueue(ata_wq); |
980 | } | |
981 | ||
ba6a1308 | 982 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 983 | ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 984 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b | 985 | |
0dd4b21f BP |
986 | if (ata_msg_ctl(ap)) |
987 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
988 | } |
989 | ||
77853bf2 | 990 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 991 | { |
77853bf2 | 992 | struct completion *waiting = qc->private_data; |
a2a7a662 | 993 | |
a2a7a662 | 994 | complete(waiting); |
a2a7a662 TH |
995 | } |
996 | ||
997 | /** | |
998 | * ata_exec_internal - execute libata internal command | |
a2a7a662 TH |
999 | * @dev: Device to which the command is sent |
1000 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1001 | * @cdb: CDB for packet command |
a2a7a662 TH |
1002 | * @dma_dir: Data tranfer direction of the command |
1003 | * @buf: Data buffer of the command | |
1004 | * @buflen: Length of data buffer | |
1005 | * | |
1006 | * Executes libata internal command with timeout. @tf contains | |
1007 | * command on entry and result on return. Timeout and error | |
1008 | * conditions are reported via return value. No recovery action | |
1009 | * is taken after a command times out. It's caller's duty to | |
1010 | * clean up after timeout. | |
1011 | * | |
1012 | * LOCKING: | |
1013 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1014 | * |
1015 | * RETURNS: | |
1016 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1017 | */ |
3373efd8 | 1018 | unsigned ata_exec_internal(struct ata_device *dev, |
1ad8e7f9 TH |
1019 | struct ata_taskfile *tf, const u8 *cdb, |
1020 | int dma_dir, void *buf, unsigned int buflen) | |
a2a7a662 | 1021 | { |
3373efd8 | 1022 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
1023 | u8 command = tf->command; |
1024 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1025 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1026 | u32 preempted_sactive, preempted_qc_active; |
60be6b9a | 1027 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1028 | unsigned long flags; |
77853bf2 | 1029 | unsigned int err_mask; |
d95a717f | 1030 | int rc; |
a2a7a662 | 1031 | |
ba6a1308 | 1032 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1033 | |
e3180499 | 1034 | /* no internal command while frozen */ |
b51e9e5d | 1035 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1036 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1037 | return AC_ERR_SYSTEM; |
1038 | } | |
1039 | ||
2ab7db1f | 1040 | /* initialize internal qc */ |
a2a7a662 | 1041 | |
2ab7db1f TH |
1042 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1043 | * drivers choke if any other tag is given. This breaks | |
1044 | * ata_tag_internal() test for those drivers. Don't use new | |
1045 | * EH stuff without converting to it. | |
1046 | */ | |
1047 | if (ap->ops->error_handler) | |
1048 | tag = ATA_TAG_INTERNAL; | |
1049 | else | |
1050 | tag = 0; | |
1051 | ||
6cec4a39 | 1052 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1053 | BUG(); |
f69499f4 | 1054 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1055 | |
1056 | qc->tag = tag; | |
1057 | qc->scsicmd = NULL; | |
1058 | qc->ap = ap; | |
1059 | qc->dev = dev; | |
1060 | ata_qc_reinit(qc); | |
1061 | ||
1062 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1063 | preempted_sactive = ap->sactive; |
1064 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1065 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1066 | ap->sactive = 0; |
1067 | ap->qc_active = 0; | |
2ab7db1f TH |
1068 | |
1069 | /* prepare & issue qc */ | |
a2a7a662 | 1070 | qc->tf = *tf; |
d69cf37d TH |
1071 | if (cdb) |
1072 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1073 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1074 | qc->dma_dir = dma_dir; |
1075 | if (dma_dir != DMA_NONE) { | |
1076 | ata_sg_init_one(qc, buf, buflen); | |
1077 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1078 | } | |
1079 | ||
77853bf2 | 1080 | qc->private_data = &wait; |
a2a7a662 TH |
1081 | qc->complete_fn = ata_qc_complete_internal; |
1082 | ||
8e0e694a | 1083 | ata_qc_issue(qc); |
a2a7a662 | 1084 | |
ba6a1308 | 1085 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1086 | |
a8601e5f | 1087 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); |
d95a717f TH |
1088 | |
1089 | ata_port_flush_task(ap); | |
41ade50c | 1090 | |
d95a717f | 1091 | if (!rc) { |
ba6a1308 | 1092 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1093 | |
1094 | /* We're racing with irq here. If we lose, the | |
1095 | * following test prevents us from completing the qc | |
d95a717f TH |
1096 | * twice. If we win, the port is frozen and will be |
1097 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1098 | */ |
77853bf2 | 1099 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1100 | qc->err_mask |= AC_ERR_TIMEOUT; |
1101 | ||
1102 | if (ap->ops->error_handler) | |
1103 | ata_port_freeze(ap); | |
1104 | else | |
1105 | ata_qc_complete(qc); | |
f15a1daf | 1106 | |
0dd4b21f BP |
1107 | if (ata_msg_warn(ap)) |
1108 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1109 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1110 | } |
1111 | ||
ba6a1308 | 1112 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1113 | } |
1114 | ||
d95a717f TH |
1115 | /* do post_internal_cmd */ |
1116 | if (ap->ops->post_internal_cmd) | |
1117 | ap->ops->post_internal_cmd(qc); | |
1118 | ||
1119 | if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { | |
0dd4b21f | 1120 | if (ata_msg_warn(ap)) |
88574551 | 1121 | ata_dev_printk(dev, KERN_WARNING, |
0dd4b21f | 1122 | "zero err_mask for failed " |
88574551 | 1123 | "internal command, assuming AC_ERR_OTHER\n"); |
d95a717f TH |
1124 | qc->err_mask |= AC_ERR_OTHER; |
1125 | } | |
1126 | ||
15869303 | 1127 | /* finish up */ |
ba6a1308 | 1128 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1129 | |
e61e0672 | 1130 | *tf = qc->result_tf; |
77853bf2 TH |
1131 | err_mask = qc->err_mask; |
1132 | ||
1133 | ata_qc_free(qc); | |
2ab7db1f | 1134 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1135 | ap->sactive = preempted_sactive; |
1136 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1137 | |
1f7dd3e9 TH |
1138 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1139 | * Until those drivers are fixed, we detect the condition | |
1140 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1141 | * port. | |
1142 | * | |
1143 | * Note that this doesn't change any behavior as internal | |
1144 | * command failure results in disabling the device in the | |
1145 | * higher layer for LLDDs without new reset/EH callbacks. | |
1146 | * | |
1147 | * Kill the following code as soon as those drivers are fixed. | |
1148 | */ | |
198e0fed | 1149 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1150 | err_mask |= AC_ERR_SYSTEM; |
1151 | ata_port_probe(ap); | |
1152 | } | |
1153 | ||
ba6a1308 | 1154 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1155 | |
77853bf2 | 1156 | return err_mask; |
a2a7a662 TH |
1157 | } |
1158 | ||
977e6b9f TH |
1159 | /** |
1160 | * ata_do_simple_cmd - execute simple internal command | |
1161 | * @dev: Device to which the command is sent | |
1162 | * @cmd: Opcode to execute | |
1163 | * | |
1164 | * Execute a 'simple' command, that only consists of the opcode | |
1165 | * 'cmd' itself, without filling any other registers | |
1166 | * | |
1167 | * LOCKING: | |
1168 | * Kernel thread context (may sleep). | |
1169 | * | |
1170 | * RETURNS: | |
1171 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1172 | */ |
77b08fb5 | 1173 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1174 | { |
1175 | struct ata_taskfile tf; | |
e58eb583 TH |
1176 | |
1177 | ata_tf_init(dev, &tf); | |
1178 | ||
1179 | tf.command = cmd; | |
1180 | tf.flags |= ATA_TFLAG_DEVICE; | |
1181 | tf.protocol = ATA_PROT_NODATA; | |
1182 | ||
977e6b9f | 1183 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
e58eb583 TH |
1184 | } |
1185 | ||
1bc4ccff AC |
1186 | /** |
1187 | * ata_pio_need_iordy - check if iordy needed | |
1188 | * @adev: ATA device | |
1189 | * | |
1190 | * Check if the current speed of the device requires IORDY. Used | |
1191 | * by various controllers for chip configuration. | |
1192 | */ | |
1193 | ||
1194 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1195 | { | |
1196 | int pio; | |
1197 | int speed = adev->pio_mode - XFER_PIO_0; | |
1198 | ||
1199 | if (speed < 2) | |
1200 | return 0; | |
1201 | if (speed > 2) | |
1202 | return 1; | |
2e9edbf8 | 1203 | |
1bc4ccff AC |
1204 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1205 | ||
1206 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1207 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1208 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1209 | if (pio) { | |
1210 | /* This is cycle times not frequency - watch the logic! */ | |
1211 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1212 | return 1; | |
1213 | return 0; | |
1214 | } | |
1215 | } | |
1216 | return 0; | |
1217 | } | |
1218 | ||
1da177e4 | 1219 | /** |
49016aca | 1220 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1221 | * @dev: target device |
1222 | * @p_class: pointer to class of the target device (may be changed) | |
1223 | * @post_reset: is this read ID post-reset? | |
fe635c7e | 1224 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1225 | * |
49016aca TH |
1226 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1227 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1228 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1229 | * for pre-ATA4 drives. | |
1da177e4 LT |
1230 | * |
1231 | * LOCKING: | |
49016aca TH |
1232 | * Kernel thread context (may sleep) |
1233 | * | |
1234 | * RETURNS: | |
1235 | * 0 on success, -errno otherwise. | |
1da177e4 | 1236 | */ |
a9beec95 TH |
1237 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
1238 | int post_reset, u16 *id) | |
1da177e4 | 1239 | { |
3373efd8 | 1240 | struct ata_port *ap = dev->ap; |
49016aca | 1241 | unsigned int class = *p_class; |
a0123703 | 1242 | struct ata_taskfile tf; |
49016aca TH |
1243 | unsigned int err_mask = 0; |
1244 | const char *reason; | |
1245 | int rc; | |
1da177e4 | 1246 | |
0dd4b21f | 1247 | if (ata_msg_ctl(ap)) |
88574551 TH |
1248 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1249 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1250 | |
49016aca | 1251 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1252 | |
49016aca | 1253 | retry: |
3373efd8 | 1254 | ata_tf_init(dev, &tf); |
a0123703 | 1255 | |
49016aca TH |
1256 | switch (class) { |
1257 | case ATA_DEV_ATA: | |
a0123703 | 1258 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1259 | break; |
1260 | case ATA_DEV_ATAPI: | |
a0123703 | 1261 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1262 | break; |
1263 | default: | |
1264 | rc = -ENODEV; | |
1265 | reason = "unsupported class"; | |
1266 | goto err_out; | |
1da177e4 LT |
1267 | } |
1268 | ||
a0123703 | 1269 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1270 | |
3373efd8 | 1271 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1272 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1273 | if (err_mask) { |
49016aca TH |
1274 | rc = -EIO; |
1275 | reason = "I/O error"; | |
1da177e4 LT |
1276 | goto err_out; |
1277 | } | |
1278 | ||
49016aca | 1279 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1280 | |
49016aca | 1281 | /* sanity check */ |
a4f5749b TH |
1282 | rc = -EINVAL; |
1283 | reason = "device reports illegal type"; | |
1284 | ||
1285 | if (class == ATA_DEV_ATA) { | |
1286 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1287 | goto err_out; | |
1288 | } else { | |
1289 | if (ata_id_is_ata(id)) | |
1290 | goto err_out; | |
49016aca TH |
1291 | } |
1292 | ||
1293 | if (post_reset && class == ATA_DEV_ATA) { | |
1294 | /* | |
1295 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1296 | * SRST RESET | |
1297 | * IDENTIFY | |
1298 | * INITIALIZE DEVICE PARAMETERS | |
1299 | * anything else.. | |
1300 | * Some drives were very specific about that exact sequence. | |
1301 | */ | |
1302 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1303 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1304 | if (err_mask) { |
1305 | rc = -EIO; | |
1306 | reason = "INIT_DEV_PARAMS failed"; | |
1307 | goto err_out; | |
1308 | } | |
1309 | ||
1310 | /* current CHS translation info (id[53-58]) might be | |
1311 | * changed. reread the identify device info. | |
1312 | */ | |
1313 | post_reset = 0; | |
1314 | goto retry; | |
1315 | } | |
1316 | } | |
1317 | ||
1318 | *p_class = class; | |
fe635c7e | 1319 | |
49016aca TH |
1320 | return 0; |
1321 | ||
1322 | err_out: | |
88574551 | 1323 | if (ata_msg_warn(ap)) |
0dd4b21f | 1324 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1325 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1326 | return rc; |
1327 | } | |
1328 | ||
3373efd8 | 1329 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1330 | { |
3373efd8 | 1331 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1332 | } |
1333 | ||
a6e6ce8e TH |
1334 | static void ata_dev_config_ncq(struct ata_device *dev, |
1335 | char *desc, size_t desc_sz) | |
1336 | { | |
1337 | struct ata_port *ap = dev->ap; | |
1338 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1339 | ||
1340 | if (!ata_id_has_ncq(dev->id)) { | |
1341 | desc[0] = '\0'; | |
1342 | return; | |
1343 | } | |
1344 | ||
1345 | if (ap->flags & ATA_FLAG_NCQ) { | |
cca3974e | 1346 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
1347 | dev->flags |= ATA_DFLAG_NCQ; |
1348 | } | |
1349 | ||
1350 | if (hdepth >= ddepth) | |
1351 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1352 | else | |
1353 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1354 | } | |
1355 | ||
e6d902a3 BK |
1356 | static void ata_set_port_max_cmd_len(struct ata_port *ap) |
1357 | { | |
1358 | int i; | |
1359 | ||
cca3974e JG |
1360 | if (ap->scsi_host) { |
1361 | unsigned int len = 0; | |
1362 | ||
e6d902a3 | 1363 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
cca3974e JG |
1364 | len = max(len, ap->device[i].cdb_len); |
1365 | ||
1366 | ap->scsi_host->max_cmd_len = len; | |
e6d902a3 BK |
1367 | } |
1368 | } | |
1369 | ||
49016aca | 1370 | /** |
ffeae418 | 1371 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 | 1372 | * @dev: Target device to configure |
4c2d721a | 1373 | * @print_info: Enable device info printout |
ffeae418 TH |
1374 | * |
1375 | * Configure @dev according to @dev->id. Generic and low-level | |
1376 | * driver specific fixups are also applied. | |
49016aca TH |
1377 | * |
1378 | * LOCKING: | |
ffeae418 TH |
1379 | * Kernel thread context (may sleep) |
1380 | * | |
1381 | * RETURNS: | |
1382 | * 0 on success, -errno otherwise | |
49016aca | 1383 | */ |
a9beec95 | 1384 | int ata_dev_configure(struct ata_device *dev, int print_info) |
49016aca | 1385 | { |
3373efd8 | 1386 | struct ata_port *ap = dev->ap; |
1148c3a7 | 1387 | const u16 *id = dev->id; |
ff8854b2 | 1388 | unsigned int xfer_mask; |
b352e57d | 1389 | char revbuf[7]; /* XYZ-99\0 */ |
e6d902a3 | 1390 | int rc; |
49016aca | 1391 | |
0dd4b21f | 1392 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
88574551 TH |
1393 | ata_dev_printk(dev, KERN_INFO, |
1394 | "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1395 | __FUNCTION__, ap->id, dev->devno); | |
ffeae418 | 1396 | return 0; |
49016aca TH |
1397 | } |
1398 | ||
0dd4b21f | 1399 | if (ata_msg_probe(ap)) |
88574551 TH |
1400 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1401 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1402 | |
c39f5ebe | 1403 | /* print device capabilities */ |
0dd4b21f | 1404 | if (ata_msg_probe(ap)) |
88574551 TH |
1405 | ata_dev_printk(dev, KERN_DEBUG, |
1406 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1407 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1408 | __FUNCTION__, |
f15a1daf TH |
1409 | id[49], id[82], id[83], id[84], |
1410 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1411 | |
208a9933 | 1412 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1413 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1414 | dev->max_sectors = 0; |
1415 | dev->cdb_len = 0; | |
1416 | dev->n_sectors = 0; | |
1417 | dev->cylinders = 0; | |
1418 | dev->heads = 0; | |
1419 | dev->sectors = 0; | |
1420 | ||
1da177e4 LT |
1421 | /* |
1422 | * common ATA, ATAPI feature tests | |
1423 | */ | |
1424 | ||
ff8854b2 | 1425 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1426 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1427 | |
0dd4b21f BP |
1428 | if (ata_msg_probe(ap)) |
1429 | ata_dump_id(id); | |
1da177e4 LT |
1430 | |
1431 | /* ATA-specific feature tests */ | |
1432 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
1433 | if (ata_id_is_cfa(id)) { |
1434 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
1435 | ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n", | |
1436 | ap->id, dev->devno); | |
1437 | snprintf(revbuf, 7, "CFA"); | |
1438 | } | |
1439 | else | |
1440 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
1441 | ||
1148c3a7 | 1442 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1443 | |
1148c3a7 | 1444 | if (ata_id_has_lba(id)) { |
4c2d721a | 1445 | const char *lba_desc; |
a6e6ce8e | 1446 | char ncq_desc[20]; |
8bf62ece | 1447 | |
4c2d721a TH |
1448 | lba_desc = "LBA"; |
1449 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1450 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1451 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a TH |
1452 | lba_desc = "LBA48"; |
1453 | } | |
8bf62ece | 1454 | |
a6e6ce8e TH |
1455 | /* config NCQ */ |
1456 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1457 | ||
8bf62ece | 1458 | /* print device info to dmesg */ |
5afc8142 | 1459 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1460 | ata_dev_printk(dev, KERN_INFO, "%s, " |
a6e6ce8e | 1461 | "max %s, %Lu sectors: %s %s\n", |
b352e57d | 1462 | revbuf, |
f15a1daf TH |
1463 | ata_mode_string(xfer_mask), |
1464 | (unsigned long long)dev->n_sectors, | |
a6e6ce8e | 1465 | lba_desc, ncq_desc); |
ffeae418 | 1466 | } else { |
8bf62ece AL |
1467 | /* CHS */ |
1468 | ||
1469 | /* Default translation */ | |
1148c3a7 TH |
1470 | dev->cylinders = id[1]; |
1471 | dev->heads = id[3]; | |
1472 | dev->sectors = id[6]; | |
8bf62ece | 1473 | |
1148c3a7 | 1474 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1475 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1476 | dev->cylinders = id[54]; |
1477 | dev->heads = id[55]; | |
1478 | dev->sectors = id[56]; | |
8bf62ece AL |
1479 | } |
1480 | ||
1481 | /* print device info to dmesg */ | |
5afc8142 | 1482 | if (ata_msg_drv(ap) && print_info) |
b352e57d | 1483 | ata_dev_printk(dev, KERN_INFO, "%s, " |
f15a1daf | 1484 | "max %s, %Lu sectors: CHS %u/%u/%u\n", |
b352e57d | 1485 | revbuf, |
f15a1daf TH |
1486 | ata_mode_string(xfer_mask), |
1487 | (unsigned long long)dev->n_sectors, | |
88574551 TH |
1488 | dev->cylinders, dev->heads, |
1489 | dev->sectors); | |
1da177e4 LT |
1490 | } |
1491 | ||
07f6f7d0 AL |
1492 | if (dev->id[59] & 0x100) { |
1493 | dev->multi_count = dev->id[59] & 0xff; | |
5afc8142 | 1494 | if (ata_msg_drv(ap) && print_info) |
88574551 TH |
1495 | ata_dev_printk(dev, KERN_INFO, |
1496 | "ata%u: dev %u multi count %u\n", | |
1497 | ap->id, dev->devno, dev->multi_count); | |
07f6f7d0 AL |
1498 | } |
1499 | ||
6e7846e9 | 1500 | dev->cdb_len = 16; |
1da177e4 LT |
1501 | } |
1502 | ||
1503 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1504 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1505 | char *cdb_intr_string = ""; |
1506 | ||
1148c3a7 | 1507 | rc = atapi_cdb_len(id); |
1da177e4 | 1508 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 1509 | if (ata_msg_warn(ap)) |
88574551 TH |
1510 | ata_dev_printk(dev, KERN_WARNING, |
1511 | "unsupported CDB len\n"); | |
ffeae418 | 1512 | rc = -EINVAL; |
1da177e4 LT |
1513 | goto err_out_nosup; |
1514 | } | |
6e7846e9 | 1515 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1516 | |
08a556db | 1517 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1518 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1519 | cdb_intr_string = ", CDB intr"; |
1520 | } | |
312f7da2 | 1521 | |
1da177e4 | 1522 | /* print device info to dmesg */ |
5afc8142 | 1523 | if (ata_msg_drv(ap) && print_info) |
12436c30 TH |
1524 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", |
1525 | ata_mode_string(xfer_mask), | |
1526 | cdb_intr_string); | |
1da177e4 LT |
1527 | } |
1528 | ||
93590859 AC |
1529 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
1530 | /* Let the user know. We don't want to disallow opens for | |
1531 | rescue purposes, or in case the vendor is just a blithering | |
1532 | idiot */ | |
1533 | if (print_info) { | |
1534 | ata_dev_printk(dev, KERN_WARNING, | |
1535 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
1536 | ata_dev_printk(dev, KERN_WARNING, | |
1537 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
1538 | } | |
1539 | } | |
1540 | ||
e6d902a3 | 1541 | ata_set_port_max_cmd_len(ap); |
6e7846e9 | 1542 | |
4b2f3ede | 1543 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1544 | if (ata_dev_knobble(dev)) { |
5afc8142 | 1545 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
1546 | ata_dev_printk(dev, KERN_INFO, |
1547 | "applying bridge limits\n"); | |
5a529139 | 1548 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1549 | dev->max_sectors = ATA_MAX_SECTORS; |
1550 | } | |
1551 | ||
1552 | if (ap->ops->dev_config) | |
1553 | ap->ops->dev_config(ap, dev); | |
1554 | ||
0dd4b21f BP |
1555 | if (ata_msg_probe(ap)) |
1556 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
1557 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 1558 | return 0; |
1da177e4 LT |
1559 | |
1560 | err_out_nosup: | |
0dd4b21f | 1561 | if (ata_msg_probe(ap)) |
88574551 TH |
1562 | ata_dev_printk(dev, KERN_DEBUG, |
1563 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 1564 | return rc; |
1da177e4 LT |
1565 | } |
1566 | ||
1567 | /** | |
1568 | * ata_bus_probe - Reset and probe ATA bus | |
1569 | * @ap: Bus to probe | |
1570 | * | |
0cba632b JG |
1571 | * Master ATA bus probing function. Initiates a hardware-dependent |
1572 | * bus reset, then attempts to identify any devices found on | |
1573 | * the bus. | |
1574 | * | |
1da177e4 | 1575 | * LOCKING: |
0cba632b | 1576 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1577 | * |
1578 | * RETURNS: | |
96072e69 | 1579 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1580 | */ |
1581 | ||
80289167 | 1582 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 1583 | { |
28ca5c57 | 1584 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1585 | int tries[ATA_MAX_DEVICES]; |
1586 | int i, rc, down_xfermask; | |
e82cbdb9 | 1587 | struct ata_device *dev; |
1da177e4 | 1588 | |
28ca5c57 | 1589 | ata_port_probe(ap); |
c19ba8af | 1590 | |
14d2bac1 TH |
1591 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1592 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1593 | ||
1594 | retry: | |
1595 | down_xfermask = 0; | |
1596 | ||
2044470c | 1597 | /* reset and determine device classes */ |
52783c5d | 1598 | ap->ops->phy_reset(ap); |
2061a47a | 1599 | |
52783c5d TH |
1600 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1601 | dev = &ap->device[i]; | |
c19ba8af | 1602 | |
52783c5d TH |
1603 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
1604 | dev->class != ATA_DEV_UNKNOWN) | |
1605 | classes[dev->devno] = dev->class; | |
1606 | else | |
1607 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 1608 | |
52783c5d | 1609 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 1610 | } |
1da177e4 | 1611 | |
52783c5d | 1612 | ata_port_probe(ap); |
2044470c | 1613 | |
b6079ca4 AC |
1614 | /* after the reset the device state is PIO 0 and the controller |
1615 | state is undefined. Record the mode */ | |
1616 | ||
1617 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1618 | ap->device[i].pio_mode = XFER_PIO_0; | |
1619 | ||
28ca5c57 | 1620 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1621 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1622 | dev = &ap->device[i]; |
28ca5c57 | 1623 | |
ec573755 TH |
1624 | if (tries[i]) |
1625 | dev->class = classes[i]; | |
ffeae418 | 1626 | |
14d2bac1 | 1627 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1628 | continue; |
ffeae418 | 1629 | |
3373efd8 | 1630 | rc = ata_dev_read_id(dev, &dev->class, 1, dev->id); |
14d2bac1 TH |
1631 | if (rc) |
1632 | goto fail; | |
1633 | ||
3373efd8 | 1634 | rc = ata_dev_configure(dev, 1); |
14d2bac1 TH |
1635 | if (rc) |
1636 | goto fail; | |
1da177e4 LT |
1637 | } |
1638 | ||
e82cbdb9 | 1639 | /* configure transfer mode */ |
3adcebb2 | 1640 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1641 | if (rc) { |
1642 | down_xfermask = 1; | |
1643 | goto fail; | |
e82cbdb9 | 1644 | } |
1da177e4 | 1645 | |
e82cbdb9 TH |
1646 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1647 | if (ata_dev_enabled(&ap->device[i])) | |
1648 | return 0; | |
1da177e4 | 1649 | |
e82cbdb9 TH |
1650 | /* no device present, disable port */ |
1651 | ata_port_disable(ap); | |
1da177e4 | 1652 | ap->ops->port_disable(ap); |
96072e69 | 1653 | return -ENODEV; |
14d2bac1 TH |
1654 | |
1655 | fail: | |
1656 | switch (rc) { | |
1657 | case -EINVAL: | |
1658 | case -ENODEV: | |
1659 | tries[dev->devno] = 0; | |
1660 | break; | |
1661 | case -EIO: | |
3c567b7d | 1662 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1663 | /* fall through */ |
1664 | default: | |
1665 | tries[dev->devno]--; | |
1666 | if (down_xfermask && | |
3373efd8 | 1667 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1668 | tries[dev->devno] = 0; |
1669 | } | |
1670 | ||
ec573755 | 1671 | if (!tries[dev->devno]) { |
3373efd8 TH |
1672 | ata_down_xfermask_limit(dev, 1); |
1673 | ata_dev_disable(dev); | |
ec573755 TH |
1674 | } |
1675 | ||
14d2bac1 | 1676 | goto retry; |
1da177e4 LT |
1677 | } |
1678 | ||
1679 | /** | |
0cba632b JG |
1680 | * ata_port_probe - Mark port as enabled |
1681 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1682 | * |
0cba632b JG |
1683 | * Modify @ap data structure such that the system |
1684 | * thinks that the entire port is enabled. | |
1685 | * | |
cca3974e | 1686 | * LOCKING: host lock, or some other form of |
0cba632b | 1687 | * serialization. |
1da177e4 LT |
1688 | */ |
1689 | ||
1690 | void ata_port_probe(struct ata_port *ap) | |
1691 | { | |
198e0fed | 1692 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1693 | } |
1694 | ||
3be680b7 TH |
1695 | /** |
1696 | * sata_print_link_status - Print SATA link status | |
1697 | * @ap: SATA port to printk link status about | |
1698 | * | |
1699 | * This function prints link speed and status of a SATA link. | |
1700 | * | |
1701 | * LOCKING: | |
1702 | * None. | |
1703 | */ | |
1704 | static void sata_print_link_status(struct ata_port *ap) | |
1705 | { | |
6d5f9732 | 1706 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1707 | |
81952c54 | 1708 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1709 | return; |
81952c54 | 1710 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1711 | |
81952c54 | 1712 | if (ata_port_online(ap)) { |
3be680b7 | 1713 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1714 | ata_port_printk(ap, KERN_INFO, |
1715 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1716 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1717 | } else { |
f15a1daf TH |
1718 | ata_port_printk(ap, KERN_INFO, |
1719 | "SATA link down (SStatus %X SControl %X)\n", | |
1720 | sstatus, scontrol); | |
3be680b7 TH |
1721 | } |
1722 | } | |
1723 | ||
1da177e4 | 1724 | /** |
780a87f7 JG |
1725 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1726 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1727 | * |
780a87f7 JG |
1728 | * This function issues commands to standard SATA Sxxx |
1729 | * PHY registers, to wake up the phy (and device), and | |
1730 | * clear any reset condition. | |
1da177e4 LT |
1731 | * |
1732 | * LOCKING: | |
0cba632b | 1733 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1734 | * |
1735 | */ | |
1736 | void __sata_phy_reset(struct ata_port *ap) | |
1737 | { | |
1738 | u32 sstatus; | |
1739 | unsigned long timeout = jiffies + (HZ * 5); | |
1740 | ||
1741 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1742 | /* issue phy wake/reset */ |
81952c54 | 1743 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1744 | /* Couldn't find anything in SATA I/II specs, but |
1745 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1746 | mdelay(1); | |
1da177e4 | 1747 | } |
81952c54 TH |
1748 | /* phy wake/clear reset */ |
1749 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1750 | |
1751 | /* wait for phy to become ready, if necessary */ | |
1752 | do { | |
1753 | msleep(200); | |
81952c54 | 1754 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1755 | if ((sstatus & 0xf) != 1) |
1756 | break; | |
1757 | } while (time_before(jiffies, timeout)); | |
1758 | ||
3be680b7 TH |
1759 | /* print link status */ |
1760 | sata_print_link_status(ap); | |
656563e3 | 1761 | |
3be680b7 | 1762 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1763 | if (!ata_port_offline(ap)) |
1da177e4 | 1764 | ata_port_probe(ap); |
3be680b7 | 1765 | else |
1da177e4 | 1766 | ata_port_disable(ap); |
1da177e4 | 1767 | |
198e0fed | 1768 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1769 | return; |
1770 | ||
1771 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1772 | ata_port_disable(ap); | |
1773 | return; | |
1774 | } | |
1775 | ||
1776 | ap->cbl = ATA_CBL_SATA; | |
1777 | } | |
1778 | ||
1779 | /** | |
780a87f7 JG |
1780 | * sata_phy_reset - Reset SATA bus. |
1781 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1782 | * |
780a87f7 JG |
1783 | * This function resets the SATA bus, and then probes |
1784 | * the bus for devices. | |
1da177e4 LT |
1785 | * |
1786 | * LOCKING: | |
0cba632b | 1787 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1788 | * |
1789 | */ | |
1790 | void sata_phy_reset(struct ata_port *ap) | |
1791 | { | |
1792 | __sata_phy_reset(ap); | |
198e0fed | 1793 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1794 | return; |
1795 | ata_bus_reset(ap); | |
1796 | } | |
1797 | ||
ebdfca6e AC |
1798 | /** |
1799 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
1800 | * @adev: device |
1801 | * | |
1802 | * Obtain the other device on the same cable, or if none is | |
1803 | * present NULL is returned | |
1804 | */ | |
2e9edbf8 | 1805 | |
3373efd8 | 1806 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 1807 | { |
3373efd8 | 1808 | struct ata_port *ap = adev->ap; |
ebdfca6e | 1809 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 1810 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
1811 | return NULL; |
1812 | return pair; | |
1813 | } | |
1814 | ||
1da177e4 | 1815 | /** |
780a87f7 JG |
1816 | * ata_port_disable - Disable port. |
1817 | * @ap: Port to be disabled. | |
1da177e4 | 1818 | * |
780a87f7 JG |
1819 | * Modify @ap data structure such that the system |
1820 | * thinks that the entire port is disabled, and should | |
1821 | * never attempt to probe or communicate with devices | |
1822 | * on this port. | |
1823 | * | |
cca3974e | 1824 | * LOCKING: host lock, or some other form of |
780a87f7 | 1825 | * serialization. |
1da177e4 LT |
1826 | */ |
1827 | ||
1828 | void ata_port_disable(struct ata_port *ap) | |
1829 | { | |
1830 | ap->device[0].class = ATA_DEV_NONE; | |
1831 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 1832 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
1833 | } |
1834 | ||
1c3fae4d | 1835 | /** |
3c567b7d | 1836 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
1837 | * @ap: Port to adjust SATA spd limit for |
1838 | * | |
1839 | * Adjust SATA spd limit of @ap downward. Note that this | |
1840 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 1841 | * using sata_set_spd(). |
1c3fae4d TH |
1842 | * |
1843 | * LOCKING: | |
1844 | * Inherited from caller. | |
1845 | * | |
1846 | * RETURNS: | |
1847 | * 0 on success, negative errno on failure | |
1848 | */ | |
3c567b7d | 1849 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 1850 | { |
81952c54 TH |
1851 | u32 sstatus, spd, mask; |
1852 | int rc, highbit; | |
1c3fae4d | 1853 | |
81952c54 TH |
1854 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
1855 | if (rc) | |
1856 | return rc; | |
1c3fae4d TH |
1857 | |
1858 | mask = ap->sata_spd_limit; | |
1859 | if (mask <= 1) | |
1860 | return -EINVAL; | |
1861 | highbit = fls(mask) - 1; | |
1862 | mask &= ~(1 << highbit); | |
1863 | ||
81952c54 | 1864 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
1865 | if (spd <= 1) |
1866 | return -EINVAL; | |
1867 | spd--; | |
1868 | mask &= (1 << spd) - 1; | |
1869 | if (!mask) | |
1870 | return -EINVAL; | |
1871 | ||
1872 | ap->sata_spd_limit = mask; | |
1873 | ||
f15a1daf TH |
1874 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
1875 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
1876 | |
1877 | return 0; | |
1878 | } | |
1879 | ||
3c567b7d | 1880 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
1881 | { |
1882 | u32 spd, limit; | |
1883 | ||
1884 | if (ap->sata_spd_limit == UINT_MAX) | |
1885 | limit = 0; | |
1886 | else | |
1887 | limit = fls(ap->sata_spd_limit); | |
1888 | ||
1889 | spd = (*scontrol >> 4) & 0xf; | |
1890 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
1891 | ||
1892 | return spd != limit; | |
1893 | } | |
1894 | ||
1895 | /** | |
3c567b7d | 1896 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
1897 | * @ap: Port in question |
1898 | * | |
1899 | * Test whether the spd limit in SControl matches | |
1900 | * @ap->sata_spd_limit. This function is used to determine | |
1901 | * whether hardreset is necessary to apply SATA spd | |
1902 | * configuration. | |
1903 | * | |
1904 | * LOCKING: | |
1905 | * Inherited from caller. | |
1906 | * | |
1907 | * RETURNS: | |
1908 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
1909 | */ | |
3c567b7d | 1910 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
1911 | { |
1912 | u32 scontrol; | |
1913 | ||
81952c54 | 1914 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
1915 | return 0; |
1916 | ||
3c567b7d | 1917 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
1918 | } |
1919 | ||
1920 | /** | |
3c567b7d | 1921 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
1922 | * @ap: Port to set SATA spd for |
1923 | * | |
1924 | * Set SATA spd of @ap according to sata_spd_limit. | |
1925 | * | |
1926 | * LOCKING: | |
1927 | * Inherited from caller. | |
1928 | * | |
1929 | * RETURNS: | |
1930 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 1931 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 1932 | */ |
3c567b7d | 1933 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
1934 | { |
1935 | u32 scontrol; | |
81952c54 | 1936 | int rc; |
1c3fae4d | 1937 | |
81952c54 TH |
1938 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
1939 | return rc; | |
1c3fae4d | 1940 | |
3c567b7d | 1941 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
1942 | return 0; |
1943 | ||
81952c54 TH |
1944 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
1945 | return rc; | |
1946 | ||
1c3fae4d TH |
1947 | return 1; |
1948 | } | |
1949 | ||
452503f9 AC |
1950 | /* |
1951 | * This mode timing computation functionality is ported over from | |
1952 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1953 | */ | |
1954 | /* | |
b352e57d | 1955 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 1956 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
1957 | * for UDMA6, which is currently supported only by Maxtor drives. |
1958 | * | |
1959 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
1960 | */ |
1961 | ||
1962 | static const struct ata_timing ata_timing[] = { | |
1963 | ||
1964 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1965 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1966 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1967 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1968 | ||
b352e57d AC |
1969 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
1970 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
1971 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
1972 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1973 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1974 | ||
1975 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 1976 | |
452503f9 AC |
1977 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
1978 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1979 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 1980 | |
452503f9 AC |
1981 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
1982 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1983 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1984 | ||
b352e57d AC |
1985 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
1986 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
1987 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
1988 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1989 | ||
1990 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1991 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1992 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1993 | ||
1994 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1995 | ||
1996 | { 0xFF } | |
1997 | }; | |
1998 | ||
1999 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
2000 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
2001 | ||
2002 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2003 | { | |
2004 | q->setup = EZ(t->setup * 1000, T); | |
2005 | q->act8b = EZ(t->act8b * 1000, T); | |
2006 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2007 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2008 | q->active = EZ(t->active * 1000, T); | |
2009 | q->recover = EZ(t->recover * 1000, T); | |
2010 | q->cycle = EZ(t->cycle * 1000, T); | |
2011 | q->udma = EZ(t->udma * 1000, UT); | |
2012 | } | |
2013 | ||
2014 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2015 | struct ata_timing *m, unsigned int what) | |
2016 | { | |
2017 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2018 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2019 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2020 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2021 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2022 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2023 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2024 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2025 | } | |
2026 | ||
2027 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
2028 | { | |
2029 | const struct ata_timing *t; | |
2030 | ||
2031 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2032 | if (t->mode == 0xFF) |
452503f9 | 2033 | return NULL; |
2e9edbf8 | 2034 | return t; |
452503f9 AC |
2035 | } |
2036 | ||
2037 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2038 | struct ata_timing *t, int T, int UT) | |
2039 | { | |
2040 | const struct ata_timing *s; | |
2041 | struct ata_timing p; | |
2042 | ||
2043 | /* | |
2e9edbf8 | 2044 | * Find the mode. |
75b1f2f8 | 2045 | */ |
452503f9 AC |
2046 | |
2047 | if (!(s = ata_timing_find_mode(speed))) | |
2048 | return -EINVAL; | |
2049 | ||
75b1f2f8 AL |
2050 | memcpy(t, s, sizeof(*s)); |
2051 | ||
452503f9 AC |
2052 | /* |
2053 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2054 | * PIO/MW_DMA cycle timing. | |
2055 | */ | |
2056 | ||
2057 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2058 | memset(&p, 0, sizeof(p)); | |
2059 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2060 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2061 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2062 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2063 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2064 | } | |
2065 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2066 | } | |
2067 | ||
2068 | /* | |
2069 | * Convert the timing to bus clock counts. | |
2070 | */ | |
2071 | ||
75b1f2f8 | 2072 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2073 | |
2074 | /* | |
c893a3ae RD |
2075 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2076 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2077 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2078 | */ |
2079 | ||
2080 | if (speed > XFER_PIO_4) { | |
2081 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
2082 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2083 | } | |
2084 | ||
2085 | /* | |
c893a3ae | 2086 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2087 | */ |
2088 | ||
2089 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2090 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2091 | t->rec8b = t->cyc8b - t->act8b; | |
2092 | } | |
2093 | ||
2094 | if (t->active + t->recover < t->cycle) { | |
2095 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2096 | t->recover = t->cycle - t->active; | |
2097 | } | |
2098 | ||
2099 | return 0; | |
2100 | } | |
2101 | ||
cf176e1a TH |
2102 | /** |
2103 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
2104 | * @dev: Device to adjust xfer masks |
2105 | * @force_pio0: Force PIO0 | |
2106 | * | |
2107 | * Adjust xfer masks of @dev downward. Note that this function | |
2108 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2109 | * will apply the limit. | |
2110 | * | |
2111 | * LOCKING: | |
2112 | * Inherited from caller. | |
2113 | * | |
2114 | * RETURNS: | |
2115 | * 0 on success, negative errno on failure | |
2116 | */ | |
3373efd8 | 2117 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
2118 | { |
2119 | unsigned long xfer_mask; | |
2120 | int highbit; | |
2121 | ||
2122 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
2123 | dev->udma_mask); | |
2124 | ||
2125 | if (!xfer_mask) | |
2126 | goto fail; | |
2127 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
2128 | if (xfer_mask & ATA_MASK_UDMA) | |
2129 | xfer_mask &= ~ATA_MASK_MWDMA; | |
2130 | ||
2131 | highbit = fls(xfer_mask) - 1; | |
2132 | xfer_mask &= ~(1 << highbit); | |
2133 | if (force_pio0) | |
2134 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
2135 | if (!xfer_mask) | |
2136 | goto fail; | |
2137 | ||
2138 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2139 | &dev->udma_mask); | |
2140 | ||
f15a1daf TH |
2141 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
2142 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
2143 | |
2144 | return 0; | |
2145 | ||
2146 | fail: | |
2147 | return -EINVAL; | |
2148 | } | |
2149 | ||
3373efd8 | 2150 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2151 | { |
83206a29 TH |
2152 | unsigned int err_mask; |
2153 | int rc; | |
1da177e4 | 2154 | |
e8384607 | 2155 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2156 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2157 | dev->flags |= ATA_DFLAG_PIO; | |
2158 | ||
3373efd8 | 2159 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 2160 | if (err_mask) { |
f15a1daf TH |
2161 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2162 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2163 | return -EIO; |
2164 | } | |
1da177e4 | 2165 | |
3373efd8 | 2166 | rc = ata_dev_revalidate(dev, 0); |
5eb45c02 | 2167 | if (rc) |
83206a29 | 2168 | return rc; |
48a8a14f | 2169 | |
23e71c3d TH |
2170 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2171 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2172 | |
f15a1daf TH |
2173 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2174 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2175 | return 0; |
1da177e4 LT |
2176 | } |
2177 | ||
1da177e4 LT |
2178 | /** |
2179 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2180 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 2181 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2182 | * |
e82cbdb9 TH |
2183 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
2184 | * ata_set_mode() fails, pointer to the failing device is | |
2185 | * returned in @r_failed_dev. | |
780a87f7 | 2186 | * |
1da177e4 | 2187 | * LOCKING: |
0cba632b | 2188 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2189 | * |
2190 | * RETURNS: | |
2191 | * 0 on success, negative errno otherwise | |
1da177e4 | 2192 | */ |
1ad8e7f9 | 2193 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 2194 | { |
e8e0619f | 2195 | struct ata_device *dev; |
e82cbdb9 | 2196 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2197 | |
3adcebb2 TH |
2198 | /* has private set_mode? */ |
2199 | if (ap->ops->set_mode) { | |
2200 | /* FIXME: make ->set_mode handle no device case and | |
2201 | * return error code and failing device on failure. | |
2202 | */ | |
2203 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
02670bf3 | 2204 | if (ata_dev_ready(&ap->device[i])) { |
3adcebb2 TH |
2205 | ap->ops->set_mode(ap); |
2206 | break; | |
2207 | } | |
2208 | } | |
2209 | return 0; | |
2210 | } | |
2211 | ||
a6d5a51c TH |
2212 | /* step 1: calculate xfer_mask */ |
2213 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2214 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2215 | |
e8e0619f TH |
2216 | dev = &ap->device[i]; |
2217 | ||
e1211e3f | 2218 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2219 | continue; |
2220 | ||
3373efd8 | 2221 | ata_dev_xfermask(dev); |
1da177e4 | 2222 | |
acf356b1 TH |
2223 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2224 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2225 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2226 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2227 | |
4f65977d | 2228 | found = 1; |
5444a6f4 AC |
2229 | if (dev->dma_mode) |
2230 | used_dma = 1; | |
a6d5a51c | 2231 | } |
4f65977d | 2232 | if (!found) |
e82cbdb9 | 2233 | goto out; |
a6d5a51c TH |
2234 | |
2235 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2236 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2237 | dev = &ap->device[i]; | |
2238 | if (!ata_dev_enabled(dev)) | |
2239 | continue; | |
2240 | ||
2241 | if (!dev->pio_mode) { | |
f15a1daf | 2242 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2243 | rc = -EINVAL; |
e82cbdb9 | 2244 | goto out; |
e8e0619f TH |
2245 | } |
2246 | ||
2247 | dev->xfer_mode = dev->pio_mode; | |
2248 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2249 | if (ap->ops->set_piomode) | |
2250 | ap->ops->set_piomode(ap, dev); | |
2251 | } | |
1da177e4 | 2252 | |
a6d5a51c | 2253 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2254 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2255 | dev = &ap->device[i]; | |
2256 | ||
2257 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2258 | continue; | |
2259 | ||
2260 | dev->xfer_mode = dev->dma_mode; | |
2261 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2262 | if (ap->ops->set_dmamode) | |
2263 | ap->ops->set_dmamode(ap, dev); | |
2264 | } | |
1da177e4 LT |
2265 | |
2266 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2267 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2268 | dev = &ap->device[i]; |
1da177e4 | 2269 | |
02670bf3 TH |
2270 | /* don't udpate suspended devices' xfer mode */ |
2271 | if (!ata_dev_ready(dev)) | |
83206a29 TH |
2272 | continue; |
2273 | ||
3373efd8 | 2274 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2275 | if (rc) |
e82cbdb9 | 2276 | goto out; |
83206a29 | 2277 | } |
1da177e4 | 2278 | |
e8e0619f TH |
2279 | /* Record simplex status. If we selected DMA then the other |
2280 | * host channels are not permitted to do so. | |
5444a6f4 | 2281 | */ |
cca3974e JG |
2282 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
2283 | ap->host->simplex_claimed = 1; | |
5444a6f4 | 2284 | |
e8e0619f | 2285 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2286 | if (ap->ops->post_set_mode) |
2287 | ap->ops->post_set_mode(ap); | |
2288 | ||
e82cbdb9 TH |
2289 | out: |
2290 | if (rc) | |
2291 | *r_failed_dev = dev; | |
2292 | return rc; | |
1da177e4 LT |
2293 | } |
2294 | ||
1fdffbce JG |
2295 | /** |
2296 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2297 | * @ap: port to which command is being issued | |
2298 | * @tf: ATA taskfile register set | |
2299 | * | |
2300 | * Issues ATA taskfile register set to ATA host controller, | |
2301 | * with proper synchronization with interrupt handler and | |
2302 | * other threads. | |
2303 | * | |
2304 | * LOCKING: | |
cca3974e | 2305 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
2306 | */ |
2307 | ||
2308 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2309 | const struct ata_taskfile *tf) | |
2310 | { | |
2311 | ap->ops->tf_load(ap, tf); | |
2312 | ap->ops->exec_command(ap, tf); | |
2313 | } | |
2314 | ||
1da177e4 LT |
2315 | /** |
2316 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2317 | * @ap: port containing status register to be polled | |
2318 | * @tmout_pat: impatience timeout | |
2319 | * @tmout: overall timeout | |
2320 | * | |
780a87f7 JG |
2321 | * Sleep until ATA Status register bit BSY clears, |
2322 | * or a timeout occurs. | |
2323 | * | |
2324 | * LOCKING: None. | |
1da177e4 LT |
2325 | */ |
2326 | ||
6f8b9958 TH |
2327 | unsigned int ata_busy_sleep (struct ata_port *ap, |
2328 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2329 | { |
2330 | unsigned long timer_start, timeout; | |
2331 | u8 status; | |
2332 | ||
2333 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2334 | timer_start = jiffies; | |
2335 | timeout = timer_start + tmout_pat; | |
2336 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2337 | msleep(50); | |
2338 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2339 | } | |
2340 | ||
2341 | if (status & ATA_BUSY) | |
f15a1daf TH |
2342 | ata_port_printk(ap, KERN_WARNING, |
2343 | "port is slow to respond, please be patient\n"); | |
1da177e4 LT |
2344 | |
2345 | timeout = timer_start + tmout; | |
2346 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2347 | msleep(50); | |
2348 | status = ata_chk_status(ap); | |
2349 | } | |
2350 | ||
2351 | if (status & ATA_BUSY) { | |
f15a1daf TH |
2352 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
2353 | "(%lu secs)\n", tmout / HZ); | |
1da177e4 LT |
2354 | return 1; |
2355 | } | |
2356 | ||
2357 | return 0; | |
2358 | } | |
2359 | ||
2360 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2361 | { | |
2362 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2363 | unsigned int dev0 = devmask & (1 << 0); | |
2364 | unsigned int dev1 = devmask & (1 << 1); | |
2365 | unsigned long timeout; | |
2366 | ||
2367 | /* if device 0 was found in ata_devchk, wait for its | |
2368 | * BSY bit to clear | |
2369 | */ | |
2370 | if (dev0) | |
2371 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2372 | ||
2373 | /* if device 1 was found in ata_devchk, wait for | |
2374 | * register access, then wait for BSY to clear | |
2375 | */ | |
2376 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2377 | while (dev1) { | |
2378 | u8 nsect, lbal; | |
2379 | ||
2380 | ap->ops->dev_select(ap, 1); | |
2381 | if (ap->flags & ATA_FLAG_MMIO) { | |
2382 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2383 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2384 | } else { | |
2385 | nsect = inb(ioaddr->nsect_addr); | |
2386 | lbal = inb(ioaddr->lbal_addr); | |
2387 | } | |
2388 | if ((nsect == 1) && (lbal == 1)) | |
2389 | break; | |
2390 | if (time_after(jiffies, timeout)) { | |
2391 | dev1 = 0; | |
2392 | break; | |
2393 | } | |
2394 | msleep(50); /* give drive a breather */ | |
2395 | } | |
2396 | if (dev1) | |
2397 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2398 | ||
2399 | /* is all this really necessary? */ | |
2400 | ap->ops->dev_select(ap, 0); | |
2401 | if (dev1) | |
2402 | ap->ops->dev_select(ap, 1); | |
2403 | if (dev0) | |
2404 | ap->ops->dev_select(ap, 0); | |
2405 | } | |
2406 | ||
1da177e4 LT |
2407 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2408 | unsigned int devmask) | |
2409 | { | |
2410 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2411 | ||
2412 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2413 | ||
2414 | /* software reset. causes dev0 to be selected */ | |
2415 | if (ap->flags & ATA_FLAG_MMIO) { | |
2416 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2417 | udelay(20); /* FIXME: flush */ | |
2418 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2419 | udelay(20); /* FIXME: flush */ | |
2420 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2421 | } else { | |
2422 | outb(ap->ctl, ioaddr->ctl_addr); | |
2423 | udelay(10); | |
2424 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2425 | udelay(10); | |
2426 | outb(ap->ctl, ioaddr->ctl_addr); | |
2427 | } | |
2428 | ||
2429 | /* spec mandates ">= 2ms" before checking status. | |
2430 | * We wait 150ms, because that was the magic delay used for | |
2431 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2432 | * between when the ATA command register is written, and then | |
2433 | * status is checked. Because waiting for "a while" before | |
2434 | * checking status is fine, post SRST, we perform this magic | |
2435 | * delay here as well. | |
09c7ad79 AC |
2436 | * |
2437 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2438 | */ |
2439 | msleep(150); | |
2440 | ||
2e9edbf8 | 2441 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2442 | * the bus shows 0xFF because the odd clown forgets the D7 |
2443 | * pulldown resistor. | |
2444 | */ | |
987d2f05 | 2445 | if (ata_check_status(ap) == 0xFF) { |
f15a1daf | 2446 | ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n"); |
298a41ca | 2447 | return AC_ERR_OTHER; |
987d2f05 | 2448 | } |
09c7ad79 | 2449 | |
1da177e4 LT |
2450 | ata_bus_post_reset(ap, devmask); |
2451 | ||
2452 | return 0; | |
2453 | } | |
2454 | ||
2455 | /** | |
2456 | * ata_bus_reset - reset host port and associated ATA channel | |
2457 | * @ap: port to reset | |
2458 | * | |
2459 | * This is typically the first time we actually start issuing | |
2460 | * commands to the ATA channel. We wait for BSY to clear, then | |
2461 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2462 | * result. Determine what devices, if any, are on the channel | |
2463 | * by looking at the device 0/1 error register. Look at the signature | |
2464 | * stored in each device's taskfile registers, to determine if | |
2465 | * the device is ATA or ATAPI. | |
2466 | * | |
2467 | * LOCKING: | |
0cba632b | 2468 | * PCI/etc. bus probe sem. |
cca3974e | 2469 | * Obtains host lock. |
1da177e4 LT |
2470 | * |
2471 | * SIDE EFFECTS: | |
198e0fed | 2472 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2473 | */ |
2474 | ||
2475 | void ata_bus_reset(struct ata_port *ap) | |
2476 | { | |
2477 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2478 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2479 | u8 err; | |
aec5c3c1 | 2480 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2481 | |
2482 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2483 | ||
2484 | /* determine if device 0/1 are present */ | |
2485 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2486 | dev0 = 1; | |
2487 | else { | |
2488 | dev0 = ata_devchk(ap, 0); | |
2489 | if (slave_possible) | |
2490 | dev1 = ata_devchk(ap, 1); | |
2491 | } | |
2492 | ||
2493 | if (dev0) | |
2494 | devmask |= (1 << 0); | |
2495 | if (dev1) | |
2496 | devmask |= (1 << 1); | |
2497 | ||
2498 | /* select device 0 again */ | |
2499 | ap->ops->dev_select(ap, 0); | |
2500 | ||
2501 | /* issue bus reset */ | |
2502 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2503 | if (ata_bus_softreset(ap, devmask)) |
2504 | goto err_out; | |
1da177e4 LT |
2505 | |
2506 | /* | |
2507 | * determine by signature whether we have ATA or ATAPI devices | |
2508 | */ | |
b4dc7623 | 2509 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2510 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2511 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2512 | |
2513 | /* re-enable interrupts */ | |
2514 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2515 | ata_irq_on(ap); | |
2516 | ||
2517 | /* is double-select really necessary? */ | |
2518 | if (ap->device[1].class != ATA_DEV_NONE) | |
2519 | ap->ops->dev_select(ap, 1); | |
2520 | if (ap->device[0].class != ATA_DEV_NONE) | |
2521 | ap->ops->dev_select(ap, 0); | |
2522 | ||
2523 | /* if no devices were detected, disable this port */ | |
2524 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2525 | (ap->device[1].class == ATA_DEV_NONE)) | |
2526 | goto err_out; | |
2527 | ||
2528 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2529 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2530 | if (ap->flags & ATA_FLAG_MMIO) | |
2531 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2532 | else | |
2533 | outb(ap->ctl, ioaddr->ctl_addr); | |
2534 | } | |
2535 | ||
2536 | DPRINTK("EXIT\n"); | |
2537 | return; | |
2538 | ||
2539 | err_out: | |
f15a1daf | 2540 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2541 | ap->ops->port_disable(ap); |
2542 | ||
2543 | DPRINTK("EXIT\n"); | |
2544 | } | |
2545 | ||
d7bb4cc7 TH |
2546 | /** |
2547 | * sata_phy_debounce - debounce SATA phy status | |
2548 | * @ap: ATA port to debounce SATA phy status for | |
2549 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2550 | * | |
2551 | * Make sure SStatus of @ap reaches stable state, determined by | |
2552 | * holding the same value where DET is not 1 for @duration polled | |
2553 | * every @interval, before @timeout. Timeout constraints the | |
2554 | * beginning of the stable state. Because, after hot unplugging, | |
2555 | * DET gets stuck at 1 on some controllers, this functions waits | |
2556 | * until timeout then returns 0 if DET is stable at 1. | |
2557 | * | |
2558 | * LOCKING: | |
2559 | * Kernel thread context (may sleep) | |
2560 | * | |
2561 | * RETURNS: | |
2562 | * 0 on success, -errno on failure. | |
2563 | */ | |
2564 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
7a7921e8 | 2565 | { |
d7bb4cc7 TH |
2566 | unsigned long interval_msec = params[0]; |
2567 | unsigned long duration = params[1] * HZ / 1000; | |
2568 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2569 | unsigned long last_jiffies; | |
2570 | u32 last, cur; | |
2571 | int rc; | |
2572 | ||
2573 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2574 | return rc; | |
2575 | cur &= 0xf; | |
2576 | ||
2577 | last = cur; | |
2578 | last_jiffies = jiffies; | |
2579 | ||
2580 | while (1) { | |
2581 | msleep(interval_msec); | |
2582 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2583 | return rc; | |
2584 | cur &= 0xf; | |
2585 | ||
2586 | /* DET stable? */ | |
2587 | if (cur == last) { | |
2588 | if (cur == 1 && time_before(jiffies, timeout)) | |
2589 | continue; | |
2590 | if (time_after(jiffies, last_jiffies + duration)) | |
2591 | return 0; | |
2592 | continue; | |
2593 | } | |
2594 | ||
2595 | /* unstable, start over */ | |
2596 | last = cur; | |
2597 | last_jiffies = jiffies; | |
2598 | ||
2599 | /* check timeout */ | |
2600 | if (time_after(jiffies, timeout)) | |
2601 | return -EBUSY; | |
2602 | } | |
2603 | } | |
2604 | ||
2605 | /** | |
2606 | * sata_phy_resume - resume SATA phy | |
2607 | * @ap: ATA port to resume SATA phy for | |
2608 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2609 | * | |
2610 | * Resume SATA phy of @ap and debounce it. | |
2611 | * | |
2612 | * LOCKING: | |
2613 | * Kernel thread context (may sleep) | |
2614 | * | |
2615 | * RETURNS: | |
2616 | * 0 on success, -errno on failure. | |
2617 | */ | |
2618 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2619 | { | |
2620 | u32 scontrol; | |
81952c54 TH |
2621 | int rc; |
2622 | ||
2623 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2624 | return rc; | |
7a7921e8 | 2625 | |
852ee16a | 2626 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2627 | |
2628 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2629 | return rc; | |
7a7921e8 | 2630 | |
d7bb4cc7 TH |
2631 | /* Some PHYs react badly if SStatus is pounded immediately |
2632 | * after resuming. Delay 200ms before debouncing. | |
2633 | */ | |
2634 | msleep(200); | |
7a7921e8 | 2635 | |
d7bb4cc7 | 2636 | return sata_phy_debounce(ap, params); |
7a7921e8 TH |
2637 | } |
2638 | ||
f5914a46 TH |
2639 | static void ata_wait_spinup(struct ata_port *ap) |
2640 | { | |
2641 | struct ata_eh_context *ehc = &ap->eh_context; | |
2642 | unsigned long end, secs; | |
2643 | int rc; | |
2644 | ||
2645 | /* first, debounce phy if SATA */ | |
2646 | if (ap->cbl == ATA_CBL_SATA) { | |
e9c83914 | 2647 | rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); |
f5914a46 TH |
2648 | |
2649 | /* if debounced successfully and offline, no need to wait */ | |
2650 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2651 | return; | |
2652 | } | |
2653 | ||
2654 | /* okay, let's give the drive time to spin up */ | |
2655 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2656 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2657 | ||
2658 | if (time_after(jiffies, end)) | |
2659 | return; | |
2660 | ||
2661 | if (secs > 5) | |
2662 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2663 | "(%lu secs)\n", secs); | |
2664 | ||
2665 | schedule_timeout_uninterruptible(end - jiffies); | |
2666 | } | |
2667 | ||
2668 | /** | |
2669 | * ata_std_prereset - prepare for reset | |
2670 | * @ap: ATA port to be reset | |
2671 | * | |
2672 | * @ap is about to be reset. Initialize it. | |
2673 | * | |
2674 | * LOCKING: | |
2675 | * Kernel thread context (may sleep) | |
2676 | * | |
2677 | * RETURNS: | |
2678 | * 0 on success, -errno otherwise. | |
2679 | */ | |
2680 | int ata_std_prereset(struct ata_port *ap) | |
2681 | { | |
2682 | struct ata_eh_context *ehc = &ap->eh_context; | |
e9c83914 | 2683 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
2684 | int rc; |
2685 | ||
28324304 TH |
2686 | /* handle link resume & hotplug spinup */ |
2687 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && | |
2688 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
2689 | ehc->i.action |= ATA_EH_HARDRESET; | |
2690 | ||
2691 | if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && | |
2692 | (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) | |
2693 | ata_wait_spinup(ap); | |
f5914a46 TH |
2694 | |
2695 | /* if we're about to do hardreset, nothing more to do */ | |
2696 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2697 | return 0; | |
2698 | ||
2699 | /* if SATA, resume phy */ | |
2700 | if (ap->cbl == ATA_CBL_SATA) { | |
f5914a46 TH |
2701 | rc = sata_phy_resume(ap, timing); |
2702 | if (rc && rc != -EOPNOTSUPP) { | |
2703 | /* phy resume failed */ | |
2704 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2705 | "link for reset (errno=%d)\n", rc); | |
2706 | return rc; | |
2707 | } | |
2708 | } | |
2709 | ||
2710 | /* Wait for !BSY if the controller can wait for the first D2H | |
2711 | * Reg FIS and we don't know that no device is attached. | |
2712 | */ | |
2713 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2714 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2715 | ||
2716 | return 0; | |
2717 | } | |
2718 | ||
c2bd5804 TH |
2719 | /** |
2720 | * ata_std_softreset - reset host port via ATA SRST | |
2721 | * @ap: port to reset | |
c2bd5804 TH |
2722 | * @classes: resulting classes of attached devices |
2723 | * | |
52783c5d | 2724 | * Reset host port using ATA SRST. |
c2bd5804 TH |
2725 | * |
2726 | * LOCKING: | |
2727 | * Kernel thread context (may sleep) | |
2728 | * | |
2729 | * RETURNS: | |
2730 | * 0 on success, -errno otherwise. | |
2731 | */ | |
2bf2cb26 | 2732 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2733 | { |
2734 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2735 | unsigned int devmask = 0, err_mask; | |
2736 | u8 err; | |
2737 | ||
2738 | DPRINTK("ENTER\n"); | |
2739 | ||
81952c54 | 2740 | if (ata_port_offline(ap)) { |
3a39746a TH |
2741 | classes[0] = ATA_DEV_NONE; |
2742 | goto out; | |
2743 | } | |
2744 | ||
c2bd5804 TH |
2745 | /* determine if device 0/1 are present */ |
2746 | if (ata_devchk(ap, 0)) | |
2747 | devmask |= (1 << 0); | |
2748 | if (slave_possible && ata_devchk(ap, 1)) | |
2749 | devmask |= (1 << 1); | |
2750 | ||
c2bd5804 TH |
2751 | /* select device 0 again */ |
2752 | ap->ops->dev_select(ap, 0); | |
2753 | ||
2754 | /* issue bus reset */ | |
2755 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2756 | err_mask = ata_bus_softreset(ap, devmask); | |
2757 | if (err_mask) { | |
f15a1daf TH |
2758 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
2759 | err_mask); | |
c2bd5804 TH |
2760 | return -EIO; |
2761 | } | |
2762 | ||
2763 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2764 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2765 | if (slave_possible && err != 0x81) | |
2766 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
2767 | ||
3a39746a | 2768 | out: |
c2bd5804 TH |
2769 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
2770 | return 0; | |
2771 | } | |
2772 | ||
2773 | /** | |
2774 | * sata_std_hardreset - reset host port via SATA phy reset | |
2775 | * @ap: port to reset | |
c2bd5804 TH |
2776 | * @class: resulting class of attached device |
2777 | * | |
2778 | * SATA phy-reset host port using DET bits of SControl register. | |
c2bd5804 TH |
2779 | * |
2780 | * LOCKING: | |
2781 | * Kernel thread context (may sleep) | |
2782 | * | |
2783 | * RETURNS: | |
2784 | * 0 on success, -errno otherwise. | |
2785 | */ | |
2bf2cb26 | 2786 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) |
c2bd5804 | 2787 | { |
e9c83914 TH |
2788 | struct ata_eh_context *ehc = &ap->eh_context; |
2789 | const unsigned long *timing = sata_ehc_deb_timing(ehc); | |
852ee16a | 2790 | u32 scontrol; |
81952c54 | 2791 | int rc; |
852ee16a | 2792 | |
c2bd5804 TH |
2793 | DPRINTK("ENTER\n"); |
2794 | ||
3c567b7d | 2795 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
2796 | /* SATA spec says nothing about how to reconfigure |
2797 | * spd. To be on the safe side, turn off phy during | |
2798 | * reconfiguration. This works for at least ICH7 AHCI | |
2799 | * and Sil3124. | |
2800 | */ | |
81952c54 TH |
2801 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2802 | return rc; | |
2803 | ||
a34b6fc0 | 2804 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 TH |
2805 | |
2806 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2807 | return rc; | |
1c3fae4d | 2808 | |
3c567b7d | 2809 | sata_set_spd(ap); |
1c3fae4d TH |
2810 | } |
2811 | ||
2812 | /* issue phy wake/reset */ | |
81952c54 TH |
2813 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2814 | return rc; | |
2815 | ||
852ee16a | 2816 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
2817 | |
2818 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
2819 | return rc; | |
c2bd5804 | 2820 | |
1c3fae4d | 2821 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
2822 | * 10.4.2 says at least 1 ms. |
2823 | */ | |
2824 | msleep(1); | |
2825 | ||
1c3fae4d | 2826 | /* bring phy back */ |
e9c83914 | 2827 | sata_phy_resume(ap, timing); |
c2bd5804 | 2828 | |
c2bd5804 | 2829 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 2830 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
2831 | *class = ATA_DEV_NONE; |
2832 | DPRINTK("EXIT, link offline\n"); | |
2833 | return 0; | |
2834 | } | |
2835 | ||
2836 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
2837 | ata_port_printk(ap, KERN_ERR, |
2838 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
2839 | return -EIO; |
2840 | } | |
2841 | ||
3a39746a TH |
2842 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
2843 | ||
c2bd5804 TH |
2844 | *class = ata_dev_try_classify(ap, 0, NULL); |
2845 | ||
2846 | DPRINTK("EXIT, class=%u\n", *class); | |
2847 | return 0; | |
2848 | } | |
2849 | ||
2850 | /** | |
2851 | * ata_std_postreset - standard postreset callback | |
2852 | * @ap: the target ata_port | |
2853 | * @classes: classes of attached devices | |
2854 | * | |
2855 | * This function is invoked after a successful reset. Note that | |
2856 | * the device might have been reset more than once using | |
2857 | * different reset methods before postreset is invoked. | |
c2bd5804 | 2858 | * |
c2bd5804 TH |
2859 | * LOCKING: |
2860 | * Kernel thread context (may sleep) | |
2861 | */ | |
2862 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
2863 | { | |
dc2b3515 TH |
2864 | u32 serror; |
2865 | ||
c2bd5804 TH |
2866 | DPRINTK("ENTER\n"); |
2867 | ||
c2bd5804 | 2868 | /* print link status */ |
81952c54 | 2869 | sata_print_link_status(ap); |
c2bd5804 | 2870 | |
dc2b3515 TH |
2871 | /* clear SError */ |
2872 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
2873 | sata_scr_write(ap, SCR_ERROR, serror); | |
2874 | ||
3a39746a | 2875 | /* re-enable interrupts */ |
e3180499 TH |
2876 | if (!ap->ops->error_handler) { |
2877 | /* FIXME: hack. create a hook instead */ | |
2878 | if (ap->ioaddr.ctl_addr) | |
2879 | ata_irq_on(ap); | |
2880 | } | |
c2bd5804 TH |
2881 | |
2882 | /* is double-select really necessary? */ | |
2883 | if (classes[0] != ATA_DEV_NONE) | |
2884 | ap->ops->dev_select(ap, 1); | |
2885 | if (classes[1] != ATA_DEV_NONE) | |
2886 | ap->ops->dev_select(ap, 0); | |
2887 | ||
3a39746a TH |
2888 | /* bail out if no device is present */ |
2889 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
2890 | DPRINTK("EXIT, no device\n"); | |
2891 | return; | |
2892 | } | |
2893 | ||
2894 | /* set up device control */ | |
2895 | if (ap->ioaddr.ctl_addr) { | |
2896 | if (ap->flags & ATA_FLAG_MMIO) | |
2897 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
2898 | else | |
2899 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
2900 | } | |
c2bd5804 TH |
2901 | |
2902 | DPRINTK("EXIT\n"); | |
2903 | } | |
2904 | ||
623a3128 TH |
2905 | /** |
2906 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
2907 | * @dev: device to compare against |
2908 | * @new_class: class of the new device | |
2909 | * @new_id: IDENTIFY page of the new device | |
2910 | * | |
2911 | * Compare @new_class and @new_id against @dev and determine | |
2912 | * whether @dev is the device indicated by @new_class and | |
2913 | * @new_id. | |
2914 | * | |
2915 | * LOCKING: | |
2916 | * None. | |
2917 | * | |
2918 | * RETURNS: | |
2919 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
2920 | */ | |
3373efd8 TH |
2921 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
2922 | const u16 *new_id) | |
623a3128 TH |
2923 | { |
2924 | const u16 *old_id = dev->id; | |
2925 | unsigned char model[2][41], serial[2][21]; | |
2926 | u64 new_n_sectors; | |
2927 | ||
2928 | if (dev->class != new_class) { | |
f15a1daf TH |
2929 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
2930 | dev->class, new_class); | |
623a3128 TH |
2931 | return 0; |
2932 | } | |
2933 | ||
2934 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
2935 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
2936 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
2937 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
2938 | new_n_sectors = ata_id_n_sectors(new_id); | |
2939 | ||
2940 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
2941 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
2942 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
2943 | return 0; |
2944 | } | |
2945 | ||
2946 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
2947 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
2948 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
2949 | return 0; |
2950 | } | |
2951 | ||
2952 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
2953 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
2954 | "%llu != %llu\n", | |
2955 | (unsigned long long)dev->n_sectors, | |
2956 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
2957 | return 0; |
2958 | } | |
2959 | ||
2960 | return 1; | |
2961 | } | |
2962 | ||
2963 | /** | |
2964 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 TH |
2965 | * @dev: device to revalidate |
2966 | * @post_reset: is this revalidation after reset? | |
2967 | * | |
2968 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
2969 | * the port. | |
2970 | * | |
2971 | * LOCKING: | |
2972 | * Kernel thread context (may sleep) | |
2973 | * | |
2974 | * RETURNS: | |
2975 | * 0 on success, negative errno otherwise | |
2976 | */ | |
3373efd8 | 2977 | int ata_dev_revalidate(struct ata_device *dev, int post_reset) |
623a3128 | 2978 | { |
5eb45c02 | 2979 | unsigned int class = dev->class; |
f15a1daf | 2980 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
2981 | int rc; |
2982 | ||
5eb45c02 TH |
2983 | if (!ata_dev_enabled(dev)) { |
2984 | rc = -ENODEV; | |
2985 | goto fail; | |
2986 | } | |
623a3128 | 2987 | |
fe635c7e | 2988 | /* read ID data */ |
3373efd8 | 2989 | rc = ata_dev_read_id(dev, &class, post_reset, id); |
623a3128 TH |
2990 | if (rc) |
2991 | goto fail; | |
2992 | ||
2993 | /* is the device still there? */ | |
3373efd8 | 2994 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
2995 | rc = -ENODEV; |
2996 | goto fail; | |
2997 | } | |
2998 | ||
fe635c7e | 2999 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
3000 | |
3001 | /* configure device according to the new ID */ | |
3373efd8 | 3002 | rc = ata_dev_configure(dev, 0); |
5eb45c02 TH |
3003 | if (rc == 0) |
3004 | return 0; | |
623a3128 TH |
3005 | |
3006 | fail: | |
f15a1daf | 3007 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3008 | return rc; |
3009 | } | |
3010 | ||
98ac62de | 3011 | static const char * const ata_dma_blacklist [] = { |
f4b15fef AC |
3012 | "WDC AC11000H", NULL, |
3013 | "WDC AC22100H", NULL, | |
3014 | "WDC AC32500H", NULL, | |
3015 | "WDC AC33100H", NULL, | |
3016 | "WDC AC31600H", NULL, | |
3017 | "WDC AC32100H", "24.09P07", | |
3018 | "WDC AC23200L", "21.10N21", | |
3019 | "Compaq CRD-8241B", NULL, | |
3020 | "CRD-8400B", NULL, | |
3021 | "CRD-8480B", NULL, | |
3022 | "CRD-8482B", NULL, | |
3023 | "CRD-84", NULL, | |
3024 | "SanDisk SDP3B", NULL, | |
3025 | "SanDisk SDP3B-64", NULL, | |
3026 | "SANYO CD-ROM CRD", NULL, | |
3027 | "HITACHI CDR-8", NULL, | |
2e9edbf8 | 3028 | "HITACHI CDR-8335", NULL, |
f4b15fef | 3029 | "HITACHI CDR-8435", NULL, |
2e9edbf8 JG |
3030 | "Toshiba CD-ROM XM-6202B", NULL, |
3031 | "TOSHIBA CD-ROM XM-1702BC", NULL, | |
3032 | "CD-532E-A", NULL, | |
3033 | "E-IDE CD-ROM CR-840", NULL, | |
3034 | "CD-ROM Drive/F5A", NULL, | |
3035 | "WPI CDD-820", NULL, | |
f4b15fef | 3036 | "SAMSUNG CD-ROM SC-148C", NULL, |
2e9edbf8 | 3037 | "SAMSUNG CD-ROM SC", NULL, |
f4b15fef AC |
3038 | "SanDisk SDP3B-64", NULL, |
3039 | "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL, | |
3040 | "_NEC DV5800A", NULL, | |
3041 | "SAMSUNG CD-ROM SN-124", "N001" | |
1da177e4 | 3042 | }; |
2e9edbf8 | 3043 | |
f4b15fef AC |
3044 | static int ata_strim(char *s, size_t len) |
3045 | { | |
3046 | len = strnlen(s, len); | |
3047 | ||
3048 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
3049 | while ((len > 0) && (s[len - 1] == ' ')) { | |
3050 | len--; | |
3051 | s[len] = 0; | |
3052 | } | |
3053 | return len; | |
3054 | } | |
1da177e4 | 3055 | |
057ace5e | 3056 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 | 3057 | { |
f4b15fef AC |
3058 | unsigned char model_num[40]; |
3059 | unsigned char model_rev[16]; | |
3060 | unsigned int nlen, rlen; | |
1da177e4 LT |
3061 | int i; |
3062 | ||
3a778275 AL |
3063 | /* We don't support polling DMA. |
3064 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3065 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3066 | */ | |
3067 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3068 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3069 | return 1; | |
3070 | ||
f4b15fef AC |
3071 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
3072 | sizeof(model_num)); | |
3073 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
3074 | sizeof(model_rev)); | |
3075 | nlen = ata_strim(model_num, sizeof(model_num)); | |
3076 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 3077 | |
f4b15fef AC |
3078 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) { |
3079 | if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) { | |
3080 | if (ata_dma_blacklist[i+1] == NULL) | |
3081 | return 1; | |
3082 | if (!strncmp(ata_dma_blacklist[i], model_rev, rlen)) | |
3083 | return 1; | |
3084 | } | |
3085 | } | |
1da177e4 LT |
3086 | return 0; |
3087 | } | |
3088 | ||
a6d5a51c TH |
3089 | /** |
3090 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3091 | * @dev: Device to compute xfermask for |
3092 | * | |
acf356b1 TH |
3093 | * Compute supported xfermask of @dev and store it in |
3094 | * dev->*_mask. This function is responsible for applying all | |
3095 | * known limits including host controller limits, device | |
3096 | * blacklist, etc... | |
a6d5a51c TH |
3097 | * |
3098 | * LOCKING: | |
3099 | * None. | |
a6d5a51c | 3100 | */ |
3373efd8 | 3101 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3102 | { |
3373efd8 | 3103 | struct ata_port *ap = dev->ap; |
cca3974e | 3104 | struct ata_host *host = ap->host; |
a6d5a51c | 3105 | unsigned long xfer_mask; |
1da177e4 | 3106 | |
37deecb5 | 3107 | /* controller modes available */ |
565083e1 TH |
3108 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3109 | ap->mwdma_mask, ap->udma_mask); | |
3110 | ||
3111 | /* Apply cable rule here. Don't apply it early because when | |
3112 | * we handle hot plug the cable type can itself change. | |
3113 | */ | |
3114 | if (ap->cbl == ATA_CBL_PATA40) | |
3115 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
1da177e4 | 3116 | |
37deecb5 TH |
3117 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
3118 | dev->mwdma_mask, dev->udma_mask); | |
3119 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 3120 | |
b352e57d AC |
3121 | /* |
3122 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
3123 | * cable | |
3124 | */ | |
3125 | if (ata_dev_pair(dev)) { | |
3126 | /* No PIO5 or PIO6 */ | |
3127 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
3128 | /* No MWDMA3 or MWDMA 4 */ | |
3129 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
3130 | } | |
3131 | ||
37deecb5 TH |
3132 | if (ata_dma_blacklisted(dev)) { |
3133 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
3134 | ata_dev_printk(dev, KERN_WARNING, |
3135 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 3136 | } |
a6d5a51c | 3137 | |
cca3974e | 3138 | if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) { |
37deecb5 TH |
3139 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
3140 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
3141 | "other device, disabling DMA\n"); | |
5444a6f4 | 3142 | } |
565083e1 | 3143 | |
5444a6f4 AC |
3144 | if (ap->ops->mode_filter) |
3145 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3146 | ||
565083e1 TH |
3147 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3148 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3149 | } |
3150 | ||
1da177e4 LT |
3151 | /** |
3152 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3153 | * @dev: Device to which command will be sent |
3154 | * | |
780a87f7 JG |
3155 | * Issue SET FEATURES - XFER MODE command to device @dev |
3156 | * on port @ap. | |
3157 | * | |
1da177e4 | 3158 | * LOCKING: |
0cba632b | 3159 | * PCI/etc. bus probe sem. |
83206a29 TH |
3160 | * |
3161 | * RETURNS: | |
3162 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3163 | */ |
3164 | ||
3373efd8 | 3165 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3166 | { |
a0123703 | 3167 | struct ata_taskfile tf; |
83206a29 | 3168 | unsigned int err_mask; |
1da177e4 LT |
3169 | |
3170 | /* set up set-features taskfile */ | |
3171 | DPRINTK("set features - xfer mode\n"); | |
3172 | ||
3373efd8 | 3173 | ata_tf_init(dev, &tf); |
a0123703 TH |
3174 | tf.command = ATA_CMD_SET_FEATURES; |
3175 | tf.feature = SETFEATURES_XFER; | |
3176 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3177 | tf.protocol = ATA_PROT_NODATA; | |
3178 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3179 | |
3373efd8 | 3180 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3181 | |
83206a29 TH |
3182 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3183 | return err_mask; | |
1da177e4 LT |
3184 | } |
3185 | ||
8bf62ece AL |
3186 | /** |
3187 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3188 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3189 | * @heads: Number of heads (taskfile parameter) |
3190 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3191 | * |
3192 | * LOCKING: | |
6aff8f1f TH |
3193 | * Kernel thread context (may sleep) |
3194 | * | |
3195 | * RETURNS: | |
3196 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3197 | */ |
3373efd8 TH |
3198 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3199 | u16 heads, u16 sectors) | |
8bf62ece | 3200 | { |
a0123703 | 3201 | struct ata_taskfile tf; |
6aff8f1f | 3202 | unsigned int err_mask; |
8bf62ece AL |
3203 | |
3204 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3205 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3206 | return AC_ERR_INVALID; |
8bf62ece AL |
3207 | |
3208 | /* set up init dev params taskfile */ | |
3209 | DPRINTK("init dev params \n"); | |
3210 | ||
3373efd8 | 3211 | ata_tf_init(dev, &tf); |
a0123703 TH |
3212 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3213 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3214 | tf.protocol = ATA_PROT_NODATA; | |
3215 | tf.nsect = sectors; | |
3216 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3217 | |
3373efd8 | 3218 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3219 | |
6aff8f1f TH |
3220 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3221 | return err_mask; | |
8bf62ece AL |
3222 | } |
3223 | ||
1da177e4 | 3224 | /** |
0cba632b JG |
3225 | * ata_sg_clean - Unmap DMA memory associated with command |
3226 | * @qc: Command containing DMA memory to be released | |
3227 | * | |
3228 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3229 | * |
3230 | * LOCKING: | |
cca3974e | 3231 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3232 | */ |
3233 | ||
3234 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
3235 | { | |
3236 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3237 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3238 | int dir = qc->dma_dir; |
cedc9a47 | 3239 | void *pad_buf = NULL; |
1da177e4 | 3240 | |
a4631474 TH |
3241 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3242 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3243 | |
3244 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3245 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3246 | |
2c13b7ce | 3247 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3248 | |
cedc9a47 JG |
3249 | /* if we padded the buffer out to 32-bit bound, and data |
3250 | * xfer direction is from-device, we must copy from the | |
3251 | * pad buffer back into the supplied buffer | |
3252 | */ | |
3253 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3254 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3255 | ||
3256 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3257 | if (qc->n_elem) |
2f1f610b | 3258 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3259 | /* restore last sg */ |
3260 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3261 | if (pad_buf) { | |
3262 | struct scatterlist *psg = &qc->pad_sgent; | |
3263 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3264 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3265 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3266 | } |
3267 | } else { | |
2e242fa9 | 3268 | if (qc->n_elem) |
2f1f610b | 3269 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3270 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3271 | dir); | |
cedc9a47 JG |
3272 | /* restore sg */ |
3273 | sg->length += qc->pad_len; | |
3274 | if (pad_buf) | |
3275 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3276 | pad_buf, qc->pad_len); | |
3277 | } | |
1da177e4 LT |
3278 | |
3279 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3280 | qc->__sg = NULL; |
1da177e4 LT |
3281 | } |
3282 | ||
3283 | /** | |
3284 | * ata_fill_sg - Fill PCI IDE PRD table | |
3285 | * @qc: Metadata associated with taskfile to be transferred | |
3286 | * | |
780a87f7 JG |
3287 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3288 | * associated with the current disk command. | |
3289 | * | |
1da177e4 | 3290 | * LOCKING: |
cca3974e | 3291 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3292 | * |
3293 | */ | |
3294 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3295 | { | |
1da177e4 | 3296 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3297 | struct scatterlist *sg; |
3298 | unsigned int idx; | |
1da177e4 | 3299 | |
a4631474 | 3300 | WARN_ON(qc->__sg == NULL); |
f131883e | 3301 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3302 | |
3303 | idx = 0; | |
cedc9a47 | 3304 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3305 | u32 addr, offset; |
3306 | u32 sg_len, len; | |
3307 | ||
3308 | /* determine if physical DMA addr spans 64K boundary. | |
3309 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3310 | * truncate dma_addr_t to u32. | |
3311 | */ | |
3312 | addr = (u32) sg_dma_address(sg); | |
3313 | sg_len = sg_dma_len(sg); | |
3314 | ||
3315 | while (sg_len) { | |
3316 | offset = addr & 0xffff; | |
3317 | len = sg_len; | |
3318 | if ((offset + sg_len) > 0x10000) | |
3319 | len = 0x10000 - offset; | |
3320 | ||
3321 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3322 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3323 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3324 | ||
3325 | idx++; | |
3326 | sg_len -= len; | |
3327 | addr += len; | |
3328 | } | |
3329 | } | |
3330 | ||
3331 | if (idx) | |
3332 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3333 | } | |
3334 | /** | |
3335 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3336 | * @qc: Metadata associated with taskfile to check | |
3337 | * | |
780a87f7 JG |
3338 | * Allow low-level driver to filter ATA PACKET commands, returning |
3339 | * a status indicating whether or not it is OK to use DMA for the | |
3340 | * supplied PACKET command. | |
3341 | * | |
1da177e4 | 3342 | * LOCKING: |
cca3974e | 3343 | * spin_lock_irqsave(host lock) |
0cba632b | 3344 | * |
1da177e4 LT |
3345 | * RETURNS: 0 when ATAPI DMA can be used |
3346 | * nonzero otherwise | |
3347 | */ | |
3348 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3349 | { | |
3350 | struct ata_port *ap = qc->ap; | |
3351 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3352 | ||
3353 | if (ap->ops->check_atapi_dma) | |
3354 | rc = ap->ops->check_atapi_dma(qc); | |
3355 | ||
3356 | return rc; | |
3357 | } | |
3358 | /** | |
3359 | * ata_qc_prep - Prepare taskfile for submission | |
3360 | * @qc: Metadata associated with taskfile to be prepared | |
3361 | * | |
780a87f7 JG |
3362 | * Prepare ATA taskfile for submission. |
3363 | * | |
1da177e4 | 3364 | * LOCKING: |
cca3974e | 3365 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3366 | */ |
3367 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3368 | { | |
3369 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3370 | return; | |
3371 | ||
3372 | ata_fill_sg(qc); | |
3373 | } | |
3374 | ||
e46834cd BK |
3375 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3376 | ||
0cba632b JG |
3377 | /** |
3378 | * ata_sg_init_one - Associate command with memory buffer | |
3379 | * @qc: Command to be associated | |
3380 | * @buf: Memory buffer | |
3381 | * @buflen: Length of memory buffer, in bytes. | |
3382 | * | |
3383 | * Initialize the data-related elements of queued_cmd @qc | |
3384 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3385 | * | |
3386 | * LOCKING: | |
cca3974e | 3387 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3388 | */ |
3389 | ||
1da177e4 LT |
3390 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3391 | { | |
3392 | struct scatterlist *sg; | |
3393 | ||
3394 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3395 | ||
3396 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 3397 | qc->__sg = &qc->sgent; |
1da177e4 | 3398 | qc->n_elem = 1; |
cedc9a47 | 3399 | qc->orig_n_elem = 1; |
1da177e4 | 3400 | qc->buf_virt = buf; |
233277ca | 3401 | qc->nbytes = buflen; |
1da177e4 | 3402 | |
cedc9a47 | 3403 | sg = qc->__sg; |
f0612bbc | 3404 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
3405 | } |
3406 | ||
0cba632b JG |
3407 | /** |
3408 | * ata_sg_init - Associate command with scatter-gather table. | |
3409 | * @qc: Command to be associated | |
3410 | * @sg: Scatter-gather table. | |
3411 | * @n_elem: Number of elements in s/g table. | |
3412 | * | |
3413 | * Initialize the data-related elements of queued_cmd @qc | |
3414 | * to point to a scatter-gather table @sg, containing @n_elem | |
3415 | * elements. | |
3416 | * | |
3417 | * LOCKING: | |
cca3974e | 3418 | * spin_lock_irqsave(host lock) |
0cba632b JG |
3419 | */ |
3420 | ||
1da177e4 LT |
3421 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3422 | unsigned int n_elem) | |
3423 | { | |
3424 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3425 | qc->__sg = sg; |
1da177e4 | 3426 | qc->n_elem = n_elem; |
cedc9a47 | 3427 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3428 | } |
3429 | ||
3430 | /** | |
0cba632b JG |
3431 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3432 | * @qc: Command with memory buffer to be mapped. | |
3433 | * | |
3434 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3435 | * |
3436 | * LOCKING: | |
cca3974e | 3437 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3438 | * |
3439 | * RETURNS: | |
0cba632b | 3440 | * Zero on success, negative on error. |
1da177e4 LT |
3441 | */ |
3442 | ||
3443 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3444 | { | |
3445 | struct ata_port *ap = qc->ap; | |
3446 | int dir = qc->dma_dir; | |
cedc9a47 | 3447 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3448 | dma_addr_t dma_address; |
2e242fa9 | 3449 | int trim_sg = 0; |
1da177e4 | 3450 | |
cedc9a47 JG |
3451 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3452 | qc->pad_len = sg->length & 3; | |
3453 | if (qc->pad_len) { | |
3454 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3455 | struct scatterlist *psg = &qc->pad_sgent; | |
3456 | ||
a4631474 | 3457 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3458 | |
3459 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3460 | ||
3461 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3462 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3463 | qc->pad_len); | |
3464 | ||
3465 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3466 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3467 | /* trim sg */ | |
3468 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3469 | if (sg->length == 0) |
3470 | trim_sg = 1; | |
cedc9a47 JG |
3471 | |
3472 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3473 | sg->length, qc->pad_len); | |
3474 | } | |
3475 | ||
2e242fa9 TH |
3476 | if (trim_sg) { |
3477 | qc->n_elem--; | |
e1410f2d JG |
3478 | goto skip_map; |
3479 | } | |
3480 | ||
2f1f610b | 3481 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3482 | sg->length, dir); |
537a95d9 TH |
3483 | if (dma_mapping_error(dma_address)) { |
3484 | /* restore sg */ | |
3485 | sg->length += qc->pad_len; | |
1da177e4 | 3486 | return -1; |
537a95d9 | 3487 | } |
1da177e4 LT |
3488 | |
3489 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3490 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3491 | |
2e242fa9 | 3492 | skip_map: |
1da177e4 LT |
3493 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3494 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3495 | ||
3496 | return 0; | |
3497 | } | |
3498 | ||
3499 | /** | |
0cba632b JG |
3500 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3501 | * @qc: Command with scatter-gather table to be mapped. | |
3502 | * | |
3503 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3504 | * |
3505 | * LOCKING: | |
cca3974e | 3506 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
3507 | * |
3508 | * RETURNS: | |
0cba632b | 3509 | * Zero on success, negative on error. |
1da177e4 LT |
3510 | * |
3511 | */ | |
3512 | ||
3513 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3514 | { | |
3515 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3516 | struct scatterlist *sg = qc->__sg; |
3517 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3518 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3519 | |
3520 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3521 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3522 | |
cedc9a47 JG |
3523 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3524 | qc->pad_len = lsg->length & 3; | |
3525 | if (qc->pad_len) { | |
3526 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3527 | struct scatterlist *psg = &qc->pad_sgent; | |
3528 | unsigned int offset; | |
3529 | ||
a4631474 | 3530 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3531 | |
3532 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3533 | ||
3534 | /* | |
3535 | * psg->page/offset are used to copy to-be-written | |
3536 | * data in this function or read data in ata_sg_clean. | |
3537 | */ | |
3538 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3539 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3540 | psg->offset = offset_in_page(offset); | |
3541 | ||
3542 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3543 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3544 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3545 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3546 | } |
3547 | ||
3548 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3549 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3550 | /* trim last sg */ | |
3551 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3552 | if (lsg->length == 0) |
3553 | trim_sg = 1; | |
cedc9a47 JG |
3554 | |
3555 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3556 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3557 | } | |
3558 | ||
e1410f2d JG |
3559 | pre_n_elem = qc->n_elem; |
3560 | if (trim_sg && pre_n_elem) | |
3561 | pre_n_elem--; | |
3562 | ||
3563 | if (!pre_n_elem) { | |
3564 | n_elem = 0; | |
3565 | goto skip_map; | |
3566 | } | |
3567 | ||
1da177e4 | 3568 | dir = qc->dma_dir; |
2f1f610b | 3569 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3570 | if (n_elem < 1) { |
3571 | /* restore last sg */ | |
3572 | lsg->length += qc->pad_len; | |
1da177e4 | 3573 | return -1; |
537a95d9 | 3574 | } |
1da177e4 LT |
3575 | |
3576 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3577 | ||
e1410f2d | 3578 | skip_map: |
1da177e4 LT |
3579 | qc->n_elem = n_elem; |
3580 | ||
3581 | return 0; | |
3582 | } | |
3583 | ||
0baab86b | 3584 | /** |
c893a3ae | 3585 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3586 | * @buf: Buffer to swap |
3587 | * @buf_words: Number of 16-bit words in buffer. | |
3588 | * | |
3589 | * Swap halves of 16-bit words if needed to convert from | |
3590 | * little-endian byte order to native cpu byte order, or | |
3591 | * vice-versa. | |
3592 | * | |
3593 | * LOCKING: | |
6f0ef4fa | 3594 | * Inherited from caller. |
0baab86b | 3595 | */ |
1da177e4 LT |
3596 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3597 | { | |
3598 | #ifdef __BIG_ENDIAN | |
3599 | unsigned int i; | |
3600 | ||
3601 | for (i = 0; i < buf_words; i++) | |
3602 | buf[i] = le16_to_cpu(buf[i]); | |
3603 | #endif /* __BIG_ENDIAN */ | |
3604 | } | |
3605 | ||
6ae4cfb5 AL |
3606 | /** |
3607 | * ata_mmio_data_xfer - Transfer data by MMIO | |
bf717b11 | 3608 | * @adev: device for this I/O |
6ae4cfb5 AL |
3609 | * @buf: data buffer |
3610 | * @buflen: buffer length | |
344babaa | 3611 | * @write_data: read/write |
6ae4cfb5 AL |
3612 | * |
3613 | * Transfer data from/to the device data register by MMIO. | |
3614 | * | |
3615 | * LOCKING: | |
3616 | * Inherited from caller. | |
6ae4cfb5 AL |
3617 | */ |
3618 | ||
88574551 | 3619 | void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3620 | unsigned int buflen, int write_data) |
1da177e4 | 3621 | { |
a6b2c5d4 | 3622 | struct ata_port *ap = adev->ap; |
1da177e4 LT |
3623 | unsigned int i; |
3624 | unsigned int words = buflen >> 1; | |
3625 | u16 *buf16 = (u16 *) buf; | |
3626 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3627 | ||
6ae4cfb5 | 3628 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3629 | if (write_data) { |
3630 | for (i = 0; i < words; i++) | |
3631 | writew(le16_to_cpu(buf16[i]), mmio); | |
3632 | } else { | |
3633 | for (i = 0; i < words; i++) | |
3634 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3635 | } | |
6ae4cfb5 AL |
3636 | |
3637 | /* Transfer trailing 1 byte, if any. */ | |
3638 | if (unlikely(buflen & 0x01)) { | |
3639 | u16 align_buf[1] = { 0 }; | |
3640 | unsigned char *trailing_buf = buf + buflen - 1; | |
3641 | ||
3642 | if (write_data) { | |
3643 | memcpy(align_buf, trailing_buf, 1); | |
3644 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3645 | } else { | |
3646 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3647 | memcpy(trailing_buf, align_buf, 1); | |
3648 | } | |
3649 | } | |
1da177e4 LT |
3650 | } |
3651 | ||
6ae4cfb5 AL |
3652 | /** |
3653 | * ata_pio_data_xfer - Transfer data by PIO | |
a6b2c5d4 | 3654 | * @adev: device to target |
6ae4cfb5 AL |
3655 | * @buf: data buffer |
3656 | * @buflen: buffer length | |
344babaa | 3657 | * @write_data: read/write |
6ae4cfb5 AL |
3658 | * |
3659 | * Transfer data from/to the device data register by PIO. | |
3660 | * | |
3661 | * LOCKING: | |
3662 | * Inherited from caller. | |
6ae4cfb5 AL |
3663 | */ |
3664 | ||
88574551 | 3665 | void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3666 | unsigned int buflen, int write_data) |
1da177e4 | 3667 | { |
a6b2c5d4 | 3668 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 3669 | unsigned int words = buflen >> 1; |
1da177e4 | 3670 | |
6ae4cfb5 | 3671 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3672 | if (write_data) |
6ae4cfb5 | 3673 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3674 | else |
6ae4cfb5 AL |
3675 | insw(ap->ioaddr.data_addr, buf, words); |
3676 | ||
3677 | /* Transfer trailing 1 byte, if any. */ | |
3678 | if (unlikely(buflen & 0x01)) { | |
3679 | u16 align_buf[1] = { 0 }; | |
3680 | unsigned char *trailing_buf = buf + buflen - 1; | |
3681 | ||
3682 | if (write_data) { | |
3683 | memcpy(align_buf, trailing_buf, 1); | |
3684 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3685 | } else { | |
3686 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3687 | memcpy(trailing_buf, align_buf, 1); | |
3688 | } | |
3689 | } | |
1da177e4 LT |
3690 | } |
3691 | ||
75e99585 AC |
3692 | /** |
3693 | * ata_pio_data_xfer_noirq - Transfer data by PIO | |
3694 | * @adev: device to target | |
3695 | * @buf: data buffer | |
3696 | * @buflen: buffer length | |
3697 | * @write_data: read/write | |
3698 | * | |
88574551 | 3699 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
3700 | * transfer with interrupts disabled. |
3701 | * | |
3702 | * LOCKING: | |
3703 | * Inherited from caller. | |
3704 | */ | |
3705 | ||
3706 | void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
3707 | unsigned int buflen, int write_data) | |
3708 | { | |
3709 | unsigned long flags; | |
3710 | local_irq_save(flags); | |
3711 | ata_pio_data_xfer(adev, buf, buflen, write_data); | |
3712 | local_irq_restore(flags); | |
3713 | } | |
3714 | ||
3715 | ||
6ae4cfb5 AL |
3716 | /** |
3717 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3718 | * @qc: Command on going | |
3719 | * | |
3720 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3721 | * | |
3722 | * LOCKING: | |
3723 | * Inherited from caller. | |
3724 | */ | |
3725 | ||
1da177e4 LT |
3726 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3727 | { | |
3728 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3729 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3730 | struct ata_port *ap = qc->ap; |
3731 | struct page *page; | |
3732 | unsigned int offset; | |
3733 | unsigned char *buf; | |
3734 | ||
3735 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3736 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3737 | |
3738 | page = sg[qc->cursg].page; | |
3739 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3740 | ||
3741 | /* get the current page and offset */ | |
3742 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3743 | offset %= PAGE_SIZE; | |
3744 | ||
1da177e4 LT |
3745 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3746 | ||
91b8b313 AL |
3747 | if (PageHighMem(page)) { |
3748 | unsigned long flags; | |
3749 | ||
a6b2c5d4 | 3750 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
3751 | local_irq_save(flags); |
3752 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3753 | |
91b8b313 | 3754 | /* do the actual data transfer */ |
a6b2c5d4 | 3755 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 3756 | |
91b8b313 AL |
3757 | kunmap_atomic(buf, KM_IRQ0); |
3758 | local_irq_restore(flags); | |
3759 | } else { | |
3760 | buf = page_address(page); | |
a6b2c5d4 | 3761 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
91b8b313 | 3762 | } |
1da177e4 LT |
3763 | |
3764 | qc->cursect++; | |
3765 | qc->cursg_ofs++; | |
3766 | ||
32529e01 | 3767 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3768 | qc->cursg++; |
3769 | qc->cursg_ofs = 0; | |
3770 | } | |
1da177e4 | 3771 | } |
1da177e4 | 3772 | |
07f6f7d0 AL |
3773 | /** |
3774 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
3775 | * @qc: Command on going | |
3776 | * | |
c81e29b4 | 3777 | * Transfer one or many ATA_SECT_SIZE of data from/to the |
07f6f7d0 AL |
3778 | * ATA device for the DRQ request. |
3779 | * | |
3780 | * LOCKING: | |
3781 | * Inherited from caller. | |
3782 | */ | |
1da177e4 | 3783 | |
07f6f7d0 AL |
3784 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
3785 | { | |
3786 | if (is_multi_taskfile(&qc->tf)) { | |
3787 | /* READ/WRITE MULTIPLE */ | |
3788 | unsigned int nsect; | |
3789 | ||
587005de | 3790 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 3791 | |
07f6f7d0 AL |
3792 | nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); |
3793 | while (nsect--) | |
3794 | ata_pio_sector(qc); | |
3795 | } else | |
3796 | ata_pio_sector(qc); | |
3797 | } | |
3798 | ||
c71c1857 AL |
3799 | /** |
3800 | * atapi_send_cdb - Write CDB bytes to hardware | |
3801 | * @ap: Port to which ATAPI device is attached. | |
3802 | * @qc: Taskfile currently active | |
3803 | * | |
3804 | * When device has indicated its readiness to accept | |
3805 | * a CDB, this function is called. Send the CDB. | |
3806 | * | |
3807 | * LOCKING: | |
3808 | * caller. | |
3809 | */ | |
3810 | ||
3811 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
3812 | { | |
3813 | /* send SCSI cdb */ | |
3814 | DPRINTK("send cdb\n"); | |
db024d53 | 3815 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 3816 | |
a6b2c5d4 | 3817 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
3818 | ata_altstatus(ap); /* flush */ |
3819 | ||
3820 | switch (qc->tf.protocol) { | |
3821 | case ATA_PROT_ATAPI: | |
3822 | ap->hsm_task_state = HSM_ST; | |
3823 | break; | |
3824 | case ATA_PROT_ATAPI_NODATA: | |
3825 | ap->hsm_task_state = HSM_ST_LAST; | |
3826 | break; | |
3827 | case ATA_PROT_ATAPI_DMA: | |
3828 | ap->hsm_task_state = HSM_ST_LAST; | |
3829 | /* initiate bmdma */ | |
3830 | ap->ops->bmdma_start(qc); | |
3831 | break; | |
3832 | } | |
1da177e4 LT |
3833 | } |
3834 | ||
6ae4cfb5 AL |
3835 | /** |
3836 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3837 | * @qc: Command on going | |
3838 | * @bytes: number of bytes | |
3839 | * | |
3840 | * Transfer Transfer data from/to the ATAPI device. | |
3841 | * | |
3842 | * LOCKING: | |
3843 | * Inherited from caller. | |
3844 | * | |
3845 | */ | |
3846 | ||
1da177e4 LT |
3847 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3848 | { | |
3849 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3850 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3851 | struct ata_port *ap = qc->ap; |
3852 | struct page *page; | |
3853 | unsigned char *buf; | |
3854 | unsigned int offset, count; | |
3855 | ||
563a6e1f | 3856 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3857 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3858 | |
3859 | next_sg: | |
563a6e1f | 3860 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3861 | /* |
563a6e1f AL |
3862 | * The end of qc->sg is reached and the device expects |
3863 | * more data to transfer. In order not to overrun qc->sg | |
3864 | * and fulfill length specified in the byte count register, | |
3865 | * - for read case, discard trailing data from the device | |
3866 | * - for write case, padding zero data to the device | |
3867 | */ | |
3868 | u16 pad_buf[1] = { 0 }; | |
3869 | unsigned int words = bytes >> 1; | |
3870 | unsigned int i; | |
3871 | ||
3872 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
3873 | ata_dev_printk(qc->dev, KERN_WARNING, |
3874 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
3875 | |
3876 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 3877 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 3878 | |
14be71f4 | 3879 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3880 | return; |
3881 | } | |
3882 | ||
cedc9a47 | 3883 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3884 | |
1da177e4 LT |
3885 | page = sg->page; |
3886 | offset = sg->offset + qc->cursg_ofs; | |
3887 | ||
3888 | /* get the current page and offset */ | |
3889 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3890 | offset %= PAGE_SIZE; | |
3891 | ||
6952df03 | 3892 | /* don't overrun current sg */ |
32529e01 | 3893 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3894 | |
3895 | /* don't cross page boundaries */ | |
3896 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3897 | ||
7282aa4b AL |
3898 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3899 | ||
91b8b313 AL |
3900 | if (PageHighMem(page)) { |
3901 | unsigned long flags; | |
3902 | ||
a6b2c5d4 | 3903 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
3904 | local_irq_save(flags); |
3905 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3906 | |
91b8b313 | 3907 | /* do the actual data transfer */ |
a6b2c5d4 | 3908 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 3909 | |
91b8b313 AL |
3910 | kunmap_atomic(buf, KM_IRQ0); |
3911 | local_irq_restore(flags); | |
3912 | } else { | |
3913 | buf = page_address(page); | |
a6b2c5d4 | 3914 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 3915 | } |
1da177e4 LT |
3916 | |
3917 | bytes -= count; | |
3918 | qc->curbytes += count; | |
3919 | qc->cursg_ofs += count; | |
3920 | ||
32529e01 | 3921 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3922 | qc->cursg++; |
3923 | qc->cursg_ofs = 0; | |
3924 | } | |
3925 | ||
563a6e1f | 3926 | if (bytes) |
1da177e4 | 3927 | goto next_sg; |
1da177e4 LT |
3928 | } |
3929 | ||
6ae4cfb5 AL |
3930 | /** |
3931 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3932 | * @qc: Command on going | |
3933 | * | |
3934 | * Transfer Transfer data from/to the ATAPI device. | |
3935 | * | |
3936 | * LOCKING: | |
3937 | * Inherited from caller. | |
6ae4cfb5 AL |
3938 | */ |
3939 | ||
1da177e4 LT |
3940 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3941 | { | |
3942 | struct ata_port *ap = qc->ap; | |
3943 | struct ata_device *dev = qc->dev; | |
3944 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3945 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3946 | ||
eec4c3f3 AL |
3947 | /* Abuse qc->result_tf for temp storage of intermediate TF |
3948 | * here to save some kernel stack usage. | |
3949 | * For normal completion, qc->result_tf is not relevant. For | |
3950 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
3951 | * So, the correctness of qc->result_tf is not affected. | |
3952 | */ | |
3953 | ap->ops->tf_read(ap, &qc->result_tf); | |
3954 | ireason = qc->result_tf.nsect; | |
3955 | bc_lo = qc->result_tf.lbam; | |
3956 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
3957 | bytes = (bc_hi << 8) | bc_lo; |
3958 | ||
3959 | /* shall be cleared to zero, indicating xfer of data */ | |
3960 | if (ireason & (1 << 0)) | |
3961 | goto err_out; | |
3962 | ||
3963 | /* make sure transfer direction matches expected */ | |
3964 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3965 | if (do_write != i_write) | |
3966 | goto err_out; | |
3967 | ||
312f7da2 AL |
3968 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
3969 | ||
1da177e4 LT |
3970 | __atapi_pio_bytes(qc, bytes); |
3971 | ||
3972 | return; | |
3973 | ||
3974 | err_out: | |
f15a1daf | 3975 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 3976 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3977 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3978 | } |
3979 | ||
3980 | /** | |
c234fb00 AL |
3981 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
3982 | * @ap: the target ata_port | |
3983 | * @qc: qc on going | |
1da177e4 | 3984 | * |
c234fb00 AL |
3985 | * RETURNS: |
3986 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 3987 | */ |
c234fb00 AL |
3988 | |
3989 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 3990 | { |
c234fb00 AL |
3991 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3992 | return 1; | |
1da177e4 | 3993 | |
c234fb00 AL |
3994 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
3995 | if (qc->tf.protocol == ATA_PROT_PIO && | |
3996 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
3997 | return 1; | |
1da177e4 | 3998 | |
c234fb00 AL |
3999 | if (is_atapi_taskfile(&qc->tf) && |
4000 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4001 | return 1; | |
fe79e683 AL |
4002 | } |
4003 | ||
c234fb00 AL |
4004 | return 0; |
4005 | } | |
1da177e4 | 4006 | |
c17ea20d TH |
4007 | /** |
4008 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4009 | * @qc: Command to complete | |
4010 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4011 | * | |
4012 | * Finish @qc which is running on standard HSM. | |
4013 | * | |
4014 | * LOCKING: | |
cca3974e | 4015 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
4016 | * Otherwise, none on entry and grabs host lock. |
4017 | */ | |
4018 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4019 | { | |
4020 | struct ata_port *ap = qc->ap; | |
4021 | unsigned long flags; | |
4022 | ||
4023 | if (ap->ops->error_handler) { | |
4024 | if (in_wq) { | |
ba6a1308 | 4025 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 4026 | |
cca3974e JG |
4027 | /* EH might have kicked in while host lock is |
4028 | * released. | |
c17ea20d TH |
4029 | */ |
4030 | qc = ata_qc_from_tag(ap, qc->tag); | |
4031 | if (qc) { | |
4032 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
4033 | ata_irq_on(ap); | |
4034 | ata_qc_complete(qc); | |
4035 | } else | |
4036 | ata_port_freeze(ap); | |
4037 | } | |
4038 | ||
ba6a1308 | 4039 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4040 | } else { |
4041 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4042 | ata_qc_complete(qc); | |
4043 | else | |
4044 | ata_port_freeze(ap); | |
4045 | } | |
4046 | } else { | |
4047 | if (in_wq) { | |
ba6a1308 | 4048 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d TH |
4049 | ata_irq_on(ap); |
4050 | ata_qc_complete(qc); | |
ba6a1308 | 4051 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4052 | } else |
4053 | ata_qc_complete(qc); | |
4054 | } | |
1da177e4 | 4055 | |
c81e29b4 | 4056 | ata_altstatus(ap); /* flush */ |
c17ea20d TH |
4057 | } |
4058 | ||
bb5cb290 AL |
4059 | /** |
4060 | * ata_hsm_move - move the HSM to the next state. | |
4061 | * @ap: the target ata_port | |
4062 | * @qc: qc on going | |
4063 | * @status: current device status | |
4064 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4065 | * | |
4066 | * RETURNS: | |
4067 | * 1 when poll next status needed, 0 otherwise. | |
4068 | */ | |
9a1004d0 TH |
4069 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4070 | u8 status, int in_wq) | |
e2cec771 | 4071 | { |
bb5cb290 AL |
4072 | unsigned long flags = 0; |
4073 | int poll_next; | |
4074 | ||
6912ccd5 AL |
4075 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4076 | ||
bb5cb290 AL |
4077 | /* Make sure ata_qc_issue_prot() does not throw things |
4078 | * like DMA polling into the workqueue. Notice that | |
4079 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4080 | */ | |
c234fb00 | 4081 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4082 | |
e2cec771 | 4083 | fsm_start: |
999bb6f4 AL |
4084 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4085 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
4086 | ||
e2cec771 AL |
4087 | switch (ap->hsm_task_state) { |
4088 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4089 | /* Send first data block or PACKET CDB */ |
4090 | ||
4091 | /* If polling, we will stay in the work queue after | |
4092 | * sending the data. Otherwise, interrupt handler | |
4093 | * takes over after sending the data. | |
4094 | */ | |
4095 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4096 | ||
e2cec771 | 4097 | /* check device status */ |
3655d1d3 AL |
4098 | if (unlikely((status & ATA_DRQ) == 0)) { |
4099 | /* handle BSY=0, DRQ=0 as error */ | |
4100 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4101 | /* device stops HSM for abort/error */ | |
4102 | qc->err_mask |= AC_ERR_DEV; | |
4103 | else | |
4104 | /* HSM violation. Let EH handle this */ | |
4105 | qc->err_mask |= AC_ERR_HSM; | |
4106 | ||
14be71f4 | 4107 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4108 | goto fsm_start; |
1da177e4 LT |
4109 | } |
4110 | ||
71601958 AL |
4111 | /* Device should not ask for data transfer (DRQ=1) |
4112 | * when it finds something wrong. | |
eee6c32f AL |
4113 | * We ignore DRQ here and stop the HSM by |
4114 | * changing hsm_task_state to HSM_ST_ERR and | |
4115 | * let the EH abort the command or reset the device. | |
71601958 AL |
4116 | */ |
4117 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4118 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4119 | ap->id, status); | |
3655d1d3 | 4120 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4121 | ap->hsm_task_state = HSM_ST_ERR; |
4122 | goto fsm_start; | |
71601958 | 4123 | } |
1da177e4 | 4124 | |
bb5cb290 AL |
4125 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4126 | * During the state transition, interrupt handler shouldn't | |
4127 | * be invoked before the data transfer is complete and | |
4128 | * hsm_task_state is changed. Hence, the following locking. | |
4129 | */ | |
4130 | if (in_wq) | |
ba6a1308 | 4131 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 4132 | |
bb5cb290 AL |
4133 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4134 | /* PIO data out protocol. | |
4135 | * send first data block. | |
4136 | */ | |
0565c26d | 4137 | |
bb5cb290 AL |
4138 | /* ata_pio_sectors() might change the state |
4139 | * to HSM_ST_LAST. so, the state is changed here | |
4140 | * before ata_pio_sectors(). | |
4141 | */ | |
4142 | ap->hsm_task_state = HSM_ST; | |
4143 | ata_pio_sectors(qc); | |
4144 | ata_altstatus(ap); /* flush */ | |
4145 | } else | |
4146 | /* send CDB */ | |
4147 | atapi_send_cdb(ap, qc); | |
4148 | ||
4149 | if (in_wq) | |
ba6a1308 | 4150 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
4151 | |
4152 | /* if polling, ata_pio_task() handles the rest. | |
4153 | * otherwise, interrupt handler takes over from here. | |
4154 | */ | |
e2cec771 | 4155 | break; |
1c848984 | 4156 | |
e2cec771 AL |
4157 | case HSM_ST: |
4158 | /* complete command or read/write the data register */ | |
4159 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4160 | /* ATAPI PIO protocol */ | |
4161 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4162 | /* No more data to transfer or device error. |
4163 | * Device error will be tagged in HSM_ST_LAST. | |
4164 | */ | |
e2cec771 AL |
4165 | ap->hsm_task_state = HSM_ST_LAST; |
4166 | goto fsm_start; | |
4167 | } | |
1da177e4 | 4168 | |
71601958 AL |
4169 | /* Device should not ask for data transfer (DRQ=1) |
4170 | * when it finds something wrong. | |
eee6c32f AL |
4171 | * We ignore DRQ here and stop the HSM by |
4172 | * changing hsm_task_state to HSM_ST_ERR and | |
4173 | * let the EH abort the command or reset the device. | |
71601958 AL |
4174 | */ |
4175 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4176 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4177 | ap->id, status); | |
3655d1d3 | 4178 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4179 | ap->hsm_task_state = HSM_ST_ERR; |
4180 | goto fsm_start; | |
71601958 | 4181 | } |
1da177e4 | 4182 | |
e2cec771 | 4183 | atapi_pio_bytes(qc); |
7fb6ec28 | 4184 | |
e2cec771 AL |
4185 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4186 | /* bad ireason reported by device */ | |
4187 | goto fsm_start; | |
1da177e4 | 4188 | |
e2cec771 AL |
4189 | } else { |
4190 | /* ATA PIO protocol */ | |
4191 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4192 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4193 | if (likely(status & (ATA_ERR | ATA_DF))) |
4194 | /* device stops HSM for abort/error */ | |
4195 | qc->err_mask |= AC_ERR_DEV; | |
4196 | else | |
4197 | /* HSM violation. Let EH handle this */ | |
4198 | qc->err_mask |= AC_ERR_HSM; | |
4199 | ||
e2cec771 AL |
4200 | ap->hsm_task_state = HSM_ST_ERR; |
4201 | goto fsm_start; | |
4202 | } | |
1da177e4 | 4203 | |
eee6c32f AL |
4204 | /* For PIO reads, some devices may ask for |
4205 | * data transfer (DRQ=1) alone with ERR=1. | |
4206 | * We respect DRQ here and transfer one | |
4207 | * block of junk data before changing the | |
4208 | * hsm_task_state to HSM_ST_ERR. | |
4209 | * | |
4210 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4211 | * sense since the data block has been | |
4212 | * transferred to the device. | |
71601958 AL |
4213 | */ |
4214 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4215 | /* data might be corrputed */ |
4216 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4217 | |
4218 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4219 | ata_pio_sectors(qc); | |
4220 | ata_altstatus(ap); | |
4221 | status = ata_wait_idle(ap); | |
4222 | } | |
4223 | ||
3655d1d3 AL |
4224 | if (status & (ATA_BUSY | ATA_DRQ)) |
4225 | qc->err_mask |= AC_ERR_HSM; | |
4226 | ||
eee6c32f AL |
4227 | /* ata_pio_sectors() might change the |
4228 | * state to HSM_ST_LAST. so, the state | |
4229 | * is changed after ata_pio_sectors(). | |
4230 | */ | |
4231 | ap->hsm_task_state = HSM_ST_ERR; | |
4232 | goto fsm_start; | |
71601958 AL |
4233 | } |
4234 | ||
e2cec771 AL |
4235 | ata_pio_sectors(qc); |
4236 | ||
4237 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4238 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4239 | /* all data read */ | |
4240 | ata_altstatus(ap); | |
52a32205 | 4241 | status = ata_wait_idle(ap); |
e2cec771 AL |
4242 | goto fsm_start; |
4243 | } | |
4244 | } | |
4245 | ||
4246 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 4247 | poll_next = 1; |
1da177e4 LT |
4248 | break; |
4249 | ||
14be71f4 | 4250 | case HSM_ST_LAST: |
6912ccd5 AL |
4251 | if (unlikely(!ata_ok(status))) { |
4252 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
4253 | ap->hsm_task_state = HSM_ST_ERR; |
4254 | goto fsm_start; | |
4255 | } | |
4256 | ||
4257 | /* no more data to transfer */ | |
4332a771 AL |
4258 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
4259 | ap->id, qc->dev->devno, status); | |
e2cec771 | 4260 | |
6912ccd5 AL |
4261 | WARN_ON(qc->err_mask); |
4262 | ||
e2cec771 | 4263 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 4264 | |
e2cec771 | 4265 | /* complete taskfile transaction */ |
c17ea20d | 4266 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4267 | |
4268 | poll_next = 0; | |
1da177e4 LT |
4269 | break; |
4270 | ||
14be71f4 | 4271 | case HSM_ST_ERR: |
e2cec771 AL |
4272 | /* make sure qc->err_mask is available to |
4273 | * know what's wrong and recover | |
4274 | */ | |
4275 | WARN_ON(qc->err_mask == 0); | |
4276 | ||
4277 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 4278 | |
999bb6f4 | 4279 | /* complete taskfile transaction */ |
c17ea20d | 4280 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4281 | |
4282 | poll_next = 0; | |
e2cec771 AL |
4283 | break; |
4284 | default: | |
bb5cb290 | 4285 | poll_next = 0; |
6912ccd5 | 4286 | BUG(); |
1da177e4 LT |
4287 | } |
4288 | ||
bb5cb290 | 4289 | return poll_next; |
1da177e4 LT |
4290 | } |
4291 | ||
1da177e4 | 4292 | static void ata_pio_task(void *_data) |
8061f5f0 | 4293 | { |
c91af2c8 TH |
4294 | struct ata_queued_cmd *qc = _data; |
4295 | struct ata_port *ap = qc->ap; | |
8061f5f0 | 4296 | u8 status; |
a1af3734 | 4297 | int poll_next; |
8061f5f0 | 4298 | |
7fb6ec28 | 4299 | fsm_start: |
a1af3734 | 4300 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 4301 | |
a1af3734 AL |
4302 | /* |
4303 | * This is purely heuristic. This is a fast path. | |
4304 | * Sometimes when we enter, BSY will be cleared in | |
4305 | * a chk-status or two. If not, the drive is probably seeking | |
4306 | * or something. Snooze for a couple msecs, then | |
4307 | * chk-status again. If still busy, queue delayed work. | |
4308 | */ | |
4309 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4310 | if (status & ATA_BUSY) { | |
4311 | msleep(2); | |
4312 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4313 | if (status & ATA_BUSY) { | |
31ce6dae | 4314 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
4315 | return; |
4316 | } | |
8061f5f0 TH |
4317 | } |
4318 | ||
a1af3734 AL |
4319 | /* move the HSM */ |
4320 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 4321 | |
a1af3734 AL |
4322 | /* another command or interrupt handler |
4323 | * may be running at this point. | |
4324 | */ | |
4325 | if (poll_next) | |
7fb6ec28 | 4326 | goto fsm_start; |
8061f5f0 TH |
4327 | } |
4328 | ||
1da177e4 LT |
4329 | /** |
4330 | * ata_qc_new - Request an available ATA command, for queueing | |
4331 | * @ap: Port associated with device @dev | |
4332 | * @dev: Device from whom we request an available command structure | |
4333 | * | |
4334 | * LOCKING: | |
0cba632b | 4335 | * None. |
1da177e4 LT |
4336 | */ |
4337 | ||
4338 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4339 | { | |
4340 | struct ata_queued_cmd *qc = NULL; | |
4341 | unsigned int i; | |
4342 | ||
e3180499 | 4343 | /* no command while frozen */ |
b51e9e5d | 4344 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
4345 | return NULL; |
4346 | ||
2ab7db1f TH |
4347 | /* the last tag is reserved for internal command. */ |
4348 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 4349 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 4350 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
4351 | break; |
4352 | } | |
4353 | ||
4354 | if (qc) | |
4355 | qc->tag = i; | |
4356 | ||
4357 | return qc; | |
4358 | } | |
4359 | ||
4360 | /** | |
4361 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4362 | * @dev: Device from whom we request an available command structure |
4363 | * | |
4364 | * LOCKING: | |
0cba632b | 4365 | * None. |
1da177e4 LT |
4366 | */ |
4367 | ||
3373efd8 | 4368 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4369 | { |
3373efd8 | 4370 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4371 | struct ata_queued_cmd *qc; |
4372 | ||
4373 | qc = ata_qc_new(ap); | |
4374 | if (qc) { | |
1da177e4 LT |
4375 | qc->scsicmd = NULL; |
4376 | qc->ap = ap; | |
4377 | qc->dev = dev; | |
1da177e4 | 4378 | |
2c13b7ce | 4379 | ata_qc_reinit(qc); |
1da177e4 LT |
4380 | } |
4381 | ||
4382 | return qc; | |
4383 | } | |
4384 | ||
1da177e4 LT |
4385 | /** |
4386 | * ata_qc_free - free unused ata_queued_cmd | |
4387 | * @qc: Command to complete | |
4388 | * | |
4389 | * Designed to free unused ata_queued_cmd object | |
4390 | * in case something prevents using it. | |
4391 | * | |
4392 | * LOCKING: | |
cca3974e | 4393 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4394 | */ |
4395 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4396 | { | |
4ba946e9 TH |
4397 | struct ata_port *ap = qc->ap; |
4398 | unsigned int tag; | |
4399 | ||
a4631474 | 4400 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4401 | |
4ba946e9 TH |
4402 | qc->flags = 0; |
4403 | tag = qc->tag; | |
4404 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 4405 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 4406 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 4407 | } |
1da177e4 LT |
4408 | } |
4409 | ||
76014427 | 4410 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4411 | { |
dedaf2b0 TH |
4412 | struct ata_port *ap = qc->ap; |
4413 | ||
a4631474 TH |
4414 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4415 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4416 | |
4417 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4418 | ata_sg_clean(qc); | |
4419 | ||
7401abf2 | 4420 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
4421 | if (qc->tf.protocol == ATA_PROT_NCQ) |
4422 | ap->sactive &= ~(1 << qc->tag); | |
4423 | else | |
4424 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 4425 | |
3f3791d3 AL |
4426 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4427 | * from completing the command twice later, before the error handler | |
4428 | * is called. (when rc != 0 and atapi request sense is needed) | |
4429 | */ | |
4430 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 4431 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 4432 | |
1da177e4 | 4433 | /* call completion callback */ |
77853bf2 | 4434 | qc->complete_fn(qc); |
1da177e4 LT |
4435 | } |
4436 | ||
f686bcb8 TH |
4437 | /** |
4438 | * ata_qc_complete - Complete an active ATA command | |
4439 | * @qc: Command to complete | |
4440 | * @err_mask: ATA Status register contents | |
4441 | * | |
4442 | * Indicate to the mid and upper layers that an ATA | |
4443 | * command has completed, with either an ok or not-ok status. | |
4444 | * | |
4445 | * LOCKING: | |
cca3974e | 4446 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
4447 | */ |
4448 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4449 | { | |
4450 | struct ata_port *ap = qc->ap; | |
4451 | ||
4452 | /* XXX: New EH and old EH use different mechanisms to | |
4453 | * synchronize EH with regular execution path. | |
4454 | * | |
4455 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4456 | * Normal execution path is responsible for not accessing a | |
4457 | * failed qc. libata core enforces the rule by returning NULL | |
4458 | * from ata_qc_from_tag() for failed qcs. | |
4459 | * | |
4460 | * Old EH depends on ata_qc_complete() nullifying completion | |
4461 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4462 | * not synchronize with interrupt handler. Only PIO task is | |
4463 | * taken care of. | |
4464 | */ | |
4465 | if (ap->ops->error_handler) { | |
b51e9e5d | 4466 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
4467 | |
4468 | if (unlikely(qc->err_mask)) | |
4469 | qc->flags |= ATA_QCFLAG_FAILED; | |
4470 | ||
4471 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4472 | if (!ata_tag_internal(qc->tag)) { | |
4473 | /* always fill result TF for failed qc */ | |
4474 | ap->ops->tf_read(ap, &qc->result_tf); | |
4475 | ata_qc_schedule_eh(qc); | |
4476 | return; | |
4477 | } | |
4478 | } | |
4479 | ||
4480 | /* read result TF if requested */ | |
4481 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
4482 | ap->ops->tf_read(ap, &qc->result_tf); | |
4483 | ||
4484 | __ata_qc_complete(qc); | |
4485 | } else { | |
4486 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4487 | return; | |
4488 | ||
4489 | /* read result TF if failed or requested */ | |
4490 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
4491 | ap->ops->tf_read(ap, &qc->result_tf); | |
4492 | ||
4493 | __ata_qc_complete(qc); | |
4494 | } | |
4495 | } | |
4496 | ||
dedaf2b0 TH |
4497 | /** |
4498 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4499 | * @ap: port in question | |
4500 | * @qc_active: new qc_active mask | |
4501 | * @finish_qc: LLDD callback invoked before completing a qc | |
4502 | * | |
4503 | * Complete in-flight commands. This functions is meant to be | |
4504 | * called from low-level driver's interrupt routine to complete | |
4505 | * requests normally. ap->qc_active and @qc_active is compared | |
4506 | * and commands are completed accordingly. | |
4507 | * | |
4508 | * LOCKING: | |
cca3974e | 4509 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
4510 | * |
4511 | * RETURNS: | |
4512 | * Number of completed commands on success, -errno otherwise. | |
4513 | */ | |
4514 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4515 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4516 | { | |
4517 | int nr_done = 0; | |
4518 | u32 done_mask; | |
4519 | int i; | |
4520 | ||
4521 | done_mask = ap->qc_active ^ qc_active; | |
4522 | ||
4523 | if (unlikely(done_mask & qc_active)) { | |
4524 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4525 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4526 | return -EINVAL; | |
4527 | } | |
4528 | ||
4529 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4530 | struct ata_queued_cmd *qc; | |
4531 | ||
4532 | if (!(done_mask & (1 << i))) | |
4533 | continue; | |
4534 | ||
4535 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4536 | if (finish_qc) | |
4537 | finish_qc(qc); | |
4538 | ata_qc_complete(qc); | |
4539 | nr_done++; | |
4540 | } | |
4541 | } | |
4542 | ||
4543 | return nr_done; | |
4544 | } | |
4545 | ||
1da177e4 LT |
4546 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
4547 | { | |
4548 | struct ata_port *ap = qc->ap; | |
4549 | ||
4550 | switch (qc->tf.protocol) { | |
3dc1d881 | 4551 | case ATA_PROT_NCQ: |
1da177e4 LT |
4552 | case ATA_PROT_DMA: |
4553 | case ATA_PROT_ATAPI_DMA: | |
4554 | return 1; | |
4555 | ||
4556 | case ATA_PROT_ATAPI: | |
4557 | case ATA_PROT_PIO: | |
1da177e4 LT |
4558 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4559 | return 1; | |
4560 | ||
4561 | /* fall through */ | |
4562 | ||
4563 | default: | |
4564 | return 0; | |
4565 | } | |
4566 | ||
4567 | /* never reached */ | |
4568 | } | |
4569 | ||
4570 | /** | |
4571 | * ata_qc_issue - issue taskfile to device | |
4572 | * @qc: command to issue to device | |
4573 | * | |
4574 | * Prepare an ATA command to submission to device. | |
4575 | * This includes mapping the data into a DMA-able | |
4576 | * area, filling in the S/G table, and finally | |
4577 | * writing the taskfile to hardware, starting the command. | |
4578 | * | |
4579 | * LOCKING: | |
cca3974e | 4580 | * spin_lock_irqsave(host lock) |
1da177e4 | 4581 | */ |
8e0e694a | 4582 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4583 | { |
4584 | struct ata_port *ap = qc->ap; | |
4585 | ||
dedaf2b0 TH |
4586 | /* Make sure only one non-NCQ command is outstanding. The |
4587 | * check is skipped for old EH because it reuses active qc to | |
4588 | * request ATAPI sense. | |
4589 | */ | |
4590 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4591 | ||
4592 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4593 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4594 | ap->sactive |= 1 << qc->tag; | |
4595 | } else { | |
4596 | WARN_ON(ap->sactive); | |
4597 | ap->active_tag = qc->tag; | |
4598 | } | |
4599 | ||
e4a70e76 | 4600 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 4601 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 4602 | |
1da177e4 LT |
4603 | if (ata_should_dma_map(qc)) { |
4604 | if (qc->flags & ATA_QCFLAG_SG) { | |
4605 | if (ata_sg_setup(qc)) | |
8e436af9 | 4606 | goto sg_err; |
1da177e4 LT |
4607 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4608 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4609 | goto sg_err; |
1da177e4 LT |
4610 | } |
4611 | } else { | |
4612 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4613 | } | |
4614 | ||
4615 | ap->ops->qc_prep(qc); | |
4616 | ||
8e0e694a TH |
4617 | qc->err_mask |= ap->ops->qc_issue(qc); |
4618 | if (unlikely(qc->err_mask)) | |
4619 | goto err; | |
4620 | return; | |
1da177e4 | 4621 | |
8e436af9 TH |
4622 | sg_err: |
4623 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4624 | qc->err_mask |= AC_ERR_SYSTEM; |
4625 | err: | |
4626 | ata_qc_complete(qc); | |
1da177e4 LT |
4627 | } |
4628 | ||
4629 | /** | |
4630 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4631 | * @qc: command to issue to device | |
4632 | * | |
4633 | * Using various libata functions and hooks, this function | |
4634 | * starts an ATA command. ATA commands are grouped into | |
4635 | * classes called "protocols", and issuing each type of protocol | |
4636 | * is slightly different. | |
4637 | * | |
0baab86b EF |
4638 | * May be used as the qc_issue() entry in ata_port_operations. |
4639 | * | |
1da177e4 | 4640 | * LOCKING: |
cca3974e | 4641 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4642 | * |
4643 | * RETURNS: | |
9a3d9eb0 | 4644 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4645 | */ |
4646 | ||
9a3d9eb0 | 4647 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4648 | { |
4649 | struct ata_port *ap = qc->ap; | |
4650 | ||
e50362ec AL |
4651 | /* Use polling pio if the LLD doesn't handle |
4652 | * interrupt driven pio and atapi CDB interrupt. | |
4653 | */ | |
4654 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4655 | switch (qc->tf.protocol) { | |
4656 | case ATA_PROT_PIO: | |
4657 | case ATA_PROT_ATAPI: | |
4658 | case ATA_PROT_ATAPI_NODATA: | |
4659 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4660 | break; | |
4661 | case ATA_PROT_ATAPI_DMA: | |
4662 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 4663 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
4664 | BUG(); |
4665 | break; | |
4666 | default: | |
4667 | break; | |
4668 | } | |
4669 | } | |
4670 | ||
312f7da2 | 4671 | /* select the device */ |
1da177e4 LT |
4672 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
4673 | ||
312f7da2 | 4674 | /* start the command */ |
1da177e4 LT |
4675 | switch (qc->tf.protocol) { |
4676 | case ATA_PROT_NODATA: | |
312f7da2 AL |
4677 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4678 | ata_qc_set_polling(qc); | |
4679 | ||
e5338254 | 4680 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
4681 | ap->hsm_task_state = HSM_ST_LAST; |
4682 | ||
4683 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4684 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 4685 | |
1da177e4 LT |
4686 | break; |
4687 | ||
4688 | case ATA_PROT_DMA: | |
587005de | 4689 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4690 | |
1da177e4 LT |
4691 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4692 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
4693 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 4694 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4695 | break; |
4696 | ||
312f7da2 AL |
4697 | case ATA_PROT_PIO: |
4698 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
4699 | ata_qc_set_polling(qc); | |
1da177e4 | 4700 | |
e5338254 | 4701 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 4702 | |
54f00389 AL |
4703 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
4704 | /* PIO data out protocol */ | |
4705 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 4706 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4707 | |
4708 | /* always send first data block using | |
e27486db | 4709 | * the ata_pio_task() codepath. |
54f00389 | 4710 | */ |
312f7da2 | 4711 | } else { |
54f00389 AL |
4712 | /* PIO data in protocol */ |
4713 | ap->hsm_task_state = HSM_ST; | |
4714 | ||
4715 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4716 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4717 | |
4718 | /* if polling, ata_pio_task() handles the rest. | |
4719 | * otherwise, interrupt handler takes over from here. | |
4720 | */ | |
312f7da2 AL |
4721 | } |
4722 | ||
1da177e4 LT |
4723 | break; |
4724 | ||
1da177e4 | 4725 | case ATA_PROT_ATAPI: |
1da177e4 | 4726 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
4727 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4728 | ata_qc_set_polling(qc); | |
4729 | ||
e5338254 | 4730 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 4731 | |
312f7da2 AL |
4732 | ap->hsm_task_state = HSM_ST_FIRST; |
4733 | ||
4734 | /* send cdb by polling if no cdb interrupt */ | |
4735 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
4736 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 4737 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4738 | break; |
4739 | ||
4740 | case ATA_PROT_ATAPI_DMA: | |
587005de | 4741 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4742 | |
1da177e4 LT |
4743 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4744 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
4745 | ap->hsm_task_state = HSM_ST_FIRST; |
4746 | ||
4747 | /* send cdb by polling if no cdb interrupt */ | |
4748 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 4749 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4750 | break; |
4751 | ||
4752 | default: | |
4753 | WARN_ON(1); | |
9a3d9eb0 | 4754 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4755 | } |
4756 | ||
4757 | return 0; | |
4758 | } | |
4759 | ||
1da177e4 LT |
4760 | /** |
4761 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4762 | * @ap: Port on which interrupt arrived (possibly...) | |
4763 | * @qc: Taskfile currently active in engine | |
4764 | * | |
4765 | * Handle host interrupt for given queued command. Currently, | |
4766 | * only DMA interrupts are handled. All other commands are | |
4767 | * handled via polling with interrupts disabled (nIEN bit). | |
4768 | * | |
4769 | * LOCKING: | |
cca3974e | 4770 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4771 | * |
4772 | * RETURNS: | |
4773 | * One if interrupt was handled, zero if not (shared irq). | |
4774 | */ | |
4775 | ||
4776 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4777 | struct ata_queued_cmd *qc) | |
4778 | { | |
312f7da2 | 4779 | u8 status, host_stat = 0; |
1da177e4 | 4780 | |
312f7da2 AL |
4781 | VPRINTK("ata%u: protocol %d task_state %d\n", |
4782 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 4783 | |
312f7da2 AL |
4784 | /* Check whether we are expecting interrupt in this state */ |
4785 | switch (ap->hsm_task_state) { | |
4786 | case HSM_ST_FIRST: | |
6912ccd5 AL |
4787 | /* Some pre-ATAPI-4 devices assert INTRQ |
4788 | * at this state when ready to receive CDB. | |
4789 | */ | |
1da177e4 | 4790 | |
312f7da2 AL |
4791 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
4792 | * The flag was turned on only for atapi devices. | |
4793 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
4794 | */ | |
4795 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 4796 | goto idle_irq; |
1da177e4 | 4797 | break; |
312f7da2 AL |
4798 | case HSM_ST_LAST: |
4799 | if (qc->tf.protocol == ATA_PROT_DMA || | |
4800 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
4801 | /* check status of DMA engine */ | |
4802 | host_stat = ap->ops->bmdma_status(ap); | |
4803 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4804 | ||
4805 | /* if it's not our irq... */ | |
4806 | if (!(host_stat & ATA_DMA_INTR)) | |
4807 | goto idle_irq; | |
4808 | ||
4809 | /* before we do anything else, clear DMA-Start bit */ | |
4810 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
4811 | |
4812 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
4813 | /* error when transfering data to/from memory */ | |
4814 | qc->err_mask |= AC_ERR_HOST_BUS; | |
4815 | ap->hsm_task_state = HSM_ST_ERR; | |
4816 | } | |
312f7da2 AL |
4817 | } |
4818 | break; | |
4819 | case HSM_ST: | |
4820 | break; | |
1da177e4 LT |
4821 | default: |
4822 | goto idle_irq; | |
4823 | } | |
4824 | ||
312f7da2 AL |
4825 | /* check altstatus */ |
4826 | status = ata_altstatus(ap); | |
4827 | if (status & ATA_BUSY) | |
4828 | goto idle_irq; | |
1da177e4 | 4829 | |
312f7da2 AL |
4830 | /* check main status, clearing INTRQ */ |
4831 | status = ata_chk_status(ap); | |
4832 | if (unlikely(status & ATA_BUSY)) | |
4833 | goto idle_irq; | |
1da177e4 | 4834 | |
312f7da2 AL |
4835 | /* ack bmdma irq events */ |
4836 | ap->ops->irq_clear(ap); | |
1da177e4 | 4837 | |
bb5cb290 | 4838 | ata_hsm_move(ap, qc, status, 0); |
1da177e4 LT |
4839 | return 1; /* irq handled */ |
4840 | ||
4841 | idle_irq: | |
4842 | ap->stats.idle_irq++; | |
4843 | ||
4844 | #ifdef ATA_IRQ_TRAP | |
4845 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 4846 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 4847 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 4848 | return 1; |
1da177e4 LT |
4849 | } |
4850 | #endif | |
4851 | return 0; /* irq not handled */ | |
4852 | } | |
4853 | ||
4854 | /** | |
4855 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 4856 | * @irq: irq line (unused) |
cca3974e | 4857 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 LT |
4858 | * @regs: unused |
4859 | * | |
0cba632b JG |
4860 | * Default interrupt handler for PCI IDE devices. Calls |
4861 | * ata_host_intr() for each port that is not disabled. | |
4862 | * | |
1da177e4 | 4863 | * LOCKING: |
cca3974e | 4864 | * Obtains host lock during operation. |
1da177e4 LT |
4865 | * |
4866 | * RETURNS: | |
0cba632b | 4867 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4868 | */ |
4869 | ||
4870 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4871 | { | |
cca3974e | 4872 | struct ata_host *host = dev_instance; |
1da177e4 LT |
4873 | unsigned int i; |
4874 | unsigned int handled = 0; | |
4875 | unsigned long flags; | |
4876 | ||
4877 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 4878 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 4879 | |
cca3974e | 4880 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
4881 | struct ata_port *ap; |
4882 | ||
cca3974e | 4883 | ap = host->ports[i]; |
c1389503 | 4884 | if (ap && |
029f5468 | 4885 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
4886 | struct ata_queued_cmd *qc; |
4887 | ||
4888 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 4889 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 4890 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
4891 | handled |= ata_host_intr(ap, qc); |
4892 | } | |
4893 | } | |
4894 | ||
cca3974e | 4895 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
4896 | |
4897 | return IRQ_RETVAL(handled); | |
4898 | } | |
4899 | ||
34bf2170 TH |
4900 | /** |
4901 | * sata_scr_valid - test whether SCRs are accessible | |
4902 | * @ap: ATA port to test SCR accessibility for | |
4903 | * | |
4904 | * Test whether SCRs are accessible for @ap. | |
4905 | * | |
4906 | * LOCKING: | |
4907 | * None. | |
4908 | * | |
4909 | * RETURNS: | |
4910 | * 1 if SCRs are accessible, 0 otherwise. | |
4911 | */ | |
4912 | int sata_scr_valid(struct ata_port *ap) | |
4913 | { | |
4914 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
4915 | } | |
4916 | ||
4917 | /** | |
4918 | * sata_scr_read - read SCR register of the specified port | |
4919 | * @ap: ATA port to read SCR for | |
4920 | * @reg: SCR to read | |
4921 | * @val: Place to store read value | |
4922 | * | |
4923 | * Read SCR register @reg of @ap into *@val. This function is | |
4924 | * guaranteed to succeed if the cable type of the port is SATA | |
4925 | * and the port implements ->scr_read. | |
4926 | * | |
4927 | * LOCKING: | |
4928 | * None. | |
4929 | * | |
4930 | * RETURNS: | |
4931 | * 0 on success, negative errno on failure. | |
4932 | */ | |
4933 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
4934 | { | |
4935 | if (sata_scr_valid(ap)) { | |
4936 | *val = ap->ops->scr_read(ap, reg); | |
4937 | return 0; | |
4938 | } | |
4939 | return -EOPNOTSUPP; | |
4940 | } | |
4941 | ||
4942 | /** | |
4943 | * sata_scr_write - write SCR register of the specified port | |
4944 | * @ap: ATA port to write SCR for | |
4945 | * @reg: SCR to write | |
4946 | * @val: value to write | |
4947 | * | |
4948 | * Write @val to SCR register @reg of @ap. This function is | |
4949 | * guaranteed to succeed if the cable type of the port is SATA | |
4950 | * and the port implements ->scr_read. | |
4951 | * | |
4952 | * LOCKING: | |
4953 | * None. | |
4954 | * | |
4955 | * RETURNS: | |
4956 | * 0 on success, negative errno on failure. | |
4957 | */ | |
4958 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
4959 | { | |
4960 | if (sata_scr_valid(ap)) { | |
4961 | ap->ops->scr_write(ap, reg, val); | |
4962 | return 0; | |
4963 | } | |
4964 | return -EOPNOTSUPP; | |
4965 | } | |
4966 | ||
4967 | /** | |
4968 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
4969 | * @ap: ATA port to write SCR for | |
4970 | * @reg: SCR to write | |
4971 | * @val: value to write | |
4972 | * | |
4973 | * This function is identical to sata_scr_write() except that this | |
4974 | * function performs flush after writing to the register. | |
4975 | * | |
4976 | * LOCKING: | |
4977 | * None. | |
4978 | * | |
4979 | * RETURNS: | |
4980 | * 0 on success, negative errno on failure. | |
4981 | */ | |
4982 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
4983 | { | |
4984 | if (sata_scr_valid(ap)) { | |
4985 | ap->ops->scr_write(ap, reg, val); | |
4986 | ap->ops->scr_read(ap, reg); | |
4987 | return 0; | |
4988 | } | |
4989 | return -EOPNOTSUPP; | |
4990 | } | |
4991 | ||
4992 | /** | |
4993 | * ata_port_online - test whether the given port is online | |
4994 | * @ap: ATA port to test | |
4995 | * | |
4996 | * Test whether @ap is online. Note that this function returns 0 | |
4997 | * if online status of @ap cannot be obtained, so | |
4998 | * ata_port_online(ap) != !ata_port_offline(ap). | |
4999 | * | |
5000 | * LOCKING: | |
5001 | * None. | |
5002 | * | |
5003 | * RETURNS: | |
5004 | * 1 if the port online status is available and online. | |
5005 | */ | |
5006 | int ata_port_online(struct ata_port *ap) | |
5007 | { | |
5008 | u32 sstatus; | |
5009 | ||
5010 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5011 | return 1; | |
5012 | return 0; | |
5013 | } | |
5014 | ||
5015 | /** | |
5016 | * ata_port_offline - test whether the given port is offline | |
5017 | * @ap: ATA port to test | |
5018 | * | |
5019 | * Test whether @ap is offline. Note that this function returns | |
5020 | * 0 if offline status of @ap cannot be obtained, so | |
5021 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5022 | * | |
5023 | * LOCKING: | |
5024 | * None. | |
5025 | * | |
5026 | * RETURNS: | |
5027 | * 1 if the port offline status is available and offline. | |
5028 | */ | |
5029 | int ata_port_offline(struct ata_port *ap) | |
5030 | { | |
5031 | u32 sstatus; | |
5032 | ||
5033 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5034 | return 1; | |
5035 | return 0; | |
5036 | } | |
0baab86b | 5037 | |
77b08fb5 | 5038 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 5039 | { |
977e6b9f | 5040 | unsigned int err_mask; |
9b847548 JA |
5041 | u8 cmd; |
5042 | ||
5043 | if (!ata_try_flush_cache(dev)) | |
5044 | return 0; | |
5045 | ||
5046 | if (ata_id_has_flush_ext(dev->id)) | |
5047 | cmd = ATA_CMD_FLUSH_EXT; | |
5048 | else | |
5049 | cmd = ATA_CMD_FLUSH; | |
5050 | ||
977e6b9f TH |
5051 | err_mask = ata_do_simple_cmd(dev, cmd); |
5052 | if (err_mask) { | |
5053 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5054 | return -EIO; | |
5055 | } | |
5056 | ||
5057 | return 0; | |
9b847548 JA |
5058 | } |
5059 | ||
cca3974e JG |
5060 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
5061 | unsigned int action, unsigned int ehi_flags, | |
5062 | int wait) | |
500530f6 TH |
5063 | { |
5064 | unsigned long flags; | |
5065 | int i, rc; | |
5066 | ||
cca3974e JG |
5067 | for (i = 0; i < host->n_ports; i++) { |
5068 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5069 | |
5070 | /* Previous resume operation might still be in | |
5071 | * progress. Wait for PM_PENDING to clear. | |
5072 | */ | |
5073 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5074 | ata_port_wait_eh(ap); | |
5075 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5076 | } | |
5077 | ||
5078 | /* request PM ops to EH */ | |
5079 | spin_lock_irqsave(ap->lock, flags); | |
5080 | ||
5081 | ap->pm_mesg = mesg; | |
5082 | if (wait) { | |
5083 | rc = 0; | |
5084 | ap->pm_result = &rc; | |
5085 | } | |
5086 | ||
5087 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5088 | ap->eh_info.action |= action; | |
5089 | ap->eh_info.flags |= ehi_flags; | |
5090 | ||
5091 | ata_port_schedule_eh(ap); | |
5092 | ||
5093 | spin_unlock_irqrestore(ap->lock, flags); | |
5094 | ||
5095 | /* wait and check result */ | |
5096 | if (wait) { | |
5097 | ata_port_wait_eh(ap); | |
5098 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5099 | if (rc) | |
5100 | return rc; | |
5101 | } | |
5102 | } | |
5103 | ||
5104 | return 0; | |
5105 | } | |
5106 | ||
5107 | /** | |
cca3974e JG |
5108 | * ata_host_suspend - suspend host |
5109 | * @host: host to suspend | |
500530f6 TH |
5110 | * @mesg: PM message |
5111 | * | |
cca3974e | 5112 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
5113 | * function requests EH to perform PM operations and waits for EH |
5114 | * to finish. | |
5115 | * | |
5116 | * LOCKING: | |
5117 | * Kernel thread context (may sleep). | |
5118 | * | |
5119 | * RETURNS: | |
5120 | * 0 on success, -errno on failure. | |
5121 | */ | |
cca3974e | 5122 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 TH |
5123 | { |
5124 | int i, j, rc; | |
5125 | ||
cca3974e | 5126 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
500530f6 TH |
5127 | if (rc) |
5128 | goto fail; | |
5129 | ||
5130 | /* EH is quiescent now. Fail if we have any ready device. | |
5131 | * This happens if hotplug occurs between completion of device | |
5132 | * suspension and here. | |
5133 | */ | |
cca3974e JG |
5134 | for (i = 0; i < host->n_ports; i++) { |
5135 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5136 | |
5137 | for (j = 0; j < ATA_MAX_DEVICES; j++) { | |
5138 | struct ata_device *dev = &ap->device[j]; | |
5139 | ||
5140 | if (ata_dev_ready(dev)) { | |
5141 | ata_port_printk(ap, KERN_WARNING, | |
5142 | "suspend failed, device %d " | |
5143 | "still active\n", dev->devno); | |
5144 | rc = -EBUSY; | |
5145 | goto fail; | |
5146 | } | |
5147 | } | |
5148 | } | |
5149 | ||
cca3974e | 5150 | host->dev->power.power_state = mesg; |
500530f6 TH |
5151 | return 0; |
5152 | ||
5153 | fail: | |
cca3974e | 5154 | ata_host_resume(host); |
500530f6 TH |
5155 | return rc; |
5156 | } | |
5157 | ||
5158 | /** | |
cca3974e JG |
5159 | * ata_host_resume - resume host |
5160 | * @host: host to resume | |
500530f6 | 5161 | * |
cca3974e | 5162 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
5163 | * function requests EH to perform PM operations and returns. |
5164 | * Note that all resume operations are performed parallely. | |
5165 | * | |
5166 | * LOCKING: | |
5167 | * Kernel thread context (may sleep). | |
5168 | */ | |
cca3974e | 5169 | void ata_host_resume(struct ata_host *host) |
500530f6 | 5170 | { |
cca3974e JG |
5171 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
5172 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5173 | host->dev->power.power_state = PMSG_ON; | |
500530f6 TH |
5174 | } |
5175 | ||
c893a3ae RD |
5176 | /** |
5177 | * ata_port_start - Set port up for dma. | |
5178 | * @ap: Port to initialize | |
5179 | * | |
5180 | * Called just after data structures for each port are | |
5181 | * initialized. Allocates space for PRD table. | |
5182 | * | |
5183 | * May be used as the port_start() entry in ata_port_operations. | |
5184 | * | |
5185 | * LOCKING: | |
5186 | * Inherited from caller. | |
5187 | */ | |
5188 | ||
1da177e4 LT |
5189 | int ata_port_start (struct ata_port *ap) |
5190 | { | |
2f1f610b | 5191 | struct device *dev = ap->dev; |
6037d6bb | 5192 | int rc; |
1da177e4 LT |
5193 | |
5194 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
5195 | if (!ap->prd) | |
5196 | return -ENOMEM; | |
5197 | ||
6037d6bb JG |
5198 | rc = ata_pad_alloc(ap, dev); |
5199 | if (rc) { | |
cedc9a47 | 5200 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 5201 | return rc; |
cedc9a47 JG |
5202 | } |
5203 | ||
1da177e4 LT |
5204 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
5205 | ||
5206 | return 0; | |
5207 | } | |
5208 | ||
0baab86b EF |
5209 | |
5210 | /** | |
5211 | * ata_port_stop - Undo ata_port_start() | |
5212 | * @ap: Port to shut down | |
5213 | * | |
5214 | * Frees the PRD table. | |
5215 | * | |
5216 | * May be used as the port_stop() entry in ata_port_operations. | |
5217 | * | |
5218 | * LOCKING: | |
6f0ef4fa | 5219 | * Inherited from caller. |
0baab86b EF |
5220 | */ |
5221 | ||
1da177e4 LT |
5222 | void ata_port_stop (struct ata_port *ap) |
5223 | { | |
2f1f610b | 5224 | struct device *dev = ap->dev; |
1da177e4 LT |
5225 | |
5226 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 5227 | ata_pad_free(ap, dev); |
1da177e4 LT |
5228 | } |
5229 | ||
cca3974e | 5230 | void ata_host_stop (struct ata_host *host) |
aa8f0dc6 | 5231 | { |
cca3974e JG |
5232 | if (host->mmio_base) |
5233 | iounmap(host->mmio_base); | |
aa8f0dc6 JG |
5234 | } |
5235 | ||
3ef3b43d TH |
5236 | /** |
5237 | * ata_dev_init - Initialize an ata_device structure | |
5238 | * @dev: Device structure to initialize | |
5239 | * | |
5240 | * Initialize @dev in preparation for probing. | |
5241 | * | |
5242 | * LOCKING: | |
5243 | * Inherited from caller. | |
5244 | */ | |
5245 | void ata_dev_init(struct ata_device *dev) | |
5246 | { | |
5247 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5248 | unsigned long flags; |
5249 | ||
5a04bf4b TH |
5250 | /* SATA spd limit is bound to the first device */ |
5251 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5252 | ||
72fa4b74 TH |
5253 | /* High bits of dev->flags are used to record warm plug |
5254 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 5255 | * host lock. |
72fa4b74 | 5256 | */ |
ba6a1308 | 5257 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 5258 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
ba6a1308 | 5259 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 5260 | |
72fa4b74 TH |
5261 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
5262 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
5263 | dev->pio_mask = UINT_MAX; |
5264 | dev->mwdma_mask = UINT_MAX; | |
5265 | dev->udma_mask = UINT_MAX; | |
5266 | } | |
5267 | ||
1da177e4 | 5268 | /** |
155a8a9c | 5269 | * ata_port_init - Initialize an ata_port structure |
1da177e4 | 5270 | * @ap: Structure to initialize |
cca3974e | 5271 | * @host: Collection of hosts to which @ap belongs |
1da177e4 LT |
5272 | * @ent: Probe information provided by low-level driver |
5273 | * @port_no: Port number associated with this ata_port | |
5274 | * | |
155a8a9c | 5275 | * Initialize a new ata_port structure. |
0cba632b | 5276 | * |
1da177e4 | 5277 | * LOCKING: |
0cba632b | 5278 | * Inherited from caller. |
1da177e4 | 5279 | */ |
cca3974e | 5280 | void ata_port_init(struct ata_port *ap, struct ata_host *host, |
155a8a9c | 5281 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
5282 | { |
5283 | unsigned int i; | |
5284 | ||
cca3974e | 5285 | ap->lock = &host->lock; |
198e0fed | 5286 | ap->flags = ATA_FLAG_DISABLED; |
155a8a9c | 5287 | ap->id = ata_unique_id++; |
1da177e4 | 5288 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 5289 | ap->host = host; |
2f1f610b | 5290 | ap->dev = ent->dev; |
1da177e4 | 5291 | ap->port_no = port_no; |
fea63e38 TH |
5292 | if (port_no == 1 && ent->pinfo2) { |
5293 | ap->pio_mask = ent->pinfo2->pio_mask; | |
5294 | ap->mwdma_mask = ent->pinfo2->mwdma_mask; | |
5295 | ap->udma_mask = ent->pinfo2->udma_mask; | |
5296 | ap->flags |= ent->pinfo2->flags; | |
5297 | ap->ops = ent->pinfo2->port_ops; | |
5298 | } else { | |
5299 | ap->pio_mask = ent->pio_mask; | |
5300 | ap->mwdma_mask = ent->mwdma_mask; | |
5301 | ap->udma_mask = ent->udma_mask; | |
5302 | ap->flags |= ent->port_flags; | |
5303 | ap->ops = ent->port_ops; | |
5304 | } | |
5a04bf4b | 5305 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
5306 | ap->active_tag = ATA_TAG_POISON; |
5307 | ap->last_ctl = 0xFF; | |
bd5d825c BP |
5308 | |
5309 | #if defined(ATA_VERBOSE_DEBUG) | |
5310 | /* turn on all debugging levels */ | |
5311 | ap->msg_enable = 0x00FF; | |
5312 | #elif defined(ATA_DEBUG) | |
5313 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 5314 | #else |
0dd4b21f | 5315 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 5316 | #endif |
1da177e4 | 5317 | |
86e45b6b | 5318 | INIT_WORK(&ap->port_task, NULL, NULL); |
580b2102 | 5319 | INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap); |
3057ac3c | 5320 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap); |
a72ec4ce | 5321 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 5322 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 5323 | |
838df628 TH |
5324 | /* set cable type */ |
5325 | ap->cbl = ATA_CBL_NONE; | |
5326 | if (ap->flags & ATA_FLAG_SATA) | |
5327 | ap->cbl = ATA_CBL_SATA; | |
5328 | ||
acf356b1 TH |
5329 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
5330 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 5331 | dev->ap = ap; |
72fa4b74 | 5332 | dev->devno = i; |
3ef3b43d | 5333 | ata_dev_init(dev); |
acf356b1 | 5334 | } |
1da177e4 LT |
5335 | |
5336 | #ifdef ATA_IRQ_TRAP | |
5337 | ap->stats.unhandled_irq = 1; | |
5338 | ap->stats.idle_irq = 1; | |
5339 | #endif | |
5340 | ||
5341 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5342 | } | |
5343 | ||
155a8a9c | 5344 | /** |
4608c160 TH |
5345 | * ata_port_init_shost - Initialize SCSI host associated with ATA port |
5346 | * @ap: ATA port to initialize SCSI host for | |
5347 | * @shost: SCSI host associated with @ap | |
155a8a9c | 5348 | * |
4608c160 | 5349 | * Initialize SCSI host @shost associated with ATA port @ap. |
155a8a9c BK |
5350 | * |
5351 | * LOCKING: | |
5352 | * Inherited from caller. | |
5353 | */ | |
4608c160 | 5354 | static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) |
155a8a9c | 5355 | { |
cca3974e | 5356 | ap->scsi_host = shost; |
155a8a9c | 5357 | |
4608c160 TH |
5358 | shost->unique_id = ap->id; |
5359 | shost->max_id = 16; | |
5360 | shost->max_lun = 1; | |
5361 | shost->max_channel = 1; | |
5362 | shost->max_cmd_len = 12; | |
155a8a9c BK |
5363 | } |
5364 | ||
1da177e4 | 5365 | /** |
996139f1 | 5366 | * ata_port_add - Attach low-level ATA driver to system |
1da177e4 | 5367 | * @ent: Information provided by low-level driver |
cca3974e | 5368 | * @host: Collections of ports to which we add |
1da177e4 LT |
5369 | * @port_no: Port number associated with this host |
5370 | * | |
0cba632b JG |
5371 | * Attach low-level ATA driver to system. |
5372 | * | |
1da177e4 | 5373 | * LOCKING: |
0cba632b | 5374 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5375 | * |
5376 | * RETURNS: | |
0cba632b | 5377 | * New ata_port on success, for NULL on error. |
1da177e4 | 5378 | */ |
996139f1 | 5379 | static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, |
cca3974e | 5380 | struct ata_host *host, |
1da177e4 LT |
5381 | unsigned int port_no) |
5382 | { | |
996139f1 | 5383 | struct Scsi_Host *shost; |
1da177e4 | 5384 | struct ata_port *ap; |
1da177e4 LT |
5385 | |
5386 | DPRINTK("ENTER\n"); | |
aec5c3c1 | 5387 | |
52783c5d | 5388 | if (!ent->port_ops->error_handler && |
cca3974e | 5389 | !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { |
aec5c3c1 TH |
5390 | printk(KERN_ERR "ata%u: no reset mechanism available\n", |
5391 | port_no); | |
5392 | return NULL; | |
5393 | } | |
5394 | ||
996139f1 JG |
5395 | shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
5396 | if (!shost) | |
1da177e4 LT |
5397 | return NULL; |
5398 | ||
996139f1 | 5399 | shost->transportt = &ata_scsi_transport_template; |
30afc84c | 5400 | |
996139f1 | 5401 | ap = ata_shost_to_port(shost); |
1da177e4 | 5402 | |
cca3974e | 5403 | ata_port_init(ap, host, ent, port_no); |
996139f1 | 5404 | ata_port_init_shost(ap, shost); |
1da177e4 | 5405 | |
1da177e4 | 5406 | return ap; |
1da177e4 LT |
5407 | } |
5408 | ||
b03732f0 | 5409 | /** |
cca3974e JG |
5410 | * ata_sas_host_init - Initialize a host struct |
5411 | * @host: host to initialize | |
5412 | * @dev: device host is attached to | |
5413 | * @flags: host flags | |
5414 | * @ops: port_ops | |
b03732f0 BK |
5415 | * |
5416 | * LOCKING: | |
5417 | * PCI/etc. bus probe sem. | |
5418 | * | |
5419 | */ | |
5420 | ||
cca3974e JG |
5421 | void ata_host_init(struct ata_host *host, struct device *dev, |
5422 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 5423 | { |
cca3974e JG |
5424 | spin_lock_init(&host->lock); |
5425 | host->dev = dev; | |
5426 | host->flags = flags; | |
5427 | host->ops = ops; | |
b03732f0 BK |
5428 | } |
5429 | ||
1da177e4 | 5430 | /** |
0cba632b JG |
5431 | * ata_device_add - Register hardware device with ATA and SCSI layers |
5432 | * @ent: Probe information describing hardware device to be registered | |
5433 | * | |
5434 | * This function processes the information provided in the probe | |
5435 | * information struct @ent, allocates the necessary ATA and SCSI | |
5436 | * host information structures, initializes them, and registers | |
5437 | * everything with requisite kernel subsystems. | |
5438 | * | |
5439 | * This function requests irqs, probes the ATA bus, and probes | |
5440 | * the SCSI bus. | |
1da177e4 LT |
5441 | * |
5442 | * LOCKING: | |
0cba632b | 5443 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5444 | * |
5445 | * RETURNS: | |
0cba632b | 5446 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 | 5447 | */ |
057ace5e | 5448 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 | 5449 | { |
6d0500df | 5450 | unsigned int i; |
1da177e4 | 5451 | struct device *dev = ent->dev; |
cca3974e | 5452 | struct ata_host *host; |
39b07ce6 | 5453 | int rc; |
1da177e4 LT |
5454 | |
5455 | DPRINTK("ENTER\n"); | |
02f076aa AC |
5456 | |
5457 | if (ent->irq == 0) { | |
5458 | dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); | |
5459 | return 0; | |
5460 | } | |
1da177e4 | 5461 | /* alloc a container for our list of ATA ports (buses) */ |
cca3974e JG |
5462 | host = kzalloc(sizeof(struct ata_host) + |
5463 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
5464 | if (!host) | |
1da177e4 | 5465 | return 0; |
1da177e4 | 5466 | |
cca3974e JG |
5467 | ata_host_init(host, dev, ent->_host_flags, ent->port_ops); |
5468 | host->n_ports = ent->n_ports; | |
5469 | host->irq = ent->irq; | |
5470 | host->irq2 = ent->irq2; | |
5471 | host->mmio_base = ent->mmio_base; | |
5472 | host->private_data = ent->private_data; | |
1da177e4 LT |
5473 | |
5474 | /* register each port bound to this device */ | |
cca3974e | 5475 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5476 | struct ata_port *ap; |
5477 | unsigned long xfer_mode_mask; | |
2ec7df04 | 5478 | int irq_line = ent->irq; |
1da177e4 | 5479 | |
cca3974e | 5480 | ap = ata_port_add(ent, host, i); |
1da177e4 LT |
5481 | if (!ap) |
5482 | goto err_out; | |
5483 | ||
cca3974e | 5484 | host->ports[i] = ap; |
dd5b06c4 TH |
5485 | |
5486 | /* dummy? */ | |
5487 | if (ent->dummy_port_mask & (1 << i)) { | |
5488 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); | |
5489 | ap->ops = &ata_dummy_port_ops; | |
5490 | continue; | |
5491 | } | |
5492 | ||
5493 | /* start port */ | |
5494 | rc = ap->ops->port_start(ap); | |
5495 | if (rc) { | |
cca3974e JG |
5496 | host->ports[i] = NULL; |
5497 | scsi_host_put(ap->scsi_host); | |
dd5b06c4 TH |
5498 | goto err_out; |
5499 | } | |
5500 | ||
2ec7df04 AC |
5501 | /* Report the secondary IRQ for second channel legacy */ |
5502 | if (i == 1 && ent->irq2) | |
5503 | irq_line = ent->irq2; | |
5504 | ||
1da177e4 LT |
5505 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | |
5506 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5507 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5508 | ||
5509 | /* print per-port info to dmesg */ | |
f15a1daf | 5510 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
2ec7df04 | 5511 | "ctl 0x%lX bmdma 0x%lX irq %d\n", |
f15a1daf TH |
5512 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', |
5513 | ata_mode_string(xfer_mode_mask), | |
5514 | ap->ioaddr.cmd_addr, | |
5515 | ap->ioaddr.ctl_addr, | |
5516 | ap->ioaddr.bmdma_addr, | |
2ec7df04 | 5517 | irq_line); |
1da177e4 LT |
5518 | |
5519 | ata_chk_status(ap); | |
cca3974e | 5520 | host->ops->irq_clear(ap); |
e3180499 | 5521 | ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */ |
1da177e4 LT |
5522 | } |
5523 | ||
2ec7df04 | 5524 | /* obtain irq, that may be shared between channels */ |
39b07ce6 | 5525 | rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, |
cca3974e | 5526 | DRV_NAME, host); |
39b07ce6 JG |
5527 | if (rc) { |
5528 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5529 | ent->irq, rc); | |
1da177e4 | 5530 | goto err_out; |
39b07ce6 | 5531 | } |
1da177e4 | 5532 | |
2ec7df04 AC |
5533 | /* do we have a second IRQ for the other channel, eg legacy mode */ |
5534 | if (ent->irq2) { | |
5535 | /* We will get weird core code crashes later if this is true | |
5536 | so trap it now */ | |
5537 | BUG_ON(ent->irq == ent->irq2); | |
5538 | ||
5539 | rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags, | |
cca3974e | 5540 | DRV_NAME, host); |
2ec7df04 AC |
5541 | if (rc) { |
5542 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5543 | ent->irq2, rc); | |
5544 | goto err_out_free_irq; | |
5545 | } | |
5546 | } | |
5547 | ||
1da177e4 LT |
5548 | /* perform each probe synchronously */ |
5549 | DPRINTK("probe begin\n"); | |
cca3974e JG |
5550 | for (i = 0; i < host->n_ports; i++) { |
5551 | struct ata_port *ap = host->ports[i]; | |
5a04bf4b | 5552 | u32 scontrol; |
1da177e4 LT |
5553 | int rc; |
5554 | ||
5a04bf4b TH |
5555 | /* init sata_spd_limit to the current value */ |
5556 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5557 | int spd = (scontrol >> 4) & 0xf; | |
5558 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5559 | } | |
5560 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5561 | ||
cca3974e | 5562 | rc = scsi_add_host(ap->scsi_host, dev); |
1da177e4 | 5563 | if (rc) { |
f15a1daf | 5564 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
5565 | /* FIXME: do something useful here */ |
5566 | /* FIXME: handle unconditional calls to | |
5567 | * scsi_scan_host and ata_host_remove, below, | |
5568 | * at the very least | |
5569 | */ | |
5570 | } | |
3e706399 | 5571 | |
52783c5d | 5572 | if (ap->ops->error_handler) { |
1cdaf534 | 5573 | struct ata_eh_info *ehi = &ap->eh_info; |
3e706399 TH |
5574 | unsigned long flags; |
5575 | ||
5576 | ata_port_probe(ap); | |
5577 | ||
5578 | /* kick EH for boot probing */ | |
ba6a1308 | 5579 | spin_lock_irqsave(ap->lock, flags); |
3e706399 | 5580 | |
1cdaf534 TH |
5581 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; |
5582 | ehi->action |= ATA_EH_SOFTRESET; | |
5583 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
3e706399 | 5584 | |
b51e9e5d | 5585 | ap->pflags |= ATA_PFLAG_LOADING; |
3e706399 TH |
5586 | ata_port_schedule_eh(ap); |
5587 | ||
ba6a1308 | 5588 | spin_unlock_irqrestore(ap->lock, flags); |
3e706399 TH |
5589 | |
5590 | /* wait for EH to finish */ | |
5591 | ata_port_wait_eh(ap); | |
5592 | } else { | |
5593 | DPRINTK("ata%u: bus probe begin\n", ap->id); | |
5594 | rc = ata_bus_probe(ap); | |
5595 | DPRINTK("ata%u: bus probe end\n", ap->id); | |
5596 | ||
5597 | if (rc) { | |
5598 | /* FIXME: do something useful here? | |
5599 | * Current libata behavior will | |
5600 | * tear down everything when | |
5601 | * the module is removed | |
5602 | * or the h/w is unplugged. | |
5603 | */ | |
5604 | } | |
5605 | } | |
1da177e4 LT |
5606 | } |
5607 | ||
5608 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 5609 | DPRINTK("host probe begin\n"); |
cca3974e JG |
5610 | for (i = 0; i < host->n_ports; i++) { |
5611 | struct ata_port *ap = host->ports[i]; | |
1da177e4 | 5612 | |
644dd0cc | 5613 | ata_scsi_scan_host(ap); |
1da177e4 LT |
5614 | } |
5615 | ||
cca3974e | 5616 | dev_set_drvdata(dev, host); |
1da177e4 LT |
5617 | |
5618 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5619 | return ent->n_ports; /* success */ | |
5620 | ||
2ec7df04 | 5621 | err_out_free_irq: |
cca3974e | 5622 | free_irq(ent->irq, host); |
1da177e4 | 5623 | err_out: |
cca3974e JG |
5624 | for (i = 0; i < host->n_ports; i++) { |
5625 | struct ata_port *ap = host->ports[i]; | |
77f3f879 TH |
5626 | if (ap) { |
5627 | ap->ops->port_stop(ap); | |
cca3974e | 5628 | scsi_host_put(ap->scsi_host); |
77f3f879 | 5629 | } |
1da177e4 | 5630 | } |
6d0500df | 5631 | |
cca3974e | 5632 | kfree(host); |
1da177e4 LT |
5633 | VPRINTK("EXIT, returning 0\n"); |
5634 | return 0; | |
5635 | } | |
5636 | ||
720ba126 TH |
5637 | /** |
5638 | * ata_port_detach - Detach ATA port in prepration of device removal | |
5639 | * @ap: ATA port to be detached | |
5640 | * | |
5641 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
5642 | * then, remove the associated SCSI host. @ap is guaranteed to | |
5643 | * be quiescent on return from this function. | |
5644 | * | |
5645 | * LOCKING: | |
5646 | * Kernel thread context (may sleep). | |
5647 | */ | |
5648 | void ata_port_detach(struct ata_port *ap) | |
5649 | { | |
5650 | unsigned long flags; | |
5651 | int i; | |
5652 | ||
5653 | if (!ap->ops->error_handler) | |
c3cf30a9 | 5654 | goto skip_eh; |
720ba126 TH |
5655 | |
5656 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 5657 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 5658 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 5659 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5660 | |
5661 | ata_port_wait_eh(ap); | |
5662 | ||
5663 | /* EH is now guaranteed to see UNLOADING, so no new device | |
5664 | * will be attached. Disable all existing devices. | |
5665 | */ | |
ba6a1308 | 5666 | spin_lock_irqsave(ap->lock, flags); |
720ba126 TH |
5667 | |
5668 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
5669 | ata_dev_disable(&ap->device[i]); | |
5670 | ||
ba6a1308 | 5671 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5672 | |
5673 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
5674 | * will be skipped and retrials will be terminated with bad | |
5675 | * target. | |
5676 | */ | |
ba6a1308 | 5677 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 5678 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 5679 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5680 | |
5681 | ata_port_wait_eh(ap); | |
5682 | ||
5683 | /* Flush hotplug task. The sequence is similar to | |
5684 | * ata_port_flush_task(). | |
5685 | */ | |
5686 | flush_workqueue(ata_aux_wq); | |
5687 | cancel_delayed_work(&ap->hotplug_task); | |
5688 | flush_workqueue(ata_aux_wq); | |
5689 | ||
c3cf30a9 | 5690 | skip_eh: |
720ba126 | 5691 | /* remove the associated SCSI host */ |
cca3974e | 5692 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
5693 | } |
5694 | ||
17b14451 | 5695 | /** |
cca3974e JG |
5696 | * ata_host_remove - PCI layer callback for device removal |
5697 | * @host: ATA host set that was removed | |
17b14451 | 5698 | * |
2e9edbf8 | 5699 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
5700 | * objects. |
5701 | * | |
5702 | * LOCKING: | |
5703 | * Inherited from calling layer (may sleep). | |
5704 | */ | |
5705 | ||
cca3974e | 5706 | void ata_host_remove(struct ata_host *host) |
17b14451 | 5707 | { |
17b14451 AC |
5708 | unsigned int i; |
5709 | ||
cca3974e JG |
5710 | for (i = 0; i < host->n_ports; i++) |
5711 | ata_port_detach(host->ports[i]); | |
17b14451 | 5712 | |
cca3974e JG |
5713 | free_irq(host->irq, host); |
5714 | if (host->irq2) | |
5715 | free_irq(host->irq2, host); | |
17b14451 | 5716 | |
cca3974e JG |
5717 | for (i = 0; i < host->n_ports; i++) { |
5718 | struct ata_port *ap = host->ports[i]; | |
17b14451 | 5719 | |
cca3974e | 5720 | ata_scsi_release(ap->scsi_host); |
17b14451 AC |
5721 | |
5722 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
5723 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
5724 | ||
2ec7df04 AC |
5725 | /* FIXME: Add -ac IDE pci mods to remove these special cases */ |
5726 | if (ioaddr->cmd_addr == ATA_PRIMARY_CMD) | |
5727 | release_region(ATA_PRIMARY_CMD, 8); | |
5728 | else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD) | |
5729 | release_region(ATA_SECONDARY_CMD, 8); | |
17b14451 AC |
5730 | } |
5731 | ||
cca3974e | 5732 | scsi_host_put(ap->scsi_host); |
17b14451 AC |
5733 | } |
5734 | ||
cca3974e JG |
5735 | if (host->ops->host_stop) |
5736 | host->ops->host_stop(host); | |
17b14451 | 5737 | |
cca3974e | 5738 | kfree(host); |
17b14451 AC |
5739 | } |
5740 | ||
1da177e4 LT |
5741 | /** |
5742 | * ata_scsi_release - SCSI layer callback hook for host unload | |
5743 | * @host: libata host to be unloaded | |
5744 | * | |
5745 | * Performs all duties necessary to shut down a libata port... | |
5746 | * Kill port kthread, disable port, and release resources. | |
5747 | * | |
5748 | * LOCKING: | |
5749 | * Inherited from SCSI layer. | |
5750 | * | |
5751 | * RETURNS: | |
5752 | * One. | |
5753 | */ | |
5754 | ||
cca3974e | 5755 | int ata_scsi_release(struct Scsi_Host *shost) |
1da177e4 | 5756 | { |
cca3974e | 5757 | struct ata_port *ap = ata_shost_to_port(shost); |
1da177e4 LT |
5758 | |
5759 | DPRINTK("ENTER\n"); | |
5760 | ||
5761 | ap->ops->port_disable(ap); | |
6543bc07 | 5762 | ap->ops->port_stop(ap); |
1da177e4 LT |
5763 | |
5764 | DPRINTK("EXIT\n"); | |
5765 | return 1; | |
5766 | } | |
5767 | ||
f6d950e2 BK |
5768 | struct ata_probe_ent * |
5769 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) | |
5770 | { | |
5771 | struct ata_probe_ent *probe_ent; | |
5772 | ||
5773 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); | |
5774 | if (!probe_ent) { | |
5775 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
5776 | kobject_name(&(dev->kobj))); | |
5777 | return NULL; | |
5778 | } | |
5779 | ||
5780 | INIT_LIST_HEAD(&probe_ent->node); | |
5781 | probe_ent->dev = dev; | |
5782 | ||
5783 | probe_ent->sht = port->sht; | |
cca3974e | 5784 | probe_ent->port_flags = port->flags; |
f6d950e2 BK |
5785 | probe_ent->pio_mask = port->pio_mask; |
5786 | probe_ent->mwdma_mask = port->mwdma_mask; | |
5787 | probe_ent->udma_mask = port->udma_mask; | |
5788 | probe_ent->port_ops = port->port_ops; | |
5789 | ||
5790 | return probe_ent; | |
5791 | } | |
5792 | ||
1da177e4 LT |
5793 | /** |
5794 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
5795 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
5796 | * |
5797 | * Utility function which initializes data_addr, error_addr, | |
5798 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
5799 | * device_addr, status_addr, and command_addr to standard offsets | |
5800 | * relative to cmd_addr. | |
5801 | * | |
5802 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 5803 | */ |
0baab86b | 5804 | |
1da177e4 LT |
5805 | void ata_std_ports(struct ata_ioports *ioaddr) |
5806 | { | |
5807 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
5808 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
5809 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
5810 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
5811 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
5812 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
5813 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
5814 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
5815 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
5816 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
5817 | } | |
5818 | ||
0baab86b | 5819 | |
374b1873 JG |
5820 | #ifdef CONFIG_PCI |
5821 | ||
cca3974e | 5822 | void ata_pci_host_stop (struct ata_host *host) |
374b1873 | 5823 | { |
cca3974e | 5824 | struct pci_dev *pdev = to_pci_dev(host->dev); |
374b1873 | 5825 | |
cca3974e | 5826 | pci_iounmap(pdev, host->mmio_base); |
374b1873 JG |
5827 | } |
5828 | ||
1da177e4 LT |
5829 | /** |
5830 | * ata_pci_remove_one - PCI layer callback for device removal | |
5831 | * @pdev: PCI device that was removed | |
5832 | * | |
5833 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5834 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5835 | * Handle this by unregistering all objects associated |
5836 | * with this PCI device. Free those objects. Then finally | |
5837 | * release PCI resources and disable device. | |
5838 | * | |
5839 | * LOCKING: | |
5840 | * Inherited from PCI layer (may sleep). | |
5841 | */ | |
5842 | ||
5843 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5844 | { | |
5845 | struct device *dev = pci_dev_to_dev(pdev); | |
cca3974e | 5846 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 5847 | |
cca3974e | 5848 | ata_host_remove(host); |
f0eb62b8 | 5849 | |
1da177e4 LT |
5850 | pci_release_regions(pdev); |
5851 | pci_disable_device(pdev); | |
5852 | dev_set_drvdata(dev, NULL); | |
5853 | } | |
5854 | ||
5855 | /* move to PCI subsystem */ | |
057ace5e | 5856 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5857 | { |
5858 | unsigned long tmp = 0; | |
5859 | ||
5860 | switch (bits->width) { | |
5861 | case 1: { | |
5862 | u8 tmp8 = 0; | |
5863 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5864 | tmp = tmp8; | |
5865 | break; | |
5866 | } | |
5867 | case 2: { | |
5868 | u16 tmp16 = 0; | |
5869 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5870 | tmp = tmp16; | |
5871 | break; | |
5872 | } | |
5873 | case 4: { | |
5874 | u32 tmp32 = 0; | |
5875 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5876 | tmp = tmp32; | |
5877 | break; | |
5878 | } | |
5879 | ||
5880 | default: | |
5881 | return -EINVAL; | |
5882 | } | |
5883 | ||
5884 | tmp &= bits->mask; | |
5885 | ||
5886 | return (tmp == bits->val) ? 1 : 0; | |
5887 | } | |
9b847548 | 5888 | |
3c5100c1 | 5889 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
5890 | { |
5891 | pci_save_state(pdev); | |
500530f6 | 5892 | |
3c5100c1 | 5893 | if (mesg.event == PM_EVENT_SUSPEND) { |
500530f6 TH |
5894 | pci_disable_device(pdev); |
5895 | pci_set_power_state(pdev, PCI_D3hot); | |
5896 | } | |
9b847548 JA |
5897 | } |
5898 | ||
500530f6 | 5899 | void ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 JA |
5900 | { |
5901 | pci_set_power_state(pdev, PCI_D0); | |
5902 | pci_restore_state(pdev); | |
5903 | pci_enable_device(pdev); | |
5904 | pci_set_master(pdev); | |
500530f6 TH |
5905 | } |
5906 | ||
3c5100c1 | 5907 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 5908 | { |
cca3974e | 5909 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
5910 | int rc = 0; |
5911 | ||
cca3974e | 5912 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
5913 | if (rc) |
5914 | return rc; | |
5915 | ||
3c5100c1 | 5916 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
5917 | |
5918 | return 0; | |
5919 | } | |
5920 | ||
5921 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5922 | { | |
cca3974e | 5923 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
5924 | |
5925 | ata_pci_device_do_resume(pdev); | |
cca3974e | 5926 | ata_host_resume(host); |
9b847548 JA |
5927 | return 0; |
5928 | } | |
1da177e4 LT |
5929 | #endif /* CONFIG_PCI */ |
5930 | ||
5931 | ||
1da177e4 LT |
5932 | static int __init ata_init(void) |
5933 | { | |
a8601e5f | 5934 | ata_probe_timeout *= HZ; |
1da177e4 LT |
5935 | ata_wq = create_workqueue("ata"); |
5936 | if (!ata_wq) | |
5937 | return -ENOMEM; | |
5938 | ||
453b07ac TH |
5939 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
5940 | if (!ata_aux_wq) { | |
5941 | destroy_workqueue(ata_wq); | |
5942 | return -ENOMEM; | |
5943 | } | |
5944 | ||
1da177e4 LT |
5945 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
5946 | return 0; | |
5947 | } | |
5948 | ||
5949 | static void __exit ata_exit(void) | |
5950 | { | |
5951 | destroy_workqueue(ata_wq); | |
453b07ac | 5952 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
5953 | } |
5954 | ||
5955 | module_init(ata_init); | |
5956 | module_exit(ata_exit); | |
5957 | ||
67846b30 | 5958 | static unsigned long ratelimit_time; |
34af946a | 5959 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
5960 | |
5961 | int ata_ratelimit(void) | |
5962 | { | |
5963 | int rc; | |
5964 | unsigned long flags; | |
5965 | ||
5966 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5967 | ||
5968 | if (time_after(jiffies, ratelimit_time)) { | |
5969 | rc = 1; | |
5970 | ratelimit_time = jiffies + (HZ/5); | |
5971 | } else | |
5972 | rc = 0; | |
5973 | ||
5974 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5975 | ||
5976 | return rc; | |
5977 | } | |
5978 | ||
c22daff4 TH |
5979 | /** |
5980 | * ata_wait_register - wait until register value changes | |
5981 | * @reg: IO-mapped register | |
5982 | * @mask: Mask to apply to read register value | |
5983 | * @val: Wait condition | |
5984 | * @interval_msec: polling interval in milliseconds | |
5985 | * @timeout_msec: timeout in milliseconds | |
5986 | * | |
5987 | * Waiting for some bits of register to change is a common | |
5988 | * operation for ATA controllers. This function reads 32bit LE | |
5989 | * IO-mapped register @reg and tests for the following condition. | |
5990 | * | |
5991 | * (*@reg & mask) != val | |
5992 | * | |
5993 | * If the condition is met, it returns; otherwise, the process is | |
5994 | * repeated after @interval_msec until timeout. | |
5995 | * | |
5996 | * LOCKING: | |
5997 | * Kernel thread context (may sleep) | |
5998 | * | |
5999 | * RETURNS: | |
6000 | * The final register value. | |
6001 | */ | |
6002 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
6003 | unsigned long interval_msec, | |
6004 | unsigned long timeout_msec) | |
6005 | { | |
6006 | unsigned long timeout; | |
6007 | u32 tmp; | |
6008 | ||
6009 | tmp = ioread32(reg); | |
6010 | ||
6011 | /* Calculate timeout _after_ the first read to make sure | |
6012 | * preceding writes reach the controller before starting to | |
6013 | * eat away the timeout. | |
6014 | */ | |
6015 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
6016 | ||
6017 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
6018 | msleep(interval_msec); | |
6019 | tmp = ioread32(reg); | |
6020 | } | |
6021 | ||
6022 | return tmp; | |
6023 | } | |
6024 | ||
dd5b06c4 TH |
6025 | /* |
6026 | * Dummy port_ops | |
6027 | */ | |
6028 | static void ata_dummy_noret(struct ata_port *ap) { } | |
6029 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
6030 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
6031 | ||
6032 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
6033 | { | |
6034 | return ATA_DRDY; | |
6035 | } | |
6036 | ||
6037 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
6038 | { | |
6039 | return AC_ERR_SYSTEM; | |
6040 | } | |
6041 | ||
6042 | const struct ata_port_operations ata_dummy_port_ops = { | |
6043 | .port_disable = ata_port_disable, | |
6044 | .check_status = ata_dummy_check_status, | |
6045 | .check_altstatus = ata_dummy_check_status, | |
6046 | .dev_select = ata_noop_dev_select, | |
6047 | .qc_prep = ata_noop_qc_prep, | |
6048 | .qc_issue = ata_dummy_qc_issue, | |
6049 | .freeze = ata_dummy_noret, | |
6050 | .thaw = ata_dummy_noret, | |
6051 | .error_handler = ata_dummy_noret, | |
6052 | .post_internal_cmd = ata_dummy_qc_noret, | |
6053 | .irq_clear = ata_dummy_noret, | |
6054 | .port_start = ata_dummy_ret0, | |
6055 | .port_stop = ata_dummy_noret, | |
6056 | }; | |
6057 | ||
1da177e4 LT |
6058 | /* |
6059 | * libata is essentially a library of internal helper functions for | |
6060 | * low-level ATA host controller drivers. As such, the API/ABI is | |
6061 | * likely to change as new drivers are added and updated. | |
6062 | * Do not depend on ABI/API stability. | |
6063 | */ | |
6064 | ||
e9c83914 TH |
6065 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
6066 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
6067 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 6068 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
1da177e4 LT |
6069 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
6070 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 6071 | EXPORT_SYMBOL_GPL(ata_host_init); |
1da177e4 | 6072 | EXPORT_SYMBOL_GPL(ata_device_add); |
720ba126 | 6073 | EXPORT_SYMBOL_GPL(ata_port_detach); |
cca3974e | 6074 | EXPORT_SYMBOL_GPL(ata_host_remove); |
1da177e4 LT |
6075 | EXPORT_SYMBOL_GPL(ata_sg_init); |
6076 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 6077 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 6078 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 6079 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 6080 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
6081 | EXPORT_SYMBOL_GPL(ata_tf_load); |
6082 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
6083 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
6084 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
6085 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
6086 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
6087 | EXPORT_SYMBOL_GPL(ata_check_status); | |
6088 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
6089 | EXPORT_SYMBOL_GPL(ata_exec_command); |
6090 | EXPORT_SYMBOL_GPL(ata_port_start); | |
6091 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 6092 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 | 6093 | EXPORT_SYMBOL_GPL(ata_interrupt); |
a6b2c5d4 AC |
6094 | EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); |
6095 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer); | |
75e99585 | 6096 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); |
1da177e4 | 6097 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
e46834cd | 6098 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
6099 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
6100 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
6101 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
6102 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
6103 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
6104 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
6105 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6106 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6107 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6108 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 6109 | EXPORT_SYMBOL_GPL(ata_port_probe); |
3c567b7d | 6110 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
6111 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
6112 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
6113 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
6114 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6115 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 6116 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 TH |
6117 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
6118 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
6119 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
623a3128 | 6120 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); |
2e9edbf8 JG |
6121 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
6122 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 6123 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 6124 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 6125 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 6126 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 6127 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
6128 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
6129 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 6130 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 6131 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 6132 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 LT |
6133 | EXPORT_SYMBOL_GPL(ata_scsi_release); |
6134 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
6135 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
6136 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6137 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6138 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6139 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6140 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
cca3974e JG |
6141 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
6142 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6a62a04d TH |
6143 | EXPORT_SYMBOL_GPL(ata_id_string); |
6144 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
1da177e4 LT |
6145 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
6146 | ||
1bc4ccff | 6147 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
6148 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
6149 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6150 | ||
1da177e4 LT |
6151 | #ifdef CONFIG_PCI |
6152 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 6153 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
6154 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
6155 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
6156 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
500530f6 TH |
6157 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
6158 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
6159 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
6160 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
6161 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
6162 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 6163 | #endif /* CONFIG_PCI */ |
9b847548 | 6164 | |
9b847548 JA |
6165 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); |
6166 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 6167 | |
ece1d636 | 6168 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6169 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6170 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6171 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6172 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6173 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6174 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6175 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6176 | EXPORT_SYMBOL_GPL(ata_do_eh); |