Commit | Line | Data |
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fd990556 BZ |
1 | /* |
2 | * AHCI SATA platform library | |
3 | * | |
4 | * Copyright 2004-2005 Red Hat, Inc. | |
5 | * Jeff Garzik <jgarzik@pobox.com> | |
6 | * Copyright 2010 MontaVista Software, LLC. | |
7 | * Anton Vorontsov <avorontsov@ru.mvista.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2, or (at your option) | |
12 | * any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/clk.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/gfp.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/device.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/libata.h> | |
24 | #include <linux/ahci_platform.h> | |
25 | #include <linux/phy/phy.h> | |
26 | #include <linux/pm_runtime.h> | |
c7d7ddee | 27 | #include <linux/of_platform.h> |
9d2ab995 | 28 | #include <linux/reset.h> |
fd990556 BZ |
29 | #include "ahci.h" |
30 | ||
31 | static void ahci_host_stop(struct ata_host *host); | |
32 | ||
33 | struct ata_port_operations ahci_platform_ops = { | |
34 | .inherits = &ahci_ops, | |
35 | .host_stop = ahci_host_stop, | |
36 | }; | |
37 | EXPORT_SYMBOL_GPL(ahci_platform_ops); | |
38 | ||
b1a9edbd AT |
39 | /** |
40 | * ahci_platform_enable_phys - Enable PHYs | |
41 | * @hpriv: host private area to store config values | |
42 | * | |
43 | * This function enables all the PHYs found in hpriv->phys, if any. | |
44 | * If a PHY fails to be enabled, it disables all the PHYs already | |
45 | * enabled in reverse order and returns an error. | |
46 | * | |
47 | * RETURNS: | |
48 | * 0 on success otherwise a negative error code | |
49 | */ | |
6bb86fef | 50 | static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) |
b1a9edbd AT |
51 | { |
52 | int rc, i; | |
53 | ||
54 | for (i = 0; i < hpriv->nports; i++) { | |
b1a9edbd AT |
55 | rc = phy_init(hpriv->phys[i]); |
56 | if (rc) | |
57 | goto disable_phys; | |
58 | ||
49e54187 MR |
59 | rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); |
60 | if (rc) { | |
61 | phy_exit(hpriv->phys[i]); | |
62 | goto disable_phys; | |
63 | } | |
64 | ||
b1a9edbd AT |
65 | rc = phy_power_on(hpriv->phys[i]); |
66 | if (rc) { | |
67 | phy_exit(hpriv->phys[i]); | |
68 | goto disable_phys; | |
69 | } | |
70 | } | |
71 | ||
72 | return 0; | |
73 | ||
74 | disable_phys: | |
75 | while (--i >= 0) { | |
76 | phy_power_off(hpriv->phys[i]); | |
77 | phy_exit(hpriv->phys[i]); | |
78 | } | |
79 | return rc; | |
80 | } | |
b1a9edbd AT |
81 | |
82 | /** | |
83 | * ahci_platform_disable_phys - Disable PHYs | |
84 | * @hpriv: host private area to store config values | |
85 | * | |
86 | * This function disables all PHYs found in hpriv->phys. | |
87 | */ | |
6bb86fef | 88 | static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) |
b1a9edbd AT |
89 | { |
90 | int i; | |
91 | ||
92 | for (i = 0; i < hpriv->nports; i++) { | |
b1a9edbd AT |
93 | phy_power_off(hpriv->phys[i]); |
94 | phy_exit(hpriv->phys[i]); | |
95 | } | |
96 | } | |
b1a9edbd | 97 | |
fd990556 BZ |
98 | /** |
99 | * ahci_platform_enable_clks - Enable platform clocks | |
100 | * @hpriv: host private area to store config values | |
101 | * | |
102 | * This function enables all the clks found in hpriv->clks, starting at | |
103 | * index 0. If any clk fails to enable it disables all the clks already | |
104 | * enabled in reverse order, and then returns an error. | |
105 | * | |
106 | * RETURNS: | |
107 | * 0 on success otherwise a negative error code | |
108 | */ | |
109 | int ahci_platform_enable_clks(struct ahci_host_priv *hpriv) | |
110 | { | |
111 | int c, rc; | |
112 | ||
113 | for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) { | |
114 | rc = clk_prepare_enable(hpriv->clks[c]); | |
115 | if (rc) | |
116 | goto disable_unprepare_clk; | |
117 | } | |
118 | return 0; | |
119 | ||
120 | disable_unprepare_clk: | |
121 | while (--c >= 0) | |
122 | clk_disable_unprepare(hpriv->clks[c]); | |
123 | return rc; | |
124 | } | |
125 | EXPORT_SYMBOL_GPL(ahci_platform_enable_clks); | |
126 | ||
127 | /** | |
128 | * ahci_platform_disable_clks - Disable platform clocks | |
129 | * @hpriv: host private area to store config values | |
130 | * | |
131 | * This function disables all the clks found in hpriv->clks, in reverse | |
132 | * order of ahci_platform_enable_clks (starting at the end of the array). | |
133 | */ | |
134 | void ahci_platform_disable_clks(struct ahci_host_priv *hpriv) | |
135 | { | |
136 | int c; | |
137 | ||
138 | for (c = AHCI_MAX_CLKS - 1; c >= 0; c--) | |
139 | if (hpriv->clks[c]) | |
140 | clk_disable_unprepare(hpriv->clks[c]); | |
141 | } | |
142 | EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); | |
143 | ||
c7d7ddee GC |
144 | /** |
145 | * ahci_platform_enable_regulators - Enable regulators | |
146 | * @hpriv: host private area to store config values | |
147 | * | |
a37da918 | 148 | * This function enables all the regulators found in controller and |
c7d7ddee GC |
149 | * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it |
150 | * disables all the regulators already enabled in reverse order and | |
151 | * returns an error. | |
152 | * | |
153 | * RETURNS: | |
154 | * 0 on success otherwise a negative error code | |
155 | */ | |
156 | int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) | |
157 | { | |
158 | int rc, i; | |
159 | ||
a37da918 CL |
160 | if (hpriv->ahci_regulator) { |
161 | rc = regulator_enable(hpriv->ahci_regulator); | |
162 | if (rc) | |
163 | return rc; | |
164 | } | |
165 | ||
f20fb266 CL |
166 | if (hpriv->phy_regulator) { |
167 | rc = regulator_enable(hpriv->phy_regulator); | |
168 | if (rc) | |
169 | goto disable_ahci_pwrs; | |
170 | } | |
171 | ||
c7d7ddee GC |
172 | for (i = 0; i < hpriv->nports; i++) { |
173 | if (!hpriv->target_pwrs[i]) | |
174 | continue; | |
175 | ||
176 | rc = regulator_enable(hpriv->target_pwrs[i]); | |
177 | if (rc) | |
178 | goto disable_target_pwrs; | |
179 | } | |
180 | ||
181 | return 0; | |
182 | ||
183 | disable_target_pwrs: | |
184 | while (--i >= 0) | |
185 | if (hpriv->target_pwrs[i]) | |
186 | regulator_disable(hpriv->target_pwrs[i]); | |
187 | ||
f20fb266 CL |
188 | if (hpriv->phy_regulator) |
189 | regulator_disable(hpriv->phy_regulator); | |
190 | disable_ahci_pwrs: | |
a37da918 CL |
191 | if (hpriv->ahci_regulator) |
192 | regulator_disable(hpriv->ahci_regulator); | |
c7d7ddee GC |
193 | return rc; |
194 | } | |
195 | EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators); | |
196 | ||
197 | /** | |
198 | * ahci_platform_disable_regulators - Disable regulators | |
199 | * @hpriv: host private area to store config values | |
200 | * | |
a37da918 CL |
201 | * This function disables all regulators found in hpriv->target_pwrs and |
202 | * AHCI controller. | |
c7d7ddee GC |
203 | */ |
204 | void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) | |
205 | { | |
206 | int i; | |
207 | ||
208 | for (i = 0; i < hpriv->nports; i++) { | |
209 | if (!hpriv->target_pwrs[i]) | |
210 | continue; | |
211 | regulator_disable(hpriv->target_pwrs[i]); | |
212 | } | |
a37da918 CL |
213 | |
214 | if (hpriv->ahci_regulator) | |
215 | regulator_disable(hpriv->ahci_regulator); | |
f20fb266 CL |
216 | if (hpriv->phy_regulator) |
217 | regulator_disable(hpriv->phy_regulator); | |
c7d7ddee GC |
218 | } |
219 | EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); | |
fd990556 BZ |
220 | /** |
221 | * ahci_platform_enable_resources - Enable platform resources | |
222 | * @hpriv: host private area to store config values | |
223 | * | |
224 | * This function enables all ahci_platform managed resources in the | |
225 | * following order: | |
226 | * 1) Regulator | |
227 | * 2) Clocks (through ahci_platform_enable_clks) | |
9d2ab995 KH |
228 | * 3) Resets |
229 | * 4) Phys | |
fd990556 BZ |
230 | * |
231 | * If resource enabling fails at any point the previous enabled resources | |
232 | * are disabled in reverse order. | |
233 | * | |
234 | * RETURNS: | |
235 | * 0 on success otherwise a negative error code | |
236 | */ | |
237 | int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) | |
238 | { | |
239 | int rc; | |
240 | ||
c7d7ddee GC |
241 | rc = ahci_platform_enable_regulators(hpriv); |
242 | if (rc) | |
243 | return rc; | |
fd990556 BZ |
244 | |
245 | rc = ahci_platform_enable_clks(hpriv); | |
246 | if (rc) | |
247 | goto disable_regulator; | |
248 | ||
9d2ab995 | 249 | rc = reset_control_deassert(hpriv->rsts); |
f0f56716 | 250 | if (rc) |
fd17ed68 | 251 | goto disable_clks; |
f0f56716 | 252 | |
9d2ab995 KH |
253 | rc = ahci_platform_enable_phys(hpriv); |
254 | if (rc) | |
255 | goto disable_resets; | |
256 | ||
fd990556 BZ |
257 | return 0; |
258 | ||
9d2ab995 KH |
259 | disable_resets: |
260 | reset_control_assert(hpriv->rsts); | |
261 | ||
fd990556 BZ |
262 | disable_clks: |
263 | ahci_platform_disable_clks(hpriv); | |
264 | ||
265 | disable_regulator: | |
c7d7ddee GC |
266 | ahci_platform_disable_regulators(hpriv); |
267 | ||
fd990556 BZ |
268 | return rc; |
269 | } | |
270 | EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); | |
271 | ||
272 | /** | |
273 | * ahci_platform_disable_resources - Disable platform resources | |
274 | * @hpriv: host private area to store config values | |
275 | * | |
276 | * This function disables all ahci_platform managed resources in the | |
277 | * following order: | |
b1a9edbd | 278 | * 1) Phys |
9d2ab995 KH |
279 | * 2) Resets |
280 | * 3) Clocks (through ahci_platform_disable_clks) | |
281 | * 4) Regulator | |
fd990556 BZ |
282 | */ |
283 | void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) | |
284 | { | |
b1a9edbd | 285 | ahci_platform_disable_phys(hpriv); |
fd990556 | 286 | |
9d2ab995 KH |
287 | reset_control_assert(hpriv->rsts); |
288 | ||
fd990556 BZ |
289 | ahci_platform_disable_clks(hpriv); |
290 | ||
c7d7ddee | 291 | ahci_platform_disable_regulators(hpriv); |
fd990556 BZ |
292 | } |
293 | EXPORT_SYMBOL_GPL(ahci_platform_disable_resources); | |
294 | ||
295 | static void ahci_platform_put_resources(struct device *dev, void *res) | |
296 | { | |
297 | struct ahci_host_priv *hpriv = res; | |
298 | int c; | |
299 | ||
300 | if (hpriv->got_runtime_pm) { | |
eac7e072 | 301 | pm_runtime_put_sync(dev); |
fd990556 BZ |
302 | pm_runtime_disable(dev); |
303 | } | |
304 | ||
305 | for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) | |
306 | clk_put(hpriv->clks[c]); | |
c7d7ddee GC |
307 | /* |
308 | * The regulators are tied to child node device and not to the | |
309 | * SATA device itself. So we can't use devm for automatically | |
310 | * releasing them. We have to do it manually here. | |
311 | */ | |
312 | for (c = 0; c < hpriv->nports; c++) | |
313 | if (hpriv->target_pwrs && hpriv->target_pwrs[c]) | |
314 | regulator_put(hpriv->target_pwrs[c]); | |
04ba9488 CL |
315 | |
316 | kfree(hpriv->target_pwrs); | |
c7d7ddee GC |
317 | } |
318 | ||
319 | static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, | |
320 | struct device *dev, struct device_node *node) | |
321 | { | |
322 | int rc; | |
323 | ||
324 | hpriv->phys[port] = devm_of_phy_get(dev, node, NULL); | |
325 | ||
326 | if (!IS_ERR(hpriv->phys[port])) | |
327 | return 0; | |
328 | ||
329 | rc = PTR_ERR(hpriv->phys[port]); | |
330 | switch (rc) { | |
331 | case -ENOSYS: | |
332 | /* No PHY support. Check if PHY is required. */ | |
333 | if (of_find_property(node, "phys", NULL)) { | |
334 | dev_err(dev, | |
2ce711f9 RH |
335 | "couldn't get PHY in node %pOFn: ENOSYS\n", |
336 | node); | |
c7d7ddee GC |
337 | break; |
338 | } | |
05b83605 | 339 | /* fall through */ |
c7d7ddee GC |
340 | case -ENODEV: |
341 | /* continue normally */ | |
342 | hpriv->phys[port] = NULL; | |
343 | rc = 0; | |
344 | break; | |
345 | ||
346 | default: | |
347 | dev_err(dev, | |
2ce711f9 RH |
348 | "couldn't get PHY in node %pOFn: %d\n", |
349 | node, rc); | |
c7d7ddee GC |
350 | |
351 | break; | |
352 | } | |
353 | ||
354 | return rc; | |
355 | } | |
356 | ||
357 | static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, | |
358 | struct device *dev) | |
359 | { | |
360 | struct regulator *target_pwr; | |
361 | int rc = 0; | |
362 | ||
363 | target_pwr = regulator_get_optional(dev, "target"); | |
364 | ||
365 | if (!IS_ERR(target_pwr)) | |
366 | hpriv->target_pwrs[port] = target_pwr; | |
367 | else | |
368 | rc = PTR_ERR(target_pwr); | |
369 | ||
370 | return rc; | |
fd990556 BZ |
371 | } |
372 | ||
373 | /** | |
374 | * ahci_platform_get_resources - Get platform resources | |
375 | * @pdev: platform device to get resources for | |
16af2d65 | 376 | * @flags: bitmap representing the resource to get |
fd990556 BZ |
377 | * |
378 | * This function allocates an ahci_host_priv struct, and gets the following | |
379 | * resources, storing a reference to them inside the returned struct: | |
380 | * | |
381 | * 1) mmio registers (IORESOURCE_MEM 0, mandatory) | |
382 | * 2) regulator for controlling the targets power (optional) | |
a37da918 | 383 | * regulator for controlling the AHCI controller (optional) |
fd990556 BZ |
384 | * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, |
385 | * or for non devicetree enabled platforms a single clock | |
9d2ab995 KH |
386 | * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional) |
387 | * 5) phys (optional) | |
fd990556 BZ |
388 | * |
389 | * RETURNS: | |
390 | * The allocated ahci_host_priv on success, otherwise an ERR_PTR value | |
391 | */ | |
16af2d65 KH |
392 | struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, |
393 | unsigned int flags) | |
fd990556 BZ |
394 | { |
395 | struct device *dev = &pdev->dev; | |
396 | struct ahci_host_priv *hpriv; | |
397 | struct clk *clk; | |
b1a9edbd | 398 | struct device_node *child; |
a4b9f5ed | 399 | int i, enabled_ports = 0, rc = -ENOMEM, child_nodes; |
b1a9edbd | 400 | u32 mask_port_map = 0; |
fd990556 BZ |
401 | |
402 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | |
403 | return ERR_PTR(-ENOMEM); | |
404 | ||
405 | hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv), | |
406 | GFP_KERNEL); | |
407 | if (!hpriv) | |
408 | goto err_out; | |
409 | ||
410 | devres_add(dev, hpriv); | |
411 | ||
412 | hpriv->mmio = devm_ioremap_resource(dev, | |
413 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); | |
414 | if (IS_ERR(hpriv->mmio)) { | |
415 | dev_err(dev, "no mmio space\n"); | |
416 | rc = PTR_ERR(hpriv->mmio); | |
417 | goto err_out; | |
418 | } | |
419 | ||
fd990556 BZ |
420 | for (i = 0; i < AHCI_MAX_CLKS; i++) { |
421 | /* | |
422 | * For now we must use clk_get(dev, NULL) for the first clock, | |
423 | * because some platforms (da850, spear13xx) are not yet | |
424 | * converted to use devicetree for clocks. For new platforms | |
425 | * this is equivalent to of_clk_get(dev->of_node, 0). | |
426 | */ | |
427 | if (i == 0) | |
428 | clk = clk_get(dev, NULL); | |
429 | else | |
430 | clk = of_clk_get(dev->of_node, i); | |
431 | ||
432 | if (IS_ERR(clk)) { | |
433 | rc = PTR_ERR(clk); | |
434 | if (rc == -EPROBE_DEFER) | |
435 | goto err_out; | |
436 | break; | |
437 | } | |
438 | hpriv->clks[i] = clk; | |
439 | } | |
440 | ||
a37da918 CL |
441 | hpriv->ahci_regulator = devm_regulator_get_optional(dev, "ahci"); |
442 | if (IS_ERR(hpriv->ahci_regulator)) { | |
443 | rc = PTR_ERR(hpriv->ahci_regulator); | |
444 | if (rc == -EPROBE_DEFER) | |
445 | goto err_out; | |
446 | rc = 0; | |
447 | hpriv->ahci_regulator = NULL; | |
448 | } | |
449 | ||
f20fb266 CL |
450 | hpriv->phy_regulator = devm_regulator_get_optional(dev, "phy"); |
451 | if (IS_ERR(hpriv->phy_regulator)) { | |
452 | rc = PTR_ERR(hpriv->phy_regulator); | |
453 | if (rc == -EPROBE_DEFER) | |
454 | goto err_out; | |
455 | rc = 0; | |
456 | hpriv->phy_regulator = NULL; | |
457 | } | |
458 | ||
9d2ab995 KH |
459 | if (flags & AHCI_PLATFORM_GET_RESETS) { |
460 | hpriv->rsts = devm_reset_control_array_get_optional_shared(dev); | |
461 | if (IS_ERR(hpriv->rsts)) { | |
462 | rc = PTR_ERR(hpriv->rsts); | |
463 | goto err_out; | |
464 | } | |
465 | } | |
466 | ||
c7d7ddee | 467 | hpriv->nports = child_nodes = of_get_child_count(dev->of_node); |
b1a9edbd | 468 | |
c7d7ddee GC |
469 | /* |
470 | * If no sub-node was found, we still need to set nports to | |
471 | * one in order to be able to use the | |
472 | * ahci_platform_[en|dis]able_[phys|regulators] functions. | |
473 | */ | |
474 | if (!child_nodes) | |
475 | hpriv->nports = 1; | |
476 | ||
a4b9f5ed | 477 | hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL); |
c7d7ddee GC |
478 | if (!hpriv->phys) { |
479 | rc = -ENOMEM; | |
480 | goto err_out; | |
481 | } | |
04ba9488 CL |
482 | /* |
483 | * We cannot use devm_ here, since ahci_platform_put_resources() uses | |
484 | * target_pwrs after devm_ have freed memory | |
485 | */ | |
486 | hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL); | |
c7d7ddee GC |
487 | if (!hpriv->target_pwrs) { |
488 | rc = -ENOMEM; | |
489 | goto err_out; | |
490 | } | |
b1a9edbd | 491 | |
c7d7ddee | 492 | if (child_nodes) { |
b1a9edbd AT |
493 | for_each_child_of_node(dev->of_node, child) { |
494 | u32 port; | |
f627cfde | 495 | struct platform_device *port_dev __maybe_unused; |
b1a9edbd AT |
496 | |
497 | if (!of_device_is_available(child)) | |
498 | continue; | |
499 | ||
500 | if (of_property_read_u32(child, "reg", &port)) { | |
501 | rc = -EINVAL; | |
acbd5733 MP |
502 | goto err_out; |
503 | } | |
fd990556 | 504 | |
b1a9edbd AT |
505 | if (port >= hpriv->nports) { |
506 | dev_warn(dev, "invalid port number %d\n", port); | |
507 | continue; | |
508 | } | |
b1a9edbd AT |
509 | mask_port_map |= BIT(port); |
510 | ||
f627cfde | 511 | #ifdef CONFIG_OF_ADDRESS |
c7d7ddee GC |
512 | of_platform_device_create(child, NULL, NULL); |
513 | ||
514 | port_dev = of_find_device_by_node(child); | |
515 | ||
516 | if (port_dev) { | |
517 | rc = ahci_platform_get_regulator(hpriv, port, | |
518 | &port_dev->dev); | |
519 | if (rc == -EPROBE_DEFER) | |
520 | goto err_out; | |
b1a9edbd | 521 | } |
f627cfde | 522 | #endif |
fd990556 | 523 | |
c7d7ddee GC |
524 | rc = ahci_platform_get_phy(hpriv, port, dev, child); |
525 | if (rc) | |
526 | goto err_out; | |
527 | ||
b1a9edbd AT |
528 | enabled_ports++; |
529 | } | |
530 | if (!enabled_ports) { | |
531 | dev_warn(dev, "No port enabled\n"); | |
532 | rc = -ENODEV; | |
fd990556 BZ |
533 | goto err_out; |
534 | } | |
b1a9edbd AT |
535 | |
536 | if (!hpriv->mask_port_map) | |
537 | hpriv->mask_port_map = mask_port_map; | |
538 | } else { | |
539 | /* | |
540 | * If no sub-node was found, keep this for device tree | |
541 | * compatibility | |
542 | */ | |
c7d7ddee GC |
543 | rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node); |
544 | if (rc) | |
545 | goto err_out; | |
b1a9edbd | 546 | |
c7d7ddee GC |
547 | rc = ahci_platform_get_regulator(hpriv, 0, dev); |
548 | if (rc == -EPROBE_DEFER) | |
549 | goto err_out; | |
fd990556 | 550 | } |
fd990556 | 551 | pm_runtime_enable(dev); |
eac7e072 | 552 | pm_runtime_get_sync(dev); |
fd990556 BZ |
553 | hpriv->got_runtime_pm = true; |
554 | ||
555 | devres_remove_group(dev, NULL); | |
556 | return hpriv; | |
557 | ||
558 | err_out: | |
559 | devres_release_group(dev, NULL); | |
560 | return ERR_PTR(rc); | |
561 | } | |
562 | EXPORT_SYMBOL_GPL(ahci_platform_get_resources); | |
563 | ||
564 | /** | |
565 | * ahci_platform_init_host - Bring up an ahci-platform host | |
566 | * @pdev: platform device pointer for the host | |
567 | * @hpriv: ahci-host private data for the host | |
568 | * @pi_template: template for the ata_port_info to use | |
018d5ef2 | 569 | * @sht: scsi_host_template to use when registering |
fd990556 BZ |
570 | * |
571 | * This function does all the usual steps needed to bring up an | |
b1a9edbd | 572 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
fd990556 BZ |
573 | * must be initialized / enabled before calling this. |
574 | * | |
575 | * RETURNS: | |
576 | * 0 on success otherwise a negative error code | |
577 | */ | |
578 | int ahci_platform_init_host(struct platform_device *pdev, | |
579 | struct ahci_host_priv *hpriv, | |
018d5ef2 AM |
580 | const struct ata_port_info *pi_template, |
581 | struct scsi_host_template *sht) | |
fd990556 BZ |
582 | { |
583 | struct device *dev = &pdev->dev; | |
584 | struct ata_port_info pi = *pi_template; | |
585 | const struct ata_port_info *ppi[] = { &pi, NULL }; | |
586 | struct ata_host *host; | |
587 | int i, irq, n_ports, rc; | |
588 | ||
589 | irq = platform_get_irq(pdev, 0); | |
590 | if (irq <= 0) { | |
c034640a TP |
591 | if (irq != -EPROBE_DEFER) |
592 | dev_err(dev, "no irq\n"); | |
593 | return irq; | |
fd990556 BZ |
594 | } |
595 | ||
21bfd1aa RR |
596 | hpriv->irq = irq; |
597 | ||
fd990556 | 598 | /* prepare host */ |
c4121c65 | 599 | pi.private_data = (void *)(unsigned long)hpriv->flags; |
fd990556 | 600 | |
725c7b57 | 601 | ahci_save_initial_config(dev, hpriv); |
fd990556 BZ |
602 | |
603 | if (hpriv->cap & HOST_CAP_NCQ) | |
604 | pi.flags |= ATA_FLAG_NCQ; | |
605 | ||
606 | if (hpriv->cap & HOST_CAP_PMP) | |
607 | pi.flags |= ATA_FLAG_PMP; | |
608 | ||
609 | ahci_set_em_messages(hpriv, &pi); | |
610 | ||
611 | /* CAP.NP sometimes indicate the index of the last enabled | |
612 | * port, at other times, that of the last possible port, so | |
613 | * determining the maximum port number requires looking at | |
614 | * both CAP.NP and port_map. | |
615 | */ | |
616 | n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); | |
617 | ||
618 | host = ata_host_alloc_pinfo(dev, ppi, n_ports); | |
619 | if (!host) | |
620 | return -ENOMEM; | |
621 | ||
622 | host->private_data = hpriv; | |
623 | ||
624 | if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) | |
625 | host->flags |= ATA_HOST_PARALLEL_SCAN; | |
626 | else | |
627 | dev_info(dev, "SSS flag set, parallel bus scan disabled\n"); | |
628 | ||
629 | if (pi.flags & ATA_FLAG_EM) | |
630 | ahci_reset_em(host); | |
631 | ||
632 | for (i = 0; i < host->n_ports; i++) { | |
633 | struct ata_port *ap = host->ports[i]; | |
634 | ||
635 | ata_port_desc(ap, "mmio %pR", | |
636 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); | |
637 | ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80); | |
638 | ||
639 | /* set enclosure management message type */ | |
640 | if (ap->flags & ATA_FLAG_EM) | |
641 | ap->em_message_type = hpriv->em_msg_type; | |
642 | ||
643 | /* disabled/not-implemented port */ | |
644 | if (!(hpriv->port_map & (1 << i))) | |
645 | ap->ops = &ata_dummy_port_ops; | |
646 | } | |
647 | ||
cc7a9e27 SS |
648 | if (hpriv->cap & HOST_CAP_64) { |
649 | rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); | |
650 | if (rc) { | |
651 | rc = dma_coerce_mask_and_coherent(dev, | |
652 | DMA_BIT_MASK(32)); | |
653 | if (rc) { | |
654 | dev_err(dev, "Failed to enable 64-bit DMA.\n"); | |
655 | return rc; | |
656 | } | |
657 | dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n"); | |
658 | } | |
659 | } | |
660 | ||
fd990556 BZ |
661 | rc = ahci_reset_controller(host); |
662 | if (rc) | |
663 | return rc; | |
664 | ||
665 | ahci_init_controller(host); | |
666 | ahci_print_info(host, "platform"); | |
667 | ||
21bfd1aa | 668 | return ahci_host_activate(host, sht); |
fd990556 BZ |
669 | } |
670 | EXPORT_SYMBOL_GPL(ahci_platform_init_host); | |
671 | ||
672 | static void ahci_host_stop(struct ata_host *host) | |
673 | { | |
fd990556 BZ |
674 | struct ahci_host_priv *hpriv = host->private_data; |
675 | ||
fd990556 BZ |
676 | ahci_platform_disable_resources(hpriv); |
677 | } | |
678 | ||
8eede5bc NW |
679 | /** |
680 | * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports | |
7cf5fc65 | 681 | * @pdev: platform device pointer for the host |
8eede5bc NW |
682 | * |
683 | * This function is called during system shutdown and performs the minimal | |
684 | * deconfiguration required to ensure that an ahci_platform host cannot | |
685 | * corrupt or otherwise interfere with a new kernel being started with kexec. | |
686 | */ | |
687 | void ahci_platform_shutdown(struct platform_device *pdev) | |
688 | { | |
689 | struct ata_host *host = platform_get_drvdata(pdev); | |
690 | struct ahci_host_priv *hpriv = host->private_data; | |
691 | void __iomem *mmio = hpriv->mmio; | |
692 | int i; | |
693 | ||
694 | for (i = 0; i < host->n_ports; i++) { | |
695 | struct ata_port *ap = host->ports[i]; | |
696 | ||
697 | /* Disable port interrupts */ | |
698 | if (ap->ops->freeze) | |
699 | ap->ops->freeze(ap); | |
700 | ||
701 | /* Stop the port DMA engines */ | |
702 | if (ap->ops->port_stop) | |
703 | ap->ops->port_stop(ap); | |
704 | } | |
705 | ||
706 | /* Disable and clear host interrupts */ | |
707 | writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL); | |
708 | readl(mmio + HOST_CTL); /* flush */ | |
709 | writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT); | |
710 | } | |
711 | EXPORT_SYMBOL_GPL(ahci_platform_shutdown); | |
712 | ||
fd990556 BZ |
713 | #ifdef CONFIG_PM_SLEEP |
714 | /** | |
715 | * ahci_platform_suspend_host - Suspend an ahci-platform host | |
716 | * @dev: device pointer for the host | |
717 | * | |
718 | * This function does all the usual steps needed to suspend an | |
b1a9edbd | 719 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
fd990556 BZ |
720 | * must be disabled after calling this. |
721 | * | |
722 | * RETURNS: | |
723 | * 0 on success otherwise a negative error code | |
724 | */ | |
725 | int ahci_platform_suspend_host(struct device *dev) | |
726 | { | |
727 | struct ata_host *host = dev_get_drvdata(dev); | |
728 | struct ahci_host_priv *hpriv = host->private_data; | |
729 | void __iomem *mmio = hpriv->mmio; | |
730 | u32 ctl; | |
731 | ||
732 | if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { | |
733 | dev_err(dev, "firmware update required for suspend/resume\n"); | |
734 | return -EIO; | |
735 | } | |
736 | ||
737 | /* | |
738 | * AHCI spec rev1.1 section 8.3.3: | |
739 | * Software must disable interrupts prior to requesting a | |
740 | * transition of the HBA to D3 state. | |
741 | */ | |
742 | ctl = readl(mmio + HOST_CTL); | |
743 | ctl &= ~HOST_IRQ_EN; | |
744 | writel(ctl, mmio + HOST_CTL); | |
745 | readl(mmio + HOST_CTL); /* flush */ | |
746 | ||
49e54187 MR |
747 | if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) |
748 | ahci_platform_disable_phys(hpriv); | |
749 | ||
fd990556 BZ |
750 | return ata_host_suspend(host, PMSG_SUSPEND); |
751 | } | |
752 | EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); | |
753 | ||
754 | /** | |
755 | * ahci_platform_resume_host - Resume an ahci-platform host | |
756 | * @dev: device pointer for the host | |
757 | * | |
758 | * This function does all the usual steps needed to resume an ahci-platform | |
b1a9edbd | 759 | * host, note any necessary resources (ie clks, phys, etc.) must be |
fd990556 BZ |
760 | * initialized / enabled before calling this. |
761 | * | |
762 | * RETURNS: | |
763 | * 0 on success otherwise a negative error code | |
764 | */ | |
765 | int ahci_platform_resume_host(struct device *dev) | |
766 | { | |
767 | struct ata_host *host = dev_get_drvdata(dev); | |
49e54187 | 768 | struct ahci_host_priv *hpriv = host->private_data; |
fd990556 BZ |
769 | int rc; |
770 | ||
771 | if (dev->power.power_state.event == PM_EVENT_SUSPEND) { | |
772 | rc = ahci_reset_controller(host); | |
773 | if (rc) | |
774 | return rc; | |
775 | ||
776 | ahci_init_controller(host); | |
777 | } | |
778 | ||
49e54187 MR |
779 | if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) |
780 | ahci_platform_enable_phys(hpriv); | |
781 | ||
fd990556 BZ |
782 | ata_host_resume(host); |
783 | ||
784 | return 0; | |
785 | } | |
786 | EXPORT_SYMBOL_GPL(ahci_platform_resume_host); | |
787 | ||
788 | /** | |
789 | * ahci_platform_suspend - Suspend an ahci-platform device | |
790 | * @dev: the platform device to suspend | |
791 | * | |
792 | * This function suspends the host associated with the device, followed by | |
793 | * disabling all the resources of the device. | |
794 | * | |
795 | * RETURNS: | |
796 | * 0 on success otherwise a negative error code | |
797 | */ | |
798 | int ahci_platform_suspend(struct device *dev) | |
799 | { | |
fd990556 BZ |
800 | struct ata_host *host = dev_get_drvdata(dev); |
801 | struct ahci_host_priv *hpriv = host->private_data; | |
802 | int rc; | |
803 | ||
eac7e072 | 804 | rc = ahci_platform_suspend_host(dev); |
fd990556 BZ |
805 | if (rc) |
806 | return rc; | |
807 | ||
eac7e072 | 808 | ahci_platform_disable_resources(hpriv); |
fd990556 BZ |
809 | |
810 | return 0; | |
fd990556 | 811 | } |
eac7e072 | 812 | EXPORT_SYMBOL_GPL(ahci_platform_suspend); |
fd990556 BZ |
813 | |
814 | /** | |
815 | * ahci_platform_resume - Resume an ahci-platform device | |
816 | * @dev: the platform device to resume | |
817 | * | |
818 | * This function enables all the resources of the device followed by | |
819 | * resuming the host associated with the device. | |
820 | * | |
821 | * RETURNS: | |
822 | * 0 on success otherwise a negative error code | |
823 | */ | |
824 | int ahci_platform_resume(struct device *dev) | |
825 | { | |
eac7e072 TH |
826 | struct ata_host *host = dev_get_drvdata(dev); |
827 | struct ahci_host_priv *hpriv = host->private_data; | |
fd990556 BZ |
828 | int rc; |
829 | ||
eac7e072 | 830 | rc = ahci_platform_enable_resources(hpriv); |
fd990556 BZ |
831 | if (rc) |
832 | return rc; | |
833 | ||
eac7e072 TH |
834 | rc = ahci_platform_resume_host(dev); |
835 | if (rc) | |
836 | goto disable_resources; | |
837 | ||
fd990556 BZ |
838 | /* We resumed so update PM runtime state */ |
839 | pm_runtime_disable(dev); | |
840 | pm_runtime_set_active(dev); | |
841 | pm_runtime_enable(dev); | |
842 | ||
843 | return 0; | |
aece27a2 | 844 | |
eac7e072 TH |
845 | disable_resources: |
846 | ahci_platform_disable_resources(hpriv); | |
aece27a2 | 847 | |
eac7e072 TH |
848 | return rc; |
849 | } | |
850 | EXPORT_SYMBOL_GPL(ahci_platform_resume); | |
fd990556 BZ |
851 | #endif |
852 | ||
853 | MODULE_DESCRIPTION("AHCI SATA platform library"); | |
854 | MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); | |
855 | MODULE_LICENSE("GPL"); |