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fd990556 BZ |
1 | /* |
2 | * AHCI SATA platform library | |
3 | * | |
4 | * Copyright 2004-2005 Red Hat, Inc. | |
5 | * Jeff Garzik <jgarzik@pobox.com> | |
6 | * Copyright 2010 MontaVista Software, LLC. | |
7 | * Anton Vorontsov <avorontsov@ru.mvista.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2, or (at your option) | |
12 | * any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/clk.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/gfp.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/device.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/libata.h> | |
24 | #include <linux/ahci_platform.h> | |
25 | #include <linux/phy/phy.h> | |
26 | #include <linux/pm_runtime.h> | |
27 | #include "ahci.h" | |
28 | ||
29 | static void ahci_host_stop(struct ata_host *host); | |
30 | ||
31 | struct ata_port_operations ahci_platform_ops = { | |
32 | .inherits = &ahci_ops, | |
33 | .host_stop = ahci_host_stop, | |
34 | }; | |
35 | EXPORT_SYMBOL_GPL(ahci_platform_ops); | |
36 | ||
37 | static struct scsi_host_template ahci_platform_sht = { | |
38 | AHCI_SHT("ahci_platform"), | |
39 | }; | |
40 | ||
b1a9edbd AT |
41 | /** |
42 | * ahci_platform_enable_phys - Enable PHYs | |
43 | * @hpriv: host private area to store config values | |
44 | * | |
45 | * This function enables all the PHYs found in hpriv->phys, if any. | |
46 | * If a PHY fails to be enabled, it disables all the PHYs already | |
47 | * enabled in reverse order and returns an error. | |
48 | * | |
49 | * RETURNS: | |
50 | * 0 on success otherwise a negative error code | |
51 | */ | |
6bb86fef | 52 | static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) |
b1a9edbd AT |
53 | { |
54 | int rc, i; | |
55 | ||
56 | for (i = 0; i < hpriv->nports; i++) { | |
57 | if (!hpriv->phys[i]) | |
58 | continue; | |
59 | ||
60 | rc = phy_init(hpriv->phys[i]); | |
61 | if (rc) | |
62 | goto disable_phys; | |
63 | ||
64 | rc = phy_power_on(hpriv->phys[i]); | |
65 | if (rc) { | |
66 | phy_exit(hpriv->phys[i]); | |
67 | goto disable_phys; | |
68 | } | |
69 | } | |
70 | ||
71 | return 0; | |
72 | ||
73 | disable_phys: | |
74 | while (--i >= 0) { | |
75 | phy_power_off(hpriv->phys[i]); | |
76 | phy_exit(hpriv->phys[i]); | |
77 | } | |
78 | return rc; | |
79 | } | |
b1a9edbd AT |
80 | |
81 | /** | |
82 | * ahci_platform_disable_phys - Disable PHYs | |
83 | * @hpriv: host private area to store config values | |
84 | * | |
85 | * This function disables all PHYs found in hpriv->phys. | |
86 | */ | |
6bb86fef | 87 | static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) |
b1a9edbd AT |
88 | { |
89 | int i; | |
90 | ||
91 | for (i = 0; i < hpriv->nports; i++) { | |
92 | if (!hpriv->phys[i]) | |
93 | continue; | |
94 | ||
95 | phy_power_off(hpriv->phys[i]); | |
96 | phy_exit(hpriv->phys[i]); | |
97 | } | |
98 | } | |
b1a9edbd | 99 | |
fd990556 BZ |
100 | /** |
101 | * ahci_platform_enable_clks - Enable platform clocks | |
102 | * @hpriv: host private area to store config values | |
103 | * | |
104 | * This function enables all the clks found in hpriv->clks, starting at | |
105 | * index 0. If any clk fails to enable it disables all the clks already | |
106 | * enabled in reverse order, and then returns an error. | |
107 | * | |
108 | * RETURNS: | |
109 | * 0 on success otherwise a negative error code | |
110 | */ | |
111 | int ahci_platform_enable_clks(struct ahci_host_priv *hpriv) | |
112 | { | |
113 | int c, rc; | |
114 | ||
115 | for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) { | |
116 | rc = clk_prepare_enable(hpriv->clks[c]); | |
117 | if (rc) | |
118 | goto disable_unprepare_clk; | |
119 | } | |
120 | return 0; | |
121 | ||
122 | disable_unprepare_clk: | |
123 | while (--c >= 0) | |
124 | clk_disable_unprepare(hpriv->clks[c]); | |
125 | return rc; | |
126 | } | |
127 | EXPORT_SYMBOL_GPL(ahci_platform_enable_clks); | |
128 | ||
129 | /** | |
130 | * ahci_platform_disable_clks - Disable platform clocks | |
131 | * @hpriv: host private area to store config values | |
132 | * | |
133 | * This function disables all the clks found in hpriv->clks, in reverse | |
134 | * order of ahci_platform_enable_clks (starting at the end of the array). | |
135 | */ | |
136 | void ahci_platform_disable_clks(struct ahci_host_priv *hpriv) | |
137 | { | |
138 | int c; | |
139 | ||
140 | for (c = AHCI_MAX_CLKS - 1; c >= 0; c--) | |
141 | if (hpriv->clks[c]) | |
142 | clk_disable_unprepare(hpriv->clks[c]); | |
143 | } | |
144 | EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); | |
145 | ||
146 | /** | |
147 | * ahci_platform_enable_resources - Enable platform resources | |
148 | * @hpriv: host private area to store config values | |
149 | * | |
150 | * This function enables all ahci_platform managed resources in the | |
151 | * following order: | |
152 | * 1) Regulator | |
153 | * 2) Clocks (through ahci_platform_enable_clks) | |
b1a9edbd | 154 | * 3) Phys |
fd990556 BZ |
155 | * |
156 | * If resource enabling fails at any point the previous enabled resources | |
157 | * are disabled in reverse order. | |
158 | * | |
159 | * RETURNS: | |
160 | * 0 on success otherwise a negative error code | |
161 | */ | |
162 | int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) | |
163 | { | |
164 | int rc; | |
165 | ||
166 | if (hpriv->target_pwr) { | |
167 | rc = regulator_enable(hpriv->target_pwr); | |
168 | if (rc) | |
169 | return rc; | |
170 | } | |
171 | ||
172 | rc = ahci_platform_enable_clks(hpriv); | |
173 | if (rc) | |
174 | goto disable_regulator; | |
175 | ||
b1a9edbd AT |
176 | rc = ahci_platform_enable_phys(hpriv); |
177 | if (rc) | |
178 | goto disable_clks; | |
fd990556 BZ |
179 | |
180 | return 0; | |
181 | ||
182 | disable_clks: | |
183 | ahci_platform_disable_clks(hpriv); | |
184 | ||
185 | disable_regulator: | |
186 | if (hpriv->target_pwr) | |
187 | regulator_disable(hpriv->target_pwr); | |
188 | return rc; | |
189 | } | |
190 | EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); | |
191 | ||
192 | /** | |
193 | * ahci_platform_disable_resources - Disable platform resources | |
194 | * @hpriv: host private area to store config values | |
195 | * | |
196 | * This function disables all ahci_platform managed resources in the | |
197 | * following order: | |
b1a9edbd | 198 | * 1) Phys |
fd990556 BZ |
199 | * 2) Clocks (through ahci_platform_disable_clks) |
200 | * 3) Regulator | |
201 | */ | |
202 | void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) | |
203 | { | |
b1a9edbd | 204 | ahci_platform_disable_phys(hpriv); |
fd990556 BZ |
205 | |
206 | ahci_platform_disable_clks(hpriv); | |
207 | ||
208 | if (hpriv->target_pwr) | |
209 | regulator_disable(hpriv->target_pwr); | |
210 | } | |
211 | EXPORT_SYMBOL_GPL(ahci_platform_disable_resources); | |
212 | ||
213 | static void ahci_platform_put_resources(struct device *dev, void *res) | |
214 | { | |
215 | struct ahci_host_priv *hpriv = res; | |
216 | int c; | |
217 | ||
218 | if (hpriv->got_runtime_pm) { | |
219 | pm_runtime_put_sync(dev); | |
220 | pm_runtime_disable(dev); | |
221 | } | |
222 | ||
223 | for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) | |
224 | clk_put(hpriv->clks[c]); | |
225 | } | |
226 | ||
227 | /** | |
228 | * ahci_platform_get_resources - Get platform resources | |
229 | * @pdev: platform device to get resources for | |
230 | * | |
231 | * This function allocates an ahci_host_priv struct, and gets the following | |
232 | * resources, storing a reference to them inside the returned struct: | |
233 | * | |
234 | * 1) mmio registers (IORESOURCE_MEM 0, mandatory) | |
235 | * 2) regulator for controlling the targets power (optional) | |
236 | * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, | |
237 | * or for non devicetree enabled platforms a single clock | |
b1a9edbd | 238 | * 4) phys (optional) |
fd990556 BZ |
239 | * |
240 | * RETURNS: | |
241 | * The allocated ahci_host_priv on success, otherwise an ERR_PTR value | |
242 | */ | |
243 | struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) | |
244 | { | |
245 | struct device *dev = &pdev->dev; | |
246 | struct ahci_host_priv *hpriv; | |
247 | struct clk *clk; | |
b1a9edbd AT |
248 | struct device_node *child; |
249 | int i, enabled_ports = 0, rc = -ENOMEM; | |
250 | u32 mask_port_map = 0; | |
fd990556 BZ |
251 | |
252 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | |
253 | return ERR_PTR(-ENOMEM); | |
254 | ||
255 | hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv), | |
256 | GFP_KERNEL); | |
257 | if (!hpriv) | |
258 | goto err_out; | |
259 | ||
260 | devres_add(dev, hpriv); | |
261 | ||
262 | hpriv->mmio = devm_ioremap_resource(dev, | |
263 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); | |
264 | if (IS_ERR(hpriv->mmio)) { | |
265 | dev_err(dev, "no mmio space\n"); | |
266 | rc = PTR_ERR(hpriv->mmio); | |
267 | goto err_out; | |
268 | } | |
269 | ||
270 | hpriv->target_pwr = devm_regulator_get_optional(dev, "target"); | |
271 | if (IS_ERR(hpriv->target_pwr)) { | |
272 | rc = PTR_ERR(hpriv->target_pwr); | |
273 | if (rc == -EPROBE_DEFER) | |
274 | goto err_out; | |
275 | hpriv->target_pwr = NULL; | |
276 | } | |
277 | ||
278 | for (i = 0; i < AHCI_MAX_CLKS; i++) { | |
279 | /* | |
280 | * For now we must use clk_get(dev, NULL) for the first clock, | |
281 | * because some platforms (da850, spear13xx) are not yet | |
282 | * converted to use devicetree for clocks. For new platforms | |
283 | * this is equivalent to of_clk_get(dev->of_node, 0). | |
284 | */ | |
285 | if (i == 0) | |
286 | clk = clk_get(dev, NULL); | |
287 | else | |
288 | clk = of_clk_get(dev->of_node, i); | |
289 | ||
290 | if (IS_ERR(clk)) { | |
291 | rc = PTR_ERR(clk); | |
292 | if (rc == -EPROBE_DEFER) | |
293 | goto err_out; | |
294 | break; | |
295 | } | |
296 | hpriv->clks[i] = clk; | |
297 | } | |
298 | ||
b1a9edbd AT |
299 | hpriv->nports = of_get_child_count(dev->of_node); |
300 | ||
301 | if (hpriv->nports) { | |
302 | hpriv->phys = devm_kzalloc(dev, | |
303 | hpriv->nports * sizeof(*hpriv->phys), | |
304 | GFP_KERNEL); | |
305 | if (!hpriv->phys) { | |
306 | rc = -ENOMEM; | |
307 | goto err_out; | |
308 | } | |
309 | ||
310 | for_each_child_of_node(dev->of_node, child) { | |
311 | u32 port; | |
312 | ||
313 | if (!of_device_is_available(child)) | |
314 | continue; | |
315 | ||
316 | if (of_property_read_u32(child, "reg", &port)) { | |
317 | rc = -EINVAL; | |
acbd5733 MP |
318 | goto err_out; |
319 | } | |
fd990556 | 320 | |
b1a9edbd AT |
321 | if (port >= hpriv->nports) { |
322 | dev_warn(dev, "invalid port number %d\n", port); | |
323 | continue; | |
324 | } | |
325 | ||
326 | mask_port_map |= BIT(port); | |
327 | ||
328 | hpriv->phys[port] = devm_of_phy_get(dev, child, NULL); | |
329 | if (IS_ERR(hpriv->phys[port])) { | |
330 | rc = PTR_ERR(hpriv->phys[port]); | |
331 | dev_err(dev, | |
332 | "couldn't get PHY in node %s: %d\n", | |
333 | child->name, rc); | |
334 | goto err_out; | |
335 | } | |
fd990556 | 336 | |
b1a9edbd AT |
337 | enabled_ports++; |
338 | } | |
339 | if (!enabled_ports) { | |
340 | dev_warn(dev, "No port enabled\n"); | |
341 | rc = -ENODEV; | |
fd990556 BZ |
342 | goto err_out; |
343 | } | |
b1a9edbd AT |
344 | |
345 | if (!hpriv->mask_port_map) | |
346 | hpriv->mask_port_map = mask_port_map; | |
347 | } else { | |
348 | /* | |
349 | * If no sub-node was found, keep this for device tree | |
350 | * compatibility | |
351 | */ | |
352 | struct phy *phy = devm_phy_get(dev, "sata-phy"); | |
353 | if (!IS_ERR(phy)) { | |
354 | hpriv->phys = devm_kzalloc(dev, sizeof(*hpriv->phys), | |
355 | GFP_KERNEL); | |
356 | if (!hpriv->phys) { | |
357 | rc = -ENOMEM; | |
358 | goto err_out; | |
359 | } | |
360 | ||
361 | hpriv->phys[0] = phy; | |
362 | hpriv->nports = 1; | |
363 | } else { | |
364 | rc = PTR_ERR(phy); | |
365 | switch (rc) { | |
366 | case -ENOSYS: | |
367 | /* No PHY support. Check if PHY is required. */ | |
368 | if (of_find_property(dev->of_node, "phys", NULL)) { | |
369 | dev_err(dev, "couldn't get sata-phy: ENOSYS\n"); | |
370 | goto err_out; | |
371 | } | |
372 | case -ENODEV: | |
373 | /* continue normally */ | |
374 | hpriv->phys = NULL; | |
375 | break; | |
376 | ||
377 | default: | |
378 | goto err_out; | |
379 | ||
380 | } | |
381 | } | |
fd990556 BZ |
382 | } |
383 | ||
384 | pm_runtime_enable(dev); | |
385 | pm_runtime_get_sync(dev); | |
386 | hpriv->got_runtime_pm = true; | |
387 | ||
388 | devres_remove_group(dev, NULL); | |
389 | return hpriv; | |
390 | ||
391 | err_out: | |
392 | devres_release_group(dev, NULL); | |
393 | return ERR_PTR(rc); | |
394 | } | |
395 | EXPORT_SYMBOL_GPL(ahci_platform_get_resources); | |
396 | ||
397 | /** | |
398 | * ahci_platform_init_host - Bring up an ahci-platform host | |
399 | * @pdev: platform device pointer for the host | |
400 | * @hpriv: ahci-host private data for the host | |
401 | * @pi_template: template for the ata_port_info to use | |
fd990556 BZ |
402 | * |
403 | * This function does all the usual steps needed to bring up an | |
b1a9edbd | 404 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
fd990556 BZ |
405 | * must be initialized / enabled before calling this. |
406 | * | |
407 | * RETURNS: | |
408 | * 0 on success otherwise a negative error code | |
409 | */ | |
410 | int ahci_platform_init_host(struct platform_device *pdev, | |
411 | struct ahci_host_priv *hpriv, | |
725c7b57 | 412 | const struct ata_port_info *pi_template) |
fd990556 BZ |
413 | { |
414 | struct device *dev = &pdev->dev; | |
415 | struct ata_port_info pi = *pi_template; | |
416 | const struct ata_port_info *ppi[] = { &pi, NULL }; | |
417 | struct ata_host *host; | |
418 | int i, irq, n_ports, rc; | |
419 | ||
420 | irq = platform_get_irq(pdev, 0); | |
421 | if (irq <= 0) { | |
422 | dev_err(dev, "no irq\n"); | |
423 | return -EINVAL; | |
424 | } | |
425 | ||
426 | /* prepare host */ | |
c4121c65 | 427 | pi.private_data = (void *)(unsigned long)hpriv->flags; |
fd990556 | 428 | |
725c7b57 | 429 | ahci_save_initial_config(dev, hpriv); |
fd990556 BZ |
430 | |
431 | if (hpriv->cap & HOST_CAP_NCQ) | |
432 | pi.flags |= ATA_FLAG_NCQ; | |
433 | ||
434 | if (hpriv->cap & HOST_CAP_PMP) | |
435 | pi.flags |= ATA_FLAG_PMP; | |
436 | ||
437 | ahci_set_em_messages(hpriv, &pi); | |
438 | ||
439 | /* CAP.NP sometimes indicate the index of the last enabled | |
440 | * port, at other times, that of the last possible port, so | |
441 | * determining the maximum port number requires looking at | |
442 | * both CAP.NP and port_map. | |
443 | */ | |
444 | n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); | |
445 | ||
446 | host = ata_host_alloc_pinfo(dev, ppi, n_ports); | |
447 | if (!host) | |
448 | return -ENOMEM; | |
449 | ||
450 | host->private_data = hpriv; | |
451 | ||
452 | if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) | |
453 | host->flags |= ATA_HOST_PARALLEL_SCAN; | |
454 | else | |
455 | dev_info(dev, "SSS flag set, parallel bus scan disabled\n"); | |
456 | ||
457 | if (pi.flags & ATA_FLAG_EM) | |
458 | ahci_reset_em(host); | |
459 | ||
460 | for (i = 0; i < host->n_ports; i++) { | |
461 | struct ata_port *ap = host->ports[i]; | |
462 | ||
463 | ata_port_desc(ap, "mmio %pR", | |
464 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); | |
465 | ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80); | |
466 | ||
467 | /* set enclosure management message type */ | |
468 | if (ap->flags & ATA_FLAG_EM) | |
469 | ap->em_message_type = hpriv->em_msg_type; | |
470 | ||
471 | /* disabled/not-implemented port */ | |
472 | if (!(hpriv->port_map & (1 << i))) | |
473 | ap->ops = &ata_dummy_port_ops; | |
474 | } | |
475 | ||
cc7a9e27 SS |
476 | if (hpriv->cap & HOST_CAP_64) { |
477 | rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); | |
478 | if (rc) { | |
479 | rc = dma_coerce_mask_and_coherent(dev, | |
480 | DMA_BIT_MASK(32)); | |
481 | if (rc) { | |
482 | dev_err(dev, "Failed to enable 64-bit DMA.\n"); | |
483 | return rc; | |
484 | } | |
485 | dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n"); | |
486 | } | |
487 | } | |
488 | ||
fd990556 BZ |
489 | rc = ahci_reset_controller(host); |
490 | if (rc) | |
491 | return rc; | |
492 | ||
493 | ahci_init_controller(host); | |
494 | ahci_print_info(host, "platform"); | |
495 | ||
d1028e2f | 496 | return ahci_host_activate(host, irq, &ahci_platform_sht); |
fd990556 BZ |
497 | } |
498 | EXPORT_SYMBOL_GPL(ahci_platform_init_host); | |
499 | ||
500 | static void ahci_host_stop(struct ata_host *host) | |
501 | { | |
fd990556 BZ |
502 | struct ahci_host_priv *hpriv = host->private_data; |
503 | ||
fd990556 BZ |
504 | ahci_platform_disable_resources(hpriv); |
505 | } | |
506 | ||
507 | #ifdef CONFIG_PM_SLEEP | |
508 | /** | |
509 | * ahci_platform_suspend_host - Suspend an ahci-platform host | |
510 | * @dev: device pointer for the host | |
511 | * | |
512 | * This function does all the usual steps needed to suspend an | |
b1a9edbd | 513 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
fd990556 BZ |
514 | * must be disabled after calling this. |
515 | * | |
516 | * RETURNS: | |
517 | * 0 on success otherwise a negative error code | |
518 | */ | |
519 | int ahci_platform_suspend_host(struct device *dev) | |
520 | { | |
521 | struct ata_host *host = dev_get_drvdata(dev); | |
522 | struct ahci_host_priv *hpriv = host->private_data; | |
523 | void __iomem *mmio = hpriv->mmio; | |
524 | u32 ctl; | |
525 | ||
526 | if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { | |
527 | dev_err(dev, "firmware update required for suspend/resume\n"); | |
528 | return -EIO; | |
529 | } | |
530 | ||
531 | /* | |
532 | * AHCI spec rev1.1 section 8.3.3: | |
533 | * Software must disable interrupts prior to requesting a | |
534 | * transition of the HBA to D3 state. | |
535 | */ | |
536 | ctl = readl(mmio + HOST_CTL); | |
537 | ctl &= ~HOST_IRQ_EN; | |
538 | writel(ctl, mmio + HOST_CTL); | |
539 | readl(mmio + HOST_CTL); /* flush */ | |
540 | ||
541 | return ata_host_suspend(host, PMSG_SUSPEND); | |
542 | } | |
543 | EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); | |
544 | ||
545 | /** | |
546 | * ahci_platform_resume_host - Resume an ahci-platform host | |
547 | * @dev: device pointer for the host | |
548 | * | |
549 | * This function does all the usual steps needed to resume an ahci-platform | |
b1a9edbd | 550 | * host, note any necessary resources (ie clks, phys, etc.) must be |
fd990556 BZ |
551 | * initialized / enabled before calling this. |
552 | * | |
553 | * RETURNS: | |
554 | * 0 on success otherwise a negative error code | |
555 | */ | |
556 | int ahci_platform_resume_host(struct device *dev) | |
557 | { | |
558 | struct ata_host *host = dev_get_drvdata(dev); | |
559 | int rc; | |
560 | ||
561 | if (dev->power.power_state.event == PM_EVENT_SUSPEND) { | |
562 | rc = ahci_reset_controller(host); | |
563 | if (rc) | |
564 | return rc; | |
565 | ||
566 | ahci_init_controller(host); | |
567 | } | |
568 | ||
569 | ata_host_resume(host); | |
570 | ||
571 | return 0; | |
572 | } | |
573 | EXPORT_SYMBOL_GPL(ahci_platform_resume_host); | |
574 | ||
575 | /** | |
576 | * ahci_platform_suspend - Suspend an ahci-platform device | |
577 | * @dev: the platform device to suspend | |
578 | * | |
579 | * This function suspends the host associated with the device, followed by | |
580 | * disabling all the resources of the device. | |
581 | * | |
582 | * RETURNS: | |
583 | * 0 on success otherwise a negative error code | |
584 | */ | |
585 | int ahci_platform_suspend(struct device *dev) | |
586 | { | |
fd990556 BZ |
587 | struct ata_host *host = dev_get_drvdata(dev); |
588 | struct ahci_host_priv *hpriv = host->private_data; | |
589 | int rc; | |
590 | ||
591 | rc = ahci_platform_suspend_host(dev); | |
592 | if (rc) | |
593 | return rc; | |
594 | ||
fd990556 BZ |
595 | ahci_platform_disable_resources(hpriv); |
596 | ||
597 | return 0; | |
fd990556 BZ |
598 | } |
599 | EXPORT_SYMBOL_GPL(ahci_platform_suspend); | |
600 | ||
601 | /** | |
602 | * ahci_platform_resume - Resume an ahci-platform device | |
603 | * @dev: the platform device to resume | |
604 | * | |
605 | * This function enables all the resources of the device followed by | |
606 | * resuming the host associated with the device. | |
607 | * | |
608 | * RETURNS: | |
609 | * 0 on success otherwise a negative error code | |
610 | */ | |
611 | int ahci_platform_resume(struct device *dev) | |
612 | { | |
fd990556 BZ |
613 | struct ata_host *host = dev_get_drvdata(dev); |
614 | struct ahci_host_priv *hpriv = host->private_data; | |
615 | int rc; | |
616 | ||
617 | rc = ahci_platform_enable_resources(hpriv); | |
618 | if (rc) | |
619 | return rc; | |
620 | ||
fd990556 BZ |
621 | rc = ahci_platform_resume_host(dev); |
622 | if (rc) | |
623 | goto disable_resources; | |
624 | ||
625 | /* We resumed so update PM runtime state */ | |
626 | pm_runtime_disable(dev); | |
627 | pm_runtime_set_active(dev); | |
628 | pm_runtime_enable(dev); | |
629 | ||
630 | return 0; | |
631 | ||
632 | disable_resources: | |
633 | ahci_platform_disable_resources(hpriv); | |
634 | ||
635 | return rc; | |
636 | } | |
637 | EXPORT_SYMBOL_GPL(ahci_platform_resume); | |
638 | #endif | |
639 | ||
640 | MODULE_DESCRIPTION("AHCI SATA platform library"); | |
641 | MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); | |
642 | MODULE_LICENSE("GPL"); |