[linux-block.git] / drivers / ata / ahci_qoriq.c

/*
 * Freescale QorIQ AHCI SATA platform driver
 *
 * Copyright 2015 Freescale, Inc.
 *   Tang Yuantian <Yuantian.Tang@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/ahci_platform.h>
#include <linux/device.h>
#include <linux/of_address.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/libata.h>
#include "ahci.h"

#define DRV_NAME "ahci-qoriq"

/* port register definition */
#define PORT_PHY1	0xA8
#define PORT_PHY2	0xAC
#define PORT_PHY3	0xB0
#define PORT_PHY4	0xB4
#define PORT_PHY5	0xB8
#define PORT_TRANS	0xC8

/* port register default value */
#define AHCI_PORT_PHY_1_CFG	0xa003fffe
#define AHCI_PORT_PHY_2_CFG	0x28183411
#define AHCI_PORT_PHY_3_CFG	0x0e081004
#define AHCI_PORT_PHY_4_CFG	0x00480811
#define AHCI_PORT_PHY_5_CFG	0x192c96a4
#define AHCI_PORT_TRANS_CFG	0x08000025

#define SATA_ECC_DISABLE	0x00020000

enum ahci_qoriq_type {
	AHCI_LS1021A,
	AHCI_LS1043A,
	AHCI_LS2085A,
};

struct ahci_qoriq_priv {
	struct ccsr_ahci *reg_base;
	enum ahci_qoriq_type type;
	void __iomem *ecc_addr;
};

static const struct of_device_id ahci_qoriq_of_match[] = {
	{ .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
	{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
	{ .compatible = "fsl,ls2085a-ahci", .data = (void *)AHCI_LS2085A},
	{},
};
MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);

static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
			  unsigned long deadline)
{
	const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
	void __iomem *port_mmio = ahci_port_base(link->ap);
	u32 px_cmd, px_is, px_val;
	struct ata_port *ap = link->ap;
	struct ahci_port_priv *pp = ap->private_data;
	struct ahci_host_priv *hpriv = ap->host->private_data;
	struct ahci_qoriq_priv *qoriq_priv = hpriv->plat_data;
	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
	struct ata_taskfile tf;
	bool online;
	int rc;

	DPRINTK("ENTER\n");

	ahci_stop_engine(ap);

	/*
	 * There is a errata on ls1021a Rev1.0 and Rev2.0 which is:
	 * A-009042: The device detection initialization sequence
	 * mistakenly resets some registers.
	 *
	 * Workaround for this is:
	 * The software should read and store PxCMD and PxIS values
	 * before issuing the device detection initialization sequence.
	 * After the sequence is complete, software should restore the
	 * PxCMD and PxIS with the stored values.
	 */
	if (qoriq_priv->type == AHCI_LS1021A) {
		px_cmd = readl(port_mmio + PORT_CMD);
		px_is = readl(port_mmio + PORT_IRQ_STAT);
	}

	/* clear D2H reception area to properly wait for D2H FIS */
	ata_tf_init(link->device, &tf);
	tf.command = ATA_BUSY;
	ata_tf_to_fis(&tf, 0, 0, d2h_fis);

	rc = sata_link_hardreset(link, timing, deadline, &online,
				 ahci_check_ready);

	/* restore the PxCMD and PxIS on ls1021 */
	if (qoriq_priv->type == AHCI_LS1021A) {
		px_val = readl(port_mmio + PORT_CMD);
		if (px_val != px_cmd)
			writel(px_cmd, port_mmio + PORT_CMD);

		px_val = readl(port_mmio + PORT_IRQ_STAT);
		if (px_val != px_is)
			writel(px_is, port_mmio + PORT_IRQ_STAT);
	}

	hpriv->start_engine(ap);

	if (online)
		*class = ahci_dev_classify(ap);

	DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
	return rc;
}

static struct ata_port_operations ahci_qoriq_ops = {
	.inherits	= &ahci_ops,
	.hardreset	= ahci_qoriq_hardreset,
};

static const struct ata_port_info ahci_qoriq_port_info = {
	.flags		= AHCI_FLAG_COMMON | ATA_FLAG_NCQ,
	.pio_mask	= ATA_PIO4,
	.udma_mask	= ATA_UDMA6,
	.port_ops	= &ahci_qoriq_ops,
};

static struct scsi_host_template ahci_qoriq_sht = {
	AHCI_SHT(DRV_NAME),
};

static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
{
	struct ahci_qoriq_priv *qpriv = hpriv->plat_data;
	void __iomem *reg_base = hpriv->mmio;

	switch (qpriv->type) {
	case AHCI_LS1021A:
		writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
		writel(AHCI_PORT_PHY_2_CFG, reg_base + PORT_PHY2);
		writel(AHCI_PORT_PHY_3_CFG, reg_base + PORT_PHY3);
		writel(AHCI_PORT_PHY_4_CFG, reg_base + PORT_PHY4);
		writel(AHCI_PORT_PHY_5_CFG, reg_base + PORT_PHY5);
		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
		break;

	case AHCI_LS1043A:
	case AHCI_LS2085A:
		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
		break;
	}

	return 0;
}

static int ahci_qoriq_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct device *dev = &pdev->dev;
	struct ahci_host_priv *hpriv;
	struct ahci_qoriq_priv *qoriq_priv;
	const struct of_device_id *of_id;
	struct resource *res;
	int rc;

	hpriv = ahci_platform_get_resources(pdev);
	if (IS_ERR(hpriv))
		return PTR_ERR(hpriv);

	of_id = of_match_node(ahci_qoriq_of_match, np);
	if (!of_id)
		return -ENODEV;

	qoriq_priv = devm_kzalloc(dev, sizeof(*qoriq_priv), GFP_KERNEL);
	if (!qoriq_priv)
		return -ENOMEM;

	qoriq_priv->type = (enum ahci_qoriq_type)of_id->data;

	if (qoriq_priv->type == AHCI_LS1021A) {
		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
				"sata-ecc");
		qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res);
		if (IS_ERR(qoriq_priv->ecc_addr))
			return PTR_ERR(qoriq_priv->ecc_addr);
	}

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		return rc;

	hpriv->plat_data = qoriq_priv;
	rc = ahci_qoriq_phy_init(hpriv);
	if (rc)
		goto disable_resources;

	rc = ahci_platform_init_host(pdev, hpriv, &ahci_qoriq_port_info,
				     &ahci_qoriq_sht);
	if (rc)
		goto disable_resources;

	return 0;

disable_resources:
	ahci_platform_disable_resources(hpriv);

	return rc;
}

#ifdef CONFIG_PM_SLEEP
static int ahci_qoriq_resume(struct device *dev)
{
	struct ata_host *host = dev_get_drvdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;
	int rc;

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		return rc;

	rc = ahci_qoriq_phy_init(hpriv);
	if (rc)
		goto disable_resources;

	rc = ahci_platform_resume_host(dev);
	if (rc)
		goto disable_resources;

	/* We resumed so update PM runtime state */
	pm_runtime_disable(dev);
	pm_runtime_set_active(dev);
	pm_runtime_enable(dev);

	return 0;

disable_resources:
	ahci_platform_disable_resources(hpriv);

	return rc;
}
#endif

static SIMPLE_DEV_PM_OPS(ahci_qoriq_pm_ops, ahci_platform_suspend,
			 ahci_qoriq_resume);

static struct platform_driver ahci_qoriq_driver = {
	.probe = ahci_qoriq_probe,
	.remove = ata_platform_remove_one,
	.driver = {
		.name = DRV_NAME,
		.of_match_table = ahci_qoriq_of_match,
		.pm = &ahci_qoriq_pm_ops,
	},
};
module_platform_driver(ahci_qoriq_driver);

MODULE_DESCRIPTION("Freescale QorIQ AHCI SATA platform driver");
MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
ecfb4598 TY	1	/*
	2	* Freescale QorIQ AHCI SATA platform driver
	3	*
	4	* Copyright 2015 Freescale, Inc.
	5	* Tang Yuantian <Yuantian.Tang@freescale.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2, or (at your option)
	10	* any later version.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/module.h>
	15	#include <linux/pm.h>
	16	#include <linux/ahci_platform.h>
	17	#include <linux/device.h>
	18	#include <linux/of_address.h>
	19	#include <linux/of.h>
	20	#include <linux/of_device.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/libata.h>
	23	#include "ahci.h"
	24
	25	#define DRV_NAME "ahci-qoriq"
	26
	27	/* port register definition */
	28	#define PORT_PHY1 0xA8
	29	#define PORT_PHY2 0xAC
	30	#define PORT_PHY3 0xB0
	31	#define PORT_PHY4 0xB4
	32	#define PORT_PHY5 0xB8
	33	#define PORT_TRANS 0xC8
	34
	35	/* port register default value */
	36	#define AHCI_PORT_PHY_1_CFG 0xa003fffe
	37	#define AHCI_PORT_PHY_2_CFG 0x28183411
	38	#define AHCI_PORT_PHY_3_CFG 0x0e081004
	39	#define AHCI_PORT_PHY_4_CFG 0x00480811
	40	#define AHCI_PORT_PHY_5_CFG 0x192c96a4
	41	#define AHCI_PORT_TRANS_CFG 0x08000025
	42
	43	#define SATA_ECC_DISABLE 0x00020000
	44
	45	enum ahci_qoriq_type {
	46	AHCI_LS1021A,
	47	AHCI_LS1043A,
	48	AHCI_LS2085A,
	49	};
	50
	51	struct ahci_qoriq_priv {
	52	struct ccsr_ahci *reg_base;
	53	enum ahci_qoriq_type type;
	54	void __iomem *ecc_addr;
	55	};
	56
	57	static const struct of_device_id ahci_qoriq_of_match[] = {
	58	{ .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
	59	{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
	60	{ .compatible = "fsl,ls2085a-ahci", .data = (void *)AHCI_LS2085A},
	61	{},
	62	};
	63	MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);
	64
65	static int ahci_qoriq_hardreset(struct ata_link link, unsigned int class,
66	unsigned long deadline)
67	{
68	const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
69	void __iomem *port_mmio = ahci_port_base(link->ap);
70	u32 px_cmd, px_is, px_val;
71	struct ata_port *ap = link->ap;
72	struct ahci_port_priv *pp = ap->private_data;
73	struct ahci_host_priv *hpriv = ap->host->private_data;
74	struct ahci_qoriq_priv *qoriq_priv = hpriv->plat_data;
75	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
76	struct ata_taskfile tf;
77	bool online;
78	int rc;
79
80	DPRINTK("ENTER\n");
81
82	ahci_stop_engine(ap);
83
84	/*
85	* There is a errata on ls1021a Rev1.0 and Rev2.0 which is:
86	* A-009042: The device detection initialization sequence
87	* mistakenly resets some registers.
88	*
89	* Workaround for this is:
90	* The software should read and store PxCMD and PxIS values
91	* before issuing the device detection initialization sequence.
92	* After the sequence is complete, software should restore the
93	* PxCMD and PxIS with the stored values.
94	*/
95	if (qoriq_priv->type == AHCI_LS1021A) {
96	px_cmd = readl(port_mmio + PORT_CMD);
97	px_is = readl(port_mmio + PORT_IRQ_STAT);
98	}
99
100	/* clear D2H reception area to properly wait for D2H FIS */
101	ata_tf_init(link->device, &tf);
102	tf.command = ATA_BUSY;
103	ata_tf_to_fis(&tf, 0, 0, d2h_fis);
104
105	rc = sata_link_hardreset(link, timing, deadline, &online,
106	ahci_check_ready);
107
108	/* restore the PxCMD and PxIS on ls1021 */
109	if (qoriq_priv->type == AHCI_LS1021A) {
110	px_val = readl(port_mmio + PORT_CMD);
111	if (px_val != px_cmd)
112	writel(px_cmd, port_mmio + PORT_CMD);
113
114	px_val = readl(port_mmio + PORT_IRQ_STAT);
115	if (px_val != px_is)
116	writel(px_is, port_mmio + PORT_IRQ_STAT);
117	}
118
119	hpriv->start_engine(ap);
120
121	if (online)
122	*class = ahci_dev_classify(ap);
123
124	DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
125	return rc;
126	}
127
128	static struct ata_port_operations ahci_qoriq_ops = {
129	.inherits = &ahci_ops,
130	.hardreset = ahci_qoriq_hardreset,
131	};
132
133	static const struct ata_port_info ahci_qoriq_port_info = {
134	.flags = AHCI_FLAG_COMMON \| ATA_FLAG_NCQ,
135	.pio_mask = ATA_PIO4,
136	.udma_mask = ATA_UDMA6,
137	.port_ops = &ahci_qoriq_ops,
138	};
139
140	static struct scsi_host_template ahci_qoriq_sht = {
141	AHCI_SHT(DRV_NAME),
142	};
143
144	static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
145	{
146	struct ahci_qoriq_priv *qpriv = hpriv->plat_data;
147	void __iomem *reg_base = hpriv->mmio;
148
149	switch (qpriv->type) {
150	case AHCI_LS1021A:
151	writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
152	writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
153	writel(AHCI_PORT_PHY_2_CFG, reg_base + PORT_PHY2);
154	writel(AHCI_PORT_PHY_3_CFG, reg_base + PORT_PHY3);
155	writel(AHCI_PORT_PHY_4_CFG, reg_base + PORT_PHY4);
156	writel(AHCI_PORT_PHY_5_CFG, reg_base + PORT_PHY5);
157	writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
158	break;
159
160	case AHCI_LS1043A:
161	case AHCI_LS2085A:
162	writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
163	break;
164	}
165
166	return 0;
167	}
168
169	static int ahci_qoriq_probe(struct platform_device *pdev)
170	{
171	struct device_node *np = pdev->dev.of_node;
172	struct device *dev = &pdev->dev;
173	struct ahci_host_priv *hpriv;
174	struct ahci_qoriq_priv *qoriq_priv;
175	const struct of_device_id *of_id;
176	struct resource *res;
177	int rc;
178
179	hpriv = ahci_platform_get_resources(pdev);
180	if (IS_ERR(hpriv))
181	return PTR_ERR(hpriv);
182
183	of_id = of_match_node(ahci_qoriq_of_match, np);
184	if (!of_id)
185	return -ENODEV;
186
187	qoriq_priv = devm_kzalloc(dev, sizeof(*qoriq_priv), GFP_KERNEL);
188	if (!qoriq_priv)
189	return -ENOMEM;
190
191	qoriq_priv->type = (enum ahci_qoriq_type)of_id->data;
192
193	if (qoriq_priv->type == AHCI_LS1021A) {
194	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
195	"sata-ecc");
196	qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res);
197	if (IS_ERR(qoriq_priv->ecc_addr))
198	return PTR_ERR(qoriq_priv->ecc_addr);
199	}
200
201	rc = ahci_platform_enable_resources(hpriv);
202	if (rc)
203	return rc;
204
205	hpriv->plat_data = qoriq_priv;
206	rc = ahci_qoriq_phy_init(hpriv);
207	if (rc)
208	goto disable_resources;
209
210	rc = ahci_platform_init_host(pdev, hpriv, &ahci_qoriq_port_info,
211	&ahci_qoriq_sht);
212	if (rc)
213	goto disable_resources;
214
215	return 0;
216
217	disable_resources:
218	ahci_platform_disable_resources(hpriv);
219
220	return rc;
221	}
222
223	#ifdef CONFIG_PM_SLEEP
224	static int ahci_qoriq_resume(struct device *dev)
225	{
226	struct ata_host *host = dev_get_drvdata(dev);
227	struct ahci_host_priv *hpriv = host->private_data;
228	int rc;
229
230	rc = ahci_platform_enable_resources(hpriv);
231	if (rc)
232	return rc;
233
234	rc = ahci_qoriq_phy_init(hpriv);
235	if (rc)
236	goto disable_resources;
237
238	rc = ahci_platform_resume_host(dev);
239	if (rc)
240	goto disable_resources;
241
242	/* We resumed so update PM runtime state */
243	pm_runtime_disable(dev);
244	pm_runtime_set_active(dev);
245	pm_runtime_enable(dev);
246
247	return 0;
248
249	disable_resources:
250	ahci_platform_disable_resources(hpriv);
251
252	return rc;
253	}
254	#endif
255
256	static SIMPLE_DEV_PM_OPS(ahci_qoriq_pm_ops, ahci_platform_suspend,
257	ahci_qoriq_resume);
258
259	static struct platform_driver ahci_qoriq_driver = {
260	.probe = ahci_qoriq_probe,
261	.remove = ata_platform_remove_one,
262	.driver = {
263	.name = DRV_NAME,
264	.of_match_table = ahci_qoriq_of_match,
265	.pm = &ahci_qoriq_pm_ops,
266	},
267	};
268	module_platform_driver(ahci_qoriq_driver);
269
270	MODULE_DESCRIPTION("Freescale QorIQ AHCI SATA platform driver");
271	MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
272	MODULE_LICENSE("GPL");