[linux-2.6-block.git] / drivers / ata / ahci_da850.c

/*
 * DaVinci DA850 AHCI SATA platform driver
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/libata.h>
#include <linux/ahci_platform.h>
#include "ahci.h"

#define DRV_NAME "ahci_da850"

/* SATA PHY Control Register offset from AHCI base */
#define SATA_P0PHYCR_REG	0x178

#define SATA_PHY_MPY(x)		((x) << 0)
#define SATA_PHY_LOS(x)		((x) << 6)
#define SATA_PHY_RXCDR(x)	((x) << 10)
#define SATA_PHY_RXEQ(x)	((x) << 13)
#define SATA_PHY_TXSWING(x)	((x) << 19)
#define SATA_PHY_ENPLL(x)	((x) << 31)

/*
 * The multiplier needed for 1.5GHz PLL output.
 *
 * NOTE: This is currently hardcoded to be suitable for 100MHz crystal
 * frequency (which is used by DA850 EVM board) and may need to be changed
 * if you would like to use this driver on some other board.
 */
#define DA850_SATA_CLK_MULTIPLIER	7

static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
			    void __iomem *ahci_base)
{
	unsigned int val;

	/* Enable SATA clock receiver */
	val = readl(pwrdn_reg);
	val &= ~BIT(0);
	writel(val, pwrdn_reg);

	val = SATA_PHY_MPY(DA850_SATA_CLK_MULTIPLIER + 1) | SATA_PHY_LOS(1) |
	      SATA_PHY_RXCDR(4) | SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) |
	      SATA_PHY_ENPLL(1);

	writel(val, ahci_base + SATA_P0PHYCR_REG);
}

static const struct ata_port_info ahci_da850_port_info = {
	.flags		= AHCI_FLAG_COMMON,
	.pio_mask	= ATA_PIO4,
	.udma_mask	= ATA_UDMA6,
	.port_ops	= &ahci_platform_ops,
};

static struct scsi_host_template ahci_platform_sht = {
	AHCI_SHT(DRV_NAME),
};

static int ahci_da850_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct ahci_host_priv *hpriv;
	struct resource *res;
	void __iomem *pwrdn_reg;
	struct clk *clk;
	int rc;

	hpriv = ahci_platform_get_resources(pdev);
	if (IS_ERR(hpriv))
		return PTR_ERR(hpriv);

	/*
	 * Internally ahci_platform_get_resources() calls clk_get(dev, NULL)
	 * when trying to obtain the functional clock. This SATA controller
	 * uses two clocks for which we specify two connection ids. If we don't
	 * have the functional clock at this point - call clk_get() again with
	 * con_id = "fck".
	 */
	if (!hpriv->clks[0]) {
		clk = clk_get(dev, "fck");
		if (IS_ERR(clk))
			return PTR_ERR(clk);

		hpriv->clks[0] = clk;
	}

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		return rc;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	if (!res)
		goto disable_resources;

	pwrdn_reg = devm_ioremap(dev, res->start, resource_size(res));
	if (!pwrdn_reg)
		goto disable_resources;

	da850_sata_init(dev, pwrdn_reg, hpriv->mmio);

	rc = ahci_platform_init_host(pdev, hpriv, &ahci_da850_port_info,
				     &ahci_platform_sht);
	if (rc)
		goto disable_resources;

	return 0;
disable_resources:
	ahci_platform_disable_resources(hpriv);
	return rc;
}

static SIMPLE_DEV_PM_OPS(ahci_da850_pm_ops, ahci_platform_suspend,
			 ahci_platform_resume);

static const struct of_device_id ahci_da850_of_match[] = {
	{ .compatible = "ti,da850-ahci", },
	{ },
};
MODULE_DEVICE_TABLE(of, ahci_da850_of_match);

static struct platform_driver ahci_da850_driver = {
	.probe = ahci_da850_probe,
	.remove = ata_platform_remove_one,
	.driver = {
		.name = DRV_NAME,
		.of_match_table = ahci_da850_of_match,
		.pm = &ahci_da850_pm_ops,
	},
};
module_platform_driver(ahci_da850_driver);

MODULE_DESCRIPTION("DaVinci DA850 AHCI SATA platform driver");
MODULE_AUTHOR("Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
ae8723f8 BZ	1	/*
	2	* DaVinci DA850 AHCI SATA platform driver
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2, or (at your option)
	7	* any later version.
	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/module.h>
	12	#include <linux/pm.h>
	13	#include <linux/device.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/libata.h>
	16	#include <linux/ahci_platform.h>
	17	#include "ahci.h"
	18
018d5ef2 AM	19	#define DRV_NAME "ahci_da850"
018d5ef2 AM	20
ae8723f8 BZ	21	/* SATA PHY Control Register offset from AHCI base */
	22	#define SATA_P0PHYCR_REG 0x178
	23
	24	#define SATA_PHY_MPY(x) ((x) << 0)
	25	#define SATA_PHY_LOS(x) ((x) << 6)
	26	#define SATA_PHY_RXCDR(x) ((x) << 10)
	27	#define SATA_PHY_RXEQ(x) ((x) << 13)
	28	#define SATA_PHY_TXSWING(x) ((x) << 19)
	29	#define SATA_PHY_ENPLL(x) ((x) << 31)
	30
	31	/*
	32	* The multiplier needed for 1.5GHz PLL output.
	33	*
	34	* NOTE: This is currently hardcoded to be suitable for 100MHz crystal
	35	* frequency (which is used by DA850 EVM board) and may need to be changed
	36	* if you would like to use this driver on some other board.
	37	*/
	38	#define DA850_SATA_CLK_MULTIPLIER 7
	39
	40	static void da850_sata_init(struct device dev, void __iomem pwrdn_reg,
	41	void __iomem *ahci_base)
	42	{
	43	unsigned int val;
	44
	45	/* Enable SATA clock receiver */
	46	val = readl(pwrdn_reg);
	47	val &= ~BIT(0);
	48	writel(val, pwrdn_reg);
	49
	50	val = SATA_PHY_MPY(DA850_SATA_CLK_MULTIPLIER + 1) \| SATA_PHY_LOS(1) \|
	51	SATA_PHY_RXCDR(4) \| SATA_PHY_RXEQ(1) \| SATA_PHY_TXSWING(3) \|
	52	SATA_PHY_ENPLL(1);
	53
	54	writel(val, ahci_base + SATA_P0PHYCR_REG);
	55	}
	56
	57	static const struct ata_port_info ahci_da850_port_info = {
	58	.flags = AHCI_FLAG_COMMON,
	59	.pio_mask = ATA_PIO4,
	60	.udma_mask = ATA_UDMA6,
	61	.port_ops = &ahci_platform_ops,
	62	};
	63
018d5ef2 AM	64	static struct scsi_host_template ahci_platform_sht = {
	65	AHCI_SHT(DRV_NAME),
	66	};
	67
ae8723f8 BZ	68	static int ahci_da850_probe(struct platform_device *pdev)
	69	{
	70	struct device *dev = &pdev->dev;
	71	struct ahci_host_priv *hpriv;
	72	struct resource *res;
	73	void __iomem *pwrdn_reg;
82dbe1a6	74	struct clk *clk;
ae8723f8 BZ	75	int rc;
	76
	77	hpriv = ahci_platform_get_resources(pdev);
	78	if (IS_ERR(hpriv))
	79	return PTR_ERR(hpriv);
	80
82dbe1a6 BG	81	/*
	82	* Internally ahci_platform_get_resources() calls clk_get(dev, NULL)
	83	* when trying to obtain the functional clock. This SATA controller
	84	* uses two clocks for which we specify two connection ids. If we don't
	85	* have the functional clock at this point - call clk_get() again with
	86	* con_id = "fck".
	87	*/
	88	if (!hpriv->clks[0]) {
	89	clk = clk_get(dev, "fck");
	90	if (IS_ERR(clk))
	91	return PTR_ERR(clk);
	92
	93	hpriv->clks[0] = clk;
	94	}
	95
ae8723f8 BZ	96	rc = ahci_platform_enable_resources(hpriv);
	97	if (rc)
	98	return rc;
	99
	100	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	101	if (!res)
	102	goto disable_resources;
	103
	104	pwrdn_reg = devm_ioremap(dev, res->start, resource_size(res));
	105	if (!pwrdn_reg)
	106	goto disable_resources;
	107
	108	da850_sata_init(dev, pwrdn_reg, hpriv->mmio);
	109
018d5ef2 AM	110	rc = ahci_platform_init_host(pdev, hpriv, &ahci_da850_port_info,
018d5ef2 AM	111	&ahci_platform_sht);
ae8723f8 BZ	112	if (rc)
	113	goto disable_resources;
	114
	115	return 0;
	116	disable_resources:
	117	ahci_platform_disable_resources(hpriv);
	118	return rc;
	119	}
	120
	121	static SIMPLE_DEV_PM_OPS(ahci_da850_pm_ops, ahci_platform_suspend,
	122	ahci_platform_resume);
	123
bf4ae3f0 BG	124	static const struct of_device_id ahci_da850_of_match[] = {
	125	{ .compatible = "ti,da850-ahci", },
	126	{ },
	127	};
	128	MODULE_DEVICE_TABLE(of, ahci_da850_of_match);
	129
ae8723f8 BZ	130	static struct platform_driver ahci_da850_driver = {
	131	.probe = ahci_da850_probe,
	132	.remove = ata_platform_remove_one,
	133	.driver = {
018d5ef2	134	.name = DRV_NAME,
bf4ae3f0	135	.of_match_table = ahci_da850_of_match,
ae8723f8 BZ	136	.pm = &ahci_da850_pm_ops,
	137	},
	138	};
	139	module_platform_driver(ahci_da850_driver);
	140
	141	MODULE_DESCRIPTION("DaVinci DA850 AHCI SATA platform driver");
	142	MODULE_AUTHOR("Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>");
	143	MODULE_LICENSE("GPL");