Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * processor_perflib.c - ACPI Processor P-States Library ($Revision: 71 $) | |
4 | * | |
5 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
6 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
7 | * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de> | |
8 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> | |
9 | * - Added processor hotplug support | |
1da177e4 LT |
10 | */ |
11 | ||
6183a684 HG |
12 | #define pr_fmt(fmt) "ACPI: " fmt |
13 | ||
1da177e4 LT |
14 | #include <linux/kernel.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/cpufreq.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
8b48463f LZ |
19 | #include <linux/acpi.h> |
20 | #include <acpi/processor.h> | |
16be87ea | 21 | #ifdef CONFIG_X86 |
910dfae2 | 22 | #include <asm/cpufeature.h> |
16be87ea | 23 | #endif |
1da177e4 | 24 | |
1da177e4 | 25 | #define ACPI_PROCESSOR_FILE_PERFORMANCE "performance" |
1da177e4 | 26 | |
65c19bbd | 27 | static DEFINE_MUTEX(performance_mutex); |
1da177e4 LT |
28 | |
29 | /* | |
30 | * _PPC support is implemented as a CPUfreq policy notifier: | |
31 | * This means each time a CPUfreq driver registered also with | |
32 | * the ACPI core is asked to change the speed policy, the maximum | |
33 | * value is adjusted so that it is within the platform limit. | |
34 | * | |
35 | * Also, when a new platform limit value is detected, the CPUfreq | |
36 | * policy is adjusted accordingly. | |
37 | */ | |
38 | ||
a1531acd TR |
39 | /* ignore_ppc: |
40 | * -1 -> cpufreq low level drivers not initialized -> _PSS, etc. not called yet | |
41 | * ignore _PPC | |
42 | * 0 -> cpufreq low level drivers initialized -> consider _PPC values | |
43 | * 1 -> ignore _PPC totally -> forced by user through boot param | |
44 | */ | |
9f497bcc | 45 | static int ignore_ppc = -1; |
613e5f33 | 46 | module_param(ignore_ppc, int, 0644); |
623b78c3 TR |
47 | MODULE_PARM_DESC(ignore_ppc, "If the frequency of your machine gets wrongly" \ |
48 | "limited by BIOS, this should help"); | |
49 | ||
d15ce412 | 50 | static bool acpi_processor_ppc_in_use; |
1da177e4 | 51 | |
4be44fcd | 52 | static int acpi_processor_get_platform_limit(struct acpi_processor *pr) |
1da177e4 | 53 | { |
4be44fcd | 54 | acpi_status status = 0; |
27663c58 | 55 | unsigned long long ppc = 0; |
c02d5feb RW |
56 | s32 qos_value; |
57 | int index; | |
d15ce412 | 58 | int ret; |
1da177e4 LT |
59 | |
60 | if (!pr) | |
d550d98d | 61 | return -EINVAL; |
1da177e4 LT |
62 | |
63 | /* | |
64 | * _PPC indicates the maximum state currently supported by the platform | |
65 | * (e.g. 0 = states 0..n; 1 = states 1..n; etc. | |
66 | */ | |
67 | status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); | |
2c25fabd | 68 | if (status != AE_NOT_FOUND) { |
d15ce412 | 69 | acpi_processor_ppc_in_use = true; |
1da177e4 | 70 | |
2c25fabd | 71 | if (ACPI_FAILURE(status)) { |
4c324548 | 72 | acpi_evaluation_failure_warn(pr->handle, "_PPC", status); |
2c25fabd RW |
73 | return -ENODEV; |
74 | } | |
1da177e4 LT |
75 | } |
76 | ||
c02d5feb RW |
77 | index = ppc; |
78 | ||
99387b01 RW |
79 | if (pr->performance_platform_limit == index || |
80 | ppc >= pr->performance->state_count) | |
81 | return 0; | |
82 | ||
2d06d8c4 | 83 | pr_debug("CPU %d: _PPC is %d - frequency %s limited\n", pr->id, |
c02d5feb | 84 | index, index ? "is" : "is not"); |
919158d1 | 85 | |
c02d5feb | 86 | pr->performance_platform_limit = index; |
1da177e4 | 87 | |
99387b01 | 88 | if (unlikely(!freq_qos_request_active(&pr->perflib_req))) |
d15ce412 VK |
89 | return 0; |
90 | ||
c02d5feb RW |
91 | /* |
92 | * If _PPC returns 0, it means that all of the available states can be | |
93 | * used ("no limit"). | |
94 | */ | |
95 | if (index == 0) | |
96 | qos_value = FREQ_QOS_MAX_DEFAULT_VALUE; | |
97 | else | |
98 | qos_value = pr->performance->states[index].core_frequency * 1000; | |
99 | ||
100 | ret = freq_qos_update_request(&pr->perflib_req, qos_value); | |
d15ce412 VK |
101 | if (ret < 0) { |
102 | pr_warn("Failed to update perflib freq constraint: CPU%d (%d)\n", | |
103 | pr->id, ret); | |
104 | } | |
105 | ||
d550d98d | 106 | return 0; |
1da177e4 LT |
107 | } |
108 | ||
d81c45e1 ZY |
109 | #define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80 |
110 | /* | |
111 | * acpi_processor_ppc_ost: Notify firmware the _PPC evaluation status | |
112 | * @handle: ACPI processor handle | |
113 | * @status: the status code of _PPC evaluation | |
935ab850 | 114 | * 0: success. OSPM is now using the performance state specified. |
d81c45e1 ZY |
115 | * 1: failure. OSPM has not changed the number of P-states in use |
116 | */ | |
117 | static void acpi_processor_ppc_ost(acpi_handle handle, int status) | |
118 | { | |
4a6172a4 JL |
119 | if (acpi_has_method(handle, "_OST")) |
120 | acpi_evaluate_ost(handle, ACPI_PROCESSOR_NOTIFY_PERFORMANCE, | |
121 | status, NULL); | |
d81c45e1 ZY |
122 | } |
123 | ||
bca5f557 | 124 | void acpi_processor_ppc_has_changed(struct acpi_processor *pr, int event_flag) |
1da177e4 | 125 | { |
623b78c3 TR |
126 | int ret; |
127 | ||
ba1edb9a | 128 | if (ignore_ppc || !pr->performance) { |
d81c45e1 ZY |
129 | /* |
130 | * Only when it is notification event, the _OST object | |
131 | * will be evaluated. Otherwise it is skipped. | |
132 | */ | |
133 | if (event_flag) | |
134 | acpi_processor_ppc_ost(pr->handle, 1); | |
bca5f557 | 135 | return; |
d81c45e1 | 136 | } |
623b78c3 TR |
137 | |
138 | ret = acpi_processor_get_platform_limit(pr); | |
d81c45e1 ZY |
139 | /* |
140 | * Only when it is notification event, the _OST object | |
141 | * will be evaluated. Otherwise it is skipped. | |
142 | */ | |
143 | if (event_flag) { | |
144 | if (ret < 0) | |
145 | acpi_processor_ppc_ost(pr->handle, 1); | |
146 | else | |
147 | acpi_processor_ppc_ost(pr->handle, 0); | |
148 | } | |
bca5f557 | 149 | if (ret >= 0) |
5a25e3f7 | 150 | cpufreq_update_limits(pr->id); |
1da177e4 LT |
151 | } |
152 | ||
e2f74f35 TR |
153 | int acpi_processor_get_bios_limit(int cpu, unsigned int *limit) |
154 | { | |
155 | struct acpi_processor *pr; | |
156 | ||
157 | pr = per_cpu(processors, cpu); | |
158 | if (!pr || !pr->performance || !pr->performance->state_count) | |
159 | return -ENODEV; | |
3d9e9a96 | 160 | |
e2f74f35 TR |
161 | *limit = pr->performance->states[pr->performance_platform_limit]. |
162 | core_frequency * 1000; | |
163 | return 0; | |
164 | } | |
165 | EXPORT_SYMBOL(acpi_processor_get_bios_limit); | |
166 | ||
d15ce412 | 167 | void acpi_processor_ignore_ppc_init(void) |
4be44fcd | 168 | { |
d15ce412 VK |
169 | if (ignore_ppc < 0) |
170 | ignore_ppc = 0; | |
171 | } | |
172 | ||
3000ce3c | 173 | void acpi_processor_ppc_init(struct cpufreq_policy *policy) |
d15ce412 | 174 | { |
a1bb46c3 | 175 | unsigned int cpu; |
d15ce412 | 176 | |
a1bb46c3 RW |
177 | for_each_cpu(cpu, policy->related_cpus) { |
178 | struct acpi_processor *pr = per_cpu(processors, cpu); | |
179 | int ret; | |
180 | ||
181 | if (!pr) | |
182 | continue; | |
2d8b39a6 | 183 | |
99387b01 RW |
184 | /* |
185 | * Reset performance_platform_limit in case there is a stale | |
186 | * value in it, so as to make it match the "no limit" QoS value | |
187 | * below. | |
188 | */ | |
189 | pr->performance_platform_limit = 0; | |
190 | ||
a1bb46c3 | 191 | ret = freq_qos_add_request(&policy->constraints, |
99387b01 RW |
192 | &pr->perflib_req, FREQ_QOS_MAX, |
193 | FREQ_QOS_MAX_DEFAULT_VALUE); | |
a1bb46c3 RW |
194 | if (ret < 0) |
195 | pr_err("Failed to add freq constraint for CPU%d (%d)\n", | |
196 | cpu, ret); | |
197 | } | |
1da177e4 LT |
198 | } |
199 | ||
3000ce3c | 200 | void acpi_processor_ppc_exit(struct cpufreq_policy *policy) |
4be44fcd | 201 | { |
a1bb46c3 | 202 | unsigned int cpu; |
1da177e4 | 203 | |
a1bb46c3 RW |
204 | for_each_cpu(cpu, policy->related_cpus) { |
205 | struct acpi_processor *pr = per_cpu(processors, cpu); | |
206 | ||
207 | if (pr) | |
208 | freq_qos_remove_request(&pr->perflib_req); | |
209 | } | |
1da177e4 LT |
210 | } |
211 | ||
4be44fcd | 212 | static int acpi_processor_get_performance_control(struct acpi_processor *pr) |
1da177e4 | 213 | { |
4be44fcd LB |
214 | int result = 0; |
215 | acpi_status status = 0; | |
216 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
217 | union acpi_object *pct = NULL; | |
218 | union acpi_object obj = { 0 }; | |
1da177e4 | 219 | |
1da177e4 | 220 | status = acpi_evaluate_object(pr->handle, "_PCT", NULL, &buffer); |
4be44fcd | 221 | if (ACPI_FAILURE(status)) { |
4c324548 | 222 | acpi_evaluation_failure_warn(pr->handle, "_PCT", status); |
d550d98d | 223 | return -ENODEV; |
1da177e4 LT |
224 | } |
225 | ||
4be44fcd | 226 | pct = (union acpi_object *)buffer.pointer; |
d8f4ed07 | 227 | if (!pct || pct->type != ACPI_TYPE_PACKAGE || pct->package.count != 2) { |
6183a684 | 228 | pr_err("Invalid _PCT data\n"); |
1da177e4 LT |
229 | result = -EFAULT; |
230 | goto end; | |
231 | } | |
232 | ||
233 | /* | |
234 | * control_register | |
235 | */ | |
236 | ||
237 | obj = pct->package.elements[0]; | |
238 | ||
d8f4ed07 RW |
239 | if (!obj.buffer.pointer || obj.type != ACPI_TYPE_BUFFER || |
240 | obj.buffer.length < sizeof(struct acpi_pct_register)) { | |
6183a684 | 241 | pr_err("Invalid _PCT data (control_register)\n"); |
1da177e4 LT |
242 | result = -EFAULT; |
243 | goto end; | |
244 | } | |
4be44fcd LB |
245 | memcpy(&pr->performance->control_register, obj.buffer.pointer, |
246 | sizeof(struct acpi_pct_register)); | |
1da177e4 LT |
247 | |
248 | /* | |
249 | * status_register | |
250 | */ | |
251 | ||
252 | obj = pct->package.elements[1]; | |
253 | ||
d8f4ed07 RW |
254 | if (!obj.buffer.pointer || obj.type != ACPI_TYPE_BUFFER || |
255 | obj.buffer.length < sizeof(struct acpi_pct_register)) { | |
6183a684 | 256 | pr_err("Invalid _PCT data (status_register)\n"); |
1da177e4 LT |
257 | result = -EFAULT; |
258 | goto end; | |
259 | } | |
260 | ||
4be44fcd LB |
261 | memcpy(&pr->performance->status_register, obj.buffer.pointer, |
262 | sizeof(struct acpi_pct_register)); | |
1da177e4 | 263 | |
6183a684 | 264 | end: |
02438d87 | 265 | kfree(buffer.pointer); |
1da177e4 | 266 | |
d550d98d | 267 | return result; |
1da177e4 LT |
268 | } |
269 | ||
f594065f MG |
270 | #ifdef CONFIG_X86 |
271 | /* | |
272 | * Some AMDs have 50MHz frequency multiples, but only provide 100MHz rounding | |
273 | * in their ACPI data. Calculate the real values and fix up the _PSS data. | |
274 | */ | |
275 | static void amd_fixup_frequency(struct acpi_processor_px *px, int i) | |
276 | { | |
277 | u32 hi, lo, fid, did; | |
278 | int index = px->control & 0x00000007; | |
279 | ||
280 | if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) | |
281 | return; | |
282 | ||
3d9e9a96 RW |
283 | if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10) || |
284 | boot_cpu_data.x86 == 0x11) { | |
f594065f | 285 | rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi); |
9855d8ce SB |
286 | /* |
287 | * MSR C001_0064+: | |
288 | * Bit 63: PstateEn. Read-write. If set, the P-state is valid. | |
289 | */ | |
290 | if (!(hi & BIT(31))) | |
291 | return; | |
292 | ||
f594065f MG |
293 | fid = lo & 0x3f; |
294 | did = (lo >> 6) & 7; | |
295 | if (boot_cpu_data.x86 == 0x10) | |
296 | px->core_frequency = (100 * (fid + 0x10)) >> did; | |
297 | else | |
298 | px->core_frequency = (100 * (fid + 8)) >> did; | |
299 | } | |
300 | } | |
301 | #else | |
302 | static void amd_fixup_frequency(struct acpi_processor_px *px, int i) {}; | |
303 | #endif | |
304 | ||
4be44fcd | 305 | static int acpi_processor_get_performance_states(struct acpi_processor *pr) |
1da177e4 | 306 | { |
4be44fcd LB |
307 | int result = 0; |
308 | acpi_status status = AE_OK; | |
309 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
310 | struct acpi_buffer format = { sizeof("NNNNNN"), "NNNNNN" }; | |
311 | struct acpi_buffer state = { 0, NULL }; | |
312 | union acpi_object *pss = NULL; | |
313 | int i; | |
d8e725f3 | 314 | int last_invalid = -1; |
1da177e4 | 315 | |
1da177e4 | 316 | status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); |
4be44fcd | 317 | if (ACPI_FAILURE(status)) { |
4c324548 | 318 | acpi_evaluation_failure_warn(pr->handle, "_PSS", status); |
d550d98d | 319 | return -ENODEV; |
1da177e4 LT |
320 | } |
321 | ||
50dd0969 | 322 | pss = buffer.pointer; |
d8f4ed07 | 323 | if (!pss || pss->type != ACPI_TYPE_PACKAGE) { |
6183a684 | 324 | pr_err("Invalid _PSS data\n"); |
1da177e4 LT |
325 | result = -EFAULT; |
326 | goto end; | |
327 | } | |
328 | ||
52af99c3 RW |
329 | acpi_handle_debug(pr->handle, "Found %d performance states\n", |
330 | pss->package.count); | |
1da177e4 LT |
331 | |
332 | pr->performance->state_count = pss->package.count; | |
4be44fcd | 333 | pr->performance->states = |
6da2ec56 KC |
334 | kmalloc_array(pss->package.count, |
335 | sizeof(struct acpi_processor_px), | |
336 | GFP_KERNEL); | |
1da177e4 LT |
337 | if (!pr->performance->states) { |
338 | result = -ENOMEM; | |
339 | goto end; | |
340 | } | |
341 | ||
342 | for (i = 0; i < pr->performance->state_count; i++) { | |
343 | ||
344 | struct acpi_processor_px *px = &(pr->performance->states[i]); | |
345 | ||
346 | state.length = sizeof(struct acpi_processor_px); | |
347 | state.pointer = px; | |
348 | ||
52af99c3 | 349 | acpi_handle_debug(pr->handle, "Extracting state %d\n", i); |
1da177e4 LT |
350 | |
351 | status = acpi_extract_package(&(pss->package.elements[i]), | |
4be44fcd | 352 | &format, &state); |
1da177e4 | 353 | if (ACPI_FAILURE(status)) { |
52af99c3 RW |
354 | acpi_handle_warn(pr->handle, "Invalid _PSS data: %s\n", |
355 | acpi_format_exception(status)); | |
1da177e4 LT |
356 | result = -EFAULT; |
357 | kfree(pr->performance->states); | |
358 | goto end; | |
359 | } | |
360 | ||
f594065f MG |
361 | amd_fixup_frequency(px, i); |
362 | ||
52af99c3 | 363 | acpi_handle_debug(pr->handle, |
4be44fcd LB |
364 | "State [%d]: core_frequency[%d] power[%d] transition_latency[%d] bus_master_latency[%d] control[0x%x] status[0x%x]\n", |
365 | i, | |
366 | (u32) px->core_frequency, | |
367 | (u32) px->power, | |
368 | (u32) px->transition_latency, | |
369 | (u32) px->bus_master_latency, | |
52af99c3 | 370 | (u32) px->control, (u32) px->status); |
1da177e4 | 371 | |
34d531e6 | 372 | /* |
c6237b21 | 373 | * Check that ACPI's u64 MHz will be valid as u32 KHz in cpufreq |
34d531e6 LB |
374 | */ |
375 | if (!px->core_frequency || | |
d8f4ed07 | 376 | (u32)(px->core_frequency * 1000) != px->core_frequency * 1000) { |
6183a684 | 377 | pr_err(FW_BUG |
d8e725f3 MAC |
378 | "Invalid BIOS _PSS frequency found for processor %d: 0x%llx MHz\n", |
379 | pr->id, px->core_frequency); | |
380 | if (last_invalid == -1) | |
381 | last_invalid = i; | |
382 | } else { | |
383 | if (last_invalid != -1) { | |
384 | /* | |
385 | * Copy this valid entry over last_invalid entry | |
386 | */ | |
387 | memcpy(&(pr->performance->states[last_invalid]), | |
388 | px, sizeof(struct acpi_processor_px)); | |
389 | ++last_invalid; | |
390 | } | |
1da177e4 LT |
391 | } |
392 | } | |
393 | ||
d8e725f3 | 394 | if (last_invalid == 0) { |
6183a684 HG |
395 | pr_err(FW_BUG |
396 | "No valid BIOS _PSS frequency found for processor %d\n", pr->id); | |
d8e725f3 MAC |
397 | result = -EFAULT; |
398 | kfree(pr->performance->states); | |
399 | pr->performance->states = NULL; | |
400 | } | |
401 | ||
402 | if (last_invalid > 0) | |
403 | pr->performance->state_count = last_invalid; | |
404 | ||
6183a684 | 405 | end: |
02438d87 | 406 | kfree(buffer.pointer); |
1da177e4 | 407 | |
d550d98d | 408 | return result; |
1da177e4 LT |
409 | } |
410 | ||
c705c78c | 411 | int acpi_processor_get_performance_info(struct acpi_processor *pr) |
1da177e4 | 412 | { |
4be44fcd | 413 | int result = 0; |
1da177e4 | 414 | |
1da177e4 | 415 | if (!pr || !pr->performance || !pr->handle) |
d550d98d | 416 | return -EINVAL; |
1da177e4 | 417 | |
952c63e9 | 418 | if (!acpi_has_method(pr->handle, "_PCT")) { |
52af99c3 RW |
419 | acpi_handle_debug(pr->handle, |
420 | "ACPI-based processor performance control unavailable\n"); | |
d550d98d | 421 | return -ENODEV; |
1da177e4 LT |
422 | } |
423 | ||
424 | result = acpi_processor_get_performance_control(pr); | |
425 | if (result) | |
910dfae2 | 426 | goto update_bios; |
1da177e4 LT |
427 | |
428 | result = acpi_processor_get_performance_states(pr); | |
429 | if (result) | |
910dfae2 | 430 | goto update_bios; |
1da177e4 | 431 | |
455c0d71 DW |
432 | /* We need to call _PPC once when cpufreq starts */ |
433 | if (ignore_ppc != 1) | |
434 | result = acpi_processor_get_platform_limit(pr); | |
435 | ||
436 | return result; | |
910dfae2 TR |
437 | |
438 | /* | |
439 | * Having _PPC but missing frequencies (_PSS, _PCT) is a very good hint that | |
440 | * the BIOS is older than the CPU and does not know its frequencies | |
441 | */ | |
442 | update_bios: | |
16be87ea | 443 | #ifdef CONFIG_X86 |
952c63e9 | 444 | if (acpi_has_method(pr->handle, "_PPC")) { |
910dfae2 | 445 | if(boot_cpu_has(X86_FEATURE_EST)) |
6183a684 | 446 | pr_warn(FW_BUG "BIOS needs update for CPU " |
910dfae2 TR |
447 | "frequency support\n"); |
448 | } | |
16be87ea | 449 | #endif |
910dfae2 | 450 | return result; |
1da177e4 | 451 | } |
c705c78c | 452 | EXPORT_SYMBOL_GPL(acpi_processor_get_performance_info); |
d0ea59e1 RW |
453 | |
454 | int acpi_processor_pstate_control(void) | |
4be44fcd LB |
455 | { |
456 | acpi_status status; | |
1da177e4 | 457 | |
d0ea59e1 RW |
458 | if (!acpi_gbl_FADT.smi_command || !acpi_gbl_FADT.pstate_control) |
459 | return 0; | |
460 | ||
52af99c3 RW |
461 | pr_debug("Writing pstate_control [0x%x] to smi_command [0x%x]\n", |
462 | acpi_gbl_FADT.pstate_control, acpi_gbl_FADT.smi_command); | |
d0ea59e1 RW |
463 | |
464 | status = acpi_os_write_port(acpi_gbl_FADT.smi_command, | |
465 | (u32)acpi_gbl_FADT.pstate_control, 8); | |
466 | if (ACPI_SUCCESS(status)) | |
467 | return 1; | |
468 | ||
52af99c3 RW |
469 | pr_warn("Failed to write pstate_control [0x%x] to smi_command [0x%x]: %s\n", |
470 | acpi_gbl_FADT.pstate_control, acpi_gbl_FADT.smi_command, | |
471 | acpi_format_exception(status)); | |
d0ea59e1 RW |
472 | return -EIO; |
473 | } | |
474 | ||
475 | int acpi_processor_notify_smm(struct module *calling_module) | |
476 | { | |
41103b3b | 477 | static int is_done; |
be5c8a04 | 478 | int result = 0; |
1da177e4 | 479 | |
d15ce412 | 480 | if (!acpi_processor_cpufreq_init) |
d550d98d | 481 | return -EBUSY; |
1da177e4 LT |
482 | |
483 | if (!try_module_get(calling_module)) | |
d550d98d | 484 | return -EINVAL; |
1da177e4 | 485 | |
be5c8a04 RW |
486 | /* |
487 | * is_done is set to negative if an error occurs and to 1 if no error | |
488 | * occurrs, but SMM has been notified already. This avoids repeated | |
489 | * notification which might lead to unexpected results. | |
1da177e4 | 490 | */ |
be5c8a04 RW |
491 | if (is_done != 0) { |
492 | if (is_done < 0) | |
493 | result = is_done; | |
1da177e4 | 494 | |
be5c8a04 RW |
495 | goto out_put; |
496 | } | |
1da177e4 | 497 | |
d0ea59e1 | 498 | result = acpi_processor_pstate_control(); |
be5c8a04 | 499 | if (result <= 0) { |
f1a70bac RW |
500 | if (result) { |
501 | is_done = result; | |
502 | } else { | |
be5c8a04 | 503 | pr_debug("No SMI port or pstate_control\n"); |
f1a70bac RW |
504 | is_done = 1; |
505 | } | |
be5c8a04 | 506 | goto out_put; |
1da177e4 LT |
507 | } |
508 | ||
1da177e4 | 509 | is_done = 1; |
be5c8a04 RW |
510 | /* |
511 | * Success. If there _PPC, unloading the cpufreq driver would be risky, | |
512 | * so disallow it in that case. | |
513 | */ | |
514 | if (acpi_processor_ppc_in_use) | |
515 | return 0; | |
1da177e4 | 516 | |
be5c8a04 RW |
517 | out_put: |
518 | module_put(calling_module); | |
519 | return result; | |
1da177e4 | 520 | } |
4be44fcd | 521 | EXPORT_SYMBOL(acpi_processor_notify_smm); |
1da177e4 | 522 | |
4d0f1ce6 | 523 | int acpi_processor_get_psd(acpi_handle handle, struct acpi_psd_package *pdomain) |
3b2d9942 VP |
524 | { |
525 | int result = 0; | |
526 | acpi_status status = AE_OK; | |
527 | struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; | |
528 | struct acpi_buffer format = {sizeof("NNNNN"), "NNNNN"}; | |
529 | struct acpi_buffer state = {0, NULL}; | |
530 | union acpi_object *psd = NULL; | |
3b2d9942 | 531 | |
4d0f1ce6 | 532 | status = acpi_evaluate_object(handle, "_PSD", NULL, &buffer); |
3b2d9942 | 533 | if (ACPI_FAILURE(status)) { |
9011bff4 | 534 | return -ENODEV; |
3b2d9942 VP |
535 | } |
536 | ||
50dd0969 | 537 | psd = buffer.pointer; |
d8f4ed07 | 538 | if (!psd || psd->type != ACPI_TYPE_PACKAGE) { |
6183a684 | 539 | pr_err("Invalid _PSD data\n"); |
3b2d9942 VP |
540 | result = -EFAULT; |
541 | goto end; | |
542 | } | |
543 | ||
544 | if (psd->package.count != 1) { | |
6183a684 | 545 | pr_err("Invalid _PSD data\n"); |
3b2d9942 VP |
546 | result = -EFAULT; |
547 | goto end; | |
548 | } | |
549 | ||
3b2d9942 VP |
550 | state.length = sizeof(struct acpi_psd_package); |
551 | state.pointer = pdomain; | |
552 | ||
3d9e9a96 | 553 | status = acpi_extract_package(&(psd->package.elements[0]), &format, &state); |
3b2d9942 | 554 | if (ACPI_FAILURE(status)) { |
6183a684 | 555 | pr_err("Invalid _PSD data\n"); |
3b2d9942 VP |
556 | result = -EFAULT; |
557 | goto end; | |
558 | } | |
559 | ||
560 | if (pdomain->num_entries != ACPI_PSD_REV0_ENTRIES) { | |
6183a684 | 561 | pr_err("Unknown _PSD:num_entries\n"); |
3b2d9942 VP |
562 | result = -EFAULT; |
563 | goto end; | |
564 | } | |
565 | ||
566 | if (pdomain->revision != ACPI_PSD_REV0_REVISION) { | |
6183a684 | 567 | pr_err("Unknown _PSD:revision\n"); |
3b2d9942 VP |
568 | result = -EFAULT; |
569 | goto end; | |
570 | } | |
571 | ||
e1eb4779 SG |
572 | if (pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ALL && |
573 | pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ANY && | |
574 | pdomain->coord_type != DOMAIN_COORD_TYPE_HW_ALL) { | |
6183a684 | 575 | pr_err("Invalid _PSD:coord_type\n"); |
e1eb4779 SG |
576 | result = -EFAULT; |
577 | goto end; | |
578 | } | |
3b2d9942 | 579 | end: |
02438d87 | 580 | kfree(buffer.pointer); |
9011bff4 | 581 | return result; |
3b2d9942 | 582 | } |
4d0f1ce6 | 583 | EXPORT_SYMBOL(acpi_processor_get_psd); |
3b2d9942 VP |
584 | |
585 | int acpi_processor_preregister_performance( | |
a29d8b8e | 586 | struct acpi_processor_performance __percpu *performance) |
3b2d9942 | 587 | { |
09d5ca80 | 588 | int count_target; |
3b2d9942 VP |
589 | int retval = 0; |
590 | unsigned int i, j; | |
2fdf66b4 | 591 | cpumask_var_t covered_cpus; |
3b2d9942 VP |
592 | struct acpi_processor *pr; |
593 | struct acpi_psd_package *pdomain; | |
594 | struct acpi_processor *match_pr; | |
595 | struct acpi_psd_package *match_pdomain; | |
596 | ||
79f55997 | 597 | if (!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL)) |
2fdf66b4 RR |
598 | return -ENOMEM; |
599 | ||
785fcccd | 600 | mutex_lock(&performance_mutex); |
3b2d9942 | 601 | |
e1eb4779 SG |
602 | /* |
603 | * Check if another driver has already registered, and abort before | |
604 | * changing pr->performance if it has. Check input data as well. | |
605 | */ | |
193de0c7 | 606 | for_each_possible_cpu(i) { |
706546d0 | 607 | pr = per_cpu(processors, i); |
3b2d9942 VP |
608 | if (!pr) { |
609 | /* Look only at processors in ACPI namespace */ | |
610 | continue; | |
611 | } | |
612 | ||
613 | if (pr->performance) { | |
614 | retval = -EBUSY; | |
e1eb4779 | 615 | goto err_out; |
3b2d9942 VP |
616 | } |
617 | ||
b36128c8 | 618 | if (!performance || !per_cpu_ptr(performance, i)) { |
3b2d9942 | 619 | retval = -EINVAL; |
e1eb4779 | 620 | goto err_out; |
3b2d9942 | 621 | } |
e1eb4779 SG |
622 | } |
623 | ||
624 | /* Call _PSD for all CPUs */ | |
625 | for_each_possible_cpu(i) { | |
626 | pr = per_cpu(processors, i); | |
627 | if (!pr) | |
628 | continue; | |
3b2d9942 | 629 | |
b36128c8 | 630 | pr->performance = per_cpu_ptr(performance, i); |
4d0f1ce6 JM |
631 | pdomain = &(pr->performance->domain_info); |
632 | if (acpi_processor_get_psd(pr->handle, pdomain)) { | |
3b2d9942 VP |
633 | retval = -EINVAL; |
634 | continue; | |
635 | } | |
636 | } | |
637 | if (retval) | |
638 | goto err_ret; | |
639 | ||
640 | /* | |
c6237b21 | 641 | * Now that we have _PSD data from all CPUs, lets setup P-state |
3b2d9942 VP |
642 | * domain info. |
643 | */ | |
193de0c7 | 644 | for_each_possible_cpu(i) { |
706546d0 | 645 | pr = per_cpu(processors, i); |
3b2d9942 VP |
646 | if (!pr) |
647 | continue; | |
648 | ||
2fdf66b4 | 649 | if (cpumask_test_cpu(i, covered_cpus)) |
3b2d9942 VP |
650 | continue; |
651 | ||
652 | pdomain = &(pr->performance->domain_info); | |
2fdf66b4 RR |
653 | cpumask_set_cpu(i, pr->performance->shared_cpu_map); |
654 | cpumask_set_cpu(i, covered_cpus); | |
3b2d9942 VP |
655 | if (pdomain->num_processors <= 1) |
656 | continue; | |
657 | ||
658 | /* Validate the Domain info */ | |
659 | count_target = pdomain->num_processors; | |
46f18e3a | 660 | if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ALL) |
3b2d9942 | 661 | pr->performance->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
46f18e3a VP |
662 | else if (pdomain->coord_type == DOMAIN_COORD_TYPE_HW_ALL) |
663 | pr->performance->shared_type = CPUFREQ_SHARED_TYPE_HW; | |
664 | else if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ANY) | |
3b2d9942 | 665 | pr->performance->shared_type = CPUFREQ_SHARED_TYPE_ANY; |
3b2d9942 | 666 | |
193de0c7 | 667 | for_each_possible_cpu(j) { |
3b2d9942 VP |
668 | if (i == j) |
669 | continue; | |
670 | ||
706546d0 | 671 | match_pr = per_cpu(processors, j); |
3b2d9942 VP |
672 | if (!match_pr) |
673 | continue; | |
674 | ||
675 | match_pdomain = &(match_pr->performance->domain_info); | |
676 | if (match_pdomain->domain != pdomain->domain) | |
677 | continue; | |
678 | ||
679 | /* Here i and j are in the same domain */ | |
680 | ||
681 | if (match_pdomain->num_processors != count_target) { | |
682 | retval = -EINVAL; | |
683 | goto err_ret; | |
684 | } | |
685 | ||
686 | if (pdomain->coord_type != match_pdomain->coord_type) { | |
687 | retval = -EINVAL; | |
688 | goto err_ret; | |
689 | } | |
690 | ||
2fdf66b4 RR |
691 | cpumask_set_cpu(j, covered_cpus); |
692 | cpumask_set_cpu(j, pr->performance->shared_cpu_map); | |
3b2d9942 VP |
693 | } |
694 | ||
193de0c7 | 695 | for_each_possible_cpu(j) { |
3b2d9942 VP |
696 | if (i == j) |
697 | continue; | |
698 | ||
706546d0 | 699 | match_pr = per_cpu(processors, j); |
3b2d9942 VP |
700 | if (!match_pr) |
701 | continue; | |
702 | ||
703 | match_pdomain = &(match_pr->performance->domain_info); | |
704 | if (match_pdomain->domain != pdomain->domain) | |
705 | continue; | |
706 | ||
c6237b21 | 707 | match_pr->performance->shared_type = |
3b2d9942 | 708 | pr->performance->shared_type; |
2fdf66b4 RR |
709 | cpumask_copy(match_pr->performance->shared_cpu_map, |
710 | pr->performance->shared_cpu_map); | |
3b2d9942 VP |
711 | } |
712 | } | |
713 | ||
714 | err_ret: | |
193de0c7 | 715 | for_each_possible_cpu(i) { |
706546d0 | 716 | pr = per_cpu(processors, i); |
3b2d9942 VP |
717 | if (!pr || !pr->performance) |
718 | continue; | |
719 | ||
720 | /* Assume no coordination on any error parsing domain info */ | |
721 | if (retval) { | |
2fdf66b4 RR |
722 | cpumask_clear(pr->performance->shared_cpu_map); |
723 | cpumask_set_cpu(i, pr->performance->shared_cpu_map); | |
bca3e43c | 724 | pr->performance->shared_type = CPUFREQ_SHARED_TYPE_NONE; |
3b2d9942 VP |
725 | } |
726 | pr->performance = NULL; /* Will be set for real in register */ | |
727 | } | |
728 | ||
e1eb4779 | 729 | err_out: |
785fcccd | 730 | mutex_unlock(&performance_mutex); |
2fdf66b4 | 731 | free_cpumask_var(covered_cpus); |
9011bff4 | 732 | return retval; |
3b2d9942 VP |
733 | } |
734 | EXPORT_SYMBOL(acpi_processor_preregister_performance); | |
735 | ||
3d9e9a96 RW |
736 | int acpi_processor_register_performance(struct acpi_processor_performance |
737 | *performance, unsigned int cpu) | |
1da177e4 LT |
738 | { |
739 | struct acpi_processor *pr; | |
740 | ||
d15ce412 | 741 | if (!acpi_processor_cpufreq_init) |
d550d98d | 742 | return -EINVAL; |
1da177e4 | 743 | |
65c19bbd | 744 | mutex_lock(&performance_mutex); |
1da177e4 | 745 | |
706546d0 | 746 | pr = per_cpu(processors, cpu); |
1da177e4 | 747 | if (!pr) { |
65c19bbd | 748 | mutex_unlock(&performance_mutex); |
d550d98d | 749 | return -ENODEV; |
1da177e4 LT |
750 | } |
751 | ||
752 | if (pr->performance) { | |
65c19bbd | 753 | mutex_unlock(&performance_mutex); |
d550d98d | 754 | return -EBUSY; |
1da177e4 LT |
755 | } |
756 | ||
a913f507 AM |
757 | WARN_ON(!performance); |
758 | ||
1da177e4 LT |
759 | pr->performance = performance; |
760 | ||
761 | if (acpi_processor_get_performance_info(pr)) { | |
762 | pr->performance = NULL; | |
65c19bbd | 763 | mutex_unlock(&performance_mutex); |
d550d98d | 764 | return -EIO; |
1da177e4 LT |
765 | } |
766 | ||
65c19bbd | 767 | mutex_unlock(&performance_mutex); |
d550d98d | 768 | return 0; |
1da177e4 | 769 | } |
4be44fcd | 770 | EXPORT_SYMBOL(acpi_processor_register_performance); |
1da177e4 | 771 | |
b2f8dc4c | 772 | void acpi_processor_unregister_performance(unsigned int cpu) |
1da177e4 LT |
773 | { |
774 | struct acpi_processor *pr; | |
775 | ||
65c19bbd | 776 | mutex_lock(&performance_mutex); |
1da177e4 | 777 | |
706546d0 | 778 | pr = per_cpu(processors, cpu); |
5be583c6 RW |
779 | if (!pr) |
780 | goto unlock; | |
1da177e4 | 781 | |
a913f507 AM |
782 | if (pr->performance) |
783 | kfree(pr->performance->states); | |
3d9e9a96 | 784 | |
1da177e4 LT |
785 | pr->performance = NULL; |
786 | ||
5be583c6 | 787 | unlock: |
65c19bbd | 788 | mutex_unlock(&performance_mutex); |
1da177e4 LT |
789 | } |
790 | EXPORT_SYMBOL(acpi_processor_unregister_performance); |