sched, idle: Fix the idle polling state logic
[linux-2.6-block.git] / drivers / acpi / processor_idle.c
CommitLineData
1da177e4
LT
1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
c5ab81ca 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
1da177e4
LT
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
02df8b93
VP
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
1da177e4
LT
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
1da177e4 31#include <linux/module.h>
1da177e4
LT
32#include <linux/acpi.h>
33#include <linux/dmi.h>
e2668fb5 34#include <linux/sched.h> /* need_resched() */
e9e2cdb4 35#include <linux/clockchips.h>
4f86d3a8 36#include <linux/cpuidle.h>
0a3b15ac 37#include <linux/syscore_ops.h>
1da177e4 38
3434933b
TG
39/*
40 * Include the apic definitions for x86 to have the APIC timer related defines
41 * available also for UP (on SMP it gets magically included via linux/smp.h).
42 * asm/acpi.h is not an option, as it would require more include magic. Also
43 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
44 */
45#ifdef CONFIG_X86
46#include <asm/apic.h>
47#endif
48
1da177e4
LT
49#include <acpi/acpi_bus.h>
50#include <acpi/processor.h>
51
a192a958
LB
52#define PREFIX "ACPI: "
53
1da177e4 54#define ACPI_PROCESSOR_CLASS "processor"
1da177e4 55#define _COMPONENT ACPI_PROCESSOR_COMPONENT
f52fd66d 56ACPI_MODULE_NAME("processor_idle");
1da177e4 57
4f86d3a8
LB
58static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
59module_param(max_cstate, uint, 0000);
b6835052 60static unsigned int nocst __read_mostly;
1da177e4 61module_param(nocst, uint, 0000);
d3e7e99f
LB
62static int bm_check_disable __read_mostly;
63module_param(bm_check_disable, uint, 0000);
1da177e4 64
25de5718 65static unsigned int latency_factor __read_mostly = 2;
4963f620 66module_param(latency_factor, uint, 0644);
1da177e4 67
3d339dcb
DL
68static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
69
6240a10d
AS
70static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX],
71 acpi_cstate);
ac3ebafa 72
d1896049
TR
73static int disabled_by_idle_boot_param(void)
74{
75 return boot_option_idle_override == IDLE_POLL ||
d1896049
TR
76 boot_option_idle_override == IDLE_HALT;
77}
78
1da177e4
LT
79/*
80 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
81 * For now disable this. Probably a bug somewhere else.
82 *
83 * To skip this limit, boot/load with a large max_cstate limit.
84 */
1855256c 85static int set_max_cstate(const struct dmi_system_id *id)
1da177e4
LT
86{
87 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
88 return 0;
89
3d35600a 90 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
4be44fcd
LB
91 " Override with \"processor.max_cstate=%d\"\n", id->ident,
92 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
1da177e4 93
3d35600a 94 max_cstate = (long)id->driver_data;
1da177e4
LT
95
96 return 0;
97}
98
fe7bf106 99static struct dmi_system_id processor_power_dmi_table[] = {
876c184b
TR
100 { set_max_cstate, "Clevo 5600D", {
101 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
102 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
4be44fcd 103 (void *)2},
370d5cd8
AV
104 { set_max_cstate, "Pavilion zv5000", {
105 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
106 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
107 (void *)1},
108 { set_max_cstate, "Asus L8400B", {
109 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
110 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
111 (void *)1},
1da177e4
LT
112 {},
113};
114
4f86d3a8 115
2e906655 116/*
117 * Callers should disable interrupts before the call and enable
118 * interrupts after return.
119 */
ddc081a1
VP
120static void acpi_safe_halt(void)
121{
ea811747 122 if (!tif_need_resched()) {
ddc081a1 123 safe_halt();
71e93d15
VP
124 local_irq_disable();
125 }
ddc081a1
VP
126}
127
169a0abb
TG
128#ifdef ARCH_APICTIMER_STOPS_ON_C3
129
130/*
131 * Some BIOS implementations switch to C3 in the published C2 state.
296d93cd
LT
132 * This seems to be a common problem on AMD boxen, but other vendors
133 * are affected too. We pick the most conservative approach: we assume
134 * that the local APIC stops in both C2 and C3.
169a0abb 135 */
7e275cc4 136static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb
TG
137 struct acpi_processor_cx *cx)
138{
139 struct acpi_processor_power *pwr = &pr->power;
e585bef8 140 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
169a0abb 141
db954b58
VP
142 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
143 return;
144
02c68a02 145 if (amd_e400_c1e_detected)
87ad57ba
SL
146 type = ACPI_STATE_C1;
147
169a0abb
TG
148 /*
149 * Check, if one of the previous states already marked the lapic
150 * unstable
151 */
152 if (pwr->timer_broadcast_on_state < state)
153 return;
154
e585bef8 155 if (cx->type >= type)
296d93cd 156 pr->power.timer_broadcast_on_state = state;
169a0abb
TG
157}
158
918aae42 159static void __lapic_timer_propagate_broadcast(void *arg)
169a0abb 160{
f833bab8 161 struct acpi_processor *pr = (struct acpi_processor *) arg;
e9e2cdb4
TG
162 unsigned long reason;
163
164 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
165 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
166
167 clockevents_notify(reason, &pr->id);
e9e2cdb4
TG
168}
169
918aae42
HS
170static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
171{
172 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
173 (void *)pr, 1);
174}
175
e9e2cdb4 176/* Power(C) State timer broadcast control */
7e275cc4 177static void lapic_timer_state_broadcast(struct acpi_processor *pr,
e9e2cdb4
TG
178 struct acpi_processor_cx *cx,
179 int broadcast)
180{
e9e2cdb4
TG
181 int state = cx - pr->power.states;
182
183 if (state >= pr->power.timer_broadcast_on_state) {
184 unsigned long reason;
185
186 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
187 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
188 clockevents_notify(reason, &pr->id);
189 }
169a0abb
TG
190}
191
192#else
193
7e275cc4 194static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb 195 struct acpi_processor_cx *cstate) { }
7e275cc4
LB
196static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
197static void lapic_timer_state_broadcast(struct acpi_processor *pr,
e9e2cdb4
TG
198 struct acpi_processor_cx *cx,
199 int broadcast)
200{
201}
169a0abb
TG
202
203#endif
204
0a3b15ac 205#ifdef CONFIG_PM_SLEEP
815ab0fd
LB
206static u32 saved_bm_rld;
207
95d45d4c 208static int acpi_processor_suspend(void)
815ab0fd
LB
209{
210 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
0a3b15ac 211 return 0;
815ab0fd 212}
0a3b15ac 213
95d45d4c 214static void acpi_processor_resume(void)
815ab0fd
LB
215{
216 u32 resumed_bm_rld;
217
218 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
0a3b15ac
RW
219 if (resumed_bm_rld == saved_bm_rld)
220 return;
815ab0fd 221
0a3b15ac 222 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
815ab0fd 223}
b04e7bdb 224
0a3b15ac
RW
225static struct syscore_ops acpi_processor_syscore_ops = {
226 .suspend = acpi_processor_suspend,
227 .resume = acpi_processor_resume,
228};
229
230void acpi_processor_syscore_init(void)
b04e7bdb 231{
0a3b15ac 232 register_syscore_ops(&acpi_processor_syscore_ops);
b04e7bdb
TG
233}
234
0a3b15ac 235void acpi_processor_syscore_exit(void)
b04e7bdb 236{
0a3b15ac 237 unregister_syscore_ops(&acpi_processor_syscore_ops);
b04e7bdb 238}
0a3b15ac 239#endif /* CONFIG_PM_SLEEP */
b04e7bdb 240
592913ec 241#if defined(CONFIG_X86)
520daf72 242static void tsc_check_state(int state)
ddb25f9a
AK
243{
244 switch (boot_cpu_data.x86_vendor) {
245 case X86_VENDOR_AMD:
40fb1715 246 case X86_VENDOR_INTEL:
ddb25f9a
AK
247 /*
248 * AMD Fam10h TSC will tick in all
249 * C/P/S0/S1 states when this bit is set.
250 */
40fb1715 251 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
520daf72 252 return;
40fb1715 253
ddb25f9a 254 /*FALL THROUGH*/
ddb25f9a 255 default:
520daf72
LB
256 /* TSC could halt in idle, so notify users */
257 if (state > ACPI_STATE_C1)
258 mark_tsc_unstable("TSC halts in idle");
ddb25f9a
AK
259 }
260}
520daf72
LB
261#else
262static void tsc_check_state(int state) { return; }
ddb25f9a
AK
263#endif
264
4be44fcd 265static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
1da177e4 266{
1da177e4
LT
267
268 if (!pr)
d550d98d 269 return -EINVAL;
1da177e4
LT
270
271 if (!pr->pblk)
d550d98d 272 return -ENODEV;
1da177e4 273
1da177e4 274 /* if info is obtained from pblk/fadt, type equals state */
1da177e4
LT
275 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
276 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
277
4c033552
VP
278#ifndef CONFIG_HOTPLUG_CPU
279 /*
280 * Check for P_LVL2_UP flag before entering C2 and above on
4f86d3a8 281 * an SMP system.
4c033552 282 */
ad71860a 283 if ((num_online_cpus() > 1) &&
cee324b1 284 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
d550d98d 285 return -ENODEV;
4c033552
VP
286#endif
287
1da177e4
LT
288 /* determine C2 and C3 address from pblk */
289 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
290 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
291
292 /* determine latencies from FADT */
ba494bee
BM
293 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
294 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
1da177e4 295
5d76b6f6
LB
296 /*
297 * FADT specified C2 latency must be less than or equal to
298 * 100 microseconds.
299 */
ba494bee 300 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
5d76b6f6 301 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
ba494bee 302 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
5d76b6f6
LB
303 /* invalidate C2 */
304 pr->power.states[ACPI_STATE_C2].address = 0;
305 }
306
a6d72c18
LB
307 /*
308 * FADT supplied C3 latency must be less than or equal to
309 * 1000 microseconds.
310 */
ba494bee 311 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
a6d72c18 312 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
ba494bee 313 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
a6d72c18
LB
314 /* invalidate C3 */
315 pr->power.states[ACPI_STATE_C3].address = 0;
316 }
317
1da177e4
LT
318 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
319 "lvl2[0x%08x] lvl3[0x%08x]\n",
320 pr->power.states[ACPI_STATE_C2].address,
321 pr->power.states[ACPI_STATE_C3].address));
322
d550d98d 323 return 0;
1da177e4
LT
324}
325
991528d7 326static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
acf05f4b 327{
991528d7
VP
328 if (!pr->power.states[ACPI_STATE_C1].valid) {
329 /* set the first C-State to C1 */
330 /* all processors need to support C1 */
331 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
332 pr->power.states[ACPI_STATE_C1].valid = 1;
0fda6b40 333 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
991528d7
VP
334 }
335 /* the C0 state only exists as a filler in our array */
acf05f4b 336 pr->power.states[ACPI_STATE_C0].valid = 1;
d550d98d 337 return 0;
acf05f4b
VP
338}
339
4be44fcd 340static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
1da177e4 341{
4be44fcd 342 acpi_status status = 0;
439913ff 343 u64 count;
cf824788 344 int current_count;
4be44fcd
LB
345 int i;
346 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
347 union acpi_object *cst;
1da177e4 348
1da177e4 349
1da177e4 350 if (nocst)
d550d98d 351 return -ENODEV;
1da177e4 352
991528d7 353 current_count = 0;
1da177e4
LT
354
355 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
356 if (ACPI_FAILURE(status)) {
357 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
d550d98d 358 return -ENODEV;
4be44fcd 359 }
1da177e4 360
50dd0969 361 cst = buffer.pointer;
1da177e4
LT
362
363 /* There must be at least 2 elements */
364 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
6468463a 365 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
1da177e4
LT
366 status = -EFAULT;
367 goto end;
368 }
369
370 count = cst->package.elements[0].integer.value;
371
372 /* Validate number of power states. */
373 if (count < 1 || count != cst->package.count - 1) {
6468463a 374 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
1da177e4
LT
375 status = -EFAULT;
376 goto end;
377 }
378
1da177e4
LT
379 /* Tell driver that at least _CST is supported. */
380 pr->flags.has_cst = 1;
381
382 for (i = 1; i <= count; i++) {
383 union acpi_object *element;
384 union acpi_object *obj;
385 struct acpi_power_register *reg;
386 struct acpi_processor_cx cx;
387
388 memset(&cx, 0, sizeof(cx));
389
50dd0969 390 element = &(cst->package.elements[i]);
1da177e4
LT
391 if (element->type != ACPI_TYPE_PACKAGE)
392 continue;
393
394 if (element->package.count != 4)
395 continue;
396
50dd0969 397 obj = &(element->package.elements[0]);
1da177e4
LT
398
399 if (obj->type != ACPI_TYPE_BUFFER)
400 continue;
401
4be44fcd 402 reg = (struct acpi_power_register *)obj->buffer.pointer;
1da177e4
LT
403
404 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
4be44fcd 405 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
1da177e4
LT
406 continue;
407
1da177e4 408 /* There should be an easy way to extract an integer... */
50dd0969 409 obj = &(element->package.elements[1]);
1da177e4
LT
410 if (obj->type != ACPI_TYPE_INTEGER)
411 continue;
412
413 cx.type = obj->integer.value;
991528d7
VP
414 /*
415 * Some buggy BIOSes won't list C1 in _CST -
416 * Let acpi_processor_get_power_info_default() handle them later
417 */
418 if (i == 1 && cx.type != ACPI_STATE_C1)
419 current_count++;
420
421 cx.address = reg->address;
422 cx.index = current_count + 1;
423
bc71bec9 424 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
991528d7
VP
425 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
426 if (acpi_processor_ffh_cstate_probe
427 (pr->id, &cx, reg) == 0) {
bc71bec9 428 cx.entry_method = ACPI_CSTATE_FFH;
429 } else if (cx.type == ACPI_STATE_C1) {
991528d7
VP
430 /*
431 * C1 is a special case where FIXED_HARDWARE
432 * can be handled in non-MWAIT way as well.
433 * In that case, save this _CST entry info.
991528d7
VP
434 * Otherwise, ignore this info and continue.
435 */
bc71bec9 436 cx.entry_method = ACPI_CSTATE_HALT;
4fcb2fcd 437 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
bc71bec9 438 } else {
991528d7
VP
439 continue;
440 }
da5e09a1 441 if (cx.type == ACPI_STATE_C1 &&
d1896049 442 (boot_option_idle_override == IDLE_NOMWAIT)) {
c1e3b377
ZY
443 /*
444 * In most cases the C1 space_id obtained from
445 * _CST object is FIXED_HARDWARE access mode.
446 * But when the option of idle=halt is added,
447 * the entry_method type should be changed from
448 * CSTATE_FFH to CSTATE_HALT.
da5e09a1
ZY
449 * When the option of idle=nomwait is added,
450 * the C1 entry_method type should be
451 * CSTATE_HALT.
c1e3b377
ZY
452 */
453 cx.entry_method = ACPI_CSTATE_HALT;
454 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
455 }
4fcb2fcd
VP
456 } else {
457 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
458 cx.address);
991528d7 459 }
1da177e4 460
0fda6b40
VP
461 if (cx.type == ACPI_STATE_C1) {
462 cx.valid = 1;
463 }
4fcb2fcd 464
50dd0969 465 obj = &(element->package.elements[2]);
1da177e4
LT
466 if (obj->type != ACPI_TYPE_INTEGER)
467 continue;
468
469 cx.latency = obj->integer.value;
470
50dd0969 471 obj = &(element->package.elements[3]);
1da177e4
LT
472 if (obj->type != ACPI_TYPE_INTEGER)
473 continue;
474
cf824788
JM
475 current_count++;
476 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
477
478 /*
479 * We support total ACPI_PROCESSOR_MAX_POWER - 1
480 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
481 */
482 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
483 printk(KERN_WARNING
484 "Limiting number of power states to max (%d)\n",
485 ACPI_PROCESSOR_MAX_POWER);
486 printk(KERN_WARNING
487 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
488 break;
489 }
1da177e4
LT
490 }
491
4be44fcd 492 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
cf824788 493 current_count));
1da177e4
LT
494
495 /* Validate number of power states discovered */
cf824788 496 if (current_count < 2)
6d93c648 497 status = -EFAULT;
1da177e4 498
4be44fcd 499 end:
02438d87 500 kfree(buffer.pointer);
1da177e4 501
d550d98d 502 return status;
1da177e4
LT
503}
504
4be44fcd
LB
505static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
506 struct acpi_processor_cx *cx)
1da177e4 507{
ee1ca48f
PV
508 static int bm_check_flag = -1;
509 static int bm_control_flag = -1;
02df8b93 510
1da177e4
LT
511
512 if (!cx->address)
d550d98d 513 return;
1da177e4 514
1da177e4
LT
515 /*
516 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
517 * DMA transfers are used by any ISA device to avoid livelock.
518 * Note that we could disable Type-F DMA (as recommended by
519 * the erratum), but this is known to disrupt certain ISA
520 * devices thus we take the conservative approach.
521 */
522 else if (errata.piix4.fdma) {
523 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd 524 "C3 not supported on PIIX4 with Type-F DMA\n"));
d550d98d 525 return;
1da177e4
LT
526 }
527
02df8b93 528 /* All the logic here assumes flags.bm_check is same across all CPUs */
ee1ca48f 529 if (bm_check_flag == -1) {
02df8b93
VP
530 /* Determine whether bm_check is needed based on CPU */
531 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
532 bm_check_flag = pr->flags.bm_check;
ee1ca48f 533 bm_control_flag = pr->flags.bm_control;
02df8b93
VP
534 } else {
535 pr->flags.bm_check = bm_check_flag;
ee1ca48f 536 pr->flags.bm_control = bm_control_flag;
02df8b93
VP
537 }
538
539 if (pr->flags.bm_check) {
02df8b93 540 if (!pr->flags.bm_control) {
ed3110ef
VP
541 if (pr->flags.has_cst != 1) {
542 /* bus mastering control is necessary */
543 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
544 "C3 support requires BM control\n"));
545 return;
546 } else {
547 /* Here we enter C3 without bus mastering */
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 support without BM control\n"));
550 }
02df8b93
VP
551 }
552 } else {
02df8b93
VP
553 /*
554 * WBINVD should be set in fadt, for C3 state to be
555 * supported on when bm_check is not required.
556 */
cee324b1 557 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
02df8b93 558 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
4be44fcd
LB
559 "Cache invalidation should work properly"
560 " for C3 to be enabled on SMP systems\n"));
d550d98d 561 return;
02df8b93 562 }
02df8b93
VP
563 }
564
1da177e4
LT
565 /*
566 * Otherwise we've met all of our C3 requirements.
567 * Normalize the C3 latency to expidite policy. Enable
568 * checking of bus mastering status (bm_check) so we can
569 * use this in our C3 policy
570 */
571 cx->valid = 1;
4f86d3a8 572
31878dd8
LB
573 /*
574 * On older chipsets, BM_RLD needs to be set
575 * in order for Bus Master activity to wake the
576 * system from C3. Newer chipsets handle DMA
577 * during C3 automatically and BM_RLD is a NOP.
578 * In either case, the proper way to
579 * handle BM_RLD is to set it and leave it set.
580 */
50ffba1b 581 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1da177e4 582
d550d98d 583 return;
1da177e4
LT
584}
585
1da177e4
LT
586static int acpi_processor_power_verify(struct acpi_processor *pr)
587{
588 unsigned int i;
589 unsigned int working = 0;
6eb0a0fd 590
169a0abb 591 pr->power.timer_broadcast_on_state = INT_MAX;
6eb0a0fd 592
a0bf284b 593 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1da177e4
LT
594 struct acpi_processor_cx *cx = &pr->power.states[i];
595
596 switch (cx->type) {
597 case ACPI_STATE_C1:
598 cx->valid = 1;
599 break;
600
601 case ACPI_STATE_C2:
d22edd29
LB
602 if (!cx->address)
603 break;
604 cx->valid = 1;
1da177e4
LT
605 break;
606
607 case ACPI_STATE_C3:
608 acpi_processor_power_verify_c3(pr, cx);
609 break;
610 }
7e275cc4
LB
611 if (!cx->valid)
612 continue;
1da177e4 613
7e275cc4
LB
614 lapic_timer_check_state(i, pr, cx);
615 tsc_check_state(cx->type);
616 working++;
1da177e4 617 }
bd663347 618
918aae42 619 lapic_timer_propagate_broadcast(pr);
1da177e4
LT
620
621 return (working);
622}
623
4be44fcd 624static int acpi_processor_get_power_info(struct acpi_processor *pr)
1da177e4
LT
625{
626 unsigned int i;
627 int result;
628
1da177e4
LT
629
630 /* NOTE: the idle thread may not be running while calling
631 * this function */
632
991528d7
VP
633 /* Zero initialize all the C-states info. */
634 memset(pr->power.states, 0, sizeof(pr->power.states));
635
1da177e4 636 result = acpi_processor_get_power_info_cst(pr);
6d93c648 637 if (result == -ENODEV)
c5a114f1 638 result = acpi_processor_get_power_info_fadt(pr);
6d93c648 639
991528d7
VP
640 if (result)
641 return result;
642
643 acpi_processor_get_power_info_default(pr);
644
cf824788 645 pr->power.count = acpi_processor_power_verify(pr);
1da177e4 646
1da177e4
LT
647 /*
648 * if one state of type C2 or C3 is available, mark this
649 * CPU as being "idle manageable"
650 */
651 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
acf05f4b 652 if (pr->power.states[i].valid) {
1da177e4 653 pr->power.count = i;
2203d6ed
LT
654 if (pr->power.states[i].type >= ACPI_STATE_C2)
655 pr->flags.power = 1;
acf05f4b 656 }
1da177e4
LT
657 }
658
d550d98d 659 return 0;
1da177e4
LT
660}
661
4f86d3a8
LB
662/**
663 * acpi_idle_bm_check - checks if bus master activity was detected
664 */
665static int acpi_idle_bm_check(void)
666{
667 u32 bm_status = 0;
668
d3e7e99f
LB
669 if (bm_check_disable)
670 return 0;
671
50ffba1b 672 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
4f86d3a8 673 if (bm_status)
50ffba1b 674 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
4f86d3a8
LB
675 /*
676 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
677 * the true state of bus mastering activity; forcing us to
678 * manually check the BMIDEA bit of each IDE channel.
679 */
680 else if (errata.piix4.bmisx) {
681 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
682 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
683 bm_status = 1;
684 }
685 return bm_status;
686}
687
4f86d3a8
LB
688/**
689 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
690 * @cx: cstate data
bc71bec9 691 *
692 * Caller disables interrupt before call and enables interrupt after return.
4f86d3a8
LB
693 */
694static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
695{
dcf30997
SR
696 /* Don't trace irqs off for idle */
697 stop_critical_timings();
bc71bec9 698 if (cx->entry_method == ACPI_CSTATE_FFH) {
4f86d3a8
LB
699 /* Call into architectural FFH based C-state */
700 acpi_processor_ffh_cstate_enter(cx);
bc71bec9 701 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
702 acpi_safe_halt();
4f86d3a8 703 } else {
4f86d3a8
LB
704 /* IO port based C-state */
705 inb(cx->address);
706 /* Dummy wait op - must do something useless after P_LVL2 read
707 because chipsets cannot guarantee that STPCLK# signal
708 gets asserted in time to freeze execution properly. */
cfa806f0 709 inl(acpi_gbl_FADT.xpm_timer_block.address);
4f86d3a8 710 }
dcf30997 711 start_critical_timings();
4f86d3a8
LB
712}
713
714/**
715 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
716 * @dev: the target CPU
46bcfad7 717 * @drv: cpuidle driver containing cpuidle state info
e978aa7d 718 * @index: index of target state
4f86d3a8
LB
719 *
720 * This is equivalent to the HALT instruction.
721 */
722static int acpi_idle_enter_c1(struct cpuidle_device *dev,
46bcfad7 723 struct cpuidle_driver *drv, int index)
4f86d3a8
LB
724{
725 struct acpi_processor *pr;
6240a10d 726 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
9b12e18c 727
4a6f4fe8 728 pr = __this_cpu_read(processors);
4f86d3a8
LB
729
730 if (unlikely(!pr))
e978aa7d 731 return -EINVAL;
4f86d3a8 732
ea811747
PZ
733 if (cx->entry_method == ACPI_CSTATE_FFH) {
734 if (current_set_polling_and_test())
735 return -EINVAL;
736 }
737
7e275cc4 738 lapic_timer_state_broadcast(pr, cx, 1);
bc71bec9 739 acpi_idle_do_entry(cx);
e978aa7d 740
7e275cc4 741 lapic_timer_state_broadcast(pr, cx, 0);
4f86d3a8 742
e978aa7d 743 return index;
4f86d3a8
LB
744}
745
1a022e3f
BO
746
747/**
748 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
749 * @dev: the target CPU
750 * @index: the index of suggested state
751 */
752static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
753{
6240a10d 754 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
1a022e3f
BO
755
756 ACPI_FLUSH_CPU_CACHE();
757
758 while (1) {
759
760 if (cx->entry_method == ACPI_CSTATE_HALT)
54f70077 761 safe_halt();
1a022e3f
BO
762 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
763 inb(cx->address);
764 /* See comment in acpi_idle_do_entry() */
765 inl(acpi_gbl_FADT.xpm_timer_block.address);
766 } else
767 return -ENODEV;
768 }
769
770 /* Never reached */
771 return 0;
772}
773
4f86d3a8
LB
774/**
775 * acpi_idle_enter_simple - enters an ACPI state without BM handling
776 * @dev: the target CPU
46bcfad7 777 * @drv: cpuidle driver with cpuidle state information
e978aa7d 778 * @index: the index of suggested state
4f86d3a8
LB
779 */
780static int acpi_idle_enter_simple(struct cpuidle_device *dev,
46bcfad7 781 struct cpuidle_driver *drv, int index)
4f86d3a8
LB
782{
783 struct acpi_processor *pr;
6240a10d 784 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
50629118 785
4a6f4fe8 786 pr = __this_cpu_read(processors);
4f86d3a8
LB
787
788 if (unlikely(!pr))
e978aa7d 789 return -EINVAL;
e196441b 790
ea811747
PZ
791 if (cx->entry_method == ACPI_CSTATE_FFH) {
792 if (current_set_polling_and_test())
e978aa7d 793 return -EINVAL;
4f86d3a8
LB
794 }
795
e17bcb43
TG
796 /*
797 * Must be done before busmaster disable as we might need to
798 * access HPET !
799 */
7e275cc4 800 lapic_timer_state_broadcast(pr, cx, 1);
e17bcb43 801
4f86d3a8
LB
802 if (cx->type == ACPI_STATE_C3)
803 ACPI_FLUSH_CPU_CACHE();
804
50629118
VP
805 /* Tell the scheduler that we are going deep-idle: */
806 sched_clock_idle_sleep_event();
4f86d3a8 807 acpi_idle_do_entry(cx);
4f86d3a8 808
a474a515 809 sched_clock_idle_wakeup_event(0);
e978aa7d 810
7e275cc4 811 lapic_timer_state_broadcast(pr, cx, 0);
e978aa7d 812 return index;
4f86d3a8
LB
813}
814
815static int c3_cpu_count;
e12f65f7 816static DEFINE_RAW_SPINLOCK(c3_lock);
4f86d3a8
LB
817
818/**
819 * acpi_idle_enter_bm - enters C3 with proper BM handling
820 * @dev: the target CPU
46bcfad7 821 * @drv: cpuidle driver containing state data
e978aa7d 822 * @index: the index of suggested state
4f86d3a8
LB
823 *
824 * If BM is detected, the deepest non-C3 idle state is entered instead.
825 */
826static int acpi_idle_enter_bm(struct cpuidle_device *dev,
46bcfad7 827 struct cpuidle_driver *drv, int index)
4f86d3a8
LB
828{
829 struct acpi_processor *pr;
6240a10d 830 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
50629118 831
4a6f4fe8 832 pr = __this_cpu_read(processors);
4f86d3a8
LB
833
834 if (unlikely(!pr))
e978aa7d 835 return -EINVAL;
4f86d3a8 836
718be4aa 837 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
46bcfad7
DD
838 if (drv->safe_state_index >= 0) {
839 return drv->states[drv->safe_state_index].enter(dev,
840 drv, drv->safe_state_index);
ddc081a1 841 } else {
8651f97b 842 acpi_safe_halt();
75cc5235 843 return -EBUSY;
ddc081a1
VP
844 }
845 }
846
ea811747
PZ
847 if (cx->entry_method == ACPI_CSTATE_FFH) {
848 if (current_set_polling_and_test())
e978aa7d 849 return -EINVAL;
4f86d3a8
LB
850 }
851
996520c1
VP
852 acpi_unlazy_tlb(smp_processor_id());
853
50629118
VP
854 /* Tell the scheduler that we are going deep-idle: */
855 sched_clock_idle_sleep_event();
4f86d3a8
LB
856 /*
857 * Must be done before busmaster disable as we might need to
858 * access HPET !
859 */
7e275cc4 860 lapic_timer_state_broadcast(pr, cx, 1);
4f86d3a8 861
ddc081a1
VP
862 /*
863 * disable bus master
864 * bm_check implies we need ARB_DIS
865 * !bm_check implies we need cache flush
866 * bm_control implies whether we can do ARB_DIS
867 *
868 * That leaves a case where bm_check is set and bm_control is
869 * not set. In that case we cannot do much, we enter C3
870 * without doing anything.
871 */
872 if (pr->flags.bm_check && pr->flags.bm_control) {
e12f65f7 873 raw_spin_lock(&c3_lock);
4f86d3a8
LB
874 c3_cpu_count++;
875 /* Disable bus master arbitration when all CPUs are in C3 */
876 if (c3_cpu_count == num_online_cpus())
50ffba1b 877 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
e12f65f7 878 raw_spin_unlock(&c3_lock);
ddc081a1
VP
879 } else if (!pr->flags.bm_check) {
880 ACPI_FLUSH_CPU_CACHE();
881 }
4f86d3a8 882
ddc081a1 883 acpi_idle_do_entry(cx);
4f86d3a8 884
ddc081a1
VP
885 /* Re-enable bus master arbitration */
886 if (pr->flags.bm_check && pr->flags.bm_control) {
e12f65f7 887 raw_spin_lock(&c3_lock);
50ffba1b 888 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
4f86d3a8 889 c3_cpu_count--;
e12f65f7 890 raw_spin_unlock(&c3_lock);
4f86d3a8 891 }
e978aa7d 892
a474a515 893 sched_clock_idle_wakeup_event(0);
4f86d3a8 894
7e275cc4 895 lapic_timer_state_broadcast(pr, cx, 0);
e978aa7d 896 return index;
4f86d3a8
LB
897}
898
899struct cpuidle_driver acpi_idle_driver = {
900 .name = "acpi_idle",
901 .owner = THIS_MODULE,
902};
903
904/**
46bcfad7
DD
905 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
906 * device i.e. per-cpu data
907 *
4f86d3a8 908 * @pr: the ACPI processor
6ef0f086 909 * @dev : the cpuidle device
4f86d3a8 910 */
6ef0f086
DL
911static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
912 struct cpuidle_device *dev)
4f86d3a8 913{
9a0b8415 914 int i, count = CPUIDLE_DRIVER_STATE_START;
4f86d3a8 915 struct acpi_processor_cx *cx;
4f86d3a8
LB
916
917 if (!pr->flags.power_setup_done)
918 return -EINVAL;
919
920 if (pr->flags.power == 0) {
921 return -EINVAL;
922 }
923
b88a634a
KRW
924 if (!dev)
925 return -EINVAL;
926
dcb84f33 927 dev->cpu = pr->id;
4fcb2fcd 928
615dfd93
LB
929 if (max_cstate == 0)
930 max_cstate = 1;
931
4f86d3a8
LB
932 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
933 cx = &pr->power.states[i];
4f86d3a8
LB
934
935 if (!cx->valid)
936 continue;
937
938#ifdef CONFIG_HOTPLUG_CPU
939 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
940 !pr->flags.has_cst &&
941 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
942 continue;
1fec74a9 943#endif
6240a10d 944 per_cpu(acpi_cstate[count], dev->cpu) = cx;
4f86d3a8 945
46bcfad7
DD
946 count++;
947 if (count == CPUIDLE_STATE_MAX)
948 break;
949 }
950
951 dev->state_count = count;
952
953 if (!count)
954 return -EINVAL;
955
956 return 0;
957}
958
959/**
960 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
961 * global state data i.e. idle routines
962 *
963 * @pr: the ACPI processor
964 */
965static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
966{
967 int i, count = CPUIDLE_DRIVER_STATE_START;
968 struct acpi_processor_cx *cx;
969 struct cpuidle_state *state;
970 struct cpuidle_driver *drv = &acpi_idle_driver;
971
972 if (!pr->flags.power_setup_done)
973 return -EINVAL;
974
975 if (pr->flags.power == 0)
976 return -EINVAL;
977
978 drv->safe_state_index = -1;
4fcb2fcd 979 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
46bcfad7
DD
980 drv->states[i].name[0] = '\0';
981 drv->states[i].desc[0] = '\0';
4fcb2fcd
VP
982 }
983
615dfd93
LB
984 if (max_cstate == 0)
985 max_cstate = 1;
986
4f86d3a8
LB
987 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
988 cx = &pr->power.states[i];
4f86d3a8
LB
989
990 if (!cx->valid)
991 continue;
992
993#ifdef CONFIG_HOTPLUG_CPU
994 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
995 !pr->flags.has_cst &&
996 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
997 continue;
1fec74a9 998#endif
4f86d3a8 999
46bcfad7 1000 state = &drv->states[count];
4f86d3a8 1001 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
4fcb2fcd 1002 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
4f86d3a8 1003 state->exit_latency = cx->latency;
4963f620 1004 state->target_residency = cx->latency * latency_factor;
4f86d3a8
LB
1005
1006 state->flags = 0;
1007 switch (cx->type) {
1008 case ACPI_STATE_C1:
8e92b660
VP
1009 if (cx->entry_method == ACPI_CSTATE_FFH)
1010 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1011
4f86d3a8 1012 state->enter = acpi_idle_enter_c1;
1a022e3f 1013 state->enter_dead = acpi_idle_play_dead;
46bcfad7 1014 drv->safe_state_index = count;
4f86d3a8
LB
1015 break;
1016
1017 case ACPI_STATE_C2:
4f86d3a8
LB
1018 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1019 state->enter = acpi_idle_enter_simple;
1a022e3f 1020 state->enter_dead = acpi_idle_play_dead;
46bcfad7 1021 drv->safe_state_index = count;
4f86d3a8
LB
1022 break;
1023
1024 case ACPI_STATE_C3:
4f86d3a8 1025 state->flags |= CPUIDLE_FLAG_TIME_VALID;
4f86d3a8
LB
1026 state->enter = pr->flags.bm_check ?
1027 acpi_idle_enter_bm :
1028 acpi_idle_enter_simple;
1029 break;
1030 }
1031
1032 count++;
9a0b8415 1033 if (count == CPUIDLE_STATE_MAX)
1034 break;
4f86d3a8
LB
1035 }
1036
46bcfad7 1037 drv->state_count = count;
4f86d3a8
LB
1038
1039 if (!count)
1040 return -EINVAL;
1041
4f86d3a8
LB
1042 return 0;
1043}
1044
46bcfad7 1045int acpi_processor_hotplug(struct acpi_processor *pr)
4f86d3a8 1046{
dcb84f33 1047 int ret = 0;
e8b1b59d 1048 struct cpuidle_device *dev;
4f86d3a8 1049
d1896049 1050 if (disabled_by_idle_boot_param())
36a91358
VP
1051 return 0;
1052
4f86d3a8
LB
1053 if (!pr)
1054 return -EINVAL;
1055
1056 if (nocst) {
1057 return -ENODEV;
1058 }
1059
1060 if (!pr->flags.power_setup_done)
1061 return -ENODEV;
1062
e8b1b59d 1063 dev = per_cpu(acpi_cpuidle_device, pr->id);
4f86d3a8 1064 cpuidle_pause_and_lock();
3d339dcb 1065 cpuidle_disable_device(dev);
4f86d3a8 1066 acpi_processor_get_power_info(pr);
dcb84f33 1067 if (pr->flags.power) {
6ef0f086 1068 acpi_processor_setup_cpuidle_cx(pr, dev);
3d339dcb 1069 ret = cpuidle_enable_device(dev);
dcb84f33 1070 }
4f86d3a8
LB
1071 cpuidle_resume_and_unlock();
1072
1073 return ret;
1074}
1075
46bcfad7
DD
1076int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1077{
1078 int cpu;
1079 struct acpi_processor *_pr;
3d339dcb 1080 struct cpuidle_device *dev;
46bcfad7
DD
1081
1082 if (disabled_by_idle_boot_param())
1083 return 0;
1084
1085 if (!pr)
1086 return -EINVAL;
1087
1088 if (nocst)
1089 return -ENODEV;
1090
1091 if (!pr->flags.power_setup_done)
1092 return -ENODEV;
1093
1094 /*
1095 * FIXME: Design the ACPI notification to make it once per
1096 * system instead of once per-cpu. This condition is a hack
1097 * to make the code that updates C-States be called once.
1098 */
1099
9505626d 1100 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
46bcfad7
DD
1101
1102 cpuidle_pause_and_lock();
1103 /* Protect against cpu-hotplug */
1104 get_online_cpus();
1105
1106 /* Disable all cpuidle devices */
1107 for_each_online_cpu(cpu) {
1108 _pr = per_cpu(processors, cpu);
1109 if (!_pr || !_pr->flags.power_setup_done)
1110 continue;
3d339dcb
DL
1111 dev = per_cpu(acpi_cpuidle_device, cpu);
1112 cpuidle_disable_device(dev);
46bcfad7
DD
1113 }
1114
1115 /* Populate Updated C-state information */
f427e5f1 1116 acpi_processor_get_power_info(pr);
46bcfad7
DD
1117 acpi_processor_setup_cpuidle_states(pr);
1118
1119 /* Enable all cpuidle devices */
1120 for_each_online_cpu(cpu) {
1121 _pr = per_cpu(processors, cpu);
1122 if (!_pr || !_pr->flags.power_setup_done)
1123 continue;
1124 acpi_processor_get_power_info(_pr);
1125 if (_pr->flags.power) {
3d339dcb 1126 dev = per_cpu(acpi_cpuidle_device, cpu);
6ef0f086 1127 acpi_processor_setup_cpuidle_cx(_pr, dev);
3d339dcb 1128 cpuidle_enable_device(dev);
46bcfad7
DD
1129 }
1130 }
1131 put_online_cpus();
1132 cpuidle_resume_and_unlock();
1133 }
1134
1135 return 0;
1136}
1137
1138static int acpi_processor_registered;
1139
fe7bf106 1140int acpi_processor_power_init(struct acpi_processor *pr)
1da177e4 1141{
4be44fcd 1142 acpi_status status = 0;
46bcfad7 1143 int retval;
3d339dcb 1144 struct cpuidle_device *dev;
b6835052 1145 static int first_run;
1da177e4 1146
d1896049 1147 if (disabled_by_idle_boot_param())
36a91358 1148 return 0;
1da177e4
LT
1149
1150 if (!first_run) {
1151 dmi_check_system(processor_power_dmi_table);
c1c30634 1152 max_cstate = acpi_processor_cstate_check(max_cstate);
1da177e4 1153 if (max_cstate < ACPI_C_STATES_MAX)
4be44fcd
LB
1154 printk(KERN_NOTICE
1155 "ACPI: processor limited to max C-state %d\n",
1156 max_cstate);
1da177e4
LT
1157 first_run++;
1158 }
1159
02df8b93 1160 if (!pr)
d550d98d 1161 return -EINVAL;
02df8b93 1162
cee324b1 1163 if (acpi_gbl_FADT.cst_control && !nocst) {
4be44fcd 1164 status =
cee324b1 1165 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1da177e4 1166 if (ACPI_FAILURE(status)) {
a6fc6720
TR
1167 ACPI_EXCEPTION((AE_INFO, status,
1168 "Notifying BIOS of _CST ability failed"));
1da177e4
LT
1169 }
1170 }
1171
1172 acpi_processor_get_power_info(pr);
4f86d3a8 1173 pr->flags.power_setup_done = 1;
1da177e4
LT
1174
1175 /*
1176 * Install the idle handler if processor power management is supported.
1177 * Note that we use previously set idle handler will be used on
1178 * platforms that only support C1.
1179 */
36a91358 1180 if (pr->flags.power) {
46bcfad7
DD
1181 /* Register acpi_idle_driver if not already registered */
1182 if (!acpi_processor_registered) {
1183 acpi_processor_setup_cpuidle_states(pr);
1184 retval = cpuidle_register_driver(&acpi_idle_driver);
1185 if (retval)
1186 return retval;
1187 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1188 acpi_idle_driver.name);
1189 }
3d339dcb
DL
1190
1191 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1192 if (!dev)
1193 return -ENOMEM;
1194 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1195
6ef0f086 1196 acpi_processor_setup_cpuidle_cx(pr, dev);
3d339dcb 1197
46bcfad7
DD
1198 /* Register per-cpu cpuidle_device. Cpuidle driver
1199 * must already be registered before registering device
1200 */
3d339dcb 1201 retval = cpuidle_register_device(dev);
46bcfad7
DD
1202 if (retval) {
1203 if (acpi_processor_registered == 0)
1204 cpuidle_unregister_driver(&acpi_idle_driver);
1205 return retval;
1206 }
1207 acpi_processor_registered++;
1da177e4 1208 }
d550d98d 1209 return 0;
1da177e4
LT
1210}
1211
38a991b6 1212int acpi_processor_power_exit(struct acpi_processor *pr)
1da177e4 1213{
3d339dcb
DL
1214 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1215
d1896049 1216 if (disabled_by_idle_boot_param())
36a91358
VP
1217 return 0;
1218
46bcfad7 1219 if (pr->flags.power) {
3d339dcb 1220 cpuidle_unregister_device(dev);
46bcfad7
DD
1221 acpi_processor_registered--;
1222 if (acpi_processor_registered == 0)
1223 cpuidle_unregister_driver(&acpi_idle_driver);
1224 }
1da177e4 1225
46bcfad7 1226 pr->flags.power_setup_done = 0;
d550d98d 1227 return 0;
1da177e4 1228}