Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
5c87579e | 41 | #include <linux/latency.h> |
1da177e4 LT |
42 | |
43 | #include <asm/io.h> | |
44 | #include <asm/uaccess.h> | |
45 | ||
46 | #include <acpi/acpi_bus.h> | |
47 | #include <acpi/processor.h> | |
48 | ||
49 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
50 | #define ACPI_PROCESSOR_CLASS "processor" | |
51 | #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver" | |
52 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT | |
4be44fcd | 53 | ACPI_MODULE_NAME("acpi_processor") |
1da177e4 | 54 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 LT |
55 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
56 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
57 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 58 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
59 | module_param(max_cstate, uint, 0644); |
60 | ||
b6835052 | 61 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
62 | module_param(nocst, uint, 0000); |
63 | ||
64 | /* | |
65 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
66 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
67 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
68 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
69 | * reduce history for more aggressive entry into C3 | |
70 | */ | |
b6835052 | 71 | static unsigned int bm_history __read_mostly = |
4be44fcd | 72 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
73 | module_param(bm_history, uint, 0644); |
74 | /* -------------------------------------------------------------------------- | |
75 | Power Management | |
76 | -------------------------------------------------------------------------- */ | |
77 | ||
78 | /* | |
79 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
80 | * For now disable this. Probably a bug somewhere else. | |
81 | * | |
82 | * To skip this limit, boot/load with a large max_cstate limit. | |
83 | */ | |
335f16be | 84 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
85 | { |
86 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
87 | return 0; | |
88 | ||
3d35600a | 89 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
90 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
91 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 92 | |
3d35600a | 93 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
94 | |
95 | return 0; | |
96 | } | |
97 | ||
7ded5689 AR |
98 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
99 | callers to only run once -AK */ | |
100 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
f831335d BS |
101 | { set_max_cstate, "IBM ThinkPad R40e", { |
102 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
103 | DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1}, | |
876c184b TR |
104 | { set_max_cstate, "IBM ThinkPad R40e", { |
105 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
106 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
107 | { set_max_cstate, "IBM ThinkPad R40e", { | |
108 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
109 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
110 | { set_max_cstate, "IBM ThinkPad R40e", { | |
111 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
112 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
113 | { set_max_cstate, "IBM ThinkPad R40e", { | |
114 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
115 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
116 | { set_max_cstate, "IBM ThinkPad R40e", { | |
117 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
118 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
119 | { set_max_cstate, "IBM ThinkPad R40e", { | |
120 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
121 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
122 | { set_max_cstate, "IBM ThinkPad R40e", { | |
123 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
124 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
125 | { set_max_cstate, "IBM ThinkPad R40e", { | |
126 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
127 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
128 | { set_max_cstate, "IBM ThinkPad R40e", { | |
129 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
130 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
131 | { set_max_cstate, "IBM ThinkPad R40e", { | |
132 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
133 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
134 | { set_max_cstate, "IBM ThinkPad R40e", { | |
135 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
136 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
137 | { set_max_cstate, "IBM ThinkPad R40e", { | |
138 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
139 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
140 | { set_max_cstate, "IBM ThinkPad R40e", { | |
141 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
142 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
143 | { set_max_cstate, "IBM ThinkPad R40e", { | |
144 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
145 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
146 | { set_max_cstate, "IBM ThinkPad R40e", { | |
147 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
148 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
149 | { set_max_cstate, "Medion 41700", { | |
150 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
151 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
152 | { set_max_cstate, "Clevo 5600D", { | |
153 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
154 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 155 | (void *)2}, |
1da177e4 LT |
156 | {}, |
157 | }; | |
158 | ||
4be44fcd | 159 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
160 | { |
161 | if (t2 >= t1) | |
162 | return (t2 - t1); | |
163 | else if (!acpi_fadt.tmr_val_ext) | |
164 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); | |
165 | else | |
166 | return ((0xFFFFFFFF - t1) + t2); | |
167 | } | |
168 | ||
1da177e4 | 169 | static void |
4be44fcd LB |
170 | acpi_processor_power_activate(struct acpi_processor *pr, |
171 | struct acpi_processor_cx *new) | |
1da177e4 | 172 | { |
4be44fcd | 173 | struct acpi_processor_cx *old; |
1da177e4 LT |
174 | |
175 | if (!pr || !new) | |
176 | return; | |
177 | ||
178 | old = pr->power.state; | |
179 | ||
180 | if (old) | |
181 | old->promotion.count = 0; | |
4be44fcd | 182 | new->demotion.count = 0; |
1da177e4 LT |
183 | |
184 | /* Cleanup from old state. */ | |
185 | if (old) { | |
186 | switch (old->type) { | |
187 | case ACPI_STATE_C3: | |
188 | /* Disable bus master reload */ | |
02df8b93 | 189 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
190 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, |
191 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
192 | break; |
193 | } | |
194 | } | |
195 | ||
196 | /* Prepare to use new state. */ | |
197 | switch (new->type) { | |
198 | case ACPI_STATE_C3: | |
199 | /* Enable bus master reload */ | |
02df8b93 | 200 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
4be44fcd LB |
201 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, |
202 | ACPI_MTX_DO_NOT_LOCK); | |
1da177e4 LT |
203 | break; |
204 | } | |
205 | ||
206 | pr->power.state = new; | |
207 | ||
208 | return; | |
209 | } | |
210 | ||
64c7c8f8 NP |
211 | static void acpi_safe_halt(void) |
212 | { | |
495ab9c0 | 213 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 | 214 | smp_mb__after_clear_bit(); |
64c7c8f8 NP |
215 | if (!need_resched()) |
216 | safe_halt(); | |
495ab9c0 | 217 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
218 | } |
219 | ||
4be44fcd | 220 | static atomic_t c3_cpu_count; |
1da177e4 | 221 | |
4be44fcd | 222 | static void acpi_processor_idle(void) |
1da177e4 | 223 | { |
4be44fcd | 224 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
225 | struct acpi_processor_cx *cx = NULL; |
226 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
227 | int sleep_ticks = 0; |
228 | u32 t1, t2 = 0; | |
1da177e4 | 229 | |
64c7c8f8 | 230 | pr = processors[smp_processor_id()]; |
1da177e4 LT |
231 | if (!pr) |
232 | return; | |
233 | ||
234 | /* | |
235 | * Interrupts must be disabled during bus mastering calculations and | |
236 | * for C2/C3 transitions. | |
237 | */ | |
238 | local_irq_disable(); | |
239 | ||
240 | /* | |
241 | * Check whether we truly need to go idle, or should | |
242 | * reschedule: | |
243 | */ | |
244 | if (unlikely(need_resched())) { | |
245 | local_irq_enable(); | |
246 | return; | |
247 | } | |
248 | ||
249 | cx = pr->power.state; | |
64c7c8f8 NP |
250 | if (!cx) { |
251 | if (pm_idle_save) | |
252 | pm_idle_save(); | |
253 | else | |
254 | acpi_safe_halt(); | |
255 | return; | |
256 | } | |
1da177e4 LT |
257 | |
258 | /* | |
259 | * Check BM Activity | |
260 | * ----------------- | |
261 | * Check for bus mastering activity (if required), record, and check | |
262 | * for demotion. | |
263 | */ | |
264 | if (pr->flags.bm_check) { | |
4be44fcd LB |
265 | u32 bm_status = 0; |
266 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 | 267 | |
c5ab81ca DB |
268 | if (diff > 31) |
269 | diff = 31; | |
1da177e4 | 270 | |
c5ab81ca | 271 | pr->power.bm_activity <<= diff; |
1da177e4 LT |
272 | |
273 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, | |
4be44fcd | 274 | &bm_status, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 | 275 | if (bm_status) { |
c5ab81ca | 276 | pr->power.bm_activity |= 0x1; |
1da177e4 | 277 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, |
4be44fcd | 278 | 1, ACPI_MTX_DO_NOT_LOCK); |
1da177e4 LT |
279 | } |
280 | /* | |
281 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
282 | * the true state of bus mastering activity; forcing us to | |
283 | * manually check the BMIDEA bit of each IDE channel. | |
284 | */ | |
285 | else if (errata.piix4.bmisx) { | |
286 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 287 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
c5ab81ca | 288 | pr->power.bm_activity |= 0x1; |
1da177e4 LT |
289 | } |
290 | ||
291 | pr->power.bm_check_timestamp = jiffies; | |
292 | ||
293 | /* | |
c4a001b1 | 294 | * If bus mastering is or was active this jiffy, demote |
1da177e4 LT |
295 | * to avoid a faulty transition. Note that the processor |
296 | * won't enter a low-power state during this call (to this | |
c4a001b1 | 297 | * function) but should upon the next. |
1da177e4 LT |
298 | * |
299 | * TBD: A better policy might be to fallback to the demotion | |
300 | * state (use it for this quantum only) istead of | |
301 | * demoting -- and rely on duration as our sole demotion | |
302 | * qualification. This may, however, introduce DMA | |
303 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
304 | */ | |
c4a001b1 DB |
305 | if ((pr->power.bm_activity & 0x1) && |
306 | cx->demotion.threshold.bm) { | |
1da177e4 LT |
307 | local_irq_enable(); |
308 | next_state = cx->demotion.state; | |
309 | goto end; | |
310 | } | |
311 | } | |
312 | ||
4c033552 VP |
313 | #ifdef CONFIG_HOTPLUG_CPU |
314 | /* | |
315 | * Check for P_LVL2_UP flag before entering C2 and above on | |
316 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
317 | * detection phase, to work cleanly with logical CPU hotplug. | |
318 | */ | |
319 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1e483969 DSL |
320 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) |
321 | cx = &pr->power.states[ACPI_STATE_C1]; | |
4c033552 | 322 | #endif |
1e483969 | 323 | |
1da177e4 LT |
324 | /* |
325 | * Sleep: | |
326 | * ------ | |
327 | * Invoke the current Cx state to put the processor to sleep. | |
328 | */ | |
2a298a35 | 329 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 330 | current_thread_info()->status &= ~TS_POLLING; |
2a298a35 NP |
331 | smp_mb__after_clear_bit(); |
332 | if (need_resched()) { | |
495ab9c0 | 333 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 334 | local_irq_enable(); |
2a298a35 NP |
335 | return; |
336 | } | |
337 | } | |
338 | ||
1da177e4 LT |
339 | switch (cx->type) { |
340 | ||
341 | case ACPI_STATE_C1: | |
342 | /* | |
343 | * Invoke C1. | |
344 | * Use the appropriate idle routine, the one that would | |
345 | * be used without acpi C-states. | |
346 | */ | |
347 | if (pm_idle_save) | |
348 | pm_idle_save(); | |
349 | else | |
64c7c8f8 NP |
350 | acpi_safe_halt(); |
351 | ||
1da177e4 | 352 | /* |
4be44fcd | 353 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
354 | * go to an ISR rather than here. Need to instrument |
355 | * base interrupt handler. | |
356 | */ | |
357 | sleep_ticks = 0xFFFFFFFF; | |
358 | break; | |
359 | ||
360 | case ACPI_STATE_C2: | |
361 | /* Get start time (ticks) */ | |
362 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
363 | /* Invoke C2 */ | |
364 | inb(cx->address); | |
b488f021 AM |
365 | /* Dummy wait op - must do something useless after P_LVL2 read |
366 | because chipsets cannot guarantee that STPCLK# signal | |
367 | gets asserted in time to freeze execution properly. */ | |
1da177e4 LT |
368 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); |
369 | /* Get end time (ticks) */ | |
370 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
539eb11e | 371 | |
372 | #ifdef CONFIG_GENERIC_TIME | |
373 | /* TSC halts in C2, so notify users */ | |
374 | mark_tsc_unstable(); | |
375 | #endif | |
1da177e4 LT |
376 | /* Re-enable interrupts */ |
377 | local_irq_enable(); | |
495ab9c0 | 378 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 379 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
380 | sleep_ticks = |
381 | ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; | |
1da177e4 LT |
382 | break; |
383 | ||
384 | case ACPI_STATE_C3: | |
4be44fcd | 385 | |
02df8b93 VP |
386 | if (pr->flags.bm_check) { |
387 | if (atomic_inc_return(&c3_cpu_count) == | |
4be44fcd | 388 | num_online_cpus()) { |
02df8b93 VP |
389 | /* |
390 | * All CPUs are trying to go to C3 | |
391 | * Disable bus master arbitration | |
392 | */ | |
393 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | |
4be44fcd | 394 | ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
395 | } |
396 | } else { | |
397 | /* SMP with no shared cache... Invalidate cache */ | |
398 | ACPI_FLUSH_CPU_CACHE(); | |
399 | } | |
4be44fcd | 400 | |
1da177e4 LT |
401 | /* Get start time (ticks) */ |
402 | t1 = inl(acpi_fadt.xpm_tmr_blk.address); | |
403 | /* Invoke C3 */ | |
404 | inb(cx->address); | |
b488f021 | 405 | /* Dummy wait op (see above) */ |
1da177e4 LT |
406 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); |
407 | /* Get end time (ticks) */ | |
408 | t2 = inl(acpi_fadt.xpm_tmr_blk.address); | |
02df8b93 VP |
409 | if (pr->flags.bm_check) { |
410 | /* Enable bus master arbitration */ | |
411 | atomic_dec(&c3_cpu_count); | |
4be44fcd LB |
412 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, |
413 | ACPI_MTX_DO_NOT_LOCK); | |
02df8b93 VP |
414 | } |
415 | ||
539eb11e | 416 | #ifdef CONFIG_GENERIC_TIME |
417 | /* TSC halts in C3, so notify users */ | |
418 | mark_tsc_unstable(); | |
419 | #endif | |
1da177e4 LT |
420 | /* Re-enable interrupts */ |
421 | local_irq_enable(); | |
495ab9c0 | 422 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 423 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
424 | sleep_ticks = |
425 | ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; | |
1da177e4 LT |
426 | break; |
427 | ||
428 | default: | |
429 | local_irq_enable(); | |
430 | return; | |
431 | } | |
a3c6598f DB |
432 | cx->usage++; |
433 | if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) | |
434 | cx->time += sleep_ticks; | |
1da177e4 LT |
435 | |
436 | next_state = pr->power.state; | |
437 | ||
1e483969 DSL |
438 | #ifdef CONFIG_HOTPLUG_CPU |
439 | /* Don't do promotion/demotion */ | |
440 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
441 | !pr->flags.has_cst && !acpi_fadt.plvl2_up) { | |
442 | next_state = cx; | |
443 | goto end; | |
444 | } | |
445 | #endif | |
446 | ||
1da177e4 LT |
447 | /* |
448 | * Promotion? | |
449 | * ---------- | |
450 | * Track the number of longs (time asleep is greater than threshold) | |
451 | * and promote when the count threshold is reached. Note that bus | |
452 | * mastering activity may prevent promotions. | |
453 | * Do not promote above max_cstate. | |
454 | */ | |
455 | if (cx->promotion.state && | |
456 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
5c87579e AV |
457 | if (sleep_ticks > cx->promotion.threshold.ticks && |
458 | cx->promotion.state->latency <= system_latency_constraint()) { | |
1da177e4 | 459 | cx->promotion.count++; |
4be44fcd LB |
460 | cx->demotion.count = 0; |
461 | if (cx->promotion.count >= | |
462 | cx->promotion.threshold.count) { | |
1da177e4 | 463 | if (pr->flags.bm_check) { |
4be44fcd LB |
464 | if (! |
465 | (pr->power.bm_activity & cx-> | |
466 | promotion.threshold.bm)) { | |
467 | next_state = | |
468 | cx->promotion.state; | |
1da177e4 LT |
469 | goto end; |
470 | } | |
4be44fcd | 471 | } else { |
1da177e4 LT |
472 | next_state = cx->promotion.state; |
473 | goto end; | |
474 | } | |
475 | } | |
476 | } | |
477 | } | |
478 | ||
479 | /* | |
480 | * Demotion? | |
481 | * --------- | |
482 | * Track the number of shorts (time asleep is less than time threshold) | |
483 | * and demote when the usage threshold is reached. | |
484 | */ | |
485 | if (cx->demotion.state) { | |
486 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
487 | cx->demotion.count++; | |
488 | cx->promotion.count = 0; | |
489 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
490 | next_state = cx->demotion.state; | |
491 | goto end; | |
492 | } | |
493 | } | |
494 | } | |
495 | ||
4be44fcd | 496 | end: |
1da177e4 LT |
497 | /* |
498 | * Demote if current state exceeds max_cstate | |
5c87579e | 499 | * or if the latency of the current state is unacceptable |
1da177e4 | 500 | */ |
5c87579e AV |
501 | if ((pr->power.state - pr->power.states) > max_cstate || |
502 | pr->power.state->latency > system_latency_constraint()) { | |
1da177e4 LT |
503 | if (cx->demotion.state) |
504 | next_state = cx->demotion.state; | |
505 | } | |
506 | ||
507 | /* | |
508 | * New Cx State? | |
509 | * ------------- | |
510 | * If we're going to start using a new Cx state we must clean up | |
511 | * from the previous and prepare to use the new. | |
512 | */ | |
513 | if (next_state != pr->power.state) | |
514 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
515 | } |
516 | ||
4be44fcd | 517 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
518 | { |
519 | unsigned int i; | |
520 | unsigned int state_is_set = 0; | |
521 | struct acpi_processor_cx *lower = NULL; | |
522 | struct acpi_processor_cx *higher = NULL; | |
523 | struct acpi_processor_cx *cx; | |
524 | ||
1da177e4 LT |
525 | |
526 | if (!pr) | |
d550d98d | 527 | return -EINVAL; |
1da177e4 LT |
528 | |
529 | /* | |
530 | * This function sets the default Cx state policy (OS idle handler). | |
531 | * Our scheme is to promote quickly to C2 but more conservatively | |
532 | * to C3. We're favoring C2 for its characteristics of low latency | |
533 | * (quick response), good power savings, and ability to allow bus | |
534 | * mastering activity. Note that the Cx state policy is completely | |
535 | * customizable and can be altered dynamically. | |
536 | */ | |
537 | ||
538 | /* startup state */ | |
4be44fcd | 539 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
540 | cx = &pr->power.states[i]; |
541 | if (!cx->valid) | |
542 | continue; | |
543 | ||
544 | if (!state_is_set) | |
545 | pr->power.state = cx; | |
546 | state_is_set++; | |
547 | break; | |
4be44fcd | 548 | } |
1da177e4 LT |
549 | |
550 | if (!state_is_set) | |
d550d98d | 551 | return -ENODEV; |
1da177e4 LT |
552 | |
553 | /* demotion */ | |
4be44fcd | 554 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
555 | cx = &pr->power.states[i]; |
556 | if (!cx->valid) | |
557 | continue; | |
558 | ||
559 | if (lower) { | |
560 | cx->demotion.state = lower; | |
561 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
562 | cx->demotion.threshold.count = 1; | |
563 | if (cx->type == ACPI_STATE_C3) | |
564 | cx->demotion.threshold.bm = bm_history; | |
565 | } | |
566 | ||
567 | lower = cx; | |
568 | } | |
569 | ||
570 | /* promotion */ | |
571 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
572 | cx = &pr->power.states[i]; | |
573 | if (!cx->valid) | |
574 | continue; | |
575 | ||
576 | if (higher) { | |
4be44fcd | 577 | cx->promotion.state = higher; |
1da177e4 LT |
578 | cx->promotion.threshold.ticks = cx->latency_ticks; |
579 | if (cx->type >= ACPI_STATE_C2) | |
580 | cx->promotion.threshold.count = 4; | |
581 | else | |
582 | cx->promotion.threshold.count = 10; | |
583 | if (higher->type == ACPI_STATE_C3) | |
584 | cx->promotion.threshold.bm = bm_history; | |
585 | } | |
586 | ||
587 | higher = cx; | |
588 | } | |
589 | ||
d550d98d | 590 | return 0; |
1da177e4 LT |
591 | } |
592 | ||
4be44fcd | 593 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 594 | { |
1da177e4 LT |
595 | |
596 | if (!pr) | |
d550d98d | 597 | return -EINVAL; |
1da177e4 LT |
598 | |
599 | if (!pr->pblk) | |
d550d98d | 600 | return -ENODEV; |
1da177e4 | 601 | |
1da177e4 | 602 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
603 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
604 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
605 | ||
4c033552 VP |
606 | #ifndef CONFIG_HOTPLUG_CPU |
607 | /* | |
608 | * Check for P_LVL2_UP flag before entering C2 and above on | |
609 | * an SMP system. | |
610 | */ | |
1e483969 | 611 | if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up) |
d550d98d | 612 | return -ENODEV; |
4c033552 VP |
613 | #endif |
614 | ||
1da177e4 LT |
615 | /* determine C2 and C3 address from pblk */ |
616 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
617 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
618 | ||
619 | /* determine latencies from FADT */ | |
620 | pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat; | |
621 | pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat; | |
622 | ||
623 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
624 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
625 | pr->power.states[ACPI_STATE_C2].address, | |
626 | pr->power.states[ACPI_STATE_C3].address)); | |
627 | ||
d550d98d | 628 | return 0; |
1da177e4 LT |
629 | } |
630 | ||
4be44fcd | 631 | static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr) |
acf05f4b | 632 | { |
acf05f4b | 633 | |
cf824788 | 634 | /* Zero initialize all the C-states info. */ |
2203d6ed | 635 | memset(pr->power.states, 0, sizeof(pr->power.states)); |
acf05f4b | 636 | |
cf824788 | 637 | /* set the first C-State to C1 */ |
acf05f4b | 638 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; |
acf05f4b VP |
639 | |
640 | /* the C0 state only exists as a filler in our array, | |
641 | * and all processors need to support C1 */ | |
642 | pr->power.states[ACPI_STATE_C0].valid = 1; | |
643 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
644 | ||
d550d98d | 645 | return 0; |
acf05f4b VP |
646 | } |
647 | ||
4be44fcd | 648 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 649 | { |
4be44fcd LB |
650 | acpi_status status = 0; |
651 | acpi_integer count; | |
cf824788 | 652 | int current_count; |
4be44fcd LB |
653 | int i; |
654 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
655 | union acpi_object *cst; | |
1da177e4 | 656 | |
1da177e4 | 657 | |
1da177e4 | 658 | if (nocst) |
d550d98d | 659 | return -ENODEV; |
1da177e4 | 660 | |
cf824788 JM |
661 | current_count = 1; |
662 | ||
663 | /* Zero initialize C2 onwards and prepare for fresh CST lookup */ | |
664 | for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++) | |
665 | memset(&(pr->power.states[i]), 0, | |
666 | sizeof(struct acpi_processor_cx)); | |
1da177e4 LT |
667 | |
668 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
669 | if (ACPI_FAILURE(status)) { | |
670 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 671 | return -ENODEV; |
4be44fcd | 672 | } |
1da177e4 | 673 | |
4be44fcd | 674 | cst = (union acpi_object *)buffer.pointer; |
1da177e4 LT |
675 | |
676 | /* There must be at least 2 elements */ | |
677 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 678 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
679 | status = -EFAULT; |
680 | goto end; | |
681 | } | |
682 | ||
683 | count = cst->package.elements[0].integer.value; | |
684 | ||
685 | /* Validate number of power states. */ | |
686 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 687 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
688 | status = -EFAULT; |
689 | goto end; | |
690 | } | |
691 | ||
1da177e4 LT |
692 | /* Tell driver that at least _CST is supported. */ |
693 | pr->flags.has_cst = 1; | |
694 | ||
695 | for (i = 1; i <= count; i++) { | |
696 | union acpi_object *element; | |
697 | union acpi_object *obj; | |
698 | struct acpi_power_register *reg; | |
699 | struct acpi_processor_cx cx; | |
700 | ||
701 | memset(&cx, 0, sizeof(cx)); | |
702 | ||
4be44fcd | 703 | element = (union acpi_object *)&(cst->package.elements[i]); |
1da177e4 LT |
704 | if (element->type != ACPI_TYPE_PACKAGE) |
705 | continue; | |
706 | ||
707 | if (element->package.count != 4) | |
708 | continue; | |
709 | ||
4be44fcd | 710 | obj = (union acpi_object *)&(element->package.elements[0]); |
1da177e4 LT |
711 | |
712 | if (obj->type != ACPI_TYPE_BUFFER) | |
713 | continue; | |
714 | ||
4be44fcd | 715 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
716 | |
717 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 718 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
719 | continue; |
720 | ||
721 | cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ? | |
4be44fcd | 722 | 0 : reg->address; |
1da177e4 LT |
723 | |
724 | /* There should be an easy way to extract an integer... */ | |
4be44fcd | 725 | obj = (union acpi_object *)&(element->package.elements[1]); |
1da177e4 LT |
726 | if (obj->type != ACPI_TYPE_INTEGER) |
727 | continue; | |
728 | ||
729 | cx.type = obj->integer.value; | |
730 | ||
731 | if ((cx.type != ACPI_STATE_C1) && | |
732 | (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) | |
733 | continue; | |
734 | ||
cf824788 | 735 | if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3)) |
1da177e4 LT |
736 | continue; |
737 | ||
4be44fcd | 738 | obj = (union acpi_object *)&(element->package.elements[2]); |
1da177e4 LT |
739 | if (obj->type != ACPI_TYPE_INTEGER) |
740 | continue; | |
741 | ||
742 | cx.latency = obj->integer.value; | |
743 | ||
4be44fcd | 744 | obj = (union acpi_object *)&(element->package.elements[3]); |
1da177e4 LT |
745 | if (obj->type != ACPI_TYPE_INTEGER) |
746 | continue; | |
747 | ||
748 | cx.power = obj->integer.value; | |
749 | ||
cf824788 JM |
750 | current_count++; |
751 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
752 | ||
753 | /* | |
754 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
755 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
756 | */ | |
757 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
758 | printk(KERN_WARNING | |
759 | "Limiting number of power states to max (%d)\n", | |
760 | ACPI_PROCESSOR_MAX_POWER); | |
761 | printk(KERN_WARNING | |
762 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
763 | break; | |
764 | } | |
1da177e4 LT |
765 | } |
766 | ||
4be44fcd | 767 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 768 | current_count)); |
1da177e4 LT |
769 | |
770 | /* Validate number of power states discovered */ | |
cf824788 | 771 | if (current_count < 2) |
6d93c648 | 772 | status = -EFAULT; |
1da177e4 | 773 | |
4be44fcd | 774 | end: |
02438d87 | 775 | kfree(buffer.pointer); |
1da177e4 | 776 | |
d550d98d | 777 | return status; |
1da177e4 LT |
778 | } |
779 | ||
1da177e4 LT |
780 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
781 | { | |
1da177e4 LT |
782 | |
783 | if (!cx->address) | |
d550d98d | 784 | return; |
1da177e4 LT |
785 | |
786 | /* | |
787 | * C2 latency must be less than or equal to 100 | |
788 | * microseconds. | |
789 | */ | |
790 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
791 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 792 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 793 | return; |
1da177e4 LT |
794 | } |
795 | ||
1da177e4 LT |
796 | /* |
797 | * Otherwise we've met all of our C2 requirements. | |
798 | * Normalize the C2 latency to expidite policy | |
799 | */ | |
800 | cx->valid = 1; | |
801 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
802 | ||
d550d98d | 803 | return; |
1da177e4 LT |
804 | } |
805 | ||
4be44fcd LB |
806 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
807 | struct acpi_processor_cx *cx) | |
1da177e4 | 808 | { |
02df8b93 VP |
809 | static int bm_check_flag; |
810 | ||
1da177e4 LT |
811 | |
812 | if (!cx->address) | |
d550d98d | 813 | return; |
1da177e4 LT |
814 | |
815 | /* | |
816 | * C3 latency must be less than or equal to 1000 | |
817 | * microseconds. | |
818 | */ | |
819 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
820 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 821 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 822 | return; |
1da177e4 LT |
823 | } |
824 | ||
1da177e4 LT |
825 | /* |
826 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
827 | * DMA transfers are used by any ISA device to avoid livelock. | |
828 | * Note that we could disable Type-F DMA (as recommended by | |
829 | * the erratum), but this is known to disrupt certain ISA | |
830 | * devices thus we take the conservative approach. | |
831 | */ | |
832 | else if (errata.piix4.fdma) { | |
833 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 834 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 835 | return; |
1da177e4 LT |
836 | } |
837 | ||
02df8b93 VP |
838 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
839 | if (!bm_check_flag) { | |
840 | /* Determine whether bm_check is needed based on CPU */ | |
841 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
842 | bm_check_flag = pr->flags.bm_check; | |
843 | } else { | |
844 | pr->flags.bm_check = bm_check_flag; | |
845 | } | |
846 | ||
847 | if (pr->flags.bm_check) { | |
02df8b93 VP |
848 | /* bus mastering control is necessary */ |
849 | if (!pr->flags.bm_control) { | |
850 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 851 | "C3 support requires bus mastering control\n")); |
d550d98d | 852 | return; |
02df8b93 VP |
853 | } |
854 | } else { | |
02df8b93 VP |
855 | /* |
856 | * WBINVD should be set in fadt, for C3 state to be | |
857 | * supported on when bm_check is not required. | |
858 | */ | |
859 | if (acpi_fadt.wb_invd != 1) { | |
860 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd LB |
861 | "Cache invalidation should work properly" |
862 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 863 | return; |
02df8b93 VP |
864 | } |
865 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, | |
4be44fcd | 866 | 0, ACPI_MTX_DO_NOT_LOCK); |
02df8b93 VP |
867 | } |
868 | ||
1da177e4 LT |
869 | /* |
870 | * Otherwise we've met all of our C3 requirements. | |
871 | * Normalize the C3 latency to expidite policy. Enable | |
872 | * checking of bus mastering status (bm_check) so we can | |
873 | * use this in our C3 policy | |
874 | */ | |
875 | cx->valid = 1; | |
876 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 877 | |
d550d98d | 878 | return; |
1da177e4 LT |
879 | } |
880 | ||
1da177e4 LT |
881 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
882 | { | |
883 | unsigned int i; | |
884 | unsigned int working = 0; | |
6eb0a0fd | 885 | |
bd663347 | 886 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
0b5c59a1 AK |
887 | int timer_broadcast = 0; |
888 | cpumask_t mask = cpumask_of_cpu(pr->id); | |
bd663347 | 889 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); |
6eb0a0fd VP |
890 | #endif |
891 | ||
4be44fcd | 892 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
893 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
894 | ||
895 | switch (cx->type) { | |
896 | case ACPI_STATE_C1: | |
897 | cx->valid = 1; | |
898 | break; | |
899 | ||
900 | case ACPI_STATE_C2: | |
901 | acpi_processor_power_verify_c2(cx); | |
bd663347 AK |
902 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
903 | /* Some AMD systems fake C3 as C2, but still | |
904 | have timer troubles */ | |
905 | if (cx->valid && | |
906 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | |
907 | timer_broadcast++; | |
908 | #endif | |
1da177e4 LT |
909 | break; |
910 | ||
911 | case ACPI_STATE_C3: | |
912 | acpi_processor_power_verify_c3(pr, cx); | |
6eb0a0fd | 913 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
914 | if (cx->valid) |
915 | timer_broadcast++; | |
6eb0a0fd | 916 | #endif |
1da177e4 LT |
917 | break; |
918 | } | |
919 | ||
920 | if (cx->valid) | |
921 | working++; | |
922 | } | |
bd663347 | 923 | |
0b5c59a1 | 924 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
bd663347 AK |
925 | if (timer_broadcast) |
926 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); | |
0b5c59a1 | 927 | #endif |
1da177e4 LT |
928 | |
929 | return (working); | |
930 | } | |
931 | ||
4be44fcd | 932 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
933 | { |
934 | unsigned int i; | |
935 | int result; | |
936 | ||
1da177e4 LT |
937 | |
938 | /* NOTE: the idle thread may not be running while calling | |
939 | * this function */ | |
940 | ||
cf824788 JM |
941 | /* Adding C1 state */ |
942 | acpi_processor_get_power_info_default_c1(pr); | |
1da177e4 | 943 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 944 | if (result == -ENODEV) |
cf824788 | 945 | acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 946 | |
cf824788 | 947 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
948 | |
949 | /* | |
950 | * Set Default Policy | |
951 | * ------------------ | |
952 | * Now that we know which states are supported, set the default | |
953 | * policy. Note that this policy can be changed dynamically | |
954 | * (e.g. encourage deeper sleeps to conserve battery life when | |
955 | * not on AC). | |
956 | */ | |
957 | result = acpi_processor_set_power_policy(pr); | |
958 | if (result) | |
d550d98d | 959 | return result; |
1da177e4 LT |
960 | |
961 | /* | |
962 | * if one state of type C2 or C3 is available, mark this | |
963 | * CPU as being "idle manageable" | |
964 | */ | |
965 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 966 | if (pr->power.states[i].valid) { |
1da177e4 | 967 | pr->power.count = i; |
2203d6ed LT |
968 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
969 | pr->flags.power = 1; | |
acf05f4b | 970 | } |
1da177e4 LT |
971 | } |
972 | ||
d550d98d | 973 | return 0; |
1da177e4 LT |
974 | } |
975 | ||
4be44fcd | 976 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 977 | { |
4be44fcd | 978 | int result = 0; |
1da177e4 | 979 | |
1da177e4 LT |
980 | |
981 | if (!pr) | |
d550d98d | 982 | return -EINVAL; |
1da177e4 | 983 | |
4be44fcd | 984 | if (nocst) { |
d550d98d | 985 | return -ENODEV; |
1da177e4 LT |
986 | } |
987 | ||
988 | if (!pr->flags.power_setup_done) | |
d550d98d | 989 | return -ENODEV; |
1da177e4 LT |
990 | |
991 | /* Fall back to the default idle loop */ | |
992 | pm_idle = pm_idle_save; | |
4be44fcd | 993 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
994 | |
995 | pr->flags.power = 0; | |
996 | result = acpi_processor_get_power_info(pr); | |
997 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
998 | pm_idle = acpi_processor_idle; | |
999 | ||
d550d98d | 1000 | return result; |
1da177e4 LT |
1001 | } |
1002 | ||
1003 | /* proc interface */ | |
1004 | ||
1005 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1006 | { | |
4be44fcd LB |
1007 | struct acpi_processor *pr = (struct acpi_processor *)seq->private; |
1008 | unsigned int i; | |
1da177e4 | 1009 | |
1da177e4 LT |
1010 | |
1011 | if (!pr) | |
1012 | goto end; | |
1013 | ||
1014 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd | 1015 | "max_cstate: C%d\n" |
5c87579e AV |
1016 | "bus master activity: %08x\n" |
1017 | "maximum allowed latency: %d usec\n", | |
4be44fcd | 1018 | pr->power.state ? pr->power.state - pr->power.states : 0, |
5c87579e AV |
1019 | max_cstate, (unsigned)pr->power.bm_activity, |
1020 | system_latency_constraint()); | |
1da177e4 LT |
1021 | |
1022 | seq_puts(seq, "states:\n"); | |
1023 | ||
1024 | for (i = 1; i <= pr->power.count; i++) { | |
1025 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1026 | (&pr->power.states[i] == |
1027 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1028 | |
1029 | if (!pr->power.states[i].valid) { | |
1030 | seq_puts(seq, "<not supported>\n"); | |
1031 | continue; | |
1032 | } | |
1033 | ||
1034 | switch (pr->power.states[i].type) { | |
1035 | case ACPI_STATE_C1: | |
1036 | seq_printf(seq, "type[C1] "); | |
1037 | break; | |
1038 | case ACPI_STATE_C2: | |
1039 | seq_printf(seq, "type[C2] "); | |
1040 | break; | |
1041 | case ACPI_STATE_C3: | |
1042 | seq_printf(seq, "type[C3] "); | |
1043 | break; | |
1044 | default: | |
1045 | seq_printf(seq, "type[--] "); | |
1046 | break; | |
1047 | } | |
1048 | ||
1049 | if (pr->power.states[i].promotion.state) | |
1050 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1051 | (pr->power.states[i].promotion.state - |
1052 | pr->power.states)); | |
1da177e4 LT |
1053 | else |
1054 | seq_puts(seq, "promotion[--] "); | |
1055 | ||
1056 | if (pr->power.states[i].demotion.state) | |
1057 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1058 | (pr->power.states[i].demotion.state - |
1059 | pr->power.states)); | |
1da177e4 LT |
1060 | else |
1061 | seq_puts(seq, "demotion[--] "); | |
1062 | ||
a3c6598f | 1063 | seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", |
4be44fcd | 1064 | pr->power.states[i].latency, |
a3c6598f DB |
1065 | pr->power.states[i].usage, |
1066 | pr->power.states[i].time); | |
1da177e4 LT |
1067 | } |
1068 | ||
4be44fcd | 1069 | end: |
d550d98d | 1070 | return 0; |
1da177e4 LT |
1071 | } |
1072 | ||
1073 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1074 | { | |
1075 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1076 | PDE(inode)->data); |
1da177e4 LT |
1077 | } |
1078 | ||
d7508032 | 1079 | static const struct file_operations acpi_processor_power_fops = { |
4be44fcd LB |
1080 | .open = acpi_processor_power_open_fs, |
1081 | .read = seq_read, | |
1082 | .llseek = seq_lseek, | |
1083 | .release = single_release, | |
1da177e4 LT |
1084 | }; |
1085 | ||
5c87579e AV |
1086 | static void smp_callback(void *v) |
1087 | { | |
1088 | /* we already woke the CPU up, nothing more to do */ | |
1089 | } | |
1090 | ||
1091 | /* | |
1092 | * This function gets called when a part of the kernel has a new latency | |
1093 | * requirement. This means we need to get all processors out of their C-state, | |
1094 | * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that | |
1095 | * wakes them all right up. | |
1096 | */ | |
1097 | static int acpi_processor_latency_notify(struct notifier_block *b, | |
1098 | unsigned long l, void *v) | |
1099 | { | |
1100 | smp_call_function(smp_callback, NULL, 0, 1); | |
1101 | return NOTIFY_OK; | |
1102 | } | |
1103 | ||
1104 | static struct notifier_block acpi_processor_latency_notifier = { | |
1105 | .notifier_call = acpi_processor_latency_notify, | |
1106 | }; | |
1107 | ||
7af8b660 | 1108 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, |
4be44fcd | 1109 | struct acpi_device *device) |
1da177e4 | 1110 | { |
4be44fcd | 1111 | acpi_status status = 0; |
b6835052 | 1112 | static int first_run; |
4be44fcd | 1113 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1114 | unsigned int i; |
1115 | ||
1da177e4 LT |
1116 | |
1117 | if (!first_run) { | |
1118 | dmi_check_system(processor_power_dmi_table); | |
1119 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1120 | printk(KERN_NOTICE |
1121 | "ACPI: processor limited to max C-state %d\n", | |
1122 | max_cstate); | |
1da177e4 | 1123 | first_run++; |
5c87579e | 1124 | register_latency_notifier(&acpi_processor_latency_notifier); |
1da177e4 LT |
1125 | } |
1126 | ||
02df8b93 | 1127 | if (!pr) |
d550d98d | 1128 | return -EINVAL; |
02df8b93 VP |
1129 | |
1130 | if (acpi_fadt.cst_cnt && !nocst) { | |
4be44fcd LB |
1131 | status = |
1132 | acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8); | |
1da177e4 | 1133 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1134 | ACPI_EXCEPTION((AE_INFO, status, |
1135 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1136 | } |
1137 | } | |
1138 | ||
1139 | acpi_processor_get_power_info(pr); | |
1140 | ||
1141 | /* | |
1142 | * Install the idle handler if processor power management is supported. | |
1143 | * Note that we use previously set idle handler will be used on | |
1144 | * platforms that only support C1. | |
1145 | */ | |
1146 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1147 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1148 | for (i = 1; i <= pr->power.count; i++) | |
1149 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1150 | printk(" C%d[C%d]", i, |
1151 | pr->power.states[i].type); | |
1da177e4 LT |
1152 | printk(")\n"); |
1153 | ||
1154 | if (pr->id == 0) { | |
1155 | pm_idle_save = pm_idle; | |
1156 | pm_idle = acpi_processor_idle; | |
1157 | } | |
1158 | } | |
1159 | ||
1160 | /* 'power' [R] */ | |
1161 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1162 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1163 | if (!entry) |
a6fc6720 | 1164 | return -EIO; |
1da177e4 LT |
1165 | else { |
1166 | entry->proc_fops = &acpi_processor_power_fops; | |
1167 | entry->data = acpi_driver_data(device); | |
1168 | entry->owner = THIS_MODULE; | |
1169 | } | |
1170 | ||
1171 | pr->flags.power_setup_done = 1; | |
1172 | ||
d550d98d | 1173 | return 0; |
1da177e4 LT |
1174 | } |
1175 | ||
4be44fcd LB |
1176 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1177 | struct acpi_device *device) | |
1da177e4 | 1178 | { |
1da177e4 LT |
1179 | |
1180 | pr->flags.power_setup_done = 0; | |
1181 | ||
1182 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1183 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1184 | acpi_device_dir(device)); | |
1da177e4 LT |
1185 | |
1186 | /* Unregister the idle handler when processor #0 is removed. */ | |
1187 | if (pr->id == 0) { | |
1188 | pm_idle = pm_idle_save; | |
1189 | ||
1190 | /* | |
1191 | * We are about to unload the current idle thread pm callback | |
1192 | * (pm_idle), Wait for all processors to update cached/local | |
1193 | * copies of pm_idle before proceeding. | |
1194 | */ | |
1195 | cpu_idle_wait(); | |
5c87579e | 1196 | unregister_latency_notifier(&acpi_processor_latency_notifier); |
1da177e4 LT |
1197 | } |
1198 | ||
d550d98d | 1199 | return 0; |
1da177e4 | 1200 | } |