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ACPI: processor: Replace kernel.h with the necessary inclusions
[linux-2.6-block.git] / drivers / acpi / processor_idle.c
CommitLineData
c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
c5ab81ca 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
1da177e4
LT		 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
02df8b93
VP		 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
1da177e4 12 */
b6ec26fb 13#define pr_fmt(fmt) "ACPI: " fmt
1da177e4 14
1da177e4 15#include <linux/module.h>
1da177e4
LT		 16#include <linux/acpi.h>
17#include <linux/dmi.h>
e2668fb5 18#include <linux/sched.h> /* need_resched() */
65ea8f2c 19#include <linux/sort.h>
ee41eebf 20#include <linux/tick.h>
4f86d3a8 21#include <linux/cpuidle.h>
6727ad9e 22#include <linux/cpu.h>
8b48463f 23#include <acpi/processor.h>
1da177e4 24
3434933b
TG		 25/*
26 * Include the apic definitions for x86 to have the APIC timer related defines
27 * available also for UP (on SMP it gets magically included via linux/smp.h).
28 * asm/acpi.h is not an option, as it would require more include magic. Also
29 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
30 */
31#ifdef CONFIG_X86
32#include <asm/apic.h>
8cdddd18 33#include <asm/cpu.h>
3434933b
TG		 34#endif
35
dc2251bf
RW		 36#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
37
4f86d3a8
LB		 38static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
39module_param(max_cstate, uint, 0000);
b6835052 40static unsigned int nocst __read_mostly;
1da177e4 41module_param(nocst, uint, 0000);
d3e7e99f
LB		 42static int bm_check_disable __read_mostly;
43module_param(bm_check_disable, uint, 0000);
1da177e4 44
25de5718 45static unsigned int latency_factor __read_mostly = 2;
4963f620 46module_param(latency_factor, uint, 0644);
1da177e4 47
3d339dcb
DL		 48static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
49
35ae7133
SH		 50struct cpuidle_driver acpi_idle_driver = {
51 .name = "acpi_idle",
52 .owner = THIS_MODULE,
53};
54
55#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
25528213
PZ		 56static
57DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
ac3ebafa 58
d1896049
TR		 59static int disabled_by_idle_boot_param(void)
60{
61 return boot_option_idle_override == IDLE_POLL ||
d1896049
TR		 62 boot_option_idle_override == IDLE_HALT;
63}
64
1da177e4
LT		 65/*
66 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
67 * For now disable this. Probably a bug somewhere else.
68 *
69 * To skip this limit, boot/load with a large max_cstate limit.
70 */
1855256c 71static int set_max_cstate(const struct dmi_system_id *id)
1da177e4
LT		 72{
73 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
74 return 0;
75
b6ec26fb
SH		 76 pr_notice("%s detected - limiting to C%ld max_cstate."
77 " Override with \"processor.max_cstate=%d\"\n", id->ident,
78 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
1da177e4 79
3d35600a 80 max_cstate = (long)id->driver_data;
1da177e4
LT		 81
82 return 0;
83}
84
b0346688 85static const struct dmi_system_id processor_power_dmi_table[] = {
876c184b
TR		 86 { set_max_cstate, "Clevo 5600D", {
87 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
88 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
4be44fcd 89 (void *)2},
370d5cd8
AV		 90 { set_max_cstate, "Pavilion zv5000", {
91 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
92 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
93 (void *)1},
94 { set_max_cstate, "Asus L8400B", {
95 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
96 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
97 (void *)1},
1da177e4
LT		 98 {},
99};
100
4f86d3a8 101
2e906655 102/*
103 * Callers should disable interrupts before the call and enable
104 * interrupts after return.
105 */
6727ad9e 106static void __cpuidle acpi_safe_halt(void)
ddc081a1 107{
ea811747 108 if (!tif_need_resched()) {
ddc081a1 109 safe_halt();
71e93d15
VP		 110 local_irq_disable();
111 }
ddc081a1
VP		 112}
113
169a0abb
TG		 114#ifdef ARCH_APICTIMER_STOPS_ON_C3
115
116/*
117 * Some BIOS implementations switch to C3 in the published C2 state.
296d93cd
LT		 118 * This seems to be a common problem on AMD boxen, but other vendors
119 * are affected too. We pick the most conservative approach: we assume
120 * that the local APIC stops in both C2 and C3.
169a0abb 121 */
7e275cc4 122static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb
TG		 123 struct acpi_processor_cx *cx)
124{
125 struct acpi_processor_power *pwr = &pr->power;
e585bef8 126 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
169a0abb 127
db954b58
VP		 128 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
129 return;
130
07c94a38 131 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
87ad57ba
SL		 132 type = ACPI_STATE_C1;
133
169a0abb
TG		 134 /*
135 * Check, if one of the previous states already marked the lapic
136 * unstable
137 */
138 if (pwr->timer_broadcast_on_state < state)
139 return;
140
e585bef8 141 if (cx->type >= type)
296d93cd 142 pr->power.timer_broadcast_on_state = state;
169a0abb
TG		 143}
144
918aae42 145static void __lapic_timer_propagate_broadcast(void *arg)
169a0abb 146{
f833bab8 147 struct acpi_processor *pr = (struct acpi_processor *) arg;
e9e2cdb4 148
ee41eebf
TG		 149 if (pr->power.timer_broadcast_on_state < INT_MAX)
150 tick_broadcast_enable();
151 else
152 tick_broadcast_disable();
e9e2cdb4
TG		 153}
154
918aae42
HS		 155static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
156{
157 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
158 (void *)pr, 1);
159}
160
e9e2cdb4 161/* Power(C) State timer broadcast control */
aa6b43d5
PZ		 162static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
163 struct acpi_processor_cx *cx)
e9e2cdb4 164{
aa6b43d5 165 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
169a0abb
TG		 166}
167
168#else
169
7e275cc4 170static void lapic_timer_check_state(int state, struct acpi_processor *pr,
169a0abb 171 struct acpi_processor_cx *cstate) { }
7e275cc4 172static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
aa6b43d5
PZ		 173
174static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
175 struct acpi_processor_cx *cx)
e9e2cdb4 176{
95592128 177 return false;
e9e2cdb4 178}
169a0abb
TG		 179
180#endif
181
592913ec 182#if defined(CONFIG_X86)
520daf72 183static void tsc_check_state(int state)
ddb25f9a
AK		 184{
185 switch (boot_cpu_data.x86_vendor) {
7377ed4b 186 case X86_VENDOR_HYGON:
ddb25f9a 187 case X86_VENDOR_AMD:
40fb1715 188 case X86_VENDOR_INTEL:
fe6daab1 189 case X86_VENDOR_CENTAUR:
773b2f30 190 case X86_VENDOR_ZHAOXIN:
ddb25f9a
AK		 191 /*
192 * AMD Fam10h TSC will tick in all
193 * C/P/S0/S1 states when this bit is set.
194 */
40fb1715 195 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
520daf72 196 return;
57d2dd4b 197 fallthrough;
ddb25f9a 198 default:
520daf72
LB		 199 /* TSC could halt in idle, so notify users */
200 if (state > ACPI_STATE_C1)
201 mark_tsc_unstable("TSC halts in idle");
ddb25f9a
AK		 202 }
203}
520daf72
LB		 204#else
205static void tsc_check_state(int state) { return; }
ddb25f9a
AK		 206#endif
207
4be44fcd 208static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
1da177e4 209{
1da177e4 210
1da177e4 211 if (!pr->pblk)
d550d98d 212 return -ENODEV;
1da177e4 213
1da177e4 214 /* if info is obtained from pblk/fadt, type equals state */
1da177e4
LT		 215 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
216 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
217
4c033552
VP		 218#ifndef CONFIG_HOTPLUG_CPU
219 /*
220 * Check for P_LVL2_UP flag before entering C2 and above on
4f86d3a8 221 * an SMP system.
4c033552 222 */
ad71860a 223 if ((num_online_cpus() > 1) &&
cee324b1 224 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
d550d98d 225 return -ENODEV;
4c033552
VP		 226#endif
227
1da177e4
LT		 228 /* determine C2 and C3 address from pblk */
229 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
230 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
231
232 /* determine latencies from FADT */
ba494bee
BM		 233 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
234 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
1da177e4 235
5d76b6f6
LB		 236 /*
237 * FADT specified C2 latency must be less than or equal to
238 * 100 microseconds.
239 */
ba494bee 240 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
52af99c3
RW		 241 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
242 acpi_gbl_FADT.c2_latency);
5d76b6f6
LB		 243 /* invalidate C2 */
244 pr->power.states[ACPI_STATE_C2].address = 0;
245 }
246
a6d72c18
LB		 247 /*
248 * FADT supplied C3 latency must be less than or equal to
249 * 1000 microseconds.
250 */
ba494bee 251 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
52af99c3
RW		 252 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
253 acpi_gbl_FADT.c3_latency);
a6d72c18
LB		 254 /* invalidate C3 */
255 pr->power.states[ACPI_STATE_C3].address = 0;
256 }
257
52af99c3 258 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
1da177e4 259 pr->power.states[ACPI_STATE_C2].address,
52af99c3 260 pr->power.states[ACPI_STATE_C3].address);
1da177e4 261
34a62cd0
YG		 262 snprintf(pr->power.states[ACPI_STATE_C2].desc,
263 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
264 pr->power.states[ACPI_STATE_C2].address);
265 snprintf(pr->power.states[ACPI_STATE_C3].desc,
266 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
267 pr->power.states[ACPI_STATE_C3].address);
268
d550d98d 269 return 0;
1da177e4
LT		 270}
271
991528d7 272static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
acf05f4b 273{
991528d7
VP		 274 if (!pr->power.states[ACPI_STATE_C1].valid) {
275 /* set the first C-State to C1 */
276 /* all processors need to support C1 */
277 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
278 pr->power.states[ACPI_STATE_C1].valid = 1;
0fda6b40 279 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
248e8841
YG		 280
281 snprintf(pr->power.states[ACPI_STATE_C1].desc,
282 ACPI_CX_DESC_LEN, "ACPI HLT");
991528d7
VP		 283 }
284 /* the C0 state only exists as a filler in our array */
acf05f4b 285 pr->power.states[ACPI_STATE_C0].valid = 1;
d550d98d 286 return 0;
acf05f4b
VP		 287}
288
987c7853
RW		 289static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
290{
291 int ret;
292
293 if (nocst)
294 return -ENODEV;
295
296 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
297 if (ret)
298 return ret;
299
496121c0 300 if (!pr->power.count)
987c7853
RW		 301 return -EFAULT;
302
303 pr->flags.has_cst = 1;
304 return 0;
305}
306
4be44fcd
LB		 307static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
308 struct acpi_processor_cx *cx)
1da177e4 309{
ee1ca48f
PV		 310 static int bm_check_flag = -1;
311 static int bm_control_flag = -1;
02df8b93 312
1da177e4
LT		 313
314 if (!cx->address)
d550d98d 315 return;
1da177e4 316
1da177e4
LT		 317 /*
318 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
319 * DMA transfers are used by any ISA device to avoid livelock.
320 * Note that we could disable Type-F DMA (as recommended by
321 * the erratum), but this is known to disrupt certain ISA
322 * devices thus we take the conservative approach.
323 */
324 else if (errata.piix4.fdma) {
52af99c3
RW		 325 acpi_handle_debug(pr->handle,
326 "C3 not supported on PIIX4 with Type-F DMA\n");
d550d98d 327 return;
1da177e4
LT		 328 }
329
02df8b93 330 /* All the logic here assumes flags.bm_check is same across all CPUs */
ee1ca48f 331 if (bm_check_flag == -1) {
02df8b93
VP		 332 /* Determine whether bm_check is needed based on CPU */
333 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
334 bm_check_flag = pr->flags.bm_check;
ee1ca48f 335 bm_control_flag = pr->flags.bm_control;
02df8b93
VP		 336 } else {
337 pr->flags.bm_check = bm_check_flag;
ee1ca48f 338 pr->flags.bm_control = bm_control_flag;
02df8b93
VP		 339 }
340
341 if (pr->flags.bm_check) {
02df8b93 342 if (!pr->flags.bm_control) {
ed3110ef
VP		 343 if (pr->flags.has_cst != 1) {
344 /* bus mastering control is necessary */
52af99c3
RW		 345 acpi_handle_debug(pr->handle,
346 "C3 support requires BM control\n");
ed3110ef
VP		 347 return;
348 } else {
349 /* Here we enter C3 without bus mastering */
52af99c3
RW		 350 acpi_handle_debug(pr->handle,
351 "C3 support without BM control\n");
ed3110ef 352 }
02df8b93
VP		 353 }
354 } else {
02df8b93
VP		 355 /*
356 * WBINVD should be set in fadt, for C3 state to be
357 * supported on when bm_check is not required.
358 */
cee324b1 359 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
52af99c3 360 acpi_handle_debug(pr->handle,
4be44fcd 361 "Cache invalidation should work properly"
52af99c3 362 " for C3 to be enabled on SMP systems\n");
d550d98d 363 return;
02df8b93 364 }
02df8b93
VP		 365 }
366
1da177e4
LT		 367 /*
368 * Otherwise we've met all of our C3 requirements.
369 * Normalize the C3 latency to expidite policy. Enable
370 * checking of bus mastering status (bm_check) so we can
371 * use this in our C3 policy
372 */
373 cx->valid = 1;
4f86d3a8 374
31878dd8
LB		 375 /*
376 * On older chipsets, BM_RLD needs to be set
377 * in order for Bus Master activity to wake the
378 * system from C3. Newer chipsets handle DMA
379 * during C3 automatically and BM_RLD is a NOP.
380 * In either case, the proper way to
381 * handle BM_RLD is to set it and leave it set.
382 */
50ffba1b 383 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1da177e4 384
d550d98d 385 return;
1da177e4
LT		 386}
387
65ea8f2c
ML		 388static int acpi_cst_latency_cmp(const void *a, const void *b)
389{
390 const struct acpi_processor_cx *x = a, *y = b;
391
392 if (!(x->valid && y->valid))
393 return 0;
394 if (x->latency > y->latency)
395 return 1;
396 if (x->latency < y->latency)
397 return -1;
398 return 0;
399}
400static void acpi_cst_latency_swap(void *a, void *b, int n)
401{
402 struct acpi_processor_cx *x = a, *y = b;
403 u32 tmp;
404
405 if (!(x->valid && y->valid))
406 return;
407 tmp = x->latency;
408 x->latency = y->latency;
409 y->latency = tmp;
410}
411
1da177e4
LT		 412static int acpi_processor_power_verify(struct acpi_processor *pr)
413{
414 unsigned int i;
415 unsigned int working = 0;
65ea8f2c
ML		 416 unsigned int last_latency = 0;
417 unsigned int last_type = 0;
418 bool buggy_latency = false;
6eb0a0fd 419
169a0abb 420 pr->power.timer_broadcast_on_state = INT_MAX;
6eb0a0fd 421
a0bf284b 422 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1da177e4
LT		 423 struct acpi_processor_cx *cx = &pr->power.states[i];
424
425 switch (cx->type) {
426 case ACPI_STATE_C1:
427 cx->valid = 1;
428 break;
429
430 case ACPI_STATE_C2:
d22edd29
LB		 431 if (!cx->address)
432 break;
cad1525a 433 cx->valid = 1;
1da177e4
LT		 434 break;
435
436 case ACPI_STATE_C3:
437 acpi_processor_power_verify_c3(pr, cx);
438 break;
439 }
7e275cc4
LB		 440 if (!cx->valid)
441 continue;
65ea8f2c
ML		 442 if (cx->type >= last_type && cx->latency < last_latency)
443 buggy_latency = true;
444 last_latency = cx->latency;
445 last_type = cx->type;
1da177e4 446
7e275cc4
LB		 447 lapic_timer_check_state(i, pr, cx);
448 tsc_check_state(cx->type);
449 working++;
1da177e4 450 }
bd663347 451
65ea8f2c
ML		 452 if (buggy_latency) {
453 pr_notice("FW issue: working around C-state latencies out of order\n");
454 sort(&pr->power.states[1], max_cstate,
455 sizeof(struct acpi_processor_cx),
456 acpi_cst_latency_cmp,
457 acpi_cst_latency_swap);
458 }
459
918aae42 460 lapic_timer_propagate_broadcast(pr);
1da177e4
LT		 461
462 return (working);
463}
464
a36a7fec 465static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
1da177e4
LT		 466{
467 unsigned int i;
468 int result;
469
1da177e4
LT		 470
471 /* NOTE: the idle thread may not be running while calling
472 * this function */
473
991528d7
VP		 474 /* Zero initialize all the C-states info. */
475 memset(pr->power.states, 0, sizeof(pr->power.states));
476
1da177e4 477 result = acpi_processor_get_power_info_cst(pr);
6d93c648 478 if (result == -ENODEV)
c5a114f1 479 result = acpi_processor_get_power_info_fadt(pr);
6d93c648 480
991528d7
VP		 481 if (result)
482 return result;
483
484 acpi_processor_get_power_info_default(pr);
485
cf824788 486 pr->power.count = acpi_processor_power_verify(pr);
1da177e4 487
1da177e4
LT		 488 /*
489 * if one state of type C2 or C3 is available, mark this
490 * CPU as being "idle manageable"
491 */
492 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
acf05f4b 493 if (pr->power.states[i].valid) {
1da177e4 494 pr->power.count = i;
496121c0 495 pr->flags.power = 1;
acf05f4b 496 }
1da177e4
LT		 497 }
498
d550d98d 499 return 0;
1da177e4
LT		 500}
501
4f86d3a8
LB		 502/**
503 * acpi_idle_bm_check - checks if bus master activity was detected
504 */
505static int acpi_idle_bm_check(void)
506{
507 u32 bm_status = 0;
508
d3e7e99f
LB		 509 if (bm_check_disable)
510 return 0;
511
50ffba1b 512 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
4f86d3a8 513 if (bm_status)
50ffba1b 514 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
4f86d3a8
LB		 515 /*
516 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
517 * the true state of bus mastering activity; forcing us to
518 * manually check the BMIDEA bit of each IDE channel.
519 */
520 else if (errata.piix4.bmisx) {
521 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
522 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
523 bm_status = 1;
524 }
525 return bm_status;
526}
527
fa583f71
YF		 528static void wait_for_freeze(void)
529{
530#ifdef CONFIG_X86
531 /* No delay is needed if we are in guest */
532 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
533 return;
534#endif
535 /* Dummy wait op - must do something useless after P_LVL2 read
536 because chipsets cannot guarantee that STPCLK# signal
537 gets asserted in time to freeze execution properly. */
538 inl(acpi_gbl_FADT.xpm_timer_block.address);
539}
540
4f86d3a8 541/**
b00783fd 542 * acpi_idle_do_entry - enter idle state using the appropriate method
4f86d3a8 543 * @cx: cstate data
bc71bec9 544 *
545 * Caller disables interrupt before call and enables interrupt after return.
4f86d3a8 546 */
6727ad9e 547static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
4f86d3a8 548{
bc71bec9 549 if (cx->entry_method == ACPI_CSTATE_FFH) {
4f86d3a8
LB		 550 /* Call into architectural FFH based C-state */
551 acpi_processor_ffh_cstate_enter(cx);
bc71bec9 552 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
553 acpi_safe_halt();
4f86d3a8 554 } else {
4f86d3a8
LB		 555 /* IO port based C-state */
556 inb(cx->address);
fa583f71 557 wait_for_freeze();
4f86d3a8
LB		 558 }
559}
560
1a022e3f
BO		 561/**
562 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
563 * @dev: the target CPU
564 * @index: the index of suggested state
565 */
566static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
567{
6240a10d 568 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
1a022e3f
BO		 569
570 ACPI_FLUSH_CPU_CACHE();
571
572 while (1) {
573
574 if (cx->entry_method == ACPI_CSTATE_HALT)
54f70077 575 safe_halt();
1a022e3f
BO		 576 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
577 inb(cx->address);
fa583f71 578 wait_for_freeze();
1a022e3f
BO		 579 } else
580 return -ENODEV;
8cdddd18
VK		 581
582#if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU)
fa26d0c7 583 cond_wakeup_cpu0();
8cdddd18 584#endif
1a022e3f
BO		 585 }
586
587 /* Never reached */
588 return 0;
589}
590
adcb2623
RW		 591static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
592{
5f508185
RW		 593 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
594 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
adcb2623
RW		 595}
596
4f86d3a8 597static int c3_cpu_count;
e12f65f7 598static DEFINE_RAW_SPINLOCK(c3_lock);
4f86d3a8
LB		 599
600/**
601 * acpi_idle_enter_bm - enters C3 with proper BM handling
1fecfdbb 602 * @drv: cpuidle driver
6491bc0c
RW		 603 * @pr: Target processor
604 * @cx: Target state context
1fecfdbb 605 * @index: index of target state
4f86d3a8 606 */
1fecfdbb
PZ		 607static int acpi_idle_enter_bm(struct cpuidle_driver *drv,
608 struct acpi_processor *pr,
609 struct acpi_processor_cx *cx,
610 int index)
4f86d3a8 611{
1fecfdbb
PZ		 612 static struct acpi_processor_cx safe_cx = {
613 .entry_method = ACPI_CSTATE_HALT,
614 };
615
ddc081a1
VP		 616 /*
617 * disable bus master
618 * bm_check implies we need ARB_DIS
ddc081a1
VP		 619 * bm_control implies whether we can do ARB_DIS
620 *
1fecfdbb
PZ		 621 * That leaves a case where bm_check is set and bm_control is not set.
622 * In that case we cannot do much, we enter C3 without doing anything.
ddc081a1 623 */
1fecfdbb
PZ		 624 bool dis_bm = pr->flags.bm_control;
625
626 /* If we can skip BM, demote to a safe state. */
627 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
628 dis_bm = false;
629 index = drv->safe_state_index;
630 if (index >= 0) {
631 cx = this_cpu_read(acpi_cstate[index]);
632 } else {
633 cx = &safe_cx;
634 index = -EBUSY;
635 }
636 }
637
638 if (dis_bm) {
e12f65f7 639 raw_spin_lock(&c3_lock);
4f86d3a8
LB		 640 c3_cpu_count++;
641 /* Disable bus master arbitration when all CPUs are in C3 */
642 if (c3_cpu_count == num_online_cpus())
50ffba1b 643 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
e12f65f7 644 raw_spin_unlock(&c3_lock);
ddc081a1 645 }
4f86d3a8 646
1fecfdbb
PZ		 647 rcu_idle_enter();
648
ddc081a1 649 acpi_idle_do_entry(cx);
4f86d3a8 650
1fecfdbb
PZ		 651 rcu_idle_exit();
652
ddc081a1 653 /* Re-enable bus master arbitration */
1fecfdbb 654 if (dis_bm) {
e12f65f7 655 raw_spin_lock(&c3_lock);
50ffba1b 656 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
4f86d3a8 657 c3_cpu_count--;
e12f65f7 658 raw_spin_unlock(&c3_lock);
4f86d3a8 659 }
1fecfdbb
PZ		 660
661 return index;
6491bc0c
RW		 662}
663
664static int acpi_idle_enter(struct cpuidle_device *dev,
665 struct cpuidle_driver *drv, int index)
666{
667 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
668 struct acpi_processor *pr;
669
670 pr = __this_cpu_read(processors);
671 if (unlikely(!pr))
672 return -EINVAL;
673
674 if (cx->type != ACPI_STATE_C1) {
1fecfdbb
PZ		 675 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
676 return acpi_idle_enter_bm(drv, pr, cx, index);
677
678 /* C2 to C1 demotion. */
5f508185 679 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
dc2251bf 680 index = ACPI_IDLE_STATE_START;
6491bc0c 681 cx = per_cpu(acpi_cstate[index], dev->cpu);
6491bc0c
RW		 682 }
683 }
684
6491bc0c
RW		 685 if (cx->type == ACPI_STATE_C3)
686 ACPI_FLUSH_CPU_CACHE();
687
688 acpi_idle_do_entry(cx);
689
e978aa7d 690 return index;
4f86d3a8
LB		 691}
692
efe97112
NL		 693static int acpi_idle_enter_s2idle(struct cpuidle_device *dev,
694 struct cpuidle_driver *drv, int index)
5f508185
RW		 695{
696 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
697
698 if (cx->type == ACPI_STATE_C3) {
699 struct acpi_processor *pr = __this_cpu_read(processors);
700
701 if (unlikely(!pr))
0a398945 702 return 0;
5f508185
RW		 703
704 if (pr->flags.bm_check) {
1fecfdbb
PZ		 705 u8 bm_sts_skip = cx->bm_sts_skip;
706
707 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
708 cx->bm_sts_skip = 1;
709 acpi_idle_enter_bm(drv, pr, cx, index);
710 cx->bm_sts_skip = bm_sts_skip;
711
0a398945 712 return 0;
5f508185
RW		 713 } else {
714 ACPI_FLUSH_CPU_CACHE();
715 }
716 }
717 acpi_idle_do_entry(cx);
efe97112
NL		 718
719 return 0;
5f508185
RW		 720}
721
6ef0f086
DL		 722static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
723 struct cpuidle_device *dev)
4f86d3a8 724{
dc2251bf 725 int i, count = ACPI_IDLE_STATE_START;
4f86d3a8 726 struct acpi_processor_cx *cx;
aa6b43d5 727 struct cpuidle_state *state;
4f86d3a8 728
615dfd93
LB		 729 if (max_cstate == 0)
730 max_cstate = 1;
731
4f86d3a8 732 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
a889a23a 733 state = &acpi_idle_driver.states[count];
4f86d3a8 734 cx = &pr->power.states[i];
4f86d3a8
LB		 735
736 if (!cx->valid)
737 continue;
738
6240a10d 739 per_cpu(acpi_cstate[count], dev->cpu) = cx;
4f86d3a8 740
a889a23a 741 if (lapic_timer_needs_broadcast(pr, cx))
aa6b43d5 742 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
a889a23a 743
1fecfdbb 744 if (cx->type == ACPI_STATE_C3) {
a889a23a 745 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
1fecfdbb
PZ		 746 if (pr->flags.bm_check)
747 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
748 }
aa6b43d5 749
46bcfad7
DD		 750 count++;
751 if (count == CPUIDLE_STATE_MAX)
752 break;
753 }
754
46bcfad7
DD		 755 if (!count)
756 return -EINVAL;
757
758 return 0;
759}
760
a36a7fec 761static int acpi_processor_setup_cstates(struct acpi_processor *pr)
46bcfad7 762{
1b39e3f8 763 int i, count;
46bcfad7
DD		 764 struct acpi_processor_cx *cx;
765 struct cpuidle_state *state;
766 struct cpuidle_driver *drv = &acpi_idle_driver;
767
615dfd93
LB		 768 if (max_cstate == 0)
769 max_cstate = 1;
770
1b39e3f8
RW		 771 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
772 cpuidle_poll_state_init(drv);
773 count = 1;
774 } else {
775 count = 0;
776 }
777
4f86d3a8
LB		 778 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
779 cx = &pr->power.states[i];
4f86d3a8
LB		 780
781 if (!cx->valid)
782 continue;
783
46bcfad7 784 state = &drv->states[count];
4f86d3a8 785 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
a36a7fec 786 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
4f86d3a8 787 state->exit_latency = cx->latency;
4963f620 788 state->target_residency = cx->latency * latency_factor;
6491bc0c 789 state->enter = acpi_idle_enter;
4f86d3a8
LB		 790
791 state->flags = 0;
d6b88ce2
RG		 792 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||
793 cx->type == ACPI_STATE_C3) {
1a022e3f 794 state->enter_dead = acpi_idle_play_dead;
46bcfad7 795 drv->safe_state_index = count;
4f86d3a8 796 }
5f508185 797 /*
28ba086e 798 * Halt-induced C1 is not good for ->enter_s2idle, because it
5f508185
RW		 799 * re-enables interrupts on exit. Moreover, C1 is generally not
800 * particularly interesting from the suspend-to-idle angle, so
801 * avoid C1 and the situations in which we may need to fall back
802 * to it altogether.
803 */
804 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
28ba086e 805 state->enter_s2idle = acpi_idle_enter_s2idle;
4f86d3a8
LB		 806
807 count++;
9a0b8415 808 if (count == CPUIDLE_STATE_MAX)
809 break;
4f86d3a8
LB		 810 }
811
46bcfad7 812 drv->state_count = count;
4f86d3a8
LB		 813
814 if (!count)
815 return -EINVAL;
816
4f86d3a8
LB		 817 return 0;
818}
819
35ae7133
SH		 820static inline void acpi_processor_cstate_first_run_checks(void)
821{
35ae7133
SH		 822 static int first_run;
823
824 if (first_run)
825 return;
826 dmi_check_system(processor_power_dmi_table);
827 max_cstate = acpi_processor_cstate_check(max_cstate);
828 if (max_cstate < ACPI_C_STATES_MAX)
54e05192
RW		 829 pr_notice("processor limited to max C-state %d\n", max_cstate);
830
35ae7133
SH		 831 first_run++;
832
bc946388
RW		 833 if (nocst)
834 return;
835
836 acpi_processor_claim_cst_control();
35ae7133
SH		 837}
838#else
839
840static inline int disabled_by_idle_boot_param(void) { return 0; }
841static inline void acpi_processor_cstate_first_run_checks(void) { }
a36a7fec 842static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
35ae7133
SH		 843{
844 return -ENODEV;
845}
846
847static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
848 struct cpuidle_device *dev)
849{
850 return -EINVAL;
851}
852
a36a7fec 853static int acpi_processor_setup_cstates(struct acpi_processor *pr)
35ae7133
SH		 854{
855 return -EINVAL;
856}
857
858#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
859
a36a7fec
SH		 860struct acpi_lpi_states_array {
861 unsigned int size;
862 unsigned int composite_states_size;
863 struct acpi_lpi_state *entries;
864 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
865};
866
867static int obj_get_integer(union acpi_object *obj, u32 *value)
868{
869 if (obj->type != ACPI_TYPE_INTEGER)
870 return -EINVAL;
871
872 *value = obj->integer.value;
873 return 0;
874}
875
876static int acpi_processor_evaluate_lpi(acpi_handle handle,
877 struct acpi_lpi_states_array *info)
878{
879 acpi_status status;
880 int ret = 0;
881 int pkg_count, state_idx = 1, loop;
882 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
883 union acpi_object *lpi_data;
884 struct acpi_lpi_state *lpi_state;
885
886 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
887 if (ACPI_FAILURE(status)) {
52af99c3 888 acpi_handle_debug(handle, "No _LPI, giving up\n");
a36a7fec
SH		 889 return -ENODEV;
890 }
891
892 lpi_data = buffer.pointer;
893
894 /* There must be at least 4 elements = 3 elements + 1 package */
895 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
896 lpi_data->package.count < 4) {
897 pr_debug("not enough elements in _LPI\n");
898 ret = -ENODATA;
899 goto end;
900 }
901
902 pkg_count = lpi_data->package.elements[2].integer.value;
903
904 /* Validate number of power states. */
905 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
906 pr_debug("count given by _LPI is not valid\n");
907 ret = -ENODATA;
908 goto end;
909 }
910
911 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
912 if (!lpi_state) {
913 ret = -ENOMEM;
914 goto end;
915 }
916
917 info->size = pkg_count;
918 info->entries = lpi_state;
919
920 /* LPI States start at index 3 */
921 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
922 union acpi_object *element, *pkg_elem, *obj;
923
924 element = &lpi_data->package.elements[loop];
925 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
926 continue;
927
928 pkg_elem = element->package.elements;
929
930 obj = pkg_elem + 6;
931 if (obj->type == ACPI_TYPE_BUFFER) {
932 struct acpi_power_register *reg;
933
934 reg = (struct acpi_power_register *)obj->buffer.pointer;
935 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
936 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
937 continue;
938
939 lpi_state->address = reg->address;
940 lpi_state->entry_method =
941 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
942 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
943 } else if (obj->type == ACPI_TYPE_INTEGER) {
944 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
945 lpi_state->address = obj->integer.value;
946 } else {
947 continue;
948 }
949
950 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
951
952 obj = pkg_elem + 9;
953 if (obj->type == ACPI_TYPE_STRING)
954 strlcpy(lpi_state->desc, obj->string.pointer,
955 ACPI_CX_DESC_LEN);
956
957 lpi_state->index = state_idx;
958 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
959 pr_debug("No min. residency found, assuming 10 us\n");
960 lpi_state->min_residency = 10;
961 }
962
963 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
964 pr_debug("No wakeup residency found, assuming 10 us\n");
965 lpi_state->wake_latency = 10;
966 }
967
968 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
969 lpi_state->flags = 0;
970
971 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
972 lpi_state->arch_flags = 0;
973
974 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
975 lpi_state->res_cnt_freq = 1;
976
977 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
978 lpi_state->enable_parent_state = 0;
979 }
980
981 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
982end:
983 kfree(buffer.pointer);
984 return ret;
985}
986
987/*
988 * flat_state_cnt - the number of composite LPI states after the process of flattening
989 */
990static int flat_state_cnt;
991
992/**
993 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
994 *
995 * @local: local LPI state
996 * @parent: parent LPI state
997 * @result: composite LPI state
998 */
999static bool combine_lpi_states(struct acpi_lpi_state *local,
1000 struct acpi_lpi_state *parent,
1001 struct acpi_lpi_state *result)
1002{
1003 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1004 if (!parent->address) /* 0 means autopromotable */
1005 return false;
1006 result->address = local->address + parent->address;
1007 } else {
1008 result->address = parent->address;
1009 }
1010
1011 result->min_residency = max(local->min_residency, parent->min_residency);
1012 result->wake_latency = local->wake_latency + parent->wake_latency;
1013 result->enable_parent_state = parent->enable_parent_state;
1014 result->entry_method = local->entry_method;
1015
1016 result->flags = parent->flags;
1017 result->arch_flags = parent->arch_flags;
1018 result->index = parent->index;
1019
1020 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1021 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1022 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1023 return true;
1024}
1025
1026#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1027
1028static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1029 struct acpi_lpi_state *t)
1030{
1031 curr_level->composite_states[curr_level->composite_states_size++] = t;
1032}
1033
1034static int flatten_lpi_states(struct acpi_processor *pr,
1035 struct acpi_lpi_states_array *curr_level,
1036 struct acpi_lpi_states_array *prev_level)
1037{
1038 int i, j, state_count = curr_level->size;
1039 struct acpi_lpi_state *p, *t = curr_level->entries;
1040
1041 curr_level->composite_states_size = 0;
1042 for (j = 0; j < state_count; j++, t++) {
1043 struct acpi_lpi_state *flpi;
1044
1045 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1046 continue;
1047
1048 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1049 pr_warn("Limiting number of LPI states to max (%d)\n",
1050 ACPI_PROCESSOR_MAX_POWER);
1051 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1052 break;
1053 }
1054
1055 flpi = &pr->power.lpi_states[flat_state_cnt];
1056
1057 if (!prev_level) { /* leaf/processor node */
1058 memcpy(flpi, t, sizeof(*t));
1059 stash_composite_state(curr_level, flpi);
1060 flat_state_cnt++;
1061 continue;
1062 }
1063
1064 for (i = 0; i < prev_level->composite_states_size; i++) {
1065 p = prev_level->composite_states[i];
1066 if (t->index <= p->enable_parent_state &&
1067 combine_lpi_states(p, t, flpi)) {
1068 stash_composite_state(curr_level, flpi);
1069 flat_state_cnt++;
1070 flpi++;
1071 }
1072 }
1073 }
1074
1075 kfree(curr_level->entries);
1076 return 0;
1077}
1078
1079static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1080{
1081 int ret, i;
1082 acpi_status status;
1083 acpi_handle handle = pr->handle, pr_ahandle;
1084 struct acpi_device *d = NULL;
1085 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1086
1087 if (!osc_pc_lpi_support_confirmed)
1088 return -EOPNOTSUPP;
1089
1090 if (!acpi_has_method(handle, "_LPI"))
1091 return -EINVAL;
1092
1093 flat_state_cnt = 0;
1094 prev = &info[0];
1095 curr = &info[1];
1096 handle = pr->handle;
1097 ret = acpi_processor_evaluate_lpi(handle, prev);
1098 if (ret)
1099 return ret;
1100 flatten_lpi_states(pr, prev, NULL);
1101
1102 status = acpi_get_parent(handle, &pr_ahandle);
1103 while (ACPI_SUCCESS(status)) {
1104 acpi_bus_get_device(pr_ahandle, &d);
1105 handle = pr_ahandle;
1106
1107 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1108 break;
1109
1110 /* can be optional ? */
1111 if (!acpi_has_method(handle, "_LPI"))
1112 break;
1113
1114 ret = acpi_processor_evaluate_lpi(handle, curr);
1115 if (ret)
1116 break;
1117
1118 /* flatten all the LPI states in this level of hierarchy */
1119 flatten_lpi_states(pr, curr, prev);
1120
1121 tmp = prev, prev = curr, curr = tmp;
1122
1123 status = acpi_get_parent(handle, &pr_ahandle);
1124 }
1125
1126 pr->power.count = flat_state_cnt;
1127 /* reset the index after flattening */
1128 for (i = 0; i < pr->power.count; i++)
1129 pr->power.lpi_states[i].index = i;
1130
1131 /* Tell driver that _LPI is supported. */
1132 pr->flags.has_lpi = 1;
1133 pr->flags.power = 1;
1134
1135 return 0;
1136}
1137
1138int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1139{
1140 return -ENODEV;
1141}
1142
1143int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1144{
1145 return -ENODEV;
1146}
1147
1148/**
1149 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1150 * @dev: the target CPU
1151 * @drv: cpuidle driver containing cpuidle state info
1152 * @index: index of target state
1153 *
1154 * Return: 0 for success or negative value for error
1155 */
1156static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1157 struct cpuidle_driver *drv, int index)
1158{
1159 struct acpi_processor *pr;
1160 struct acpi_lpi_state *lpi;
1161
1162 pr = __this_cpu_read(processors);
1163
1164 if (unlikely(!pr))
1165 return -EINVAL;
1166
1167 lpi = &pr->power.lpi_states[index];
1168 if (lpi->entry_method == ACPI_CSTATE_FFH)
1169 return acpi_processor_ffh_lpi_enter(lpi);
1170
1171 return -EINVAL;
1172}
1173
1174static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1175{
1176 int i;
1177 struct acpi_lpi_state *lpi;
1178 struct cpuidle_state *state;
1179 struct cpuidle_driver *drv = &acpi_idle_driver;
1180
1181 if (!pr->flags.has_lpi)
1182 return -EOPNOTSUPP;
1183
1184 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1185 lpi = &pr->power.lpi_states[i];
1186
1187 state = &drv->states[i];
1188 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1189 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1190 state->exit_latency = lpi->wake_latency;
1191 state->target_residency = lpi->min_residency;
1192 if (lpi->arch_flags)
1193 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1194 state->enter = acpi_idle_lpi_enter;
1195 drv->safe_state_index = i;
1196 }
1197
1198 drv->state_count = i;
1199
1200 return 0;
1201}
1202
1203/**
1204 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1205 * global state data i.e. idle routines
1206 *
1207 * @pr: the ACPI processor
1208 */
1209static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1210{
1211 int i;
1212 struct cpuidle_driver *drv = &acpi_idle_driver;
1213
1214 if (!pr->flags.power_setup_done || !pr->flags.power)
1215 return -EINVAL;
1216
1217 drv->safe_state_index = -1;
dc2251bf 1218 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
a36a7fec
SH		 1219 drv->states[i].name[0] = '\0';
1220 drv->states[i].desc[0] = '\0';
1221 }
1222
1223 if (pr->flags.has_lpi)
1224 return acpi_processor_setup_lpi_states(pr);
1225
1226 return acpi_processor_setup_cstates(pr);
1227}
1228
1229/**
1230 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1231 * device i.e. per-cpu data
1232 *
1233 * @pr: the ACPI processor
1234 * @dev : the cpuidle device
1235 */
1236static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1237 struct cpuidle_device *dev)
1238{
1239 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1240 return -EINVAL;
1241
1242 dev->cpu = pr->id;
1243 if (pr->flags.has_lpi)
1244 return acpi_processor_ffh_lpi_probe(pr->id);
1245
1246 return acpi_processor_setup_cpuidle_cx(pr, dev);
1247}
1248
1249static int acpi_processor_get_power_info(struct acpi_processor *pr)
1250{
1251 int ret;
1252
1253 ret = acpi_processor_get_lpi_info(pr);
1254 if (ret)
1255 ret = acpi_processor_get_cstate_info(pr);
1256
1257 return ret;
1258}
1259
46bcfad7 1260int acpi_processor_hotplug(struct acpi_processor *pr)
4f86d3a8 1261{
dcb84f33 1262 int ret = 0;
e8b1b59d 1263 struct cpuidle_device *dev;
4f86d3a8 1264
d1896049 1265 if (disabled_by_idle_boot_param())
36a91358
VP		 1266 return 0;
1267
4f86d3a8
LB		 1268 if (!pr->flags.power_setup_done)
1269 return -ENODEV;
1270
e8b1b59d 1271 dev = per_cpu(acpi_cpuidle_device, pr->id);
4f86d3a8 1272 cpuidle_pause_and_lock();
3d339dcb 1273 cpuidle_disable_device(dev);
a36a7fec
SH		 1274 ret = acpi_processor_get_power_info(pr);
1275 if (!ret && pr->flags.power) {
1276 acpi_processor_setup_cpuidle_dev(pr, dev);
3d339dcb 1277 ret = cpuidle_enable_device(dev);
dcb84f33 1278 }
4f86d3a8
LB		 1279 cpuidle_resume_and_unlock();
1280
1281 return ret;
1282}
1283
a36a7fec 1284int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
46bcfad7
DD		 1285{
1286 int cpu;
1287 struct acpi_processor *_pr;
3d339dcb 1288 struct cpuidle_device *dev;
46bcfad7
DD		 1289
1290 if (disabled_by_idle_boot_param())
1291 return 0;
1292
46bcfad7
DD		 1293 if (!pr->flags.power_setup_done)
1294 return -ENODEV;
1295
1296 /*
1297 * FIXME: Design the ACPI notification to make it once per
1298 * system instead of once per-cpu. This condition is a hack
1299 * to make the code that updates C-States be called once.
1300 */
1301
9505626d 1302 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
46bcfad7 1303
46bcfad7 1304 /* Protect against cpu-hotplug */
95ac7067 1305 cpus_read_lock();
6726655d 1306 cpuidle_pause_and_lock();
46bcfad7
DD		 1307
1308 /* Disable all cpuidle devices */
1309 for_each_online_cpu(cpu) {
1310 _pr = per_cpu(processors, cpu);
1311 if (!_pr || !_pr->flags.power_setup_done)
1312 continue;
3d339dcb
DL		 1313 dev = per_cpu(acpi_cpuidle_device, cpu);
1314 cpuidle_disable_device(dev);
46bcfad7
DD		 1315 }
1316
1317 /* Populate Updated C-state information */
f427e5f1 1318 acpi_processor_get_power_info(pr);
46bcfad7
DD		 1319 acpi_processor_setup_cpuidle_states(pr);
1320
1321 /* Enable all cpuidle devices */
1322 for_each_online_cpu(cpu) {
1323 _pr = per_cpu(processors, cpu);
1324 if (!_pr || !_pr->flags.power_setup_done)
1325 continue;
1326 acpi_processor_get_power_info(_pr);
1327 if (_pr->flags.power) {
3d339dcb 1328 dev = per_cpu(acpi_cpuidle_device, cpu);
a36a7fec 1329 acpi_processor_setup_cpuidle_dev(_pr, dev);
3d339dcb 1330 cpuidle_enable_device(dev);
46bcfad7
DD		 1331 }
1332 }
46bcfad7 1333 cpuidle_resume_and_unlock();
95ac7067 1334 cpus_read_unlock();
46bcfad7
DD		 1335 }
1336
1337 return 0;
1338}
1339
1340static int acpi_processor_registered;
1341
fe7bf106 1342int acpi_processor_power_init(struct acpi_processor *pr)
1da177e4 1343{
46bcfad7 1344 int retval;
3d339dcb 1345 struct cpuidle_device *dev;
1da177e4 1346
d1896049 1347 if (disabled_by_idle_boot_param())
36a91358 1348 return 0;
1da177e4 1349
35ae7133 1350 acpi_processor_cstate_first_run_checks();
1da177e4 1351
35ae7133
SH		 1352 if (!acpi_processor_get_power_info(pr))
1353 pr->flags.power_setup_done = 1;
1da177e4
LT		 1354
1355 /*
1356 * Install the idle handler if processor power management is supported.
1357 * Note that we use previously set idle handler will be used on
1358 * platforms that only support C1.
1359 */
36a91358 1360 if (pr->flags.power) {
46bcfad7
DD		 1361 /* Register acpi_idle_driver if not already registered */
1362 if (!acpi_processor_registered) {
1363 acpi_processor_setup_cpuidle_states(pr);
1364 retval = cpuidle_register_driver(&acpi_idle_driver);
1365 if (retval)
1366 return retval;
b6ec26fb
SH		 1367 pr_debug("%s registered with cpuidle\n",
1368 acpi_idle_driver.name);
46bcfad7 1369 }
3d339dcb
DL		 1370
1371 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1372 if (!dev)
1373 return -ENOMEM;
1374 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1375
a36a7fec 1376 acpi_processor_setup_cpuidle_dev(pr, dev);
3d339dcb 1377
46bcfad7
DD		 1378 /* Register per-cpu cpuidle_device. Cpuidle driver
1379 * must already be registered before registering device
1380 */
3d339dcb 1381 retval = cpuidle_register_device(dev);
46bcfad7
DD		 1382 if (retval) {
1383 if (acpi_processor_registered == 0)
1384 cpuidle_unregister_driver(&acpi_idle_driver);
1385 return retval;
1386 }
1387 acpi_processor_registered++;
1da177e4 1388 }
d550d98d 1389 return 0;
1da177e4
LT		 1390}
1391
38a991b6 1392int acpi_processor_power_exit(struct acpi_processor *pr)
1da177e4 1393{
3d339dcb
DL		 1394 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1395
d1896049 1396 if (disabled_by_idle_boot_param())
36a91358
VP		 1397 return 0;
1398
46bcfad7 1399 if (pr->flags.power) {
3d339dcb 1400 cpuidle_unregister_device(dev);
46bcfad7
DD		 1401 acpi_processor_registered--;
1402 if (acpi_processor_registered == 0)
1403 cpuidle_unregister_driver(&acpi_idle_driver);
1404 }
1da177e4 1405
46bcfad7 1406 pr->flags.power_setup_done = 0;
d550d98d 1407 return 0;
1da177e4 1408}
Linux 6.x block layer and io_uring tree(s)