Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $) | |
4 | * | |
5 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
6 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/types.h> | |
d0020f65 | 13 | #include <linux/mutex.h> |
1da177e4 | 14 | #include <linux/pm.h> |
b67ea761 | 15 | #include <linux/pm_runtime.h> |
1da177e4 | 16 | #include <linux/pci.h> |
990a7ac5 | 17 | #include <linux/pci-acpi.h> |
864b94ad | 18 | #include <linux/dmar.h> |
1da177e4 | 19 | #include <linux/acpi.h> |
5a0e3ad6 | 20 | #include <linux/slab.h> |
7bc5a2ba | 21 | #include <linux/dmi.h> |
630b3aff | 22 | #include <linux/platform_data/x86/apple.h> |
8b48463f | 23 | #include <acpi/apei.h> /* for acpi_hest_init() */ |
1da177e4 | 24 | |
ace8238b RW |
25 | #include "internal.h" |
26 | ||
1da177e4 | 27 | #define _COMPONENT ACPI_PCI_COMPONENT |
f52fd66d | 28 | ACPI_MODULE_NAME("pci_root"); |
1da177e4 | 29 | #define ACPI_PCI_ROOT_CLASS "pci_bridge" |
1da177e4 | 30 | #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge" |
00c43b96 RW |
31 | static int acpi_pci_root_add(struct acpi_device *device, |
32 | const struct acpi_device_id *not_used); | |
33 | static void acpi_pci_root_remove(struct acpi_device *device); | |
1da177e4 | 34 | |
3338db00 RW |
35 | static int acpi_pci_root_scan_dependent(struct acpi_device *adev) |
36 | { | |
1f7c164b | 37 | acpiphp_check_host_bridge(adev); |
3338db00 RW |
38 | return 0; |
39 | } | |
40 | ||
7dab9ef4 BH |
41 | #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \ |
42 | | OSC_PCI_ASPM_SUPPORT \ | |
43 | | OSC_PCI_CLOCK_PM_SUPPORT \ | |
44 | | OSC_PCI_MSI_SUPPORT) | |
415e12b2 | 45 | |
c97adf9e | 46 | static const struct acpi_device_id root_device_ids[] = { |
1ba90e3a TR |
47 | {"PNP0A03", 0}, |
48 | {"", 0}, | |
49 | }; | |
1ba90e3a | 50 | |
00c43b96 | 51 | static struct acpi_scan_handler pci_root_handler = { |
1ba90e3a | 52 | .ids = root_device_ids, |
00c43b96 RW |
53 | .attach = acpi_pci_root_add, |
54 | .detach = acpi_pci_root_remove, | |
ca499fc8 | 55 | .hotplug = { |
3338db00 RW |
56 | .enabled = true, |
57 | .scan_dependent = acpi_pci_root_scan_dependent, | |
ca499fc8 | 58 | }, |
1da177e4 LT |
59 | }; |
60 | ||
63f10f0f | 61 | static DEFINE_MUTEX(osc_lock); |
1da177e4 | 62 | |
27558203 AC |
63 | /** |
64 | * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge | |
65 | * @handle - the ACPI CA node in question. | |
66 | * | |
67 | * Note: we could make this API take a struct acpi_device * instead, but | |
68 | * for now, it's more convenient to operate on an acpi_handle. | |
69 | */ | |
70 | int acpi_is_root_bridge(acpi_handle handle) | |
71 | { | |
72 | int ret; | |
73 | struct acpi_device *device; | |
74 | ||
75 | ret = acpi_bus_get_device(handle, &device); | |
76 | if (ret) | |
77 | return 0; | |
78 | ||
79 | ret = acpi_match_device_ids(device, root_device_ids); | |
80 | if (ret) | |
81 | return 0; | |
82 | else | |
83 | return 1; | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(acpi_is_root_bridge); | |
86 | ||
1da177e4 | 87 | static acpi_status |
4be44fcd | 88 | get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data) |
1da177e4 | 89 | { |
6ad95513 | 90 | struct resource *res = data; |
1da177e4 | 91 | struct acpi_resource_address64 address; |
f6c1c8ff | 92 | acpi_status status; |
1da177e4 | 93 | |
f6c1c8ff BH |
94 | status = acpi_resource_to_address64(resource, &address); |
95 | if (ACPI_FAILURE(status)) | |
1da177e4 LT |
96 | return AE_OK; |
97 | ||
a45de93e | 98 | if ((address.address.address_length > 0) && |
6ad95513 | 99 | (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { |
a45de93e LZ |
100 | res->start = address.address.minimum; |
101 | res->end = address.address.minimum + address.address.address_length - 1; | |
6ad95513 | 102 | } |
1da177e4 LT |
103 | |
104 | return AE_OK; | |
105 | } | |
106 | ||
f5eebbe1 | 107 | static acpi_status try_get_root_bridge_busnr(acpi_handle handle, |
6ad95513 | 108 | struct resource *res) |
1da177e4 LT |
109 | { |
110 | acpi_status status; | |
111 | ||
6ad95513 | 112 | res->start = -1; |
4be44fcd LB |
113 | status = |
114 | acpi_walk_resources(handle, METHOD_NAME__CRS, | |
6ad95513 | 115 | get_root_bridge_busnr_callback, res); |
1da177e4 LT |
116 | if (ACPI_FAILURE(status)) |
117 | return status; | |
6ad95513 | 118 | if (res->start == -1) |
1da177e4 LT |
119 | return AE_ERROR; |
120 | return AE_OK; | |
121 | } | |
122 | ||
955f14b4 BH |
123 | struct pci_osc_bit_struct { |
124 | u32 bit; | |
125 | char *desc; | |
126 | }; | |
127 | ||
128 | static struct pci_osc_bit_struct pci_osc_support_bit[] = { | |
129 | { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" }, | |
130 | { OSC_PCI_ASPM_SUPPORT, "ASPM" }, | |
131 | { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" }, | |
132 | { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" }, | |
133 | { OSC_PCI_MSI_SUPPORT, "MSI" }, | |
ba11edc6 | 134 | { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" }, |
955f14b4 BH |
135 | }; |
136 | ||
137 | static struct pci_osc_bit_struct pci_osc_control_bit[] = { | |
138 | { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" }, | |
139 | { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" }, | |
140 | { OSC_PCI_EXPRESS_PME_CONTROL, "PME" }, | |
141 | { OSC_PCI_EXPRESS_AER_CONTROL, "AER" }, | |
142 | { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" }, | |
af8bb9f8 | 143 | { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" }, |
955f14b4 BH |
144 | }; |
145 | ||
146 | static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, | |
147 | struct pci_osc_bit_struct *table, int size) | |
148 | { | |
149 | char buf[80]; | |
150 | int i, len = 0; | |
151 | struct pci_osc_bit_struct *entry; | |
152 | ||
153 | buf[0] = '\0'; | |
154 | for (i = 0, entry = table; i < size; i++, entry++) | |
155 | if (word & entry->bit) | |
edd66086 | 156 | len += scnprintf(buf + len, sizeof(buf) - len, "%s%s", |
955f14b4 BH |
157 | len ? " " : "", entry->desc); |
158 | ||
159 | dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf); | |
160 | } | |
161 | ||
162 | static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word) | |
163 | { | |
164 | decode_osc_bits(root, msg, word, pci_osc_support_bit, | |
165 | ARRAY_SIZE(pci_osc_support_bit)); | |
166 | } | |
167 | ||
168 | static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word) | |
169 | { | |
170 | decode_osc_bits(root, msg, word, pci_osc_control_bit, | |
171 | ARRAY_SIZE(pci_osc_control_bit)); | |
172 | } | |
173 | ||
3a9622dc | 174 | static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766"; |
63f10f0f KK |
175 | |
176 | static acpi_status acpi_pci_run_osc(acpi_handle handle, | |
177 | const u32 *capbuf, u32 *retval) | |
178 | { | |
3a9622dc SL |
179 | struct acpi_osc_context context = { |
180 | .uuid_str = pci_osc_uuid_str, | |
181 | .rev = 1, | |
182 | .cap.length = 12, | |
183 | .cap.pointer = (void *)capbuf, | |
184 | }; | |
63f10f0f | 185 | acpi_status status; |
63f10f0f | 186 | |
3a9622dc SL |
187 | status = acpi_run_osc(handle, &context); |
188 | if (ACPI_SUCCESS(status)) { | |
189 | *retval = *((u32 *)(context.ret.pointer + 8)); | |
190 | kfree(context.ret.pointer); | |
63f10f0f | 191 | } |
63f10f0f KK |
192 | return status; |
193 | } | |
194 | ||
ab8e8957 RW |
195 | static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, |
196 | u32 support, | |
197 | u32 *control) | |
63f10f0f KK |
198 | { |
199 | acpi_status status; | |
ab8e8957 RW |
200 | u32 result, capbuf[3]; |
201 | ||
202 | support &= OSC_PCI_SUPPORT_MASKS; | |
203 | support |= root->osc_support_set; | |
63f10f0f | 204 | |
b938a229 BH |
205 | capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; |
206 | capbuf[OSC_SUPPORT_DWORD] = support; | |
ab8e8957 RW |
207 | if (control) { |
208 | *control &= OSC_PCI_CONTROL_MASKS; | |
b938a229 | 209 | capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set; |
ab8e8957 | 210 | } else { |
545d6e18 | 211 | /* Run _OSC query only with existing controls. */ |
b938a229 | 212 | capbuf[OSC_CONTROL_DWORD] = root->osc_control_set; |
ab8e8957 | 213 | } |
63f10f0f KK |
214 | |
215 | status = acpi_pci_run_osc(root->device->handle, capbuf, &result); | |
216 | if (ACPI_SUCCESS(status)) { | |
ab8e8957 | 217 | root->osc_support_set = support; |
2b8fd918 | 218 | if (control) |
ab8e8957 | 219 | *control = result; |
63f10f0f KK |
220 | } |
221 | return status; | |
222 | } | |
223 | ||
224 | static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags) | |
225 | { | |
226 | acpi_status status; | |
63f10f0f | 227 | |
63f10f0f | 228 | mutex_lock(&osc_lock); |
ab8e8957 | 229 | status = acpi_pci_query_osc(root, flags, NULL); |
63f10f0f KK |
230 | mutex_unlock(&osc_lock); |
231 | return status; | |
232 | } | |
233 | ||
76d56de5 | 234 | struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) |
63f10f0f KK |
235 | { |
236 | struct acpi_pci_root *root; | |
cd4faf9c | 237 | struct acpi_device *device; |
c1aec834 | 238 | |
cd4faf9c TI |
239 | if (acpi_bus_get_device(handle, &device) || |
240 | acpi_match_device_ids(device, root_device_ids)) | |
241 | return NULL; | |
242 | ||
243 | root = acpi_driver_data(device); | |
244 | ||
245 | return root; | |
63f10f0f | 246 | } |
76d56de5 | 247 | EXPORT_SYMBOL_GPL(acpi_pci_find_root); |
63f10f0f | 248 | |
2f7bbceb AC |
249 | struct acpi_handle_node { |
250 | struct list_head node; | |
251 | acpi_handle handle; | |
252 | }; | |
253 | ||
254 | /** | |
255 | * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev | |
256 | * @handle: the handle in question | |
257 | * | |
258 | * Given an ACPI CA handle, the desired PCI device is located in the | |
259 | * list of PCI devices. | |
260 | * | |
261 | * If the device is found, its reference count is increased and this | |
262 | * function returns a pointer to its data structure. The caller must | |
263 | * decrement the reference count by calling pci_dev_put(). | |
264 | * If no device is found, %NULL is returned. | |
265 | */ | |
266 | struct pci_dev *acpi_get_pci_dev(acpi_handle handle) | |
267 | { | |
268 | int dev, fn; | |
269 | unsigned long long adr; | |
270 | acpi_status status; | |
271 | acpi_handle phandle; | |
272 | struct pci_bus *pbus; | |
273 | struct pci_dev *pdev = NULL; | |
274 | struct acpi_handle_node *node, *tmp; | |
275 | struct acpi_pci_root *root; | |
276 | LIST_HEAD(device_list); | |
277 | ||
278 | /* | |
279 | * Walk up the ACPI CA namespace until we reach a PCI root bridge. | |
280 | */ | |
281 | phandle = handle; | |
282 | while (!acpi_is_root_bridge(phandle)) { | |
283 | node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL); | |
284 | if (!node) | |
285 | goto out; | |
286 | ||
287 | INIT_LIST_HEAD(&node->node); | |
288 | node->handle = phandle; | |
289 | list_add(&node->node, &device_list); | |
290 | ||
291 | status = acpi_get_parent(phandle, &phandle); | |
292 | if (ACPI_FAILURE(status)) | |
293 | goto out; | |
294 | } | |
295 | ||
296 | root = acpi_pci_find_root(phandle); | |
297 | if (!root) | |
298 | goto out; | |
299 | ||
300 | pbus = root->bus; | |
301 | ||
302 | /* | |
303 | * Now, walk back down the PCI device tree until we return to our | |
304 | * original handle. Assumes that everything between the PCI root | |
305 | * bridge and the device we're looking for must be a P2P bridge. | |
306 | */ | |
307 | list_for_each_entry(node, &device_list, node) { | |
308 | acpi_handle hnd = node->handle; | |
309 | status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr); | |
310 | if (ACPI_FAILURE(status)) | |
311 | goto out; | |
312 | dev = (adr >> 16) & 0xffff; | |
313 | fn = adr & 0xffff; | |
314 | ||
315 | pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); | |
412af978 | 316 | if (!pdev || hnd == handle) |
2f7bbceb AC |
317 | break; |
318 | ||
319 | pbus = pdev->subordinate; | |
320 | pci_dev_put(pdev); | |
497fb54f RW |
321 | |
322 | /* | |
323 | * This function may be called for a non-PCI device that has a | |
324 | * PCI parent (eg. a disk under a PCI SATA controller). In that | |
325 | * case pdev->subordinate will be NULL for the parent. | |
326 | */ | |
327 | if (!pbus) { | |
328 | dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); | |
329 | pdev = NULL; | |
330 | break; | |
331 | } | |
2f7bbceb AC |
332 | } |
333 | out: | |
334 | list_for_each_entry_safe(node, tmp, &device_list, node) | |
335 | kfree(node); | |
336 | ||
337 | return pdev; | |
338 | } | |
339 | EXPORT_SYMBOL_GPL(acpi_get_pci_dev); | |
340 | ||
63f10f0f | 341 | /** |
75fb60f2 RW |
342 | * acpi_pci_osc_control_set - Request control of PCI root _OSC features. |
343 | * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex). | |
344 | * @mask: Mask of _OSC bits to request control of, place to store control mask. | |
345 | * @req: Mask of _OSC bits the control of is essential to the caller. | |
63f10f0f | 346 | * |
75fb60f2 RW |
347 | * Run _OSC query for @mask and if that is successful, compare the returned |
348 | * mask of control bits with @req. If all of the @req bits are set in the | |
349 | * returned mask, run _OSC request for it. | |
350 | * | |
351 | * The variable at the @mask address may be modified regardless of whether or | |
352 | * not the function returns success. On success it will contain the mask of | |
353 | * _OSC bits the BIOS has granted control of, but its contents are meaningless | |
354 | * on failure. | |
63f10f0f | 355 | **/ |
75fb60f2 | 356 | acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req) |
63f10f0f | 357 | { |
75fb60f2 | 358 | struct acpi_pci_root *root; |
4ffe6e54 | 359 | acpi_status status = AE_OK; |
75fb60f2 | 360 | u32 ctrl, capbuf[3]; |
63f10f0f | 361 | |
75fb60f2 RW |
362 | if (!mask) |
363 | return AE_BAD_PARAMETER; | |
364 | ||
365 | ctrl = *mask & OSC_PCI_CONTROL_MASKS; | |
366 | if ((ctrl & req) != req) | |
63f10f0f KK |
367 | return AE_TYPE; |
368 | ||
369 | root = acpi_pci_find_root(handle); | |
370 | if (!root) | |
371 | return AE_NOT_EXIST; | |
372 | ||
373 | mutex_lock(&osc_lock); | |
75fb60f2 RW |
374 | |
375 | *mask = ctrl | root->osc_control_set; | |
63f10f0f | 376 | /* No need to evaluate _OSC if the control was already granted. */ |
75fb60f2 | 377 | if ((root->osc_control_set & ctrl) == ctrl) |
63f10f0f KK |
378 | goto out; |
379 | ||
75fb60f2 RW |
380 | /* Need to check the available controls bits before requesting them. */ |
381 | while (*mask) { | |
382 | status = acpi_pci_query_osc(root, root->osc_support_set, mask); | |
383 | if (ACPI_FAILURE(status)) | |
384 | goto out; | |
385 | if (ctrl == *mask) | |
386 | break; | |
955f14b4 BH |
387 | decode_osc_control(root, "platform does not support", |
388 | ctrl & ~(*mask)); | |
75fb60f2 RW |
389 | ctrl = *mask; |
390 | } | |
2b8fd918 | 391 | |
75fb60f2 | 392 | if ((ctrl & req) != req) { |
955f14b4 BH |
393 | decode_osc_control(root, "not requesting control; platform does not support", |
394 | req & ~(ctrl)); | |
63f10f0f KK |
395 | status = AE_SUPPORT; |
396 | goto out; | |
397 | } | |
398 | ||
b938a229 BH |
399 | capbuf[OSC_QUERY_DWORD] = 0; |
400 | capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set; | |
401 | capbuf[OSC_CONTROL_DWORD] = ctrl; | |
75fb60f2 | 402 | status = acpi_pci_run_osc(handle, capbuf, mask); |
63f10f0f | 403 | if (ACPI_SUCCESS(status)) |
75fb60f2 | 404 | root->osc_control_set = *mask; |
63f10f0f KK |
405 | out: |
406 | mutex_unlock(&osc_lock); | |
407 | return status; | |
408 | } | |
9f5404d8 | 409 | EXPORT_SYMBOL(acpi_pci_osc_control_set); |
63f10f0f | 410 | |
c238252f SK |
411 | static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm, |
412 | bool is_pcie) | |
1da177e4 | 413 | { |
955f14b4 | 414 | u32 support, control, requested; |
3e43abb0 BH |
415 | acpi_status status; |
416 | struct acpi_device *device = root->device; | |
bfe2414a | 417 | acpi_handle handle = device->handle; |
1da177e4 | 418 | |
7bc5a2ba MG |
419 | /* |
420 | * Apple always return failure on _OSC calls when _OSI("Darwin") has | |
421 | * been called successfully. We know the feature set supported by the | |
422 | * platform, so avoid calling _OSC at all | |
423 | */ | |
630b3aff | 424 | if (x86_apple_machine) { |
7bc5a2ba MG |
425 | root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL; |
426 | decode_osc_control(root, "OS assumes control of", | |
427 | root->osc_control_set); | |
428 | return; | |
429 | } | |
430 | ||
2786f6e3 | 431 | /* |
990a7ac5 AP |
432 | * All supported architectures that use ACPI have support for |
433 | * PCI domains, so we indicate this in _OSC support capabilities. | |
2786f6e3 | 434 | */ |
65afe916 | 435 | support = OSC_PCI_SEGMENT_GROUPS_SUPPORT; |
ba11edc6 | 436 | support |= OSC_PCI_HPX_TYPE_3_SUPPORT; |
8c33f51d | 437 | if (pci_ext_cfg_avail()) |
b8eb67fc | 438 | support |= OSC_PCI_EXT_CONFIG_SUPPORT; |
1b2a7be6 | 439 | if (pcie_aspm_support_enabled()) |
b8eb67fc | 440 | support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; |
07ae95f9 | 441 | if (pci_msi_enabled()) |
b8eb67fc | 442 | support |= OSC_PCI_MSI_SUPPORT; |
955f14b4 BH |
443 | |
444 | decode_osc_support(root, "OS supports", support); | |
1b2a7be6 BH |
445 | status = acpi_pci_osc_support(root, support); |
446 | if (ACPI_FAILURE(status)) { | |
c238252f SK |
447 | *no_aspm = 1; |
448 | ||
449 | /* _OSC is optional for PCI host bridges */ | |
450 | if ((status == AE_NOT_FOUND) && !is_pcie) | |
451 | return; | |
452 | ||
1ad61b61 SK |
453 | dev_info(&device->dev, "_OSC failed (%s)%s\n", |
454 | acpi_format_exception(status), | |
455 | pcie_aspm_support_enabled() ? "; disabling ASPM" : ""); | |
65afe916 | 456 | return; |
2d9c8677 | 457 | } |
b8178f13 | 458 | |
43613a1f BH |
459 | if (pcie_ports_disabled) { |
460 | dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n"); | |
461 | return; | |
462 | } | |
463 | ||
de189662 | 464 | if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) { |
955f14b4 BH |
465 | decode_osc_support(root, "not requesting OS control; OS requires", |
466 | ACPI_PCIE_REQ_SUPPORT); | |
de189662 BH |
467 | return; |
468 | } | |
469 | ||
470 | control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL | |
de189662 BH |
471 | | OSC_PCI_EXPRESS_PME_CONTROL; |
472 | ||
af8bb9f8 BH |
473 | if (IS_ENABLED(CONFIG_PCIEASPM)) |
474 | control |= OSC_PCI_EXPRESS_LTR_CONTROL; | |
475 | ||
408fec36 MW |
476 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) |
477 | control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL; | |
478 | ||
1df81a6d MW |
479 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC)) |
480 | control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL; | |
481 | ||
de189662 BH |
482 | if (pci_aer_available()) { |
483 | if (aer_acpi_firmware_first()) | |
955f14b4 BH |
484 | dev_info(&device->dev, |
485 | "PCIe AER handled by firmware\n"); | |
de189662 BH |
486 | else |
487 | control |= OSC_PCI_EXPRESS_AER_CONTROL; | |
488 | } | |
415e12b2 | 489 | |
955f14b4 | 490 | requested = control; |
de189662 BH |
491 | status = acpi_pci_osc_control_set(handle, &control, |
492 | OSC_PCI_EXPRESS_CAPABILITY_CONTROL); | |
493 | if (ACPI_SUCCESS(status)) { | |
955f14b4 | 494 | decode_osc_control(root, "OS now controls", control); |
de189662 | 495 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
3dc48af3 | 496 | /* |
387d3757 MG |
497 | * We have ASPM control, but the FADT indicates that |
498 | * it's unsupported. Leave existing configuration | |
499 | * intact and prevent the OS from touching it. | |
3dc48af3 | 500 | */ |
387d3757 MG |
501 | dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n"); |
502 | *no_aspm = 1; | |
eca67315 | 503 | } |
a246670d | 504 | } else { |
955f14b4 BH |
505 | decode_osc_control(root, "OS requested", requested); |
506 | decode_osc_control(root, "platform willing to grant", control); | |
507 | dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", | |
508 | acpi_format_exception(status)); | |
509 | ||
de189662 BH |
510 | /* |
511 | * We want to disable ASPM here, but aspm_disabled | |
512 | * needs to remain in its state from boot so that we | |
513 | * properly handle PCIe 1.1 devices. So we set this | |
514 | * flag here, to defer the action until after the ACPI | |
515 | * root scan. | |
516 | */ | |
517 | *no_aspm = 1; | |
415e12b2 | 518 | } |
3e43abb0 BH |
519 | } |
520 | ||
00c43b96 RW |
521 | static int acpi_pci_root_add(struct acpi_device *device, |
522 | const struct acpi_device_id *not_used) | |
1da177e4 | 523 | { |
f5eebbe1 BH |
524 | unsigned long long segment, bus; |
525 | acpi_status status; | |
526 | int result; | |
527 | struct acpi_pci_root *root; | |
bfe2414a | 528 | acpi_handle handle = device->handle; |
387d3757 | 529 | int no_aspm = 0; |
9762b33d | 530 | bool hotadd = system_state == SYSTEM_RUNNING; |
c238252f | 531 | bool is_pcie; |
1da177e4 | 532 | |
6ad95513 BH |
533 | root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); |
534 | if (!root) | |
535 | return -ENOMEM; | |
536 | ||
f5eebbe1 | 537 | segment = 0; |
bfe2414a | 538 | status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, |
f5eebbe1 BH |
539 | &segment); |
540 | if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { | |
6dc7d22c | 541 | dev_err(&device->dev, "can't evaluate _SEG\n"); |
6ad95513 BH |
542 | result = -ENODEV; |
543 | goto end; | |
f5eebbe1 | 544 | } |
1da177e4 | 545 | |
f5eebbe1 | 546 | /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ |
6ad95513 | 547 | root->secondary.flags = IORESOURCE_BUS; |
bfe2414a | 548 | status = try_get_root_bridge_busnr(handle, &root->secondary); |
f5eebbe1 | 549 | if (ACPI_FAILURE(status)) { |
6ad95513 BH |
550 | /* |
551 | * We need both the start and end of the downstream bus range | |
552 | * to interpret _CBA (MMCONFIG base address), so it really is | |
553 | * supposed to be in _CRS. If we don't find it there, all we | |
554 | * can do is assume [_BBN-0xFF] or [0-0xFF]. | |
555 | */ | |
556 | root->secondary.end = 0xFF; | |
6dc7d22c JL |
557 | dev_warn(&device->dev, |
558 | FW_BUG "no secondary bus range in _CRS\n"); | |
bfe2414a | 559 | status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, |
e545b55a | 560 | NULL, &bus); |
6ad95513 BH |
561 | if (ACPI_SUCCESS(status)) |
562 | root->secondary.start = bus; | |
563 | else if (status == AE_NOT_FOUND) | |
564 | root->secondary.start = 0; | |
565 | else { | |
6dc7d22c | 566 | dev_err(&device->dev, "can't evaluate _BBN\n"); |
6ad95513 BH |
567 | result = -ENODEV; |
568 | goto end; | |
f5eebbe1 BH |
569 | } |
570 | } | |
1da177e4 | 571 | |
32917e5b | 572 | root->device = device; |
0705495d | 573 | root->segment = segment & 0xFFFF; |
1da177e4 LT |
574 | strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); |
575 | strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); | |
db89b4f0 | 576 | device->driver_data = root; |
1da177e4 | 577 | |
864b94ad JL |
578 | if (hotadd && dmar_device_add(handle)) { |
579 | result = -ENXIO; | |
580 | goto end; | |
581 | } | |
582 | ||
6dc7d22c | 583 | pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", |
4be44fcd | 584 | acpi_device_name(device), acpi_device_bid(device), |
6ad95513 | 585 | root->segment, &root->secondary); |
1da177e4 | 586 | |
bfe2414a | 587 | root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); |
1da177e4 | 588 | |
c238252f SK |
589 | is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0; |
590 | negotiate_os_control(root, &no_aspm, is_pcie); | |
415e12b2 | 591 | |
3dc48af3 NH |
592 | /* |
593 | * TBD: Need PCI interface for enumeration/configuration of roots. | |
594 | */ | |
595 | ||
596 | /* | |
597 | * Scan the Root Bridge | |
598 | * -------------------- | |
599 | * Must do this prior to any attempt to bind the root device, as the | |
600 | * PCI namespace does not get created until this call is made (and | |
601 | * thus the root bridge's pci_dev does not exist). | |
602 | */ | |
603 | root->bus = pci_acpi_scan_root(root); | |
604 | if (!root->bus) { | |
605 | dev_err(&device->dev, | |
606 | "Bus %04x:%02x not present in PCI namespace\n", | |
607 | root->segment, (unsigned int)root->secondary.start); | |
f516bde5 | 608 | device->driver_data = NULL; |
3dc48af3 | 609 | result = -ENODEV; |
864b94ad | 610 | goto remove_dmar; |
3dc48af3 NH |
611 | } |
612 | ||
3dc48af3 NH |
613 | if (no_aspm) |
614 | pcie_no_aspm(); | |
615 | ||
c072530f | 616 | pci_acpi_add_bus_pm_notifier(device); |
de3ef1eb | 617 | device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid); |
b67ea761 | 618 | |
864b94ad | 619 | if (hotadd) { |
3c449ed0 | 620 | pcibios_resource_survey_bus(root->bus); |
39772038 | 621 | pci_assign_unassigned_root_bus_resources(root->bus); |
584c5c42 RW |
622 | /* |
623 | * This is only called for the hotadd case. For the boot-time | |
624 | * case, we need to wait until after PCI initialization in | |
625 | * order to deal with IOAPICs mapped in on a PCI BAR. | |
626 | * | |
627 | * This is currently x86-specific, because acpi_ioapic_add() | |
628 | * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC. | |
629 | * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC | |
630 | * (see drivers/acpi/Kconfig). | |
631 | */ | |
fe7bd58f | 632 | acpi_ioapic_add(root->device->handle); |
516ca223 | 633 | } |
62a08c5a | 634 | |
7a3bb55e | 635 | pci_lock_rescan_remove(); |
caf420c6 | 636 | pci_bus_add_devices(root->bus); |
7a3bb55e | 637 | pci_unlock_rescan_remove(); |
00c43b96 | 638 | return 1; |
47525cda | 639 | |
864b94ad JL |
640 | remove_dmar: |
641 | if (hotadd) | |
642 | dmar_device_remove(handle); | |
47525cda RW |
643 | end: |
644 | kfree(root); | |
645 | return result; | |
c431ada4 | 646 | } |
1da177e4 | 647 | |
00c43b96 | 648 | static void acpi_pci_root_remove(struct acpi_device *device) |
1da177e4 | 649 | { |
caf420c6 | 650 | struct acpi_pci_root *root = acpi_driver_data(device); |
c8e9afb1 | 651 | |
7a3bb55e RW |
652 | pci_lock_rescan_remove(); |
653 | ||
9738a1fd YL |
654 | pci_stop_root_bus(root->bus); |
655 | ||
f2ae5da7 | 656 | pci_ioapic_remove(root); |
de3ef1eb | 657 | device_set_wakeup_capable(root->bus->bridge, false); |
b67ea761 RW |
658 | pci_acpi_remove_bus_pm_notifier(device); |
659 | ||
9738a1fd | 660 | pci_remove_root_bus(root->bus); |
f2ae5da7 | 661 | WARN_ON(acpi_ioapic_remove(root)); |
9738a1fd | 662 | |
864b94ad JL |
663 | dmar_device_remove(device->handle); |
664 | ||
7a3bb55e RW |
665 | pci_unlock_rescan_remove(); |
666 | ||
1da177e4 | 667 | kfree(root); |
1da177e4 LT |
668 | } |
669 | ||
2c204383 JL |
670 | /* |
671 | * Following code to support acpi_pci_root_create() is copied from | |
672 | * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64 | |
673 | * and ARM64. | |
674 | */ | |
675 | static void acpi_pci_root_validate_resources(struct device *dev, | |
676 | struct list_head *resources, | |
677 | unsigned long type) | |
678 | { | |
679 | LIST_HEAD(list); | |
680 | struct resource *res1, *res2, *root = NULL; | |
681 | struct resource_entry *tmp, *entry, *entry2; | |
682 | ||
683 | BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0); | |
684 | root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource; | |
685 | ||
686 | list_splice_init(resources, &list); | |
687 | resource_list_for_each_entry_safe(entry, tmp, &list) { | |
688 | bool free = false; | |
689 | resource_size_t end; | |
690 | ||
691 | res1 = entry->res; | |
692 | if (!(res1->flags & type)) | |
693 | goto next; | |
694 | ||
695 | /* Exclude non-addressable range or non-addressable portion */ | |
696 | end = min(res1->end, root->end); | |
697 | if (end <= res1->start) { | |
698 | dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n", | |
699 | res1); | |
700 | free = true; | |
701 | goto next; | |
702 | } else if (res1->end != end) { | |
703 | dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n", | |
704 | res1, (unsigned long long)end + 1, | |
705 | (unsigned long long)res1->end); | |
706 | res1->end = end; | |
707 | } | |
708 | ||
709 | resource_list_for_each_entry(entry2, resources) { | |
710 | res2 = entry2->res; | |
711 | if (!(res2->flags & type)) | |
712 | continue; | |
713 | ||
714 | /* | |
715 | * I don't like throwing away windows because then | |
716 | * our resources no longer match the ACPI _CRS, but | |
717 | * the kernel resource tree doesn't allow overlaps. | |
718 | */ | |
719 | if (resource_overlaps(res1, res2)) { | |
720 | res2->start = min(res1->start, res2->start); | |
721 | res2->end = max(res1->end, res2->end); | |
722 | dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n", | |
723 | res2, res1); | |
724 | free = true; | |
725 | goto next; | |
726 | } | |
727 | } | |
728 | ||
729 | next: | |
730 | resource_list_del(entry); | |
731 | if (free) | |
732 | resource_list_free_entry(entry); | |
733 | else | |
734 | resource_list_add_tail(entry, resources); | |
735 | } | |
736 | } | |
737 | ||
fcfaab30 GP |
738 | static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode, |
739 | struct resource_entry *entry) | |
0a70abb3 J |
740 | { |
741 | #ifdef PCI_IOBASE | |
742 | struct resource *res = entry->res; | |
743 | resource_size_t cpu_addr = res->start; | |
744 | resource_size_t pci_addr = cpu_addr - entry->offset; | |
745 | resource_size_t length = resource_size(res); | |
746 | unsigned long port; | |
747 | ||
fcfaab30 | 748 | if (pci_register_io_range(fwnode, cpu_addr, length)) |
0a70abb3 J |
749 | goto err; |
750 | ||
751 | port = pci_address_to_pio(cpu_addr); | |
752 | if (port == (unsigned long)-1) | |
753 | goto err; | |
754 | ||
755 | res->start = port; | |
756 | res->end = port + length - 1; | |
757 | entry->offset = port - pci_addr; | |
758 | ||
759 | if (pci_remap_iospace(res, cpu_addr) < 0) | |
760 | goto err; | |
761 | ||
762 | pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); | |
763 | return; | |
764 | err: | |
765 | res->flags |= IORESOURCE_DISABLED; | |
766 | #endif | |
767 | } | |
768 | ||
2c204383 JL |
769 | int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) |
770 | { | |
771 | int ret; | |
772 | struct list_head *list = &info->resources; | |
773 | struct acpi_device *device = info->bridge; | |
774 | struct resource_entry *entry, *tmp; | |
775 | unsigned long flags; | |
776 | ||
777 | flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT; | |
778 | ret = acpi_dev_get_resources(device, list, | |
779 | acpi_dev_filter_resource_type_cb, | |
780 | (void *)flags); | |
781 | if (ret < 0) | |
782 | dev_warn(&device->dev, | |
783 | "failed to parse _CRS method, error code %d\n", ret); | |
784 | else if (ret == 0) | |
785 | dev_dbg(&device->dev, | |
786 | "no IO and memory resources present in _CRS\n"); | |
787 | else { | |
788 | resource_list_for_each_entry_safe(entry, tmp, list) { | |
0a70abb3 | 789 | if (entry->res->flags & IORESOURCE_IO) |
fcfaab30 GP |
790 | acpi_pci_root_remap_iospace(&device->fwnode, |
791 | entry); | |
0a70abb3 | 792 | |
2c204383 JL |
793 | if (entry->res->flags & IORESOURCE_DISABLED) |
794 | resource_list_destroy_entry(entry); | |
795 | else | |
796 | entry->res->name = info->name; | |
797 | } | |
798 | acpi_pci_root_validate_resources(&device->dev, list, | |
799 | IORESOURCE_MEM); | |
800 | acpi_pci_root_validate_resources(&device->dev, list, | |
801 | IORESOURCE_IO); | |
802 | } | |
803 | ||
804 | return ret; | |
805 | } | |
806 | ||
807 | static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info) | |
808 | { | |
809 | struct resource_entry *entry, *tmp; | |
810 | struct resource *res, *conflict, *root = NULL; | |
811 | ||
812 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
813 | res = entry->res; | |
814 | if (res->flags & IORESOURCE_MEM) | |
815 | root = &iomem_resource; | |
816 | else if (res->flags & IORESOURCE_IO) | |
817 | root = &ioport_resource; | |
818 | else | |
819 | continue; | |
820 | ||
727ae8be LJ |
821 | /* |
822 | * Some legacy x86 host bridge drivers use iomem_resource and | |
823 | * ioport_resource as default resource pool, skip it. | |
824 | */ | |
825 | if (res == root) | |
826 | continue; | |
827 | ||
2c204383 JL |
828 | conflict = insert_resource_conflict(root, res); |
829 | if (conflict) { | |
830 | dev_info(&info->bridge->dev, | |
831 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
832 | res, conflict->name, conflict); | |
833 | resource_list_destroy_entry(entry); | |
834 | } | |
835 | } | |
836 | } | |
837 | ||
838 | static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info) | |
839 | { | |
840 | struct resource *res; | |
841 | struct resource_entry *entry, *tmp; | |
842 | ||
843 | if (!info) | |
844 | return; | |
845 | ||
846 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
847 | res = entry->res; | |
848 | if (res->parent && | |
849 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
850 | release_resource(res); | |
851 | resource_list_destroy_entry(entry); | |
852 | } | |
853 | ||
854 | info->ops->release_info(info); | |
855 | } | |
856 | ||
857 | static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) | |
858 | { | |
859 | struct resource *res; | |
860 | struct resource_entry *entry; | |
861 | ||
862 | resource_list_for_each_entry(entry, &bridge->windows) { | |
863 | res = entry->res; | |
0a70abb3 J |
864 | if (res->flags & IORESOURCE_IO) |
865 | pci_unmap_iospace(res); | |
2c204383 JL |
866 | if (res->parent && |
867 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
868 | release_resource(res); | |
869 | } | |
870 | __acpi_pci_root_release_info(bridge->release_data); | |
871 | } | |
872 | ||
873 | struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, | |
874 | struct acpi_pci_root_ops *ops, | |
875 | struct acpi_pci_root_info *info, | |
876 | void *sysdata) | |
877 | { | |
878 | int ret, busnum = root->secondary.start; | |
879 | struct acpi_device *device = root->device; | |
880 | int node = acpi_get_node(device->handle); | |
881 | struct pci_bus *bus; | |
02bfeb48 | 882 | struct pci_host_bridge *host_bridge; |
a78cf965 | 883 | union acpi_object *obj; |
2c204383 JL |
884 | |
885 | info->root = root; | |
886 | info->bridge = device; | |
887 | info->ops = ops; | |
888 | INIT_LIST_HEAD(&info->resources); | |
889 | snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x", | |
890 | root->segment, busnum); | |
891 | ||
892 | if (ops->init_info && ops->init_info(info)) | |
893 | goto out_release_info; | |
894 | if (ops->prepare_resources) | |
895 | ret = ops->prepare_resources(info); | |
896 | else | |
897 | ret = acpi_pci_probe_root_resources(info); | |
898 | if (ret < 0) | |
899 | goto out_release_info; | |
900 | ||
901 | pci_acpi_root_add_resources(info); | |
902 | pci_add_resource(&info->resources, &root->secondary); | |
903 | bus = pci_create_root_bus(NULL, busnum, ops->pci_ops, | |
904 | sysdata, &info->resources); | |
905 | if (!bus) | |
906 | goto out_release_info; | |
907 | ||
02bfeb48 BH |
908 | host_bridge = to_pci_host_bridge(bus->bridge); |
909 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) | |
9310f0dc | 910 | host_bridge->native_pcie_hotplug = 0; |
1df81a6d MW |
911 | if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) |
912 | host_bridge->native_shpc_hotplug = 0; | |
02bfeb48 BH |
913 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) |
914 | host_bridge->native_aer = 0; | |
915 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) | |
916 | host_bridge->native_pme = 0; | |
af8bb9f8 BH |
917 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) |
918 | host_bridge->native_ltr = 0; | |
02bfeb48 | 919 | |
a78cf965 BH |
920 | /* |
921 | * Evaluate the "PCI Boot Configuration" _DSM Function. If it | |
922 | * exists and returns 0, we must preserve any PCI resource | |
923 | * assignments made by firmware for this host bridge. | |
924 | */ | |
925 | obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1, | |
926 | IGNORE_PCI_BOOT_CONFIG_DSM, NULL); | |
927 | if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0) | |
928 | host_bridge->preserve_config = 1; | |
929 | ACPI_FREE(obj); | |
930 | ||
2c204383 | 931 | pci_scan_child_bus(bus); |
02bfeb48 BH |
932 | pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info, |
933 | info); | |
2c204383 JL |
934 | if (node != NUMA_NO_NODE) |
935 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); | |
936 | return bus; | |
937 | ||
938 | out_release_info: | |
939 | __acpi_pci_root_release_info(info); | |
940 | return NULL; | |
941 | } | |
942 | ||
00c43b96 | 943 | void __init acpi_pci_root_init(void) |
1da177e4 | 944 | { |
d3072e6a | 945 | acpi_hest_init(); |
3338db00 | 946 | if (acpi_pci_disabled) |
668192b6 | 947 | return; |
668192b6 | 948 | |
3338db00 RW |
949 | pci_acpi_crs_quirks(); |
950 | acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); | |
668192b6 | 951 | } |