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1da177e4 LT |
1 | /* |
2 | * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $) | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or (at | |
12 | * your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
1da177e4 LT |
19 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/types.h> | |
d0020f65 | 26 | #include <linux/mutex.h> |
1da177e4 | 27 | #include <linux/pm.h> |
b67ea761 | 28 | #include <linux/pm_runtime.h> |
1da177e4 | 29 | #include <linux/pci.h> |
990a7ac5 | 30 | #include <linux/pci-acpi.h> |
eca67315 | 31 | #include <linux/pci-aspm.h> |
864b94ad | 32 | #include <linux/dmar.h> |
1da177e4 | 33 | #include <linux/acpi.h> |
5a0e3ad6 | 34 | #include <linux/slab.h> |
7bc5a2ba | 35 | #include <linux/dmi.h> |
630b3aff | 36 | #include <linux/platform_data/x86/apple.h> |
8b48463f | 37 | #include <acpi/apei.h> /* for acpi_hest_init() */ |
1da177e4 | 38 | |
ace8238b RW |
39 | #include "internal.h" |
40 | ||
1da177e4 | 41 | #define _COMPONENT ACPI_PCI_COMPONENT |
f52fd66d | 42 | ACPI_MODULE_NAME("pci_root"); |
1da177e4 | 43 | #define ACPI_PCI_ROOT_CLASS "pci_bridge" |
1da177e4 | 44 | #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge" |
00c43b96 RW |
45 | static int acpi_pci_root_add(struct acpi_device *device, |
46 | const struct acpi_device_id *not_used); | |
47 | static void acpi_pci_root_remove(struct acpi_device *device); | |
1da177e4 | 48 | |
3338db00 RW |
49 | static int acpi_pci_root_scan_dependent(struct acpi_device *adev) |
50 | { | |
1f7c164b | 51 | acpiphp_check_host_bridge(adev); |
3338db00 RW |
52 | return 0; |
53 | } | |
54 | ||
7dab9ef4 BH |
55 | #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \ |
56 | | OSC_PCI_ASPM_SUPPORT \ | |
57 | | OSC_PCI_CLOCK_PM_SUPPORT \ | |
58 | | OSC_PCI_MSI_SUPPORT) | |
415e12b2 | 59 | |
c97adf9e | 60 | static const struct acpi_device_id root_device_ids[] = { |
1ba90e3a TR |
61 | {"PNP0A03", 0}, |
62 | {"", 0}, | |
63 | }; | |
1ba90e3a | 64 | |
00c43b96 | 65 | static struct acpi_scan_handler pci_root_handler = { |
1ba90e3a | 66 | .ids = root_device_ids, |
00c43b96 RW |
67 | .attach = acpi_pci_root_add, |
68 | .detach = acpi_pci_root_remove, | |
ca499fc8 | 69 | .hotplug = { |
3338db00 RW |
70 | .enabled = true, |
71 | .scan_dependent = acpi_pci_root_scan_dependent, | |
ca499fc8 | 72 | }, |
1da177e4 LT |
73 | }; |
74 | ||
63f10f0f | 75 | static DEFINE_MUTEX(osc_lock); |
1da177e4 | 76 | |
27558203 AC |
77 | /** |
78 | * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge | |
79 | * @handle - the ACPI CA node in question. | |
80 | * | |
81 | * Note: we could make this API take a struct acpi_device * instead, but | |
82 | * for now, it's more convenient to operate on an acpi_handle. | |
83 | */ | |
84 | int acpi_is_root_bridge(acpi_handle handle) | |
85 | { | |
86 | int ret; | |
87 | struct acpi_device *device; | |
88 | ||
89 | ret = acpi_bus_get_device(handle, &device); | |
90 | if (ret) | |
91 | return 0; | |
92 | ||
93 | ret = acpi_match_device_ids(device, root_device_ids); | |
94 | if (ret) | |
95 | return 0; | |
96 | else | |
97 | return 1; | |
98 | } | |
99 | EXPORT_SYMBOL_GPL(acpi_is_root_bridge); | |
100 | ||
1da177e4 | 101 | static acpi_status |
4be44fcd | 102 | get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data) |
1da177e4 | 103 | { |
6ad95513 | 104 | struct resource *res = data; |
1da177e4 | 105 | struct acpi_resource_address64 address; |
f6c1c8ff | 106 | acpi_status status; |
1da177e4 | 107 | |
f6c1c8ff BH |
108 | status = acpi_resource_to_address64(resource, &address); |
109 | if (ACPI_FAILURE(status)) | |
1da177e4 LT |
110 | return AE_OK; |
111 | ||
a45de93e | 112 | if ((address.address.address_length > 0) && |
6ad95513 | 113 | (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { |
a45de93e LZ |
114 | res->start = address.address.minimum; |
115 | res->end = address.address.minimum + address.address.address_length - 1; | |
6ad95513 | 116 | } |
1da177e4 LT |
117 | |
118 | return AE_OK; | |
119 | } | |
120 | ||
f5eebbe1 | 121 | static acpi_status try_get_root_bridge_busnr(acpi_handle handle, |
6ad95513 | 122 | struct resource *res) |
1da177e4 LT |
123 | { |
124 | acpi_status status; | |
125 | ||
6ad95513 | 126 | res->start = -1; |
4be44fcd LB |
127 | status = |
128 | acpi_walk_resources(handle, METHOD_NAME__CRS, | |
6ad95513 | 129 | get_root_bridge_busnr_callback, res); |
1da177e4 LT |
130 | if (ACPI_FAILURE(status)) |
131 | return status; | |
6ad95513 | 132 | if (res->start == -1) |
1da177e4 LT |
133 | return AE_ERROR; |
134 | return AE_OK; | |
135 | } | |
136 | ||
955f14b4 BH |
137 | struct pci_osc_bit_struct { |
138 | u32 bit; | |
139 | char *desc; | |
140 | }; | |
141 | ||
142 | static struct pci_osc_bit_struct pci_osc_support_bit[] = { | |
143 | { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" }, | |
144 | { OSC_PCI_ASPM_SUPPORT, "ASPM" }, | |
145 | { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" }, | |
146 | { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" }, | |
147 | { OSC_PCI_MSI_SUPPORT, "MSI" }, | |
148 | }; | |
149 | ||
150 | static struct pci_osc_bit_struct pci_osc_control_bit[] = { | |
151 | { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" }, | |
152 | { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" }, | |
153 | { OSC_PCI_EXPRESS_PME_CONTROL, "PME" }, | |
154 | { OSC_PCI_EXPRESS_AER_CONTROL, "AER" }, | |
155 | { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" }, | |
af8bb9f8 | 156 | { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" }, |
955f14b4 BH |
157 | }; |
158 | ||
159 | static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, | |
160 | struct pci_osc_bit_struct *table, int size) | |
161 | { | |
162 | char buf[80]; | |
163 | int i, len = 0; | |
164 | struct pci_osc_bit_struct *entry; | |
165 | ||
166 | buf[0] = '\0'; | |
167 | for (i = 0, entry = table; i < size; i++, entry++) | |
168 | if (word & entry->bit) | |
169 | len += snprintf(buf + len, sizeof(buf) - len, "%s%s", | |
170 | len ? " " : "", entry->desc); | |
171 | ||
172 | dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf); | |
173 | } | |
174 | ||
175 | static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word) | |
176 | { | |
177 | decode_osc_bits(root, msg, word, pci_osc_support_bit, | |
178 | ARRAY_SIZE(pci_osc_support_bit)); | |
179 | } | |
180 | ||
181 | static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word) | |
182 | { | |
183 | decode_osc_bits(root, msg, word, pci_osc_control_bit, | |
184 | ARRAY_SIZE(pci_osc_control_bit)); | |
185 | } | |
186 | ||
3a9622dc | 187 | static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766"; |
63f10f0f KK |
188 | |
189 | static acpi_status acpi_pci_run_osc(acpi_handle handle, | |
190 | const u32 *capbuf, u32 *retval) | |
191 | { | |
3a9622dc SL |
192 | struct acpi_osc_context context = { |
193 | .uuid_str = pci_osc_uuid_str, | |
194 | .rev = 1, | |
195 | .cap.length = 12, | |
196 | .cap.pointer = (void *)capbuf, | |
197 | }; | |
63f10f0f | 198 | acpi_status status; |
63f10f0f | 199 | |
3a9622dc SL |
200 | status = acpi_run_osc(handle, &context); |
201 | if (ACPI_SUCCESS(status)) { | |
202 | *retval = *((u32 *)(context.ret.pointer + 8)); | |
203 | kfree(context.ret.pointer); | |
63f10f0f | 204 | } |
63f10f0f KK |
205 | return status; |
206 | } | |
207 | ||
ab8e8957 RW |
208 | static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, |
209 | u32 support, | |
210 | u32 *control) | |
63f10f0f KK |
211 | { |
212 | acpi_status status; | |
ab8e8957 RW |
213 | u32 result, capbuf[3]; |
214 | ||
215 | support &= OSC_PCI_SUPPORT_MASKS; | |
216 | support |= root->osc_support_set; | |
63f10f0f | 217 | |
b938a229 BH |
218 | capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; |
219 | capbuf[OSC_SUPPORT_DWORD] = support; | |
ab8e8957 RW |
220 | if (control) { |
221 | *control &= OSC_PCI_CONTROL_MASKS; | |
b938a229 | 222 | capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set; |
ab8e8957 | 223 | } else { |
545d6e18 | 224 | /* Run _OSC query only with existing controls. */ |
b938a229 | 225 | capbuf[OSC_CONTROL_DWORD] = root->osc_control_set; |
ab8e8957 | 226 | } |
63f10f0f KK |
227 | |
228 | status = acpi_pci_run_osc(root->device->handle, capbuf, &result); | |
229 | if (ACPI_SUCCESS(status)) { | |
ab8e8957 | 230 | root->osc_support_set = support; |
2b8fd918 | 231 | if (control) |
ab8e8957 | 232 | *control = result; |
63f10f0f KK |
233 | } |
234 | return status; | |
235 | } | |
236 | ||
237 | static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags) | |
238 | { | |
239 | acpi_status status; | |
63f10f0f | 240 | |
63f10f0f | 241 | mutex_lock(&osc_lock); |
ab8e8957 | 242 | status = acpi_pci_query_osc(root, flags, NULL); |
63f10f0f KK |
243 | mutex_unlock(&osc_lock); |
244 | return status; | |
245 | } | |
246 | ||
76d56de5 | 247 | struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) |
63f10f0f KK |
248 | { |
249 | struct acpi_pci_root *root; | |
cd4faf9c | 250 | struct acpi_device *device; |
c1aec834 | 251 | |
cd4faf9c TI |
252 | if (acpi_bus_get_device(handle, &device) || |
253 | acpi_match_device_ids(device, root_device_ids)) | |
254 | return NULL; | |
255 | ||
256 | root = acpi_driver_data(device); | |
257 | ||
258 | return root; | |
63f10f0f | 259 | } |
76d56de5 | 260 | EXPORT_SYMBOL_GPL(acpi_pci_find_root); |
63f10f0f | 261 | |
2f7bbceb AC |
262 | struct acpi_handle_node { |
263 | struct list_head node; | |
264 | acpi_handle handle; | |
265 | }; | |
266 | ||
267 | /** | |
268 | * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev | |
269 | * @handle: the handle in question | |
270 | * | |
271 | * Given an ACPI CA handle, the desired PCI device is located in the | |
272 | * list of PCI devices. | |
273 | * | |
274 | * If the device is found, its reference count is increased and this | |
275 | * function returns a pointer to its data structure. The caller must | |
276 | * decrement the reference count by calling pci_dev_put(). | |
277 | * If no device is found, %NULL is returned. | |
278 | */ | |
279 | struct pci_dev *acpi_get_pci_dev(acpi_handle handle) | |
280 | { | |
281 | int dev, fn; | |
282 | unsigned long long adr; | |
283 | acpi_status status; | |
284 | acpi_handle phandle; | |
285 | struct pci_bus *pbus; | |
286 | struct pci_dev *pdev = NULL; | |
287 | struct acpi_handle_node *node, *tmp; | |
288 | struct acpi_pci_root *root; | |
289 | LIST_HEAD(device_list); | |
290 | ||
291 | /* | |
292 | * Walk up the ACPI CA namespace until we reach a PCI root bridge. | |
293 | */ | |
294 | phandle = handle; | |
295 | while (!acpi_is_root_bridge(phandle)) { | |
296 | node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL); | |
297 | if (!node) | |
298 | goto out; | |
299 | ||
300 | INIT_LIST_HEAD(&node->node); | |
301 | node->handle = phandle; | |
302 | list_add(&node->node, &device_list); | |
303 | ||
304 | status = acpi_get_parent(phandle, &phandle); | |
305 | if (ACPI_FAILURE(status)) | |
306 | goto out; | |
307 | } | |
308 | ||
309 | root = acpi_pci_find_root(phandle); | |
310 | if (!root) | |
311 | goto out; | |
312 | ||
313 | pbus = root->bus; | |
314 | ||
315 | /* | |
316 | * Now, walk back down the PCI device tree until we return to our | |
317 | * original handle. Assumes that everything between the PCI root | |
318 | * bridge and the device we're looking for must be a P2P bridge. | |
319 | */ | |
320 | list_for_each_entry(node, &device_list, node) { | |
321 | acpi_handle hnd = node->handle; | |
322 | status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr); | |
323 | if (ACPI_FAILURE(status)) | |
324 | goto out; | |
325 | dev = (adr >> 16) & 0xffff; | |
326 | fn = adr & 0xffff; | |
327 | ||
328 | pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); | |
412af978 | 329 | if (!pdev || hnd == handle) |
2f7bbceb AC |
330 | break; |
331 | ||
332 | pbus = pdev->subordinate; | |
333 | pci_dev_put(pdev); | |
497fb54f RW |
334 | |
335 | /* | |
336 | * This function may be called for a non-PCI device that has a | |
337 | * PCI parent (eg. a disk under a PCI SATA controller). In that | |
338 | * case pdev->subordinate will be NULL for the parent. | |
339 | */ | |
340 | if (!pbus) { | |
341 | dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); | |
342 | pdev = NULL; | |
343 | break; | |
344 | } | |
2f7bbceb AC |
345 | } |
346 | out: | |
347 | list_for_each_entry_safe(node, tmp, &device_list, node) | |
348 | kfree(node); | |
349 | ||
350 | return pdev; | |
351 | } | |
352 | EXPORT_SYMBOL_GPL(acpi_get_pci_dev); | |
353 | ||
63f10f0f | 354 | /** |
75fb60f2 RW |
355 | * acpi_pci_osc_control_set - Request control of PCI root _OSC features. |
356 | * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex). | |
357 | * @mask: Mask of _OSC bits to request control of, place to store control mask. | |
358 | * @req: Mask of _OSC bits the control of is essential to the caller. | |
63f10f0f | 359 | * |
75fb60f2 RW |
360 | * Run _OSC query for @mask and if that is successful, compare the returned |
361 | * mask of control bits with @req. If all of the @req bits are set in the | |
362 | * returned mask, run _OSC request for it. | |
363 | * | |
364 | * The variable at the @mask address may be modified regardless of whether or | |
365 | * not the function returns success. On success it will contain the mask of | |
366 | * _OSC bits the BIOS has granted control of, but its contents are meaningless | |
367 | * on failure. | |
63f10f0f | 368 | **/ |
75fb60f2 | 369 | acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req) |
63f10f0f | 370 | { |
75fb60f2 | 371 | struct acpi_pci_root *root; |
4ffe6e54 | 372 | acpi_status status = AE_OK; |
75fb60f2 | 373 | u32 ctrl, capbuf[3]; |
63f10f0f | 374 | |
75fb60f2 RW |
375 | if (!mask) |
376 | return AE_BAD_PARAMETER; | |
377 | ||
378 | ctrl = *mask & OSC_PCI_CONTROL_MASKS; | |
379 | if ((ctrl & req) != req) | |
63f10f0f KK |
380 | return AE_TYPE; |
381 | ||
382 | root = acpi_pci_find_root(handle); | |
383 | if (!root) | |
384 | return AE_NOT_EXIST; | |
385 | ||
386 | mutex_lock(&osc_lock); | |
75fb60f2 RW |
387 | |
388 | *mask = ctrl | root->osc_control_set; | |
63f10f0f | 389 | /* No need to evaluate _OSC if the control was already granted. */ |
75fb60f2 | 390 | if ((root->osc_control_set & ctrl) == ctrl) |
63f10f0f KK |
391 | goto out; |
392 | ||
75fb60f2 RW |
393 | /* Need to check the available controls bits before requesting them. */ |
394 | while (*mask) { | |
395 | status = acpi_pci_query_osc(root, root->osc_support_set, mask); | |
396 | if (ACPI_FAILURE(status)) | |
397 | goto out; | |
398 | if (ctrl == *mask) | |
399 | break; | |
955f14b4 BH |
400 | decode_osc_control(root, "platform does not support", |
401 | ctrl & ~(*mask)); | |
75fb60f2 RW |
402 | ctrl = *mask; |
403 | } | |
2b8fd918 | 404 | |
75fb60f2 | 405 | if ((ctrl & req) != req) { |
955f14b4 BH |
406 | decode_osc_control(root, "not requesting control; platform does not support", |
407 | req & ~(ctrl)); | |
63f10f0f KK |
408 | status = AE_SUPPORT; |
409 | goto out; | |
410 | } | |
411 | ||
b938a229 BH |
412 | capbuf[OSC_QUERY_DWORD] = 0; |
413 | capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set; | |
414 | capbuf[OSC_CONTROL_DWORD] = ctrl; | |
75fb60f2 | 415 | status = acpi_pci_run_osc(handle, capbuf, mask); |
63f10f0f | 416 | if (ACPI_SUCCESS(status)) |
75fb60f2 | 417 | root->osc_control_set = *mask; |
63f10f0f KK |
418 | out: |
419 | mutex_unlock(&osc_lock); | |
420 | return status; | |
421 | } | |
9f5404d8 | 422 | EXPORT_SYMBOL(acpi_pci_osc_control_set); |
63f10f0f | 423 | |
c238252f SK |
424 | static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm, |
425 | bool is_pcie) | |
1da177e4 | 426 | { |
955f14b4 | 427 | u32 support, control, requested; |
3e43abb0 BH |
428 | acpi_status status; |
429 | struct acpi_device *device = root->device; | |
bfe2414a | 430 | acpi_handle handle = device->handle; |
1da177e4 | 431 | |
7bc5a2ba MG |
432 | /* |
433 | * Apple always return failure on _OSC calls when _OSI("Darwin") has | |
434 | * been called successfully. We know the feature set supported by the | |
435 | * platform, so avoid calling _OSC at all | |
436 | */ | |
630b3aff | 437 | if (x86_apple_machine) { |
7bc5a2ba MG |
438 | root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL; |
439 | decode_osc_control(root, "OS assumes control of", | |
440 | root->osc_control_set); | |
441 | return; | |
442 | } | |
443 | ||
2786f6e3 | 444 | /* |
990a7ac5 AP |
445 | * All supported architectures that use ACPI have support for |
446 | * PCI domains, so we indicate this in _OSC support capabilities. | |
2786f6e3 | 447 | */ |
65afe916 | 448 | support = OSC_PCI_SEGMENT_GROUPS_SUPPORT; |
8c33f51d | 449 | if (pci_ext_cfg_avail()) |
b8eb67fc | 450 | support |= OSC_PCI_EXT_CONFIG_SUPPORT; |
1b2a7be6 | 451 | if (pcie_aspm_support_enabled()) |
b8eb67fc | 452 | support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; |
07ae95f9 | 453 | if (pci_msi_enabled()) |
b8eb67fc | 454 | support |= OSC_PCI_MSI_SUPPORT; |
955f14b4 BH |
455 | |
456 | decode_osc_support(root, "OS supports", support); | |
1b2a7be6 BH |
457 | status = acpi_pci_osc_support(root, support); |
458 | if (ACPI_FAILURE(status)) { | |
c238252f SK |
459 | *no_aspm = 1; |
460 | ||
461 | /* _OSC is optional for PCI host bridges */ | |
462 | if ((status == AE_NOT_FOUND) && !is_pcie) | |
463 | return; | |
464 | ||
1ad61b61 SK |
465 | dev_info(&device->dev, "_OSC failed (%s)%s\n", |
466 | acpi_format_exception(status), | |
467 | pcie_aspm_support_enabled() ? "; disabling ASPM" : ""); | |
65afe916 | 468 | return; |
2d9c8677 | 469 | } |
b8178f13 | 470 | |
43613a1f BH |
471 | if (pcie_ports_disabled) { |
472 | dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n"); | |
473 | return; | |
474 | } | |
475 | ||
de189662 | 476 | if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) { |
955f14b4 BH |
477 | decode_osc_support(root, "not requesting OS control; OS requires", |
478 | ACPI_PCIE_REQ_SUPPORT); | |
de189662 BH |
479 | return; |
480 | } | |
481 | ||
482 | control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL | |
de189662 BH |
483 | | OSC_PCI_EXPRESS_PME_CONTROL; |
484 | ||
af8bb9f8 BH |
485 | if (IS_ENABLED(CONFIG_PCIEASPM)) |
486 | control |= OSC_PCI_EXPRESS_LTR_CONTROL; | |
487 | ||
408fec36 MW |
488 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) |
489 | control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL; | |
490 | ||
1df81a6d MW |
491 | if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC)) |
492 | control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL; | |
493 | ||
de189662 BH |
494 | if (pci_aer_available()) { |
495 | if (aer_acpi_firmware_first()) | |
955f14b4 BH |
496 | dev_info(&device->dev, |
497 | "PCIe AER handled by firmware\n"); | |
de189662 BH |
498 | else |
499 | control |= OSC_PCI_EXPRESS_AER_CONTROL; | |
500 | } | |
415e12b2 | 501 | |
955f14b4 | 502 | requested = control; |
de189662 BH |
503 | status = acpi_pci_osc_control_set(handle, &control, |
504 | OSC_PCI_EXPRESS_CAPABILITY_CONTROL); | |
505 | if (ACPI_SUCCESS(status)) { | |
955f14b4 | 506 | decode_osc_control(root, "OS now controls", control); |
de189662 | 507 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
3dc48af3 | 508 | /* |
387d3757 MG |
509 | * We have ASPM control, but the FADT indicates that |
510 | * it's unsupported. Leave existing configuration | |
511 | * intact and prevent the OS from touching it. | |
3dc48af3 | 512 | */ |
387d3757 MG |
513 | dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n"); |
514 | *no_aspm = 1; | |
eca67315 | 515 | } |
a246670d | 516 | } else { |
955f14b4 BH |
517 | decode_osc_control(root, "OS requested", requested); |
518 | decode_osc_control(root, "platform willing to grant", control); | |
519 | dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", | |
520 | acpi_format_exception(status)); | |
521 | ||
de189662 BH |
522 | /* |
523 | * We want to disable ASPM here, but aspm_disabled | |
524 | * needs to remain in its state from boot so that we | |
525 | * properly handle PCIe 1.1 devices. So we set this | |
526 | * flag here, to defer the action until after the ACPI | |
527 | * root scan. | |
528 | */ | |
529 | *no_aspm = 1; | |
415e12b2 | 530 | } |
3e43abb0 BH |
531 | } |
532 | ||
00c43b96 RW |
533 | static int acpi_pci_root_add(struct acpi_device *device, |
534 | const struct acpi_device_id *not_used) | |
1da177e4 | 535 | { |
f5eebbe1 BH |
536 | unsigned long long segment, bus; |
537 | acpi_status status; | |
538 | int result; | |
539 | struct acpi_pci_root *root; | |
bfe2414a | 540 | acpi_handle handle = device->handle; |
387d3757 | 541 | int no_aspm = 0; |
9762b33d | 542 | bool hotadd = system_state == SYSTEM_RUNNING; |
c238252f | 543 | bool is_pcie; |
1da177e4 | 544 | |
6ad95513 BH |
545 | root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); |
546 | if (!root) | |
547 | return -ENOMEM; | |
548 | ||
f5eebbe1 | 549 | segment = 0; |
bfe2414a | 550 | status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, |
f5eebbe1 BH |
551 | &segment); |
552 | if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { | |
6dc7d22c | 553 | dev_err(&device->dev, "can't evaluate _SEG\n"); |
6ad95513 BH |
554 | result = -ENODEV; |
555 | goto end; | |
f5eebbe1 | 556 | } |
1da177e4 | 557 | |
f5eebbe1 | 558 | /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ |
6ad95513 | 559 | root->secondary.flags = IORESOURCE_BUS; |
bfe2414a | 560 | status = try_get_root_bridge_busnr(handle, &root->secondary); |
f5eebbe1 | 561 | if (ACPI_FAILURE(status)) { |
6ad95513 BH |
562 | /* |
563 | * We need both the start and end of the downstream bus range | |
564 | * to interpret _CBA (MMCONFIG base address), so it really is | |
565 | * supposed to be in _CRS. If we don't find it there, all we | |
566 | * can do is assume [_BBN-0xFF] or [0-0xFF]. | |
567 | */ | |
568 | root->secondary.end = 0xFF; | |
6dc7d22c JL |
569 | dev_warn(&device->dev, |
570 | FW_BUG "no secondary bus range in _CRS\n"); | |
bfe2414a | 571 | status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, |
e545b55a | 572 | NULL, &bus); |
6ad95513 BH |
573 | if (ACPI_SUCCESS(status)) |
574 | root->secondary.start = bus; | |
575 | else if (status == AE_NOT_FOUND) | |
576 | root->secondary.start = 0; | |
577 | else { | |
6dc7d22c | 578 | dev_err(&device->dev, "can't evaluate _BBN\n"); |
6ad95513 BH |
579 | result = -ENODEV; |
580 | goto end; | |
f5eebbe1 BH |
581 | } |
582 | } | |
1da177e4 | 583 | |
32917e5b | 584 | root->device = device; |
0705495d | 585 | root->segment = segment & 0xFFFF; |
1da177e4 LT |
586 | strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); |
587 | strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); | |
db89b4f0 | 588 | device->driver_data = root; |
1da177e4 | 589 | |
864b94ad JL |
590 | if (hotadd && dmar_device_add(handle)) { |
591 | result = -ENXIO; | |
592 | goto end; | |
593 | } | |
594 | ||
6dc7d22c | 595 | pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", |
4be44fcd | 596 | acpi_device_name(device), acpi_device_bid(device), |
6ad95513 | 597 | root->segment, &root->secondary); |
1da177e4 | 598 | |
bfe2414a | 599 | root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); |
1da177e4 | 600 | |
c238252f SK |
601 | is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0; |
602 | negotiate_os_control(root, &no_aspm, is_pcie); | |
415e12b2 | 603 | |
3dc48af3 NH |
604 | /* |
605 | * TBD: Need PCI interface for enumeration/configuration of roots. | |
606 | */ | |
607 | ||
608 | /* | |
609 | * Scan the Root Bridge | |
610 | * -------------------- | |
611 | * Must do this prior to any attempt to bind the root device, as the | |
612 | * PCI namespace does not get created until this call is made (and | |
613 | * thus the root bridge's pci_dev does not exist). | |
614 | */ | |
615 | root->bus = pci_acpi_scan_root(root); | |
616 | if (!root->bus) { | |
617 | dev_err(&device->dev, | |
618 | "Bus %04x:%02x not present in PCI namespace\n", | |
619 | root->segment, (unsigned int)root->secondary.start); | |
f516bde5 | 620 | device->driver_data = NULL; |
3dc48af3 | 621 | result = -ENODEV; |
864b94ad | 622 | goto remove_dmar; |
3dc48af3 NH |
623 | } |
624 | ||
3dc48af3 NH |
625 | if (no_aspm) |
626 | pcie_no_aspm(); | |
627 | ||
c072530f | 628 | pci_acpi_add_bus_pm_notifier(device); |
de3ef1eb | 629 | device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid); |
b67ea761 | 630 | |
864b94ad | 631 | if (hotadd) { |
3c449ed0 | 632 | pcibios_resource_survey_bus(root->bus); |
39772038 | 633 | pci_assign_unassigned_root_bus_resources(root->bus); |
584c5c42 RW |
634 | /* |
635 | * This is only called for the hotadd case. For the boot-time | |
636 | * case, we need to wait until after PCI initialization in | |
637 | * order to deal with IOAPICs mapped in on a PCI BAR. | |
638 | * | |
639 | * This is currently x86-specific, because acpi_ioapic_add() | |
640 | * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC. | |
641 | * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC | |
642 | * (see drivers/acpi/Kconfig). | |
643 | */ | |
fe7bd58f | 644 | acpi_ioapic_add(root->device->handle); |
516ca223 | 645 | } |
62a08c5a | 646 | |
7a3bb55e | 647 | pci_lock_rescan_remove(); |
caf420c6 | 648 | pci_bus_add_devices(root->bus); |
7a3bb55e | 649 | pci_unlock_rescan_remove(); |
00c43b96 | 650 | return 1; |
47525cda | 651 | |
864b94ad JL |
652 | remove_dmar: |
653 | if (hotadd) | |
654 | dmar_device_remove(handle); | |
47525cda RW |
655 | end: |
656 | kfree(root); | |
657 | return result; | |
c431ada4 | 658 | } |
1da177e4 | 659 | |
00c43b96 | 660 | static void acpi_pci_root_remove(struct acpi_device *device) |
1da177e4 | 661 | { |
caf420c6 | 662 | struct acpi_pci_root *root = acpi_driver_data(device); |
c8e9afb1 | 663 | |
7a3bb55e RW |
664 | pci_lock_rescan_remove(); |
665 | ||
9738a1fd YL |
666 | pci_stop_root_bus(root->bus); |
667 | ||
f2ae5da7 | 668 | pci_ioapic_remove(root); |
de3ef1eb | 669 | device_set_wakeup_capable(root->bus->bridge, false); |
b67ea761 RW |
670 | pci_acpi_remove_bus_pm_notifier(device); |
671 | ||
9738a1fd | 672 | pci_remove_root_bus(root->bus); |
f2ae5da7 | 673 | WARN_ON(acpi_ioapic_remove(root)); |
9738a1fd | 674 | |
864b94ad JL |
675 | dmar_device_remove(device->handle); |
676 | ||
7a3bb55e RW |
677 | pci_unlock_rescan_remove(); |
678 | ||
1da177e4 | 679 | kfree(root); |
1da177e4 LT |
680 | } |
681 | ||
2c204383 JL |
682 | /* |
683 | * Following code to support acpi_pci_root_create() is copied from | |
684 | * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64 | |
685 | * and ARM64. | |
686 | */ | |
687 | static void acpi_pci_root_validate_resources(struct device *dev, | |
688 | struct list_head *resources, | |
689 | unsigned long type) | |
690 | { | |
691 | LIST_HEAD(list); | |
692 | struct resource *res1, *res2, *root = NULL; | |
693 | struct resource_entry *tmp, *entry, *entry2; | |
694 | ||
695 | BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0); | |
696 | root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource; | |
697 | ||
698 | list_splice_init(resources, &list); | |
699 | resource_list_for_each_entry_safe(entry, tmp, &list) { | |
700 | bool free = false; | |
701 | resource_size_t end; | |
702 | ||
703 | res1 = entry->res; | |
704 | if (!(res1->flags & type)) | |
705 | goto next; | |
706 | ||
707 | /* Exclude non-addressable range or non-addressable portion */ | |
708 | end = min(res1->end, root->end); | |
709 | if (end <= res1->start) { | |
710 | dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n", | |
711 | res1); | |
712 | free = true; | |
713 | goto next; | |
714 | } else if (res1->end != end) { | |
715 | dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n", | |
716 | res1, (unsigned long long)end + 1, | |
717 | (unsigned long long)res1->end); | |
718 | res1->end = end; | |
719 | } | |
720 | ||
721 | resource_list_for_each_entry(entry2, resources) { | |
722 | res2 = entry2->res; | |
723 | if (!(res2->flags & type)) | |
724 | continue; | |
725 | ||
726 | /* | |
727 | * I don't like throwing away windows because then | |
728 | * our resources no longer match the ACPI _CRS, but | |
729 | * the kernel resource tree doesn't allow overlaps. | |
730 | */ | |
731 | if (resource_overlaps(res1, res2)) { | |
732 | res2->start = min(res1->start, res2->start); | |
733 | res2->end = max(res1->end, res2->end); | |
734 | dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n", | |
735 | res2, res1); | |
736 | free = true; | |
737 | goto next; | |
738 | } | |
739 | } | |
740 | ||
741 | next: | |
742 | resource_list_del(entry); | |
743 | if (free) | |
744 | resource_list_free_entry(entry); | |
745 | else | |
746 | resource_list_add_tail(entry, resources); | |
747 | } | |
748 | } | |
749 | ||
fcfaab30 GP |
750 | static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode, |
751 | struct resource_entry *entry) | |
0a70abb3 J |
752 | { |
753 | #ifdef PCI_IOBASE | |
754 | struct resource *res = entry->res; | |
755 | resource_size_t cpu_addr = res->start; | |
756 | resource_size_t pci_addr = cpu_addr - entry->offset; | |
757 | resource_size_t length = resource_size(res); | |
758 | unsigned long port; | |
759 | ||
fcfaab30 | 760 | if (pci_register_io_range(fwnode, cpu_addr, length)) |
0a70abb3 J |
761 | goto err; |
762 | ||
763 | port = pci_address_to_pio(cpu_addr); | |
764 | if (port == (unsigned long)-1) | |
765 | goto err; | |
766 | ||
767 | res->start = port; | |
768 | res->end = port + length - 1; | |
769 | entry->offset = port - pci_addr; | |
770 | ||
771 | if (pci_remap_iospace(res, cpu_addr) < 0) | |
772 | goto err; | |
773 | ||
774 | pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); | |
775 | return; | |
776 | err: | |
777 | res->flags |= IORESOURCE_DISABLED; | |
778 | #endif | |
779 | } | |
780 | ||
2c204383 JL |
781 | int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) |
782 | { | |
783 | int ret; | |
784 | struct list_head *list = &info->resources; | |
785 | struct acpi_device *device = info->bridge; | |
786 | struct resource_entry *entry, *tmp; | |
787 | unsigned long flags; | |
788 | ||
789 | flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT; | |
790 | ret = acpi_dev_get_resources(device, list, | |
791 | acpi_dev_filter_resource_type_cb, | |
792 | (void *)flags); | |
793 | if (ret < 0) | |
794 | dev_warn(&device->dev, | |
795 | "failed to parse _CRS method, error code %d\n", ret); | |
796 | else if (ret == 0) | |
797 | dev_dbg(&device->dev, | |
798 | "no IO and memory resources present in _CRS\n"); | |
799 | else { | |
800 | resource_list_for_each_entry_safe(entry, tmp, list) { | |
0a70abb3 | 801 | if (entry->res->flags & IORESOURCE_IO) |
fcfaab30 GP |
802 | acpi_pci_root_remap_iospace(&device->fwnode, |
803 | entry); | |
0a70abb3 | 804 | |
2c204383 JL |
805 | if (entry->res->flags & IORESOURCE_DISABLED) |
806 | resource_list_destroy_entry(entry); | |
807 | else | |
808 | entry->res->name = info->name; | |
809 | } | |
810 | acpi_pci_root_validate_resources(&device->dev, list, | |
811 | IORESOURCE_MEM); | |
812 | acpi_pci_root_validate_resources(&device->dev, list, | |
813 | IORESOURCE_IO); | |
814 | } | |
815 | ||
816 | return ret; | |
817 | } | |
818 | ||
819 | static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info) | |
820 | { | |
821 | struct resource_entry *entry, *tmp; | |
822 | struct resource *res, *conflict, *root = NULL; | |
823 | ||
824 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
825 | res = entry->res; | |
826 | if (res->flags & IORESOURCE_MEM) | |
827 | root = &iomem_resource; | |
828 | else if (res->flags & IORESOURCE_IO) | |
829 | root = &ioport_resource; | |
830 | else | |
831 | continue; | |
832 | ||
727ae8be LJ |
833 | /* |
834 | * Some legacy x86 host bridge drivers use iomem_resource and | |
835 | * ioport_resource as default resource pool, skip it. | |
836 | */ | |
837 | if (res == root) | |
838 | continue; | |
839 | ||
2c204383 JL |
840 | conflict = insert_resource_conflict(root, res); |
841 | if (conflict) { | |
842 | dev_info(&info->bridge->dev, | |
843 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
844 | res, conflict->name, conflict); | |
845 | resource_list_destroy_entry(entry); | |
846 | } | |
847 | } | |
848 | } | |
849 | ||
850 | static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info) | |
851 | { | |
852 | struct resource *res; | |
853 | struct resource_entry *entry, *tmp; | |
854 | ||
855 | if (!info) | |
856 | return; | |
857 | ||
858 | resource_list_for_each_entry_safe(entry, tmp, &info->resources) { | |
859 | res = entry->res; | |
860 | if (res->parent && | |
861 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
862 | release_resource(res); | |
863 | resource_list_destroy_entry(entry); | |
864 | } | |
865 | ||
866 | info->ops->release_info(info); | |
867 | } | |
868 | ||
869 | static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) | |
870 | { | |
871 | struct resource *res; | |
872 | struct resource_entry *entry; | |
873 | ||
874 | resource_list_for_each_entry(entry, &bridge->windows) { | |
875 | res = entry->res; | |
0a70abb3 J |
876 | if (res->flags & IORESOURCE_IO) |
877 | pci_unmap_iospace(res); | |
2c204383 JL |
878 | if (res->parent && |
879 | (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
880 | release_resource(res); | |
881 | } | |
882 | __acpi_pci_root_release_info(bridge->release_data); | |
883 | } | |
884 | ||
885 | struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, | |
886 | struct acpi_pci_root_ops *ops, | |
887 | struct acpi_pci_root_info *info, | |
888 | void *sysdata) | |
889 | { | |
890 | int ret, busnum = root->secondary.start; | |
891 | struct acpi_device *device = root->device; | |
892 | int node = acpi_get_node(device->handle); | |
893 | struct pci_bus *bus; | |
02bfeb48 | 894 | struct pci_host_bridge *host_bridge; |
2c204383 JL |
895 | |
896 | info->root = root; | |
897 | info->bridge = device; | |
898 | info->ops = ops; | |
899 | INIT_LIST_HEAD(&info->resources); | |
900 | snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x", | |
901 | root->segment, busnum); | |
902 | ||
903 | if (ops->init_info && ops->init_info(info)) | |
904 | goto out_release_info; | |
905 | if (ops->prepare_resources) | |
906 | ret = ops->prepare_resources(info); | |
907 | else | |
908 | ret = acpi_pci_probe_root_resources(info); | |
909 | if (ret < 0) | |
910 | goto out_release_info; | |
911 | ||
912 | pci_acpi_root_add_resources(info); | |
913 | pci_add_resource(&info->resources, &root->secondary); | |
914 | bus = pci_create_root_bus(NULL, busnum, ops->pci_ops, | |
915 | sysdata, &info->resources); | |
916 | if (!bus) | |
917 | goto out_release_info; | |
918 | ||
02bfeb48 BH |
919 | host_bridge = to_pci_host_bridge(bus->bridge); |
920 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) | |
9310f0dc | 921 | host_bridge->native_pcie_hotplug = 0; |
1df81a6d MW |
922 | if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) |
923 | host_bridge->native_shpc_hotplug = 0; | |
02bfeb48 BH |
924 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) |
925 | host_bridge->native_aer = 0; | |
926 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) | |
927 | host_bridge->native_pme = 0; | |
af8bb9f8 BH |
928 | if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) |
929 | host_bridge->native_ltr = 0; | |
02bfeb48 | 930 | |
2c204383 | 931 | pci_scan_child_bus(bus); |
02bfeb48 BH |
932 | pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info, |
933 | info); | |
2c204383 JL |
934 | if (node != NUMA_NO_NODE) |
935 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); | |
936 | return bus; | |
937 | ||
938 | out_release_info: | |
939 | __acpi_pci_root_release_info(info); | |
940 | return NULL; | |
941 | } | |
942 | ||
00c43b96 | 943 | void __init acpi_pci_root_init(void) |
1da177e4 | 944 | { |
d3072e6a | 945 | acpi_hest_init(); |
3338db00 | 946 | if (acpi_pci_disabled) |
668192b6 | 947 | return; |
668192b6 | 948 | |
3338db00 RW |
949 | pci_acpi_crs_quirks(); |
950 | acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); | |
668192b6 | 951 | } |