[linux-2.6-block.git] / drivers / acpi / nfit / nfit.h

/*
 * NVDIMM Firmware Interface Table - NFIT
 *
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */
#ifndef __NFIT_H__
#define __NFIT_H__
#include <linux/workqueue.h>
#include <linux/libnvdimm.h>
#include <linux/ndctl.h>
#include <linux/types.h>
#include <linux/acpi.h>
#include <acpi/acuuid.h>

/* ACPI 6.1 */
#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"

/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"

/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"

/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"

#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
		| ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
		| ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)

#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_MSFT

#define NVDIMM_STANDARD_CMDMASK \
(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)

/*
 * Command numbers that the kernel needs to know about to handle
 * non-default DSM revision ids
 */
enum nvdimm_family_cmds {
	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
	NVDIMM_INTEL_GET_MODES = 11,
	NVDIMM_INTEL_GET_FWINFO = 12,
	NVDIMM_INTEL_START_FWUPDATE = 13,
	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	NVDIMM_INTEL_SET_THRESHOLD = 17,
	NVDIMM_INTEL_INJECT_ERROR = 18,
	NVDIMM_INTEL_GET_SECURITY_STATE = 19,
	NVDIMM_INTEL_SET_PASSPHRASE = 20,
	NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
	NVDIMM_INTEL_UNLOCK_UNIT = 22,
	NVDIMM_INTEL_FREEZE_LOCK = 23,
	NVDIMM_INTEL_SECURE_ERASE = 24,
	NVDIMM_INTEL_OVERWRITE = 25,
	NVDIMM_INTEL_QUERY_OVERWRITE = 26,
	NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
	NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
};

#define NVDIMM_INTEL_SECURITY_CMDMASK \
(1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
| 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
| 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)

#define NVDIMM_INTEL_CMDMASK \
(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
 | NVDIMM_INTEL_SECURITY_CMDMASK)

enum nfit_uuids {
	/* for simplicity alias the uuid index with the family id */
	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
	NFIT_SPA_VOLATILE,
	NFIT_SPA_PM,
	NFIT_SPA_DCR,
	NFIT_SPA_BDW,
	NFIT_SPA_VDISK,
	NFIT_SPA_VCD,
	NFIT_SPA_PDISK,
	NFIT_SPA_PCD,
	NFIT_DEV_BUS,
	NFIT_UUID_MAX,
};

/*
 * Region format interface codes are stored with the interface as the
 * LSB and the function as the MSB.
 */
#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */

enum {
	NFIT_BLK_READ_FLUSH = 1,
	NFIT_BLK_DCR_LATCH = 2,
	NFIT_ARS_STATUS_DONE = 0,
	NFIT_ARS_STATUS_BUSY = 1 << 16,
	NFIT_ARS_STATUS_NONE = 2 << 16,
	NFIT_ARS_STATUS_INTR = 3 << 16,
	NFIT_ARS_START_BUSY = 6,
	NFIT_ARS_CAP_NONE = 1,
	NFIT_ARS_F_OVERFLOW = 1,
	NFIT_ARS_TIMEOUT = 90,
};

enum nfit_root_notifiers {
	NFIT_NOTIFY_UPDATE = 0x80,
	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
};

enum nfit_dimm_notifiers {
	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
};

enum nfit_ars_state {
	ARS_REQ_SHORT,
	ARS_REQ_LONG,
	ARS_FAILED,
};

struct nfit_spa {
	struct list_head list;
	struct nd_region *nd_region;
	unsigned long ars_state;
	u32 clear_err_unit;
	u32 max_ars;
	struct acpi_nfit_system_address spa[0];
};

struct nfit_dcr {
	struct list_head list;
	struct acpi_nfit_control_region dcr[0];
};

struct nfit_bdw {
	struct list_head list;
	struct acpi_nfit_data_region bdw[0];
};

struct nfit_idt {
	struct list_head list;
	struct acpi_nfit_interleave idt[0];
};

struct nfit_flush {
	struct list_head list;
	struct acpi_nfit_flush_address flush[0];
};

struct nfit_memdev {
	struct list_head list;
	struct acpi_nfit_memory_map memdev[0];
};

enum nfit_mem_flags {
	NFIT_MEM_LSR,
	NFIT_MEM_LSW,
	NFIT_MEM_DIRTY,
	NFIT_MEM_DIRTY_COUNT,
};

/* assembled tables for a given dimm/memory-device */
struct nfit_mem {
	struct nvdimm *nvdimm;
	struct acpi_nfit_memory_map *memdev_dcr;
	struct acpi_nfit_memory_map *memdev_pmem;
	struct acpi_nfit_memory_map *memdev_bdw;
	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_data_region *bdw;
	struct acpi_nfit_system_address *spa_dcr;
	struct acpi_nfit_system_address *spa_bdw;
	struct acpi_nfit_interleave *idt_dcr;
	struct acpi_nfit_interleave *idt_bdw;
	struct kernfs_node *flags_attr;
	struct nfit_flush *nfit_flush;
	struct list_head list;
	struct acpi_device *adev;
	struct acpi_nfit_desc *acpi_desc;
	struct resource *flush_wpq;
	unsigned long dsm_mask;
	unsigned long flags;
	u32 dirty_shutdown;
	int family;
};

struct acpi_nfit_desc {
	struct nvdimm_bus_descriptor nd_desc;
	struct acpi_table_header acpi_header;
	struct mutex init_mutex;
	struct list_head memdevs;
	struct list_head flushes;
	struct list_head dimms;
	struct list_head spas;
	struct list_head dcrs;
	struct list_head bdws;
	struct list_head idts;
	struct nvdimm_bus *nvdimm_bus;
	struct device *dev;
	u8 ars_start_flags;
	struct nd_cmd_ars_status *ars_status;
	struct nfit_spa *scrub_spa;
	struct delayed_work dwork;
	struct list_head list;
	struct kernfs_node *scrub_count_state;
	unsigned int max_ars;
	unsigned int scrub_count;
	unsigned int scrub_mode;
	unsigned int scrub_busy:1;
	unsigned int cancel:1;
	unsigned long dimm_cmd_force_en;
	unsigned long bus_cmd_force_en;
	unsigned long bus_nfit_cmd_force_en;
	unsigned int platform_cap;
	unsigned int scrub_tmo;
	int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
			void *iobuf, u64 len, int rw);
};

enum scrub_mode {
	HW_ERROR_SCRUB_OFF,
	HW_ERROR_SCRUB_ON,
};

enum nd_blk_mmio_selector {
	BDW,
	DCR,
};

struct nd_blk_addr {
	union {
		void __iomem *base;
		void *aperture;
	};
};

struct nfit_blk {
	struct nfit_blk_mmio {
		struct nd_blk_addr addr;
		u64 size;
		u64 base_offset;
		u32 line_size;
		u32 num_lines;
		u32 table_size;
		struct acpi_nfit_interleave *idt;
		struct acpi_nfit_system_address *spa;
	} mmio[2];
	struct nd_region *nd_region;
	u64 bdw_offset; /* post interleave offset */
	u64 stat_offset;
	u64 cmd_offset;
	u32 dimm_flags;
};

extern struct list_head acpi_descs;
extern struct mutex acpi_desc_lock;
int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
		enum nfit_ars_state req_type);

#ifdef CONFIG_X86_MCE
void nfit_mce_register(void);
void nfit_mce_unregister(void);
#else
static inline void nfit_mce_register(void)
{
}
static inline void nfit_mce_unregister(void)
{
}
#endif

int nfit_spa_type(struct acpi_nfit_system_address *spa);

static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
		struct nfit_mem *nfit_mem)
{
	if (nfit_mem->memdev_dcr)
		return nfit_mem->memdev_dcr;
	return nfit_mem->memdev_pmem;
}

static inline struct acpi_nfit_desc *to_acpi_desc(
		struct nvdimm_bus_descriptor *nd_desc)
{
	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
}

const guid_t *to_nfit_uuid(enum nfit_uuids id);
int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
void acpi_nfit_shutdown(void *data);
void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
void __acpi_nvdimm_notify(struct device *dev, u32 event);
int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
		unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
#endif /* __NFIT_H__ */
Commit	Line	Data
b94d5230 DW	1	/*
	2	* NVDIMM Firmware Interface Table - NFIT
	3	*
	4	* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of version 2 of the GNU General Public License as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*/
	15	#ifndef __NFIT_H__
	16	#define __NFIT_H__
7ae0fa43	17	#include <linux/workqueue.h>
b94d5230	18	#include <linux/libnvdimm.h>
6839a6d9	19	#include <linux/ndctl.h>
b94d5230	20	#include <linux/types.h>
b94d5230 DW	21	#include <linux/acpi.h>
	22	#include <acpi/acuuid.h>
	23
31eca76b	24	/* ACPI 6.1 */
b94d5230	25	#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
31eca76b	26
11e14270	27	/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
b94d5230	28	#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
31eca76b DW	29
	30	/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
	31	#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
	32	#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
	33
e02fb726	34	/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
	35	#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
	36
58138820 DW	37	#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
58138820 DW	38	\| ACPI_NFIT_MEM_RESTORE_FAILED \| ACPI_NFIT_MEM_FLUSH_FAILED \
1499934d	39	\| ACPI_NFIT_MEM_NOT_ARMED \| ACPI_NFIT_MEM_MAP_FAILED)
b94d5230	40
11e14270 DW	41	#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_MSFT
11e14270 DW	42
b9b1504d DW	43	#define NVDIMM_STANDARD_CMDMASK \
	44	(1 << ND_CMD_SMART \| 1 << ND_CMD_SMART_THRESHOLD \| 1 << ND_CMD_DIMM_FLAGS \
	45	\| 1 << ND_CMD_GET_CONFIG_SIZE \| 1 << ND_CMD_GET_CONFIG_DATA \
	46	\| 1 << ND_CMD_SET_CONFIG_DATA \| 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
	47	\| 1 << ND_CMD_VENDOR_EFFECT_LOG \| 1 << ND_CMD_VENDOR)
	48
11e14270 DW	49	/*
	50	* Command numbers that the kernel needs to know about to handle
	51	* non-default DSM revision ids
	52	*/
	53	enum nvdimm_family_cmds {
79ab67ed	54	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
11e14270 DW	55	NVDIMM_INTEL_GET_MODES = 11,
	56	NVDIMM_INTEL_GET_FWINFO = 12,
	57	NVDIMM_INTEL_START_FWUPDATE = 13,
	58	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	59	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	60	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	61	NVDIMM_INTEL_SET_THRESHOLD = 17,
	62	NVDIMM_INTEL_INJECT_ERROR = 18,
b3ed2ce0 DJ	63	NVDIMM_INTEL_GET_SECURITY_STATE = 19,
	64	NVDIMM_INTEL_SET_PASSPHRASE = 20,
	65	NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
	66	NVDIMM_INTEL_UNLOCK_UNIT = 22,
	67	NVDIMM_INTEL_FREEZE_LOCK = 23,
	68	NVDIMM_INTEL_SECURE_ERASE = 24,
	69	NVDIMM_INTEL_OVERWRITE = 25,
	70	NVDIMM_INTEL_QUERY_OVERWRITE = 26,
	71	NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
	72	NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
11e14270 DW	73	};
11e14270 DW	74
b3ed2ce0 DJ	75	#define NVDIMM_INTEL_SECURITY_CMDMASK \
	76	(1 << NVDIMM_INTEL_GET_SECURITY_STATE \| 1 << NVDIMM_INTEL_SET_PASSPHRASE \
	77	\| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE \| 1 << NVDIMM_INTEL_UNLOCK_UNIT \
	78	\| 1 << NVDIMM_INTEL_FREEZE_LOCK \| 1 << NVDIMM_INTEL_SECURE_ERASE \
	79	\| 1 << NVDIMM_INTEL_OVERWRITE \| 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
	80	\| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
	81	\| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
	82
11e14270 DW	83	#define NVDIMM_INTEL_CMDMASK \
	84	(NVDIMM_STANDARD_CMDMASK \| 1 << NVDIMM_INTEL_GET_MODES \
	85	\| 1 << NVDIMM_INTEL_GET_FWINFO \| 1 << NVDIMM_INTEL_START_FWUPDATE \
	86	\| 1 << NVDIMM_INTEL_SEND_FWUPDATE \| 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
	87	\| 1 << NVDIMM_INTEL_QUERY_FWUPDATE \| 1 << NVDIMM_INTEL_SET_THRESHOLD \
b3ed2ce0 DJ	88	\| 1 << NVDIMM_INTEL_INJECT_ERROR \| 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
b3ed2ce0 DJ	89	\| NVDIMM_INTEL_SECURITY_CMDMASK)
11e14270	90
b94d5230	91	enum nfit_uuids {
31eca76b DW	92	/* for simplicity alias the uuid index with the family id */
	93	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	94	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	95	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
e02fb726	96	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
b94d5230 DW	97	NFIT_SPA_VOLATILE,
	98	NFIT_SPA_PM,
	99	NFIT_SPA_DCR,
	100	NFIT_SPA_BDW,
	101	NFIT_SPA_VDISK,
	102	NFIT_SPA_VCD,
	103	NFIT_SPA_PDISK,
	104	NFIT_SPA_PCD,
	105	NFIT_DEV_BUS,
b94d5230 DW	106	NFIT_UUID_MAX,
	107	};
	108
30ec5fd4	109	/*
1bcbf42d DW	110	* Region format interface codes are stored with the interface as the
1bcbf42d DW	111	* LSB and the function as the MSB.
30ec5fd4	112	*/
1bcbf42d DW	113	#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
	114	#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
	115	#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
be26f9ae	116
f0f2c072	117	enum {
aef25338 DW	118	NFIT_BLK_READ_FLUSH = 1,
	119	NFIT_BLK_DCR_LATCH = 2,
	120	NFIT_ARS_STATUS_DONE = 0,
	121	NFIT_ARS_STATUS_BUSY = 1 << 16,
	122	NFIT_ARS_STATUS_NONE = 2 << 16,
	123	NFIT_ARS_STATUS_INTR = 3 << 16,
	124	NFIT_ARS_START_BUSY = 6,
	125	NFIT_ARS_CAP_NONE = 1,
	126	NFIT_ARS_F_OVERFLOW = 1,
1cf03c00	127	NFIT_ARS_TIMEOUT = 90,
f0f2c072 RZ	128	};
f0f2c072 RZ	129
c09f1218 VV	130	enum nfit_root_notifiers {
c09f1218 VV	131	NFIT_NOTIFY_UPDATE = 0x80,
56b47fe6	132	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
c09f1218 VV	133	};
c09f1218 VV	134
ba9c8dd3 DW	135	enum nfit_dimm_notifiers {
	136	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
	137	};
	138
14c73f99	139	enum nfit_ars_state {
d3abaf43 DW	140	ARS_REQ_SHORT,
d3abaf43 DW	141	ARS_REQ_LONG,
14c73f99 DW	142	ARS_FAILED,
	143	};
	144
b94d5230	145	struct nfit_spa {
b94d5230	146	struct list_head list;
1cf03c00	147	struct nd_region *nd_region;
14c73f99	148	unsigned long ars_state;
1cf03c00 DW	149	u32 clear_err_unit;
1cf03c00 DW	150	u32 max_ars;
31932041	151	struct acpi_nfit_system_address spa[0];
b94d5230 DW	152	};
	153
	154	struct nfit_dcr {
b94d5230	155	struct list_head list;
31932041	156	struct acpi_nfit_control_region dcr[0];
b94d5230 DW	157	};
	158
	159	struct nfit_bdw {
b94d5230	160	struct list_head list;
31932041	161	struct acpi_nfit_data_region bdw[0];
b94d5230 DW	162	};
b94d5230 DW	163
047fc8a1	164	struct nfit_idt {
047fc8a1	165	struct list_head list;
31932041	166	struct acpi_nfit_interleave idt[0];
047fc8a1 RZ	167	};
047fc8a1 RZ	168
c2ad2954	169	struct nfit_flush {
c2ad2954	170	struct list_head list;
31932041	171	struct acpi_nfit_flush_address flush[0];
c2ad2954 RZ	172	};
c2ad2954 RZ	173
b94d5230	174	struct nfit_memdev {
b94d5230	175	struct list_head list;
31932041	176	struct acpi_nfit_memory_map memdev[0];
b94d5230 DW	177	};
b94d5230 DW	178
6f07f86c DW	179	enum nfit_mem_flags {
	180	NFIT_MEM_LSR,
	181	NFIT_MEM_LSW,
0ead1118 DW	182	NFIT_MEM_DIRTY,
0ead1118 DW	183	NFIT_MEM_DIRTY_COUNT,
6f07f86c DW	184	};
6f07f86c DW	185
b94d5230 DW	186	/* assembled tables for a given dimm/memory-device */
b94d5230 DW	187	struct nfit_mem {
e6dfb2de	188	struct nvdimm *nvdimm;
b94d5230 DW	189	struct acpi_nfit_memory_map *memdev_dcr;
b94d5230 DW	190	struct acpi_nfit_memory_map *memdev_pmem;
047fc8a1	191	struct acpi_nfit_memory_map *memdev_bdw;
b94d5230 DW	192	struct acpi_nfit_control_region *dcr;
	193	struct acpi_nfit_data_region *bdw;
	194	struct acpi_nfit_system_address *spa_dcr;
	195	struct acpi_nfit_system_address *spa_bdw;
047fc8a1 RZ	196	struct acpi_nfit_interleave *idt_dcr;
047fc8a1 RZ	197	struct acpi_nfit_interleave *idt_bdw;
ba9c8dd3	198	struct kernfs_node *flags_attr;
c2ad2954	199	struct nfit_flush *nfit_flush;
b94d5230	200	struct list_head list;
62232e45	201	struct acpi_device *adev;
8cc6ddfc	202	struct acpi_nfit_desc *acpi_desc;
e5ae3b25	203	struct resource *flush_wpq;
62232e45	204	unsigned long dsm_mask;
6f07f86c	205	unsigned long flags;
0ead1118	206	u32 dirty_shutdown;
31eca76b	207	int family;
b94d5230 DW	208	};
	209
	210	struct acpi_nfit_desc {
	211	struct nvdimm_bus_descriptor nd_desc;
6b577c9d	212	struct acpi_table_header acpi_header;
20985164	213	struct mutex init_mutex;
b94d5230	214	struct list_head memdevs;
c2ad2954	215	struct list_head flushes;
b94d5230 DW	216	struct list_head dimms;
	217	struct list_head spas;
	218	struct list_head dcrs;
	219	struct list_head bdws;
047fc8a1	220	struct list_head idts;
b94d5230 DW	221	struct nvdimm_bus *nvdimm_bus;
b94d5230 DW	222	struct device *dev;
80790039	223	u8 ars_start_flags;
1cf03c00	224	struct nd_cmd_ars_status *ars_status;
d3abaf43	225	struct nfit_spa *scrub_spa;
bc6ba808	226	struct delayed_work dwork;
6839a6d9	227	struct list_head list;
37b137ff	228	struct kernfs_node *scrub_count_state;
459d0ddb	229	unsigned int max_ars;
37b137ff	230	unsigned int scrub_count;
9ffd6350	231	unsigned int scrub_mode;
33cc2c96	232	unsigned int scrub_busy:1;
7ae0fa43	233	unsigned int cancel:1;
e3654eca DW	234	unsigned long dimm_cmd_force_en;
e3654eca DW	235	unsigned long bus_cmd_force_en;
b37b3fd3	236	unsigned long bus_nfit_cmd_force_en;
06e8ccda	237	unsigned int platform_cap;
bc6ba808	238	unsigned int scrub_tmo;
6bc75619 DW	239	int (blk_do_io)(struct nd_blk_region ndbr, resource_size_t dpa,
6bc75619 DW	240	void *iobuf, u64 len, int rw);
b94d5230 DW	241	};
b94d5230 DW	242
9ffd6350 VV	243	enum scrub_mode {
	244	HW_ERROR_SCRUB_OFF,
	245	HW_ERROR_SCRUB_ON,
	246	};
	247
047fc8a1 RZ	248	enum nd_blk_mmio_selector {
	249	BDW,
	250	DCR,
	251	};
	252
67a3e8fe RZ	253	struct nd_blk_addr {
	254	union {
	255	void __iomem *base;
7a9eb206	256	void *aperture;
67a3e8fe RZ	257	};
	258	};
	259
047fc8a1 RZ	260	struct nfit_blk {
047fc8a1 RZ	261	struct nfit_blk_mmio {
67a3e8fe	262	struct nd_blk_addr addr;
047fc8a1 RZ	263	u64 size;
	264	u64 base_offset;
	265	u32 line_size;
	266	u32 num_lines;
	267	u32 table_size;
	268	struct acpi_nfit_interleave *idt;
	269	struct acpi_nfit_system_address *spa;
	270	} mmio[2];
	271	struct nd_region *nd_region;
	272	u64 bdw_offset; /* post interleave offset */
	273	u64 stat_offset;
	274	u64 cmd_offset;
f0f2c072	275	u32 dimm_flags;
c2ad2954 RZ	276	};
c2ad2954 RZ	277
6839a6d9 VV	278	extern struct list_head acpi_descs;
6839a6d9 VV	279	extern struct mutex acpi_desc_lock;
d3abaf43 DW	280	int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
d3abaf43 DW	281	enum nfit_ars_state req_type);
047fc8a1	282
6839a6d9 VV	283	#ifdef CONFIG_X86_MCE
	284	void nfit_mce_register(void);
	285	void nfit_mce_unregister(void);
	286	#else
	287	static inline void nfit_mce_register(void)
047fc8a1	288	{
047fc8a1	289	}
6839a6d9 VV	290	static inline void nfit_mce_unregister(void)
	291	{
	292	}
	293	#endif
	294
	295	int nfit_spa_type(struct acpi_nfit_system_address *spa);
047fc8a1	296
b94d5230 DW	297	static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
	298	struct nfit_mem *nfit_mem)
	299	{
	300	if (nfit_mem->memdev_dcr)
	301	return nfit_mem->memdev_dcr;
	302	return nfit_mem->memdev_pmem;
	303	}
45def22c DW	304
	305	static inline struct acpi_nfit_desc *to_acpi_desc(
	306	struct nvdimm_bus_descriptor *nd_desc)
	307	{
	308	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
	309	}
6bc75619	310
41c8bdb3	311	const guid_t *to_nfit_uuid(enum nfit_uuids id);
e7a11b44	312	int acpi_nfit_init(struct acpi_nfit_desc acpi_desc, void nfit, acpi_size sz);
fbabd829	313	void acpi_nfit_shutdown(void *data);
c14a868a	314	void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
231bf117	315	void __acpi_nvdimm_notify(struct device *dev, u32 event);
a7de92da DW	316	int acpi_nfit_ctl(struct nvdimm_bus_descriptor nd_desc, struct nvdimm nvdimm,
a7de92da DW	317	unsigned int cmd, void buf, unsigned int buf_len, int cmd_rc);
a61fe6f7	318	void acpi_nfit_desc_init(struct acpi_nfit_desc acpi_desc, struct device dev);
b94d5230	319	#endif /* __NFIT_H__ */