[linux-2.6-block.git] / drivers / acpi / nfit / nfit.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * NVDIMM Firmware Interface Table - NFIT
 *
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 */
#ifndef __NFIT_H__
#define __NFIT_H__
#include <linux/workqueue.h>
#include <linux/libnvdimm.h>
#include <linux/ndctl.h>
#include <linux/types.h>
#include <linux/acpi.h>
#include <acpi/acuuid.h>

/* ACPI 6.1 */
#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"

/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"

/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"

/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"

/* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */
#define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"

#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
		| ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
		| ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)

#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_HYPERV

#define NVDIMM_STANDARD_CMDMASK \
(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)

/*
 * Command numbers that the kernel needs to know about to handle
 * non-default DSM revision ids
 */
enum nvdimm_family_cmds {
	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
	NVDIMM_INTEL_GET_MODES = 11,
	NVDIMM_INTEL_GET_FWINFO = 12,
	NVDIMM_INTEL_START_FWUPDATE = 13,
	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	NVDIMM_INTEL_SET_THRESHOLD = 17,
	NVDIMM_INTEL_INJECT_ERROR = 18,
	NVDIMM_INTEL_GET_SECURITY_STATE = 19,
	NVDIMM_INTEL_SET_PASSPHRASE = 20,
	NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
	NVDIMM_INTEL_UNLOCK_UNIT = 22,
	NVDIMM_INTEL_FREEZE_LOCK = 23,
	NVDIMM_INTEL_SECURE_ERASE = 24,
	NVDIMM_INTEL_OVERWRITE = 25,
	NVDIMM_INTEL_QUERY_OVERWRITE = 26,
	NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
	NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
};

#define NVDIMM_INTEL_SECURITY_CMDMASK \
(1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
| 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
| 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)

#define NVDIMM_INTEL_CMDMASK \
(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
 | NVDIMM_INTEL_SECURITY_CMDMASK)

enum nfit_uuids {
	/* for simplicity alias the uuid index with the family id */
	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
	NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
	NFIT_SPA_VOLATILE,
	NFIT_SPA_PM,
	NFIT_SPA_DCR,
	NFIT_SPA_BDW,
	NFIT_SPA_VDISK,
	NFIT_SPA_VCD,
	NFIT_SPA_PDISK,
	NFIT_SPA_PCD,
	NFIT_DEV_BUS,
	NFIT_UUID_MAX,
};

/*
 * Region format interface codes are stored with the interface as the
 * LSB and the function as the MSB.
 */
#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */

enum {
	NFIT_BLK_READ_FLUSH = 1,
	NFIT_BLK_DCR_LATCH = 2,
	NFIT_ARS_STATUS_DONE = 0,
	NFIT_ARS_STATUS_BUSY = 1 << 16,
	NFIT_ARS_STATUS_NONE = 2 << 16,
	NFIT_ARS_STATUS_INTR = 3 << 16,
	NFIT_ARS_START_BUSY = 6,
	NFIT_ARS_CAP_NONE = 1,
	NFIT_ARS_F_OVERFLOW = 1,
	NFIT_ARS_TIMEOUT = 90,
};

enum nfit_root_notifiers {
	NFIT_NOTIFY_UPDATE = 0x80,
	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
};

enum nfit_dimm_notifiers {
	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
};

enum nfit_ars_state {
	ARS_REQ_SHORT,
	ARS_REQ_LONG,
	ARS_FAILED,
};

struct nfit_spa {
	struct list_head list;
	struct nd_region *nd_region;
	unsigned long ars_state;
	u32 clear_err_unit;
	u32 max_ars;
	struct acpi_nfit_system_address spa[0];
};

struct nfit_dcr {
	struct list_head list;
	struct acpi_nfit_control_region dcr[0];
};

struct nfit_bdw {
	struct list_head list;
	struct acpi_nfit_data_region bdw[0];
};

struct nfit_idt {
	struct list_head list;
	struct acpi_nfit_interleave idt[0];
};

struct nfit_flush {
	struct list_head list;
	struct acpi_nfit_flush_address flush[0];
};

struct nfit_memdev {
	struct list_head list;
	struct acpi_nfit_memory_map memdev[0];
};

enum nfit_mem_flags {
	NFIT_MEM_LSR,
	NFIT_MEM_LSW,
	NFIT_MEM_DIRTY,
	NFIT_MEM_DIRTY_COUNT,
};

#define NFIT_DIMM_ID_LEN	22

/* assembled tables for a given dimm/memory-device */
struct nfit_mem {
	struct nvdimm *nvdimm;
	struct acpi_nfit_memory_map *memdev_dcr;
	struct acpi_nfit_memory_map *memdev_pmem;
	struct acpi_nfit_memory_map *memdev_bdw;
	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_data_region *bdw;
	struct acpi_nfit_system_address *spa_dcr;
	struct acpi_nfit_system_address *spa_bdw;
	struct acpi_nfit_interleave *idt_dcr;
	struct acpi_nfit_interleave *idt_bdw;
	struct kernfs_node *flags_attr;
	struct nfit_flush *nfit_flush;
	struct list_head list;
	struct acpi_device *adev;
	struct acpi_nfit_desc *acpi_desc;
	char id[NFIT_DIMM_ID_LEN+1];
	struct resource *flush_wpq;
	unsigned long dsm_mask;
	unsigned long flags;
	u32 dirty_shutdown;
	int family;
};

enum scrub_flags {
	ARS_BUSY,
	ARS_CANCEL,
	ARS_VALID,
	ARS_POLL,
};

struct acpi_nfit_desc {
	struct nvdimm_bus_descriptor nd_desc;
	struct acpi_table_header acpi_header;
	struct mutex init_mutex;
	struct list_head memdevs;
	struct list_head flushes;
	struct list_head dimms;
	struct list_head spas;
	struct list_head dcrs;
	struct list_head bdws;
	struct list_head idts;
	struct nvdimm_bus *nvdimm_bus;
	struct device *dev;
	struct nd_cmd_ars_status *ars_status;
	struct nfit_spa *scrub_spa;
	struct delayed_work dwork;
	struct list_head list;
	struct kernfs_node *scrub_count_state;
	unsigned int max_ars;
	unsigned int scrub_count;
	unsigned int scrub_mode;
	unsigned long scrub_flags;
	unsigned long dimm_cmd_force_en;
	unsigned long bus_cmd_force_en;
	unsigned long bus_nfit_cmd_force_en;
	unsigned int platform_cap;
	unsigned int scrub_tmo;
	int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
			void *iobuf, u64 len, int rw);
};

enum scrub_mode {
	HW_ERROR_SCRUB_OFF,
	HW_ERROR_SCRUB_ON,
};

enum nd_blk_mmio_selector {
	BDW,
	DCR,
};

struct nd_blk_addr {
	union {
		void __iomem *base;
		void *aperture;
	};
};

struct nfit_blk {
	struct nfit_blk_mmio {
		struct nd_blk_addr addr;
		u64 size;
		u64 base_offset;
		u32 line_size;
		u32 num_lines;
		u32 table_size;
		struct acpi_nfit_interleave *idt;
		struct acpi_nfit_system_address *spa;
	} mmio[2];
	struct nd_region *nd_region;
	u64 bdw_offset; /* post interleave offset */
	u64 stat_offset;
	u64 cmd_offset;
	u32 dimm_flags;
};

extern struct list_head acpi_descs;
extern struct mutex acpi_desc_lock;
int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
		enum nfit_ars_state req_type);

#ifdef CONFIG_X86_MCE
void nfit_mce_register(void);
void nfit_mce_unregister(void);
#else
static inline void nfit_mce_register(void)
{
}
static inline void nfit_mce_unregister(void)
{
}
#endif

int nfit_spa_type(struct acpi_nfit_system_address *spa);

static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
		struct nfit_mem *nfit_mem)
{
	if (nfit_mem->memdev_dcr)
		return nfit_mem->memdev_dcr;
	return nfit_mem->memdev_pmem;
}

static inline struct acpi_nfit_desc *to_acpi_desc(
		struct nvdimm_bus_descriptor *nd_desc)
{
	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
}

#ifdef CONFIG_PROVE_LOCKING
static inline void nfit_device_lock(struct device *dev)
{
	device_lock(dev);
	mutex_lock(&dev->lockdep_mutex);
}

static inline void nfit_device_unlock(struct device *dev)
{
	mutex_unlock(&dev->lockdep_mutex);
	device_unlock(dev);
}
#else
static inline void nfit_device_lock(struct device *dev)
{
	device_lock(dev);
}

static inline void nfit_device_unlock(struct device *dev)
{
	device_unlock(dev);
}
#endif

const guid_t *to_nfit_uuid(enum nfit_uuids id);
int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
void acpi_nfit_shutdown(void *data);
void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
void __acpi_nvdimm_notify(struct device *dev, u32 event);
int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
		unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
#endif /* __NFIT_H__ */
Commit	Line	Data
5b497af4	1	/* SPDX-License-Identifier: GPL-2.0-only */
b94d5230 DW	2	/*
	3	* NVDIMM Firmware Interface Table - NFIT
	4	*
	5	* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
b94d5230 DW	6	*/
	7	#ifndef __NFIT_H__
	8	#define __NFIT_H__
7ae0fa43	9	#include <linux/workqueue.h>
b94d5230	10	#include <linux/libnvdimm.h>
6839a6d9	11	#include <linux/ndctl.h>
b94d5230	12	#include <linux/types.h>
b94d5230 DW	13	#include <linux/acpi.h>
	14	#include <acpi/acuuid.h>
	15
31eca76b	16	/* ACPI 6.1 */
b94d5230	17	#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
31eca76b	18
11e14270	19	/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
b94d5230	20	#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
31eca76b DW	21
	22	/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
	23	#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
	24	#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
	25
e02fb726	26	/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
	27	#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
	28
1194c413 DC	29	/* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */
	30	#define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"
	31
58138820 DW	32	#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
58138820 DW	33	\| ACPI_NFIT_MEM_RESTORE_FAILED \| ACPI_NFIT_MEM_FLUSH_FAILED \
1499934d	34	\| ACPI_NFIT_MEM_NOT_ARMED \| ACPI_NFIT_MEM_MAP_FAILED)
b94d5230	35
1194c413	36	#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_HYPERV
11e14270	37
b9b1504d DW	38	#define NVDIMM_STANDARD_CMDMASK \
	39	(1 << ND_CMD_SMART \| 1 << ND_CMD_SMART_THRESHOLD \| 1 << ND_CMD_DIMM_FLAGS \
	40	\| 1 << ND_CMD_GET_CONFIG_SIZE \| 1 << ND_CMD_GET_CONFIG_DATA \
	41	\| 1 << ND_CMD_SET_CONFIG_DATA \| 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
	42	\| 1 << ND_CMD_VENDOR_EFFECT_LOG \| 1 << ND_CMD_VENDOR)
	43
11e14270 DW	44	/*
	45	* Command numbers that the kernel needs to know about to handle
	46	* non-default DSM revision ids
	47	*/
	48	enum nvdimm_family_cmds {
79ab67ed	49	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
11e14270 DW	50	NVDIMM_INTEL_GET_MODES = 11,
	51	NVDIMM_INTEL_GET_FWINFO = 12,
	52	NVDIMM_INTEL_START_FWUPDATE = 13,
	53	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	54	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	55	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	56	NVDIMM_INTEL_SET_THRESHOLD = 17,
	57	NVDIMM_INTEL_INJECT_ERROR = 18,
b3ed2ce0 DJ	58	NVDIMM_INTEL_GET_SECURITY_STATE = 19,
	59	NVDIMM_INTEL_SET_PASSPHRASE = 20,
	60	NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
	61	NVDIMM_INTEL_UNLOCK_UNIT = 22,
	62	NVDIMM_INTEL_FREEZE_LOCK = 23,
	63	NVDIMM_INTEL_SECURE_ERASE = 24,
	64	NVDIMM_INTEL_OVERWRITE = 25,
	65	NVDIMM_INTEL_QUERY_OVERWRITE = 26,
	66	NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
	67	NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
11e14270 DW	68	};
11e14270 DW	69
b3ed2ce0 DJ	70	#define NVDIMM_INTEL_SECURITY_CMDMASK \
	71	(1 << NVDIMM_INTEL_GET_SECURITY_STATE \| 1 << NVDIMM_INTEL_SET_PASSPHRASE \
	72	\| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE \| 1 << NVDIMM_INTEL_UNLOCK_UNIT \
	73	\| 1 << NVDIMM_INTEL_FREEZE_LOCK \| 1 << NVDIMM_INTEL_SECURE_ERASE \
	74	\| 1 << NVDIMM_INTEL_OVERWRITE \| 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
	75	\| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
	76	\| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
	77
11e14270 DW	78	#define NVDIMM_INTEL_CMDMASK \
	79	(NVDIMM_STANDARD_CMDMASK \| 1 << NVDIMM_INTEL_GET_MODES \
	80	\| 1 << NVDIMM_INTEL_GET_FWINFO \| 1 << NVDIMM_INTEL_START_FWUPDATE \
	81	\| 1 << NVDIMM_INTEL_SEND_FWUPDATE \| 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
	82	\| 1 << NVDIMM_INTEL_QUERY_FWUPDATE \| 1 << NVDIMM_INTEL_SET_THRESHOLD \
b3ed2ce0 DJ	83	\| 1 << NVDIMM_INTEL_INJECT_ERROR \| 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
b3ed2ce0 DJ	84	\| NVDIMM_INTEL_SECURITY_CMDMASK)
11e14270	85
b94d5230	86	enum nfit_uuids {
31eca76b DW	87	/* for simplicity alias the uuid index with the family id */
	88	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	89	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	90	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
e02fb726	91	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
1194c413	92	NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
b94d5230 DW	93	NFIT_SPA_VOLATILE,
	94	NFIT_SPA_PM,
	95	NFIT_SPA_DCR,
	96	NFIT_SPA_BDW,
	97	NFIT_SPA_VDISK,
	98	NFIT_SPA_VCD,
	99	NFIT_SPA_PDISK,
	100	NFIT_SPA_PCD,
	101	NFIT_DEV_BUS,
b94d5230 DW	102	NFIT_UUID_MAX,
	103	};
	104
30ec5fd4	105	/*
1bcbf42d DW	106	* Region format interface codes are stored with the interface as the
1bcbf42d DW	107	* LSB and the function as the MSB.
30ec5fd4	108	*/
1bcbf42d DW	109	#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
	110	#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
	111	#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
be26f9ae	112
f0f2c072	113	enum {
aef25338 DW	114	NFIT_BLK_READ_FLUSH = 1,
	115	NFIT_BLK_DCR_LATCH = 2,
	116	NFIT_ARS_STATUS_DONE = 0,
	117	NFIT_ARS_STATUS_BUSY = 1 << 16,
	118	NFIT_ARS_STATUS_NONE = 2 << 16,
	119	NFIT_ARS_STATUS_INTR = 3 << 16,
	120	NFIT_ARS_START_BUSY = 6,
	121	NFIT_ARS_CAP_NONE = 1,
	122	NFIT_ARS_F_OVERFLOW = 1,
1cf03c00	123	NFIT_ARS_TIMEOUT = 90,
f0f2c072 RZ	124	};
f0f2c072 RZ	125
c09f1218 VV	126	enum nfit_root_notifiers {
c09f1218 VV	127	NFIT_NOTIFY_UPDATE = 0x80,
56b47fe6	128	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
c09f1218 VV	129	};
c09f1218 VV	130
ba9c8dd3 DW	131	enum nfit_dimm_notifiers {
	132	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
	133	};
	134
14c73f99	135	enum nfit_ars_state {
d3abaf43 DW	136	ARS_REQ_SHORT,
d3abaf43 DW	137	ARS_REQ_LONG,
14c73f99 DW	138	ARS_FAILED,
	139	};
	140
b94d5230	141	struct nfit_spa {
b94d5230	142	struct list_head list;
1cf03c00	143	struct nd_region *nd_region;
14c73f99	144	unsigned long ars_state;
1cf03c00 DW	145	u32 clear_err_unit;
1cf03c00 DW	146	u32 max_ars;
31932041	147	struct acpi_nfit_system_address spa[0];
b94d5230 DW	148	};
	149
	150	struct nfit_dcr {
b94d5230	151	struct list_head list;
31932041	152	struct acpi_nfit_control_region dcr[0];
b94d5230 DW	153	};
	154
	155	struct nfit_bdw {
b94d5230	156	struct list_head list;
31932041	157	struct acpi_nfit_data_region bdw[0];
b94d5230 DW	158	};
b94d5230 DW	159
047fc8a1	160	struct nfit_idt {
047fc8a1	161	struct list_head list;
31932041	162	struct acpi_nfit_interleave idt[0];
047fc8a1 RZ	163	};
047fc8a1 RZ	164
c2ad2954	165	struct nfit_flush {
c2ad2954	166	struct list_head list;
31932041	167	struct acpi_nfit_flush_address flush[0];
c2ad2954 RZ	168	};
c2ad2954 RZ	169
b94d5230	170	struct nfit_memdev {
b94d5230	171	struct list_head list;
31932041	172	struct acpi_nfit_memory_map memdev[0];
b94d5230 DW	173	};
b94d5230 DW	174
6f07f86c DW	175	enum nfit_mem_flags {
	176	NFIT_MEM_LSR,
	177	NFIT_MEM_LSW,
0ead1118 DW	178	NFIT_MEM_DIRTY,
0ead1118 DW	179	NFIT_MEM_DIRTY_COUNT,
6f07f86c DW	180	};
6f07f86c DW	181
d6548ae4 DJ	182	#define NFIT_DIMM_ID_LEN 22
d6548ae4 DJ	183
b94d5230 DW	184	/* assembled tables for a given dimm/memory-device */
b94d5230 DW	185	struct nfit_mem {
e6dfb2de	186	struct nvdimm *nvdimm;
b94d5230 DW	187	struct acpi_nfit_memory_map *memdev_dcr;
b94d5230 DW	188	struct acpi_nfit_memory_map *memdev_pmem;
047fc8a1	189	struct acpi_nfit_memory_map *memdev_bdw;
b94d5230 DW	190	struct acpi_nfit_control_region *dcr;
	191	struct acpi_nfit_data_region *bdw;
	192	struct acpi_nfit_system_address *spa_dcr;
	193	struct acpi_nfit_system_address *spa_bdw;
047fc8a1 RZ	194	struct acpi_nfit_interleave *idt_dcr;
047fc8a1 RZ	195	struct acpi_nfit_interleave *idt_bdw;
ba9c8dd3	196	struct kernfs_node *flags_attr;
c2ad2954	197	struct nfit_flush *nfit_flush;
b94d5230	198	struct list_head list;
62232e45	199	struct acpi_device *adev;
8cc6ddfc	200	struct acpi_nfit_desc *acpi_desc;
d6548ae4	201	char id[NFIT_DIMM_ID_LEN+1];
e5ae3b25	202	struct resource *flush_wpq;
62232e45	203	unsigned long dsm_mask;
6f07f86c	204	unsigned long flags;
0ead1118	205	u32 dirty_shutdown;
31eca76b	206	int family;
b94d5230 DW	207	};
b94d5230 DW	208
e34b8252 DW	209	enum scrub_flags {
	210	ARS_BUSY,
	211	ARS_CANCEL,
78153dd4	212	ARS_VALID,
5479b275	213	ARS_POLL,
e34b8252 DW	214	};
e34b8252 DW	215
b94d5230 DW	216	struct acpi_nfit_desc {
b94d5230 DW	217	struct nvdimm_bus_descriptor nd_desc;
6b577c9d	218	struct acpi_table_header acpi_header;
20985164	219	struct mutex init_mutex;
b94d5230	220	struct list_head memdevs;
c2ad2954	221	struct list_head flushes;
b94d5230 DW	222	struct list_head dimms;
	223	struct list_head spas;
	224	struct list_head dcrs;
	225	struct list_head bdws;
047fc8a1	226	struct list_head idts;
b94d5230 DW	227	struct nvdimm_bus *nvdimm_bus;
b94d5230 DW	228	struct device *dev;
1cf03c00	229	struct nd_cmd_ars_status *ars_status;
d3abaf43	230	struct nfit_spa *scrub_spa;
bc6ba808	231	struct delayed_work dwork;
6839a6d9	232	struct list_head list;
37b137ff	233	struct kernfs_node *scrub_count_state;
459d0ddb	234	unsigned int max_ars;
37b137ff	235	unsigned int scrub_count;
9ffd6350	236	unsigned int scrub_mode;
e34b8252	237	unsigned long scrub_flags;
e3654eca DW	238	unsigned long dimm_cmd_force_en;
e3654eca DW	239	unsigned long bus_cmd_force_en;
b37b3fd3	240	unsigned long bus_nfit_cmd_force_en;
06e8ccda	241	unsigned int platform_cap;
bc6ba808	242	unsigned int scrub_tmo;
6bc75619 DW	243	int (blk_do_io)(struct nd_blk_region ndbr, resource_size_t dpa,
6bc75619 DW	244	void *iobuf, u64 len, int rw);
b94d5230 DW	245	};
b94d5230 DW	246
9ffd6350 VV	247	enum scrub_mode {
	248	HW_ERROR_SCRUB_OFF,
	249	HW_ERROR_SCRUB_ON,
	250	};
	251
047fc8a1 RZ	252	enum nd_blk_mmio_selector {
	253	BDW,
	254	DCR,
	255	};
	256
67a3e8fe RZ	257	struct nd_blk_addr {
	258	union {
	259	void __iomem *base;
7a9eb206	260	void *aperture;
67a3e8fe RZ	261	};
	262	};
	263
047fc8a1 RZ	264	struct nfit_blk {
047fc8a1 RZ	265	struct nfit_blk_mmio {
67a3e8fe	266	struct nd_blk_addr addr;
047fc8a1 RZ	267	u64 size;
	268	u64 base_offset;
	269	u32 line_size;
	270	u32 num_lines;
	271	u32 table_size;
	272	struct acpi_nfit_interleave *idt;
	273	struct acpi_nfit_system_address *spa;
	274	} mmio[2];
	275	struct nd_region *nd_region;
	276	u64 bdw_offset; /* post interleave offset */
	277	u64 stat_offset;
	278	u64 cmd_offset;
f0f2c072	279	u32 dimm_flags;
c2ad2954 RZ	280	};
c2ad2954 RZ	281
6839a6d9 VV	282	extern struct list_head acpi_descs;
6839a6d9 VV	283	extern struct mutex acpi_desc_lock;
d3abaf43 DW	284	int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
d3abaf43 DW	285	enum nfit_ars_state req_type);
047fc8a1	286
6839a6d9 VV	287	#ifdef CONFIG_X86_MCE
	288	void nfit_mce_register(void);
	289	void nfit_mce_unregister(void);
	290	#else
	291	static inline void nfit_mce_register(void)
047fc8a1	292	{
047fc8a1	293	}
6839a6d9 VV	294	static inline void nfit_mce_unregister(void)
	295	{
	296	}
	297	#endif
	298
	299	int nfit_spa_type(struct acpi_nfit_system_address *spa);
047fc8a1	300
b94d5230 DW	301	static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
	302	struct nfit_mem *nfit_mem)
	303	{
	304	if (nfit_mem->memdev_dcr)
	305	return nfit_mem->memdev_dcr;
	306	return nfit_mem->memdev_pmem;
	307	}
45def22c DW	308
	309	static inline struct acpi_nfit_desc *to_acpi_desc(
	310	struct nvdimm_bus_descriptor *nd_desc)
	311	{
	312	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
	313	}
6bc75619	314
87a30e1f DW	315	#ifdef CONFIG_PROVE_LOCKING
	316	static inline void nfit_device_lock(struct device *dev)
	317	{
	318	device_lock(dev);
	319	mutex_lock(&dev->lockdep_mutex);
	320	}
	321
	322	static inline void nfit_device_unlock(struct device *dev)
	323	{
	324	mutex_unlock(&dev->lockdep_mutex);
	325	device_unlock(dev);
	326	}
	327	#else
	328	static inline void nfit_device_lock(struct device *dev)
	329	{
	330	device_lock(dev);
	331	}
	332
	333	static inline void nfit_device_unlock(struct device *dev)
	334	{
	335	device_unlock(dev);
	336	}
	337	#endif
	338
41c8bdb3	339	const guid_t *to_nfit_uuid(enum nfit_uuids id);
e7a11b44	340	int acpi_nfit_init(struct acpi_nfit_desc acpi_desc, void nfit, acpi_size sz);
fbabd829	341	void acpi_nfit_shutdown(void *data);
c14a868a	342	void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
231bf117	343	void __acpi_nvdimm_notify(struct device *dev, u32 event);
a7de92da DW	344	int acpi_nfit_ctl(struct nvdimm_bus_descriptor nd_desc, struct nvdimm nvdimm,
a7de92da DW	345	unsigned int cmd, void buf, unsigned int buf_len, int cmd_rc);
a61fe6f7	346	void acpi_nfit_desc_init(struct acpi_nfit_desc acpi_desc, struct device dev);
b94d5230	347	#endif /* __NFIT_H__ */