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b94d5230 DW |
1 | /* |
2 | * NVDIMM Firmware Interface Table - NFIT | |
3 | * | |
4 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of version 2 of the GNU General Public License as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | */ | |
15 | #ifndef __NFIT_H__ | |
16 | #define __NFIT_H__ | |
7ae0fa43 | 17 | #include <linux/workqueue.h> |
b94d5230 | 18 | #include <linux/libnvdimm.h> |
6839a6d9 | 19 | #include <linux/ndctl.h> |
b94d5230 DW |
20 | #include <linux/types.h> |
21 | #include <linux/uuid.h> | |
22 | #include <linux/acpi.h> | |
23 | #include <acpi/acuuid.h> | |
24 | ||
31eca76b | 25 | /* ACPI 6.1 */ |
b94d5230 | 26 | #define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba" |
31eca76b DW |
27 | |
28 | /* http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf */ | |
b94d5230 | 29 | #define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66" |
31eca76b DW |
30 | |
31 | /* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */ | |
32 | #define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6" | |
33 | #define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e" | |
34 | ||
e02fb726 | 35 | /* https://msdn.microsoft.com/library/windows/hardware/mt604741 */ |
36 | #define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05" | |
37 | ||
58138820 DW |
38 | #define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \ |
39 | | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \ | |
ca321d1c | 40 | | ACPI_NFIT_MEM_NOT_ARMED) |
b94d5230 DW |
41 | |
42 | enum nfit_uuids { | |
31eca76b DW |
43 | /* for simplicity alias the uuid index with the family id */ |
44 | NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL, | |
45 | NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1, | |
46 | NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2, | |
e02fb726 | 47 | NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT, |
b94d5230 DW |
48 | NFIT_SPA_VOLATILE, |
49 | NFIT_SPA_PM, | |
50 | NFIT_SPA_DCR, | |
51 | NFIT_SPA_BDW, | |
52 | NFIT_SPA_VDISK, | |
53 | NFIT_SPA_VCD, | |
54 | NFIT_SPA_PDISK, | |
55 | NFIT_SPA_PCD, | |
56 | NFIT_DEV_BUS, | |
b94d5230 DW |
57 | NFIT_UUID_MAX, |
58 | }; | |
59 | ||
30ec5fd4 | 60 | /* |
1bcbf42d DW |
61 | * Region format interface codes are stored with the interface as the |
62 | * LSB and the function as the MSB. | |
30ec5fd4 | 63 | */ |
1bcbf42d DW |
64 | #define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */ |
65 | #define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */ | |
66 | #define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */ | |
be26f9ae | 67 | |
f0f2c072 | 68 | enum { |
aef25338 DW |
69 | NFIT_BLK_READ_FLUSH = 1, |
70 | NFIT_BLK_DCR_LATCH = 2, | |
71 | NFIT_ARS_STATUS_DONE = 0, | |
72 | NFIT_ARS_STATUS_BUSY = 1 << 16, | |
73 | NFIT_ARS_STATUS_NONE = 2 << 16, | |
74 | NFIT_ARS_STATUS_INTR = 3 << 16, | |
75 | NFIT_ARS_START_BUSY = 6, | |
76 | NFIT_ARS_CAP_NONE = 1, | |
77 | NFIT_ARS_F_OVERFLOW = 1, | |
1cf03c00 | 78 | NFIT_ARS_TIMEOUT = 90, |
f0f2c072 RZ |
79 | }; |
80 | ||
c09f1218 VV |
81 | enum nfit_root_notifiers { |
82 | NFIT_NOTIFY_UPDATE = 0x80, | |
83 | }; | |
84 | ||
ba9c8dd3 DW |
85 | enum nfit_dimm_notifiers { |
86 | NFIT_NOTIFY_DIMM_HEALTH = 0x81, | |
87 | }; | |
88 | ||
b94d5230 | 89 | struct nfit_spa { |
b94d5230 | 90 | struct list_head list; |
1cf03c00 | 91 | struct nd_region *nd_region; |
37b137ff | 92 | unsigned int ars_required:1; |
1cf03c00 DW |
93 | u32 clear_err_unit; |
94 | u32 max_ars; | |
31932041 | 95 | struct acpi_nfit_system_address spa[0]; |
b94d5230 DW |
96 | }; |
97 | ||
98 | struct nfit_dcr { | |
b94d5230 | 99 | struct list_head list; |
31932041 | 100 | struct acpi_nfit_control_region dcr[0]; |
b94d5230 DW |
101 | }; |
102 | ||
103 | struct nfit_bdw { | |
b94d5230 | 104 | struct list_head list; |
31932041 | 105 | struct acpi_nfit_data_region bdw[0]; |
b94d5230 DW |
106 | }; |
107 | ||
047fc8a1 | 108 | struct nfit_idt { |
047fc8a1 | 109 | struct list_head list; |
31932041 | 110 | struct acpi_nfit_interleave idt[0]; |
047fc8a1 RZ |
111 | }; |
112 | ||
c2ad2954 | 113 | struct nfit_flush { |
c2ad2954 | 114 | struct list_head list; |
31932041 | 115 | struct acpi_nfit_flush_address flush[0]; |
c2ad2954 RZ |
116 | }; |
117 | ||
b94d5230 | 118 | struct nfit_memdev { |
b94d5230 | 119 | struct list_head list; |
31932041 | 120 | struct acpi_nfit_memory_map memdev[0]; |
b94d5230 DW |
121 | }; |
122 | ||
123 | /* assembled tables for a given dimm/memory-device */ | |
124 | struct nfit_mem { | |
e6dfb2de | 125 | struct nvdimm *nvdimm; |
b94d5230 DW |
126 | struct acpi_nfit_memory_map *memdev_dcr; |
127 | struct acpi_nfit_memory_map *memdev_pmem; | |
047fc8a1 | 128 | struct acpi_nfit_memory_map *memdev_bdw; |
b94d5230 DW |
129 | struct acpi_nfit_control_region *dcr; |
130 | struct acpi_nfit_data_region *bdw; | |
131 | struct acpi_nfit_system_address *spa_dcr; | |
132 | struct acpi_nfit_system_address *spa_bdw; | |
047fc8a1 RZ |
133 | struct acpi_nfit_interleave *idt_dcr; |
134 | struct acpi_nfit_interleave *idt_bdw; | |
ba9c8dd3 | 135 | struct kernfs_node *flags_attr; |
c2ad2954 | 136 | struct nfit_flush *nfit_flush; |
b94d5230 | 137 | struct list_head list; |
62232e45 | 138 | struct acpi_device *adev; |
8cc6ddfc | 139 | struct acpi_nfit_desc *acpi_desc; |
e5ae3b25 | 140 | struct resource *flush_wpq; |
62232e45 | 141 | unsigned long dsm_mask; |
31eca76b | 142 | int family; |
b94d5230 DW |
143 | }; |
144 | ||
145 | struct acpi_nfit_desc { | |
146 | struct nvdimm_bus_descriptor nd_desc; | |
6b577c9d | 147 | struct acpi_table_header acpi_header; |
20985164 | 148 | struct mutex init_mutex; |
b94d5230 | 149 | struct list_head memdevs; |
c2ad2954 | 150 | struct list_head flushes; |
b94d5230 DW |
151 | struct list_head dimms; |
152 | struct list_head spas; | |
153 | struct list_head dcrs; | |
154 | struct list_head bdws; | |
047fc8a1 | 155 | struct list_head idts; |
b94d5230 DW |
156 | struct nvdimm_bus *nvdimm_bus; |
157 | struct device *dev; | |
1cf03c00 DW |
158 | struct nd_cmd_ars_status *ars_status; |
159 | size_t ars_status_size; | |
7ae0fa43 | 160 | struct work_struct work; |
6839a6d9 | 161 | struct list_head list; |
37b137ff VV |
162 | struct kernfs_node *scrub_count_state; |
163 | unsigned int scrub_count; | |
9ffd6350 | 164 | unsigned int scrub_mode; |
7ae0fa43 | 165 | unsigned int cancel:1; |
e3654eca DW |
166 | unsigned long dimm_cmd_force_en; |
167 | unsigned long bus_cmd_force_en; | |
6bc75619 DW |
168 | int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
169 | void *iobuf, u64 len, int rw); | |
b94d5230 DW |
170 | }; |
171 | ||
9ffd6350 VV |
172 | enum scrub_mode { |
173 | HW_ERROR_SCRUB_OFF, | |
174 | HW_ERROR_SCRUB_ON, | |
175 | }; | |
176 | ||
047fc8a1 RZ |
177 | enum nd_blk_mmio_selector { |
178 | BDW, | |
179 | DCR, | |
180 | }; | |
181 | ||
67a3e8fe RZ |
182 | struct nd_blk_addr { |
183 | union { | |
184 | void __iomem *base; | |
7a9eb206 | 185 | void *aperture; |
67a3e8fe RZ |
186 | }; |
187 | }; | |
188 | ||
047fc8a1 RZ |
189 | struct nfit_blk { |
190 | struct nfit_blk_mmio { | |
67a3e8fe | 191 | struct nd_blk_addr addr; |
047fc8a1 RZ |
192 | u64 size; |
193 | u64 base_offset; | |
194 | u32 line_size; | |
195 | u32 num_lines; | |
196 | u32 table_size; | |
197 | struct acpi_nfit_interleave *idt; | |
198 | struct acpi_nfit_system_address *spa; | |
199 | } mmio[2]; | |
200 | struct nd_region *nd_region; | |
201 | u64 bdw_offset; /* post interleave offset */ | |
202 | u64 stat_offset; | |
203 | u64 cmd_offset; | |
f0f2c072 | 204 | u32 dimm_flags; |
c2ad2954 RZ |
205 | }; |
206 | ||
6839a6d9 VV |
207 | extern struct list_head acpi_descs; |
208 | extern struct mutex acpi_desc_lock; | |
209 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc); | |
047fc8a1 | 210 | |
6839a6d9 VV |
211 | #ifdef CONFIG_X86_MCE |
212 | void nfit_mce_register(void); | |
213 | void nfit_mce_unregister(void); | |
214 | #else | |
215 | static inline void nfit_mce_register(void) | |
047fc8a1 | 216 | { |
047fc8a1 | 217 | } |
6839a6d9 VV |
218 | static inline void nfit_mce_unregister(void) |
219 | { | |
220 | } | |
221 | #endif | |
222 | ||
223 | int nfit_spa_type(struct acpi_nfit_system_address *spa); | |
047fc8a1 | 224 | |
b94d5230 DW |
225 | static inline struct acpi_nfit_memory_map *__to_nfit_memdev( |
226 | struct nfit_mem *nfit_mem) | |
227 | { | |
228 | if (nfit_mem->memdev_dcr) | |
229 | return nfit_mem->memdev_dcr; | |
230 | return nfit_mem->memdev_pmem; | |
231 | } | |
45def22c DW |
232 | |
233 | static inline struct acpi_nfit_desc *to_acpi_desc( | |
234 | struct nvdimm_bus_descriptor *nd_desc) | |
235 | { | |
236 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
237 | } | |
6bc75619 DW |
238 | |
239 | const u8 *to_nfit_uuid(enum nfit_uuids id); | |
e7a11b44 | 240 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz); |
c14a868a | 241 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event); |
231bf117 | 242 | void __acpi_nvdimm_notify(struct device *dev, u32 event); |
a7de92da DW |
243 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
244 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc); | |
a61fe6f7 | 245 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev); |
b94d5230 | 246 | #endif /* __NFIT_H__ */ |