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5b497af4 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b94d5230 DW |
2 | /* |
3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
b94d5230 DW |
4 | */ |
5 | #include <linux/list_sort.h> | |
6 | #include <linux/libnvdimm.h> | |
7 | #include <linux/module.h> | |
047fc8a1 | 8 | #include <linux/mutex.h> |
62232e45 | 9 | #include <linux/ndctl.h> |
37b137ff | 10 | #include <linux/sysfs.h> |
0caeef63 | 11 | #include <linux/delay.h> |
b94d5230 DW |
12 | #include <linux/list.h> |
13 | #include <linux/acpi.h> | |
eaf96153 | 14 | #include <linux/sort.h> |
047fc8a1 | 15 | #include <linux/io.h> |
1cf03c00 | 16 | #include <linux/nd.h> |
96601adb | 17 | #include <asm/cacheflush.h> |
23222f8f | 18 | #include <acpi/nfit.h> |
b3ed2ce0 | 19 | #include "intel.h" |
b94d5230 DW |
20 | #include "nfit.h" |
21 | ||
047fc8a1 RZ |
22 | /* |
23 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
24 | * irrelevant. | |
25 | */ | |
2f8e2c87 | 26 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 27 | |
4d88a97a DW |
28 | static bool force_enable_dimms; |
29 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
30 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
31 | ||
87554098 DW |
32 | static bool disable_vendor_specific; |
33 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
34 | MODULE_PARM_DESC(disable_vendor_specific, | |
f2668fa7 | 35 | "Limit commands to the publicly specified set"); |
87554098 | 36 | |
095ab4b3 LK |
37 | static unsigned long override_dsm_mask; |
38 | module_param(override_dsm_mask, ulong, S_IRUGO); | |
39 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); | |
40 | ||
ba650cfc LK |
41 | static int default_dsm_family = -1; |
42 | module_param(default_dsm_family, int, S_IRUGO); | |
43 | MODULE_PARM_DESC(default_dsm_family, | |
44 | "Try this DSM type first when identifying NVDIMM family"); | |
45 | ||
bca811a7 DW |
46 | static bool no_init_ars; |
47 | module_param(no_init_ars, bool, 0644); | |
48 | MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time"); | |
49 | ||
0171b6b7 DW |
50 | static bool force_labels; |
51 | module_param(force_labels, bool, 0444); | |
52 | MODULE_PARM_DESC(force_labels, "Opt-in to labels despite missing methods"); | |
53 | ||
6839a6d9 VV |
54 | LIST_HEAD(acpi_descs); |
55 | DEFINE_MUTEX(acpi_desc_lock); | |
56 | ||
7ae0fa43 DW |
57 | static struct workqueue_struct *nfit_wq; |
58 | ||
20985164 VV |
59 | struct nfit_table_prev { |
60 | struct list_head spas; | |
61 | struct list_head memdevs; | |
62 | struct list_head dcrs; | |
63 | struct list_head bdws; | |
64 | struct list_head idts; | |
65 | struct list_head flushes; | |
66 | }; | |
67 | ||
41c8bdb3 | 68 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
b94d5230 | 69 | |
41c8bdb3 | 70 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 | 71 | { |
41c8bdb3 | 72 | return &nfit_uuid[id]; |
b94d5230 | 73 | } |
6bc75619 | 74 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 75 | |
62232e45 DW |
76 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
77 | { | |
78 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
79 | ||
80 | /* | |
81 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
82 | * acpi_device. | |
83 | */ | |
84 | if (!nd_desc->provider_name | |
85 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
86 | return NULL; | |
87 | ||
88 | return to_acpi_device(acpi_desc->dev); | |
89 | } | |
90 | ||
d6eb270c | 91 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 92 | { |
d4f32367 | 93 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 94 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
95 | u16 flags; |
96 | ||
97 | switch (cmd) { | |
98 | case ND_CMD_ARS_CAP: | |
11294d63 | 99 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
100 | return -ENOTTY; |
101 | ||
102 | /* Command failed */ | |
11294d63 | 103 | if (status & 0xffff) |
aef25338 DW |
104 | return -EIO; |
105 | ||
106 | /* No supported scan types for this range */ | |
107 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 108 | if ((status >> 16 & flags) == 0) |
aef25338 | 109 | return -ENOTTY; |
9a901f54 | 110 | return 0; |
aef25338 | 111 | case ND_CMD_ARS_START: |
aef25338 | 112 | /* ARS is in progress */ |
11294d63 | 113 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
114 | return -EBUSY; |
115 | ||
116 | /* Command failed */ | |
11294d63 | 117 | if (status & 0xffff) |
aef25338 | 118 | return -EIO; |
9a901f54 | 119 | return 0; |
aef25338 DW |
120 | case ND_CMD_ARS_STATUS: |
121 | ars_status = buf; | |
122 | /* Command failed */ | |
11294d63 | 123 | if (status & 0xffff) |
aef25338 DW |
124 | return -EIO; |
125 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 126 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
127 | return 0; |
128 | ||
129 | /* ARS is in progress */ | |
11294d63 | 130 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
131 | return -EBUSY; |
132 | ||
133 | /* No ARS performed for the current boot */ | |
11294d63 | 134 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
135 | return -EAGAIN; |
136 | ||
137 | /* | |
138 | * ARS interrupted, either we overflowed or some other | |
139 | * agent wants the scan to stop. If we didn't overflow | |
140 | * then just continue with the returned results. | |
141 | */ | |
11294d63 | 142 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
143 | if (ars_status->out_length >= 40 && (ars_status->flags |
144 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
145 | return -ENOSPC; |
146 | return 0; | |
147 | } | |
148 | ||
149 | /* Unknown status */ | |
11294d63 | 150 | if (status >> 16) |
aef25338 | 151 | return -EIO; |
9a901f54 | 152 | return 0; |
d4f32367 DW |
153 | case ND_CMD_CLEAR_ERROR: |
154 | clear_err = buf; | |
11294d63 | 155 | if (status & 0xffff) |
d4f32367 DW |
156 | return -EIO; |
157 | if (!clear_err->cleared) | |
158 | return -EIO; | |
159 | if (clear_err->length > clear_err->cleared) | |
160 | return clear_err->cleared; | |
9a901f54 | 161 | return 0; |
aef25338 DW |
162 | default: |
163 | break; | |
164 | } | |
165 | ||
11294d63 DW |
166 | /* all other non-zero status results in an error */ |
167 | if (status) | |
168 | return -EIO; | |
aef25338 DW |
169 | return 0; |
170 | } | |
171 | ||
4b27db7e DW |
172 | #define ACPI_LABELS_LOCKED 3 |
173 | ||
174 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, | |
175 | u32 status) | |
9d62ed96 | 176 | { |
4b27db7e DW |
177 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
178 | ||
9d62ed96 DW |
179 | switch (cmd) { |
180 | case ND_CMD_GET_CONFIG_SIZE: | |
4b27db7e DW |
181 | /* |
182 | * In the _LSI, _LSR, _LSW case the locked status is | |
183 | * communicated via the read/write commands | |
184 | */ | |
6f07f86c | 185 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) |
4b27db7e DW |
186 | break; |
187 | ||
9d62ed96 DW |
188 | if (status >> 16 & ND_CONFIG_LOCKED) |
189 | return -EACCES; | |
190 | break; | |
4b27db7e | 191 | case ND_CMD_GET_CONFIG_DATA: |
6f07f86c DW |
192 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
193 | && status == ACPI_LABELS_LOCKED) | |
4b27db7e DW |
194 | return -EACCES; |
195 | break; | |
196 | case ND_CMD_SET_CONFIG_DATA: | |
6f07f86c DW |
197 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags) |
198 | && status == ACPI_LABELS_LOCKED) | |
4b27db7e DW |
199 | return -EACCES; |
200 | break; | |
9d62ed96 DW |
201 | default: |
202 | break; | |
203 | } | |
204 | ||
205 | /* all other non-zero status results in an error */ | |
206 | if (status) | |
207 | return -EIO; | |
208 | return 0; | |
209 | } | |
210 | ||
d6eb270c DW |
211 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
212 | u32 status) | |
213 | { | |
214 | if (!nvdimm) | |
215 | return xlat_bus_status(buf, cmd, status); | |
4b27db7e DW |
216 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
217 | } | |
218 | ||
219 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ | |
220 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) | |
221 | { | |
222 | int i; | |
223 | void *dst; | |
224 | size_t size = 0; | |
225 | union acpi_object *buf = NULL; | |
226 | ||
227 | if (pkg->type != ACPI_TYPE_PACKAGE) { | |
228 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
229 | pkg->type); | |
230 | goto err; | |
231 | } | |
232 | ||
233 | for (i = 0; i < pkg->package.count; i++) { | |
234 | union acpi_object *obj = &pkg->package.elements[i]; | |
235 | ||
236 | if (obj->type == ACPI_TYPE_INTEGER) | |
237 | size += 4; | |
238 | else if (obj->type == ACPI_TYPE_BUFFER) | |
239 | size += obj->buffer.length; | |
240 | else { | |
241 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
242 | obj->type); | |
243 | goto err; | |
244 | } | |
245 | } | |
246 | ||
247 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); | |
248 | if (!buf) | |
249 | goto err; | |
250 | ||
251 | dst = buf + 1; | |
252 | buf->type = ACPI_TYPE_BUFFER; | |
253 | buf->buffer.length = size; | |
254 | buf->buffer.pointer = dst; | |
255 | for (i = 0; i < pkg->package.count; i++) { | |
256 | union acpi_object *obj = &pkg->package.elements[i]; | |
257 | ||
258 | if (obj->type == ACPI_TYPE_INTEGER) { | |
259 | memcpy(dst, &obj->integer.value, 4); | |
260 | dst += 4; | |
261 | } else if (obj->type == ACPI_TYPE_BUFFER) { | |
262 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); | |
263 | dst += obj->buffer.length; | |
264 | } | |
265 | } | |
266 | err: | |
267 | ACPI_FREE(pkg); | |
268 | return buf; | |
269 | } | |
270 | ||
271 | static union acpi_object *int_to_buf(union acpi_object *integer) | |
272 | { | |
273 | union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4); | |
274 | void *dst = NULL; | |
275 | ||
276 | if (!buf) | |
277 | goto err; | |
278 | ||
279 | if (integer->type != ACPI_TYPE_INTEGER) { | |
280 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
281 | integer->type); | |
282 | goto err; | |
283 | } | |
284 | ||
285 | dst = buf + 1; | |
286 | buf->type = ACPI_TYPE_BUFFER; | |
287 | buf->buffer.length = 4; | |
288 | buf->buffer.pointer = dst; | |
289 | memcpy(dst, &integer->integer.value, 4); | |
290 | err: | |
291 | ACPI_FREE(integer); | |
292 | return buf; | |
293 | } | |
294 | ||
295 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, | |
296 | u32 len, void *data) | |
297 | { | |
298 | acpi_status rc; | |
299 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
300 | struct acpi_object_list input = { | |
301 | .count = 3, | |
302 | .pointer = (union acpi_object []) { | |
303 | [0] = { | |
304 | .integer.type = ACPI_TYPE_INTEGER, | |
305 | .integer.value = offset, | |
306 | }, | |
307 | [1] = { | |
308 | .integer.type = ACPI_TYPE_INTEGER, | |
309 | .integer.value = len, | |
310 | }, | |
311 | [2] = { | |
312 | .buffer.type = ACPI_TYPE_BUFFER, | |
313 | .buffer.pointer = data, | |
314 | .buffer.length = len, | |
315 | }, | |
316 | }, | |
317 | }; | |
318 | ||
319 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); | |
320 | if (ACPI_FAILURE(rc)) | |
321 | return NULL; | |
322 | return int_to_buf(buf.pointer); | |
323 | } | |
324 | ||
325 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, | |
326 | u32 len) | |
327 | { | |
328 | acpi_status rc; | |
329 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
330 | struct acpi_object_list input = { | |
331 | .count = 2, | |
332 | .pointer = (union acpi_object []) { | |
333 | [0] = { | |
334 | .integer.type = ACPI_TYPE_INTEGER, | |
335 | .integer.value = offset, | |
336 | }, | |
337 | [1] = { | |
338 | .integer.type = ACPI_TYPE_INTEGER, | |
339 | .integer.value = len, | |
340 | }, | |
341 | }, | |
342 | }; | |
343 | ||
344 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); | |
345 | if (ACPI_FAILURE(rc)) | |
346 | return NULL; | |
347 | return pkg_to_buf(buf.pointer); | |
348 | } | |
349 | ||
350 | static union acpi_object *acpi_label_info(acpi_handle handle) | |
351 | { | |
352 | acpi_status rc; | |
353 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
354 | ||
355 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); | |
356 | if (ACPI_FAILURE(rc)) | |
357 | return NULL; | |
358 | return pkg_to_buf(buf.pointer); | |
d6eb270c DW |
359 | } |
360 | ||
11e14270 DW |
361 | static u8 nfit_dsm_revid(unsigned family, unsigned func) |
362 | { | |
363 | static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = { | |
364 | [NVDIMM_FAMILY_INTEL] = { | |
365 | [NVDIMM_INTEL_GET_MODES] = 2, | |
366 | [NVDIMM_INTEL_GET_FWINFO] = 2, | |
367 | [NVDIMM_INTEL_START_FWUPDATE] = 2, | |
368 | [NVDIMM_INTEL_SEND_FWUPDATE] = 2, | |
369 | [NVDIMM_INTEL_FINISH_FWUPDATE] = 2, | |
370 | [NVDIMM_INTEL_QUERY_FWUPDATE] = 2, | |
371 | [NVDIMM_INTEL_SET_THRESHOLD] = 2, | |
372 | [NVDIMM_INTEL_INJECT_ERROR] = 2, | |
b3ed2ce0 DJ |
373 | [NVDIMM_INTEL_GET_SECURITY_STATE] = 2, |
374 | [NVDIMM_INTEL_SET_PASSPHRASE] = 2, | |
375 | [NVDIMM_INTEL_DISABLE_PASSPHRASE] = 2, | |
376 | [NVDIMM_INTEL_UNLOCK_UNIT] = 2, | |
377 | [NVDIMM_INTEL_FREEZE_LOCK] = 2, | |
378 | [NVDIMM_INTEL_SECURE_ERASE] = 2, | |
379 | [NVDIMM_INTEL_OVERWRITE] = 2, | |
380 | [NVDIMM_INTEL_QUERY_OVERWRITE] = 2, | |
89fa9d8e DJ |
381 | [NVDIMM_INTEL_SET_MASTER_PASSPHRASE] = 2, |
382 | [NVDIMM_INTEL_MASTER_SECURE_ERASE] = 2, | |
11e14270 DW |
383 | }, |
384 | }; | |
385 | u8 id; | |
386 | ||
387 | if (family > NVDIMM_FAMILY_MAX) | |
388 | return 0; | |
389 | if (func > 31) | |
390 | return 0; | |
391 | id = revid_table[family][func]; | |
392 | if (id == 0) | |
393 | return 1; /* default */ | |
394 | return id; | |
395 | } | |
396 | ||
b3ed2ce0 DJ |
397 | static bool payload_dumpable(struct nvdimm *nvdimm, unsigned int func) |
398 | { | |
399 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
400 | ||
401 | if (nfit_mem && nfit_mem->family == NVDIMM_FAMILY_INTEL | |
402 | && func >= NVDIMM_INTEL_GET_SECURITY_STATE | |
403 | && func <= NVDIMM_INTEL_MASTER_SECURE_ERASE) | |
404 | return IS_ENABLED(CONFIG_NFIT_SECURITY_DEBUG); | |
405 | return true; | |
406 | } | |
407 | ||
11189c10 DW |
408 | static int cmd_to_func(struct nfit_mem *nfit_mem, unsigned int cmd, |
409 | struct nd_cmd_pkg *call_pkg) | |
410 | { | |
411 | if (call_pkg) { | |
412 | int i; | |
413 | ||
ebe9f6f1 | 414 | if (nfit_mem && nfit_mem->family != call_pkg->nd_family) |
11189c10 DW |
415 | return -ENOTTY; |
416 | ||
417 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) | |
418 | if (call_pkg->nd_reserved2[i]) | |
419 | return -EINVAL; | |
420 | return call_pkg->nd_command; | |
421 | } | |
422 | ||
ebe9f6f1 DW |
423 | /* In the !call_pkg case, bus commands == bus functions */ |
424 | if (!nfit_mem) | |
425 | return cmd; | |
426 | ||
11189c10 DW |
427 | /* Linux ND commands == NVDIMM_FAMILY_INTEL function numbers */ |
428 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
429 | return cmd; | |
430 | ||
431 | /* | |
432 | * Force function number validation to fail since 0 is never | |
433 | * published as a valid function in dsm_mask. | |
434 | */ | |
435 | return 0; | |
436 | } | |
437 | ||
a7de92da DW |
438 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
439 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) | |
b94d5230 | 440 | { |
8a7f02f6 | 441 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
4b27db7e | 442 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
62232e45 | 443 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 444 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 445 | struct device *dev = acpi_desc->dev; |
31eca76b | 446 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 447 | const char *cmd_name, *dimm_name; |
31eca76b | 448 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 449 | u32 offset, fw_status = 0; |
62232e45 | 450 | acpi_handle handle; |
41c8bdb3 | 451 | const guid_t *guid; |
11189c10 | 452 | int func, rc, i; |
62232e45 | 453 | |
ee6581ce DJ |
454 | if (cmd_rc) |
455 | *cmd_rc = -EINVAL; | |
31eca76b | 456 | |
ebe9f6f1 DW |
457 | if (cmd == ND_CMD_CALL) |
458 | call_pkg = buf; | |
459 | func = cmd_to_func(nfit_mem, cmd, call_pkg); | |
460 | if (func < 0) | |
461 | return func; | |
462 | ||
62232e45 | 463 | if (nvdimm) { |
62232e45 DW |
464 | struct acpi_device *adev = nfit_mem->adev; |
465 | ||
466 | if (!adev) | |
467 | return -ENOTTY; | |
31eca76b | 468 | |
047fc8a1 | 469 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 470 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 471 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
472 | dsm_mask = nfit_mem->dsm_mask; |
473 | desc = nd_cmd_dimm_desc(cmd); | |
41c8bdb3 | 474 | guid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
475 | handle = adev->handle; |
476 | } else { | |
477 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
478 | ||
479 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 480 | cmd_mask = nd_desc->cmd_mask; |
ebe9f6f1 | 481 | dsm_mask = nd_desc->bus_dsm_mask; |
62232e45 | 482 | desc = nd_cmd_bus_desc(cmd); |
41c8bdb3 | 483 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 DW |
484 | handle = adev->handle; |
485 | dimm_name = "bus"; | |
486 | } | |
487 | ||
488 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
489 | return -ENOTTY; | |
490 | ||
11189c10 DW |
491 | /* |
492 | * Check for a valid command. For ND_CMD_CALL, we also have to | |
493 | * make sure that the DSM function is supported. | |
494 | */ | |
495 | if (cmd == ND_CMD_CALL && !test_bit(func, &dsm_mask)) | |
496 | return -ENOTTY; | |
497 | else if (!test_bit(cmd, &cmd_mask)) | |
62232e45 DW |
498 | return -ENOTTY; |
499 | ||
500 | in_obj.type = ACPI_TYPE_PACKAGE; | |
501 | in_obj.package.count = 1; | |
502 | in_obj.package.elements = &in_buf; | |
503 | in_buf.type = ACPI_TYPE_BUFFER; | |
504 | in_buf.buffer.pointer = buf; | |
505 | in_buf.buffer.length = 0; | |
506 | ||
507 | /* libnvdimm has already validated the input envelope */ | |
508 | for (i = 0; i < desc->in_num; i++) | |
509 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
510 | i, buf); | |
511 | ||
31eca76b DW |
512 | if (call_pkg) { |
513 | /* skip over package wrapper */ | |
514 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
515 | in_buf.buffer.length = call_pkg->nd_size_in; | |
516 | } | |
517 | ||
b814735f JT |
518 | dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n", |
519 | dimm_name, cmd, func, in_buf.buffer.length); | |
b3ed2ce0 DJ |
520 | if (payload_dumpable(nvdimm, func)) |
521 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
522 | in_buf.buffer.pointer, | |
523 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 | 524 | |
4b27db7e | 525 | /* call the BIOS, prefer the named methods over _DSM if available */ |
6f07f86c DW |
526 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE |
527 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) | |
4b27db7e | 528 | out_obj = acpi_label_info(handle); |
6f07f86c DW |
529 | else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA |
530 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { | |
4b27db7e DW |
531 | struct nd_cmd_get_config_data_hdr *p = buf; |
532 | ||
533 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); | |
0e7f0741 | 534 | } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA |
6f07f86c | 535 | && test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) { |
4b27db7e DW |
536 | struct nd_cmd_set_config_hdr *p = buf; |
537 | ||
538 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, | |
539 | p->in_buf); | |
11e14270 DW |
540 | } else { |
541 | u8 revid; | |
542 | ||
0e7f0741 | 543 | if (nvdimm) |
11e14270 DW |
544 | revid = nfit_dsm_revid(nfit_mem->family, func); |
545 | else | |
546 | revid = 1; | |
547 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); | |
548 | } | |
4b27db7e | 549 | |
62232e45 | 550 | if (!out_obj) { |
b814735f | 551 | dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name); |
62232e45 DW |
552 | return -EINVAL; |
553 | } | |
554 | ||
43f89877 DC |
555 | if (out_obj->type != ACPI_TYPE_BUFFER) { |
556 | dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n", | |
557 | dimm_name, cmd_name, out_obj->type); | |
558 | rc = -EINVAL; | |
559 | goto out; | |
560 | } | |
561 | ||
351f339f DW |
562 | dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name, |
563 | cmd_name, out_obj->buffer.length); | |
564 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, | |
565 | out_obj->buffer.pointer, | |
566 | min_t(u32, 128, out_obj->buffer.length), true); | |
567 | ||
31eca76b DW |
568 | if (call_pkg) { |
569 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
570 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
571 | out_obj->buffer.pointer, | |
572 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
573 | ||
574 | ACPI_FREE(out_obj); | |
575 | /* | |
576 | * Need to support FW function w/o known size in advance. | |
577 | * Caller can determine required size based upon nd_fw_size. | |
578 | * If we return an error (like elsewhere) then caller wouldn't | |
579 | * be able to rely upon data returned to make calculation. | |
580 | */ | |
ee6581ce DJ |
581 | if (cmd_rc) |
582 | *cmd_rc = 0; | |
31eca76b DW |
583 | return 0; |
584 | } | |
585 | ||
62232e45 DW |
586 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
587 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
588 | (u32 *) out_obj->buffer.pointer, |
589 | out_obj->buffer.length - offset); | |
62232e45 DW |
590 | |
591 | if (offset + out_size > out_obj->buffer.length) { | |
b814735f JT |
592 | dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n", |
593 | dimm_name, cmd_name, i); | |
62232e45 DW |
594 | break; |
595 | } | |
596 | ||
597 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
b814735f JT |
598 | dev_dbg(dev, "%s output overrun cmd: %s field: %d\n", |
599 | dimm_name, cmd_name, i); | |
62232e45 DW |
600 | rc = -ENXIO; |
601 | goto out; | |
602 | } | |
603 | memcpy(buf + in_buf.buffer.length + offset, | |
604 | out_obj->buffer.pointer + offset, out_size); | |
605 | offset += out_size; | |
606 | } | |
11294d63 DW |
607 | |
608 | /* | |
609 | * Set fw_status for all the commands with a known format to be | |
610 | * later interpreted by xlat_status(). | |
611 | */ | |
0e7f0741 DW |
612 | if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP |
613 | && cmd <= ND_CMD_CLEAR_ERROR) | |
614 | || (nvdimm && cmd >= ND_CMD_SMART | |
615 | && cmd <= ND_CMD_VENDOR))) | |
11294d63 DW |
616 | fw_status = *(u32 *) out_obj->buffer.pointer; |
617 | ||
62232e45 DW |
618 | if (offset + in_buf.buffer.length < buf_len) { |
619 | if (i >= 1) { | |
620 | /* | |
621 | * status valid, return the number of bytes left | |
622 | * unfilled in the output buffer | |
623 | */ | |
624 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 625 | if (cmd_rc) |
d6eb270c DW |
626 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
627 | fw_status); | |
62232e45 DW |
628 | } else { |
629 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
630 | __func__, dimm_name, cmd_name, buf_len, | |
631 | offset); | |
632 | rc = -ENXIO; | |
633 | } | |
2eea6582 | 634 | } else { |
62232e45 | 635 | rc = 0; |
2eea6582 | 636 | if (cmd_rc) |
d6eb270c | 637 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
2eea6582 | 638 | } |
62232e45 DW |
639 | |
640 | out: | |
641 | ACPI_FREE(out_obj); | |
642 | ||
643 | return rc; | |
b94d5230 | 644 | } |
a7de92da | 645 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
b94d5230 DW |
646 | |
647 | static const char *spa_type_name(u16 type) | |
648 | { | |
649 | static const char *to_name[] = { | |
650 | [NFIT_SPA_VOLATILE] = "volatile", | |
651 | [NFIT_SPA_PM] = "pmem", | |
652 | [NFIT_SPA_DCR] = "dimm-control-region", | |
653 | [NFIT_SPA_BDW] = "block-data-window", | |
654 | [NFIT_SPA_VDISK] = "volatile-disk", | |
655 | [NFIT_SPA_VCD] = "volatile-cd", | |
656 | [NFIT_SPA_PDISK] = "persistent-disk", | |
657 | [NFIT_SPA_PCD] = "persistent-cd", | |
658 | ||
659 | }; | |
660 | ||
661 | if (type > NFIT_SPA_PCD) | |
662 | return "unknown"; | |
663 | ||
664 | return to_name[type]; | |
665 | } | |
666 | ||
6839a6d9 | 667 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 DW |
668 | { |
669 | int i; | |
670 | ||
671 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
41c8bdb3 | 672 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
b94d5230 DW |
673 | return i; |
674 | return -1; | |
675 | } | |
676 | ||
677 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 678 | struct nfit_table_prev *prev, |
b94d5230 DW |
679 | struct acpi_nfit_system_address *spa) |
680 | { | |
681 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
682 | struct nfit_spa *nfit_spa; |
683 | ||
31932041 DW |
684 | if (spa->header.length != sizeof(*spa)) |
685 | return false; | |
686 | ||
20985164 | 687 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
31932041 | 688 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
20985164 VV |
689 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
690 | return true; | |
691 | } | |
692 | } | |
b94d5230 | 693 | |
31932041 DW |
694 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
695 | GFP_KERNEL); | |
b94d5230 DW |
696 | if (!nfit_spa) |
697 | return false; | |
698 | INIT_LIST_HEAD(&nfit_spa->list); | |
31932041 | 699 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
b94d5230 | 700 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
b814735f | 701 | dev_dbg(dev, "spa index: %d type: %s\n", |
b94d5230 DW |
702 | spa->range_index, |
703 | spa_type_name(nfit_spa_type(spa))); | |
704 | return true; | |
705 | } | |
706 | ||
707 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 708 | struct nfit_table_prev *prev, |
b94d5230 DW |
709 | struct acpi_nfit_memory_map *memdev) |
710 | { | |
711 | struct device *dev = acpi_desc->dev; | |
20985164 | 712 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 713 | |
31932041 DW |
714 | if (memdev->header.length != sizeof(*memdev)) |
715 | return false; | |
716 | ||
20985164 | 717 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 718 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
719 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
720 | return true; | |
721 | } | |
722 | ||
31932041 DW |
723 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
724 | GFP_KERNEL); | |
b94d5230 DW |
725 | if (!nfit_memdev) |
726 | return false; | |
727 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 728 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 | 729 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
b814735f JT |
730 | dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
731 | memdev->device_handle, memdev->range_index, | |
caa603aa | 732 | memdev->region_index, memdev->flags); |
b94d5230 DW |
733 | return true; |
734 | } | |
735 | ||
23222f8f TL |
736 | int nfit_get_smbios_id(u32 device_handle, u16 *flags) |
737 | { | |
738 | struct acpi_nfit_memory_map *memdev; | |
739 | struct acpi_nfit_desc *acpi_desc; | |
740 | struct nfit_mem *nfit_mem; | |
0919871a | 741 | u16 physical_id; |
23222f8f TL |
742 | |
743 | mutex_lock(&acpi_desc_lock); | |
744 | list_for_each_entry(acpi_desc, &acpi_descs, list) { | |
745 | mutex_lock(&acpi_desc->init_mutex); | |
746 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
747 | memdev = __to_nfit_memdev(nfit_mem); | |
748 | if (memdev->device_handle == device_handle) { | |
0919871a TL |
749 | *flags = memdev->flags; |
750 | physical_id = memdev->physical_id; | |
23222f8f TL |
751 | mutex_unlock(&acpi_desc->init_mutex); |
752 | mutex_unlock(&acpi_desc_lock); | |
0919871a | 753 | return physical_id; |
23222f8f TL |
754 | } |
755 | } | |
756 | mutex_unlock(&acpi_desc->init_mutex); | |
757 | } | |
758 | mutex_unlock(&acpi_desc_lock); | |
759 | ||
760 | return -ENODEV; | |
761 | } | |
762 | EXPORT_SYMBOL_GPL(nfit_get_smbios_id); | |
763 | ||
31932041 DW |
764 | /* |
765 | * An implementation may provide a truncated control region if no block windows | |
766 | * are defined. | |
767 | */ | |
768 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
769 | { | |
770 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
771 | window_size)) | |
772 | return 0; | |
773 | if (dcr->windows) | |
774 | return sizeof(*dcr); | |
775 | return offsetof(struct acpi_nfit_control_region, window_size); | |
776 | } | |
777 | ||
b94d5230 | 778 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 779 | struct nfit_table_prev *prev, |
b94d5230 DW |
780 | struct acpi_nfit_control_region *dcr) |
781 | { | |
782 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
783 | struct nfit_dcr *nfit_dcr; |
784 | ||
31932041 DW |
785 | if (!sizeof_dcr(dcr)) |
786 | return false; | |
787 | ||
20985164 | 788 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 789 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
790 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
791 | return true; | |
792 | } | |
b94d5230 | 793 | |
31932041 DW |
794 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
795 | GFP_KERNEL); | |
b94d5230 DW |
796 | if (!nfit_dcr) |
797 | return false; | |
798 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 799 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 | 800 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
b814735f | 801 | dev_dbg(dev, "dcr index: %d windows: %d\n", |
b94d5230 DW |
802 | dcr->region_index, dcr->windows); |
803 | return true; | |
804 | } | |
805 | ||
806 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 807 | struct nfit_table_prev *prev, |
b94d5230 DW |
808 | struct acpi_nfit_data_region *bdw) |
809 | { | |
810 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
811 | struct nfit_bdw *nfit_bdw; |
812 | ||
31932041 DW |
813 | if (bdw->header.length != sizeof(*bdw)) |
814 | return false; | |
20985164 | 815 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 816 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
817 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
818 | return true; | |
819 | } | |
b94d5230 | 820 | |
31932041 DW |
821 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
822 | GFP_KERNEL); | |
b94d5230 DW |
823 | if (!nfit_bdw) |
824 | return false; | |
825 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 826 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 | 827 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
b814735f | 828 | dev_dbg(dev, "bdw dcr: %d windows: %d\n", |
b94d5230 DW |
829 | bdw->region_index, bdw->windows); |
830 | return true; | |
831 | } | |
832 | ||
31932041 DW |
833 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
834 | { | |
835 | if (idt->header.length < sizeof(*idt)) | |
836 | return 0; | |
837 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); | |
838 | } | |
839 | ||
047fc8a1 | 840 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 841 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
842 | struct acpi_nfit_interleave *idt) |
843 | { | |
844 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
845 | struct nfit_idt *nfit_idt; |
846 | ||
31932041 DW |
847 | if (!sizeof_idt(idt)) |
848 | return false; | |
849 | ||
850 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
851 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
852 | continue; | |
853 | ||
854 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
855 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
856 | return true; | |
857 | } | |
31932041 | 858 | } |
047fc8a1 | 859 | |
31932041 DW |
860 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
861 | GFP_KERNEL); | |
047fc8a1 RZ |
862 | if (!nfit_idt) |
863 | return false; | |
864 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 865 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 | 866 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
b814735f | 867 | dev_dbg(dev, "idt index: %d num_lines: %d\n", |
047fc8a1 RZ |
868 | idt->interleave_index, idt->line_count); |
869 | return true; | |
870 | } | |
871 | ||
31932041 DW |
872 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
873 | { | |
874 | if (flush->header.length < sizeof(*flush)) | |
875 | return 0; | |
876 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); | |
877 | } | |
878 | ||
c2ad2954 | 879 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 880 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
881 | struct acpi_nfit_flush_address *flush) |
882 | { | |
883 | struct device *dev = acpi_desc->dev; | |
20985164 | 884 | struct nfit_flush *nfit_flush; |
c2ad2954 | 885 | |
31932041 DW |
886 | if (!sizeof_flush(flush)) |
887 | return false; | |
888 | ||
889 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
890 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
891 | continue; | |
892 | ||
893 | if (memcmp(nfit_flush->flush, flush, | |
894 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
895 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
896 | return true; | |
897 | } | |
31932041 | 898 | } |
20985164 | 899 | |
31932041 DW |
900 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
901 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
902 | if (!nfit_flush) |
903 | return false; | |
904 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 905 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 | 906 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
b814735f | 907 | dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n", |
c2ad2954 RZ |
908 | flush->device_handle, flush->hint_count); |
909 | return true; | |
910 | } | |
911 | ||
06e8ccda DJ |
912 | static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc, |
913 | struct acpi_nfit_capabilities *pcap) | |
914 | { | |
915 | struct device *dev = acpi_desc->dev; | |
916 | u32 mask; | |
917 | ||
918 | mask = (1 << (pcap->highest_capability + 1)) - 1; | |
919 | acpi_desc->platform_cap = pcap->capabilities & mask; | |
b814735f | 920 | dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap); |
06e8ccda DJ |
921 | return true; |
922 | } | |
923 | ||
20985164 VV |
924 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
925 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
926 | { |
927 | struct device *dev = acpi_desc->dev; | |
928 | struct acpi_nfit_header *hdr; | |
929 | void *err = ERR_PTR(-ENOMEM); | |
930 | ||
931 | if (table >= end) | |
932 | return NULL; | |
933 | ||
934 | hdr = table; | |
564d5011 VV |
935 | if (!hdr->length) { |
936 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
937 | hdr->type); | |
938 | return NULL; | |
939 | } | |
940 | ||
b94d5230 DW |
941 | switch (hdr->type) { |
942 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 943 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
944 | return err; |
945 | break; | |
946 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 947 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
948 | return err; |
949 | break; | |
950 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 951 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
952 | return err; |
953 | break; | |
954 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 955 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
956 | return err; |
957 | break; | |
b94d5230 | 958 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 959 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 960 | return err; |
b94d5230 DW |
961 | break; |
962 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 963 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 964 | return err; |
b94d5230 DW |
965 | break; |
966 | case ACPI_NFIT_TYPE_SMBIOS: | |
b814735f | 967 | dev_dbg(dev, "smbios\n"); |
b94d5230 | 968 | break; |
06e8ccda DJ |
969 | case ACPI_NFIT_TYPE_CAPABILITIES: |
970 | if (!add_platform_cap(acpi_desc, table)) | |
971 | return err; | |
972 | break; | |
b94d5230 DW |
973 | default: |
974 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
975 | break; | |
976 | } | |
977 | ||
978 | return table + hdr->length; | |
979 | } | |
980 | ||
981 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
982 | struct nfit_mem *nfit_mem) | |
983 | { | |
984 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
985 | u16 dcr = nfit_mem->dcr->region_index; | |
986 | struct nfit_spa *nfit_spa; | |
987 | ||
988 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
989 | u16 range_index = nfit_spa->spa->range_index; | |
990 | int type = nfit_spa_type(nfit_spa->spa); | |
991 | struct nfit_memdev *nfit_memdev; | |
992 | ||
993 | if (type != NFIT_SPA_BDW) | |
994 | continue; | |
995 | ||
996 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
997 | if (nfit_memdev->memdev->range_index != range_index) | |
998 | continue; | |
999 | if (nfit_memdev->memdev->device_handle != device_handle) | |
1000 | continue; | |
1001 | if (nfit_memdev->memdev->region_index != dcr) | |
1002 | continue; | |
1003 | ||
1004 | nfit_mem->spa_bdw = nfit_spa->spa; | |
1005 | return; | |
1006 | } | |
1007 | } | |
1008 | ||
1009 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
1010 | nfit_mem->spa_dcr->range_index); | |
1011 | nfit_mem->bdw = NULL; | |
1012 | } | |
1013 | ||
6697b2cf | 1014 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
1015 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
1016 | { | |
1017 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 1018 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 1019 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
1020 | struct nfit_idt *nfit_idt; |
1021 | u16 idt_idx, range_index; | |
b94d5230 | 1022 | |
b94d5230 DW |
1023 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
1024 | if (nfit_bdw->bdw->region_index != dcr) | |
1025 | continue; | |
1026 | nfit_mem->bdw = nfit_bdw->bdw; | |
1027 | break; | |
1028 | } | |
1029 | ||
1030 | if (!nfit_mem->bdw) | |
6697b2cf | 1031 | return; |
b94d5230 DW |
1032 | |
1033 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
1034 | |
1035 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 1036 | return; |
047fc8a1 RZ |
1037 | |
1038 | range_index = nfit_mem->spa_bdw->range_index; | |
1039 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1040 | if (nfit_memdev->memdev->range_index != range_index || | |
1041 | nfit_memdev->memdev->region_index != dcr) | |
1042 | continue; | |
1043 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
1044 | idt_idx = nfit_memdev->memdev->interleave_index; | |
1045 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
1046 | if (nfit_idt->idt->interleave_index != idt_idx) | |
1047 | continue; | |
1048 | nfit_mem->idt_bdw = nfit_idt->idt; | |
1049 | break; | |
1050 | } | |
1051 | break; | |
1052 | } | |
b94d5230 DW |
1053 | } |
1054 | ||
1499934d | 1055 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
1056 | struct acpi_nfit_system_address *spa) |
1057 | { | |
1058 | struct nfit_mem *nfit_mem, *found; | |
1059 | struct nfit_memdev *nfit_memdev; | |
1499934d | 1060 | int type = spa ? nfit_spa_type(spa) : 0; |
b94d5230 DW |
1061 | |
1062 | switch (type) { | |
1063 | case NFIT_SPA_DCR: | |
1064 | case NFIT_SPA_PM: | |
1065 | break; | |
1066 | default: | |
1499934d DW |
1067 | if (spa) |
1068 | return 0; | |
b94d5230 DW |
1069 | } |
1070 | ||
1499934d DW |
1071 | /* |
1072 | * This loop runs in two modes, when a dimm is mapped the loop | |
1073 | * adds memdev associations to an existing dimm, or creates a | |
1074 | * dimm. In the unmapped dimm case this loop sweeps for memdev | |
1075 | * instances with an invalid / zero range_index and adds those | |
1076 | * dimms without spa associations. | |
1077 | */ | |
b94d5230 | 1078 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
ad9ac5e1 | 1079 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
1080 | struct nfit_dcr *nfit_dcr; |
1081 | u32 device_handle; | |
1082 | u16 dcr; | |
b94d5230 | 1083 | |
1499934d DW |
1084 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
1085 | continue; | |
1086 | if (!spa && nfit_memdev->memdev->range_index) | |
b94d5230 DW |
1087 | continue; |
1088 | found = NULL; | |
1089 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 1090 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 1091 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
1092 | if (__to_nfit_memdev(nfit_mem)->device_handle |
1093 | == device_handle) { | |
b94d5230 DW |
1094 | found = nfit_mem; |
1095 | break; | |
1096 | } | |
1097 | ||
1098 | if (found) | |
1099 | nfit_mem = found; | |
1100 | else { | |
1101 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
1102 | sizeof(*nfit_mem), GFP_KERNEL); | |
1103 | if (!nfit_mem) | |
1104 | return -ENOMEM; | |
1105 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 1106 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
1107 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
1108 | } | |
1109 | ||
1110 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1111 | if (nfit_dcr->dcr->region_index != dcr) | |
1112 | continue; | |
1113 | /* | |
1114 | * Record the control region for the dimm. For | |
1115 | * the ACPI 6.1 case, where there are separate | |
1116 | * control regions for the pmem vs blk | |
1117 | * interfaces, be sure to record the extended | |
1118 | * blk details. | |
1119 | */ | |
1120 | if (!nfit_mem->dcr) | |
1121 | nfit_mem->dcr = nfit_dcr->dcr; | |
1122 | else if (nfit_mem->dcr->windows == 0 | |
1123 | && nfit_dcr->dcr->windows) | |
1124 | nfit_mem->dcr = nfit_dcr->dcr; | |
1125 | break; | |
1126 | } | |
1127 | ||
ad9ac5e1 | 1128 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
1129 | struct acpi_nfit_flush_address *flush; |
1130 | u16 i; | |
1131 | ||
ad9ac5e1 DW |
1132 | if (nfit_flush->flush->device_handle != device_handle) |
1133 | continue; | |
1134 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 | 1135 | flush = nfit_flush->flush; |
a86854d0 KC |
1136 | nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev, |
1137 | flush->hint_count, | |
1138 | sizeof(struct resource), | |
1139 | GFP_KERNEL); | |
e5ae3b25 DW |
1140 | if (!nfit_mem->flush_wpq) |
1141 | return -ENOMEM; | |
1142 | for (i = 0; i < flush->hint_count; i++) { | |
1143 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
1144 | ||
1145 | res->start = flush->hint_address[i]; | |
1146 | res->end = res->start + 8 - 1; | |
1147 | } | |
ad9ac5e1 DW |
1148 | break; |
1149 | } | |
1150 | ||
6697b2cf DW |
1151 | if (dcr && !nfit_mem->dcr) { |
1152 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
1153 | spa->range_index, dcr); | |
1154 | return -ENODEV; | |
b94d5230 DW |
1155 | } |
1156 | ||
1157 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
1158 | struct nfit_idt *nfit_idt; |
1159 | u16 idt_idx; | |
1160 | ||
b94d5230 DW |
1161 | /* multiple dimms may share a SPA when interleaved */ |
1162 | nfit_mem->spa_dcr = spa; | |
1163 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
1164 | idt_idx = nfit_memdev->memdev->interleave_index; |
1165 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
1166 | if (nfit_idt->idt->interleave_index != idt_idx) | |
1167 | continue; | |
1168 | nfit_mem->idt_dcr = nfit_idt->idt; | |
1169 | break; | |
1170 | } | |
6697b2cf | 1171 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
1499934d | 1172 | } else if (type == NFIT_SPA_PM) { |
b94d5230 DW |
1173 | /* |
1174 | * A single dimm may belong to multiple SPA-PM | |
1175 | * ranges, record at least one in addition to | |
1176 | * any SPA-DCR range. | |
1177 | */ | |
1178 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
1499934d DW |
1179 | } else |
1180 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
b94d5230 DW |
1181 | } |
1182 | ||
1183 | return 0; | |
1184 | } | |
1185 | ||
1186 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
1187 | { | |
1188 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
1189 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
1190 | u32 handleA, handleB; | |
1191 | ||
1192 | handleA = __to_nfit_memdev(a)->device_handle; | |
1193 | handleB = __to_nfit_memdev(b)->device_handle; | |
1194 | if (handleA < handleB) | |
1195 | return -1; | |
1196 | else if (handleA > handleB) | |
1197 | return 1; | |
1198 | return 0; | |
1199 | } | |
1200 | ||
1201 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
1202 | { | |
1203 | struct nfit_spa *nfit_spa; | |
1499934d DW |
1204 | int rc; |
1205 | ||
b94d5230 DW |
1206 | |
1207 | /* | |
1208 | * For each SPA-DCR or SPA-PMEM address range find its | |
1209 | * corresponding MEMDEV(s). From each MEMDEV find the | |
1210 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
1211 | * try to find a SPA-BDW and a corresponding BDW that references | |
1212 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
1213 | * BDWs are optional. | |
1214 | */ | |
1215 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
1499934d | 1216 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
b94d5230 DW |
1217 | if (rc) |
1218 | return rc; | |
1219 | } | |
1220 | ||
1499934d DW |
1221 | /* |
1222 | * If a DIMM has failed to be mapped into SPA there will be no | |
1223 | * SPA entries above. Find and register all the unmapped DIMMs | |
1224 | * for reporting and recovery purposes. | |
1225 | */ | |
1226 | rc = __nfit_mem_init(acpi_desc, NULL); | |
1227 | if (rc) | |
1228 | return rc; | |
1229 | ||
b94d5230 DW |
1230 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
1231 | ||
1232 | return 0; | |
1233 | } | |
1234 | ||
41f95db7 JH |
1235 | static ssize_t bus_dsm_mask_show(struct device *dev, |
1236 | struct device_attribute *attr, char *buf) | |
1237 | { | |
1238 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1239 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1240 | ||
1241 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); | |
1242 | } | |
1243 | static struct device_attribute dev_attr_bus_dsm_mask = | |
1244 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); | |
1245 | ||
45def22c DW |
1246 | static ssize_t revision_show(struct device *dev, |
1247 | struct device_attribute *attr, char *buf) | |
1248 | { | |
1249 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1250 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1251 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1252 | ||
6b577c9d | 1253 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
1254 | } |
1255 | static DEVICE_ATTR_RO(revision); | |
1256 | ||
9ffd6350 VV |
1257 | static ssize_t hw_error_scrub_show(struct device *dev, |
1258 | struct device_attribute *attr, char *buf) | |
1259 | { | |
1260 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1261 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1262 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1263 | ||
1264 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
1265 | } | |
1266 | ||
1267 | /* | |
1268 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
1269 | * '0': Switch to the default mode where an exception will only insert | |
1270 | * the address of the memory error into the poison and badblocks lists. | |
1271 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
1272 | * received. | |
1273 | */ | |
1274 | static ssize_t hw_error_scrub_store(struct device *dev, | |
1275 | struct device_attribute *attr, const char *buf, size_t size) | |
1276 | { | |
1277 | struct nvdimm_bus_descriptor *nd_desc; | |
1278 | ssize_t rc; | |
1279 | long val; | |
1280 | ||
1281 | rc = kstrtol(buf, 0, &val); | |
1282 | if (rc) | |
1283 | return rc; | |
1284 | ||
87a30e1f | 1285 | nfit_device_lock(dev); |
9ffd6350 VV |
1286 | nd_desc = dev_get_drvdata(dev); |
1287 | if (nd_desc) { | |
1288 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1289 | ||
1290 | switch (val) { | |
1291 | case HW_ERROR_SCRUB_ON: | |
1292 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
1293 | break; | |
1294 | case HW_ERROR_SCRUB_OFF: | |
1295 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
1296 | break; | |
1297 | default: | |
1298 | rc = -EINVAL; | |
1299 | break; | |
1300 | } | |
1301 | } | |
87a30e1f | 1302 | nfit_device_unlock(dev); |
9ffd6350 VV |
1303 | if (rc) |
1304 | return rc; | |
1305 | return size; | |
1306 | } | |
1307 | static DEVICE_ATTR_RW(hw_error_scrub); | |
1308 | ||
37b137ff VV |
1309 | /* |
1310 | * This shows the number of full Address Range Scrubs that have been | |
1311 | * completed since driver load time. Userspace can wait on this using | |
1312 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
1313 | */ | |
1314 | static ssize_t scrub_show(struct device *dev, | |
1315 | struct device_attribute *attr, char *buf) | |
1316 | { | |
1317 | struct nvdimm_bus_descriptor *nd_desc; | |
e34b8252 | 1318 | struct acpi_nfit_desc *acpi_desc; |
37b137ff | 1319 | ssize_t rc = -ENXIO; |
e34b8252 | 1320 | bool busy; |
37b137ff | 1321 | |
87a30e1f | 1322 | nfit_device_lock(dev); |
37b137ff | 1323 | nd_desc = dev_get_drvdata(dev); |
e34b8252 DW |
1324 | if (!nd_desc) { |
1325 | device_unlock(dev); | |
1326 | return rc; | |
37b137ff | 1327 | } |
e34b8252 | 1328 | acpi_desc = to_acpi_desc(nd_desc); |
37b137ff | 1329 | |
e34b8252 DW |
1330 | mutex_lock(&acpi_desc->init_mutex); |
1331 | busy = test_bit(ARS_BUSY, &acpi_desc->scrub_flags) | |
1332 | && !test_bit(ARS_CANCEL, &acpi_desc->scrub_flags); | |
1333 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, busy ? "+\n" : "\n"); | |
5479b275 DW |
1334 | /* Allow an admin to poll the busy state at a higher rate */ |
1335 | if (busy && capable(CAP_SYS_RAWIO) && !test_and_set_bit(ARS_POLL, | |
1336 | &acpi_desc->scrub_flags)) { | |
1337 | acpi_desc->scrub_tmo = 1; | |
1338 | mod_delayed_work(nfit_wq, &acpi_desc->dwork, HZ); | |
37b137ff | 1339 | } |
5479b275 | 1340 | |
e34b8252 | 1341 | mutex_unlock(&acpi_desc->init_mutex); |
87a30e1f | 1342 | nfit_device_unlock(dev); |
37b137ff VV |
1343 | return rc; |
1344 | } | |
1345 | ||
37b137ff VV |
1346 | static ssize_t scrub_store(struct device *dev, |
1347 | struct device_attribute *attr, const char *buf, size_t size) | |
1348 | { | |
1349 | struct nvdimm_bus_descriptor *nd_desc; | |
1350 | ssize_t rc; | |
1351 | long val; | |
1352 | ||
1353 | rc = kstrtol(buf, 0, &val); | |
1354 | if (rc) | |
1355 | return rc; | |
1356 | if (val != 1) | |
1357 | return -EINVAL; | |
1358 | ||
87a30e1f | 1359 | nfit_device_lock(dev); |
37b137ff VV |
1360 | nd_desc = dev_get_drvdata(dev); |
1361 | if (nd_desc) { | |
1362 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1363 | ||
b5fd2e00 | 1364 | rc = acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); |
37b137ff | 1365 | } |
87a30e1f | 1366 | nfit_device_unlock(dev); |
37b137ff VV |
1367 | if (rc) |
1368 | return rc; | |
1369 | return size; | |
1370 | } | |
1371 | static DEVICE_ATTR_RW(scrub); | |
1372 | ||
1373 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
1374 | { | |
1375 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1376 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
1377 | | 1 << ND_CMD_ARS_STATUS; | |
1378 | ||
1379 | return (nd_desc->cmd_mask & mask) == mask; | |
1380 | } | |
1381 | ||
1382 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1383 | { | |
1384 | struct device *dev = container_of(kobj, struct device, kobj); | |
1385 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1386 | ||
1387 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) | |
1388 | return 0; | |
1389 | return a->mode; | |
1390 | } | |
1391 | ||
45def22c DW |
1392 | static struct attribute *acpi_nfit_attributes[] = { |
1393 | &dev_attr_revision.attr, | |
37b137ff | 1394 | &dev_attr_scrub.attr, |
9ffd6350 | 1395 | &dev_attr_hw_error_scrub.attr, |
41f95db7 | 1396 | &dev_attr_bus_dsm_mask.attr, |
45def22c DW |
1397 | NULL, |
1398 | }; | |
1399 | ||
5e93746f | 1400 | static const struct attribute_group acpi_nfit_attribute_group = { |
45def22c DW |
1401 | .name = "nfit", |
1402 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1403 | .is_visible = nfit_visible, |
45def22c DW |
1404 | }; |
1405 | ||
a61fe6f7 | 1406 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1407 | &nvdimm_bus_attribute_group, |
1408 | &acpi_nfit_attribute_group, | |
1409 | NULL, | |
1410 | }; | |
1411 | ||
e6dfb2de DW |
1412 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1413 | { | |
1414 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1415 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1416 | ||
1417 | return __to_nfit_memdev(nfit_mem); | |
1418 | } | |
1419 | ||
1420 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1421 | { | |
1422 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1423 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1424 | ||
1425 | return nfit_mem->dcr; | |
1426 | } | |
1427 | ||
1428 | static ssize_t handle_show(struct device *dev, | |
1429 | struct device_attribute *attr, char *buf) | |
1430 | { | |
1431 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1432 | ||
1433 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1434 | } | |
1435 | static DEVICE_ATTR_RO(handle); | |
1436 | ||
1437 | static ssize_t phys_id_show(struct device *dev, | |
1438 | struct device_attribute *attr, char *buf) | |
1439 | { | |
1440 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1441 | ||
1442 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1443 | } | |
1444 | static DEVICE_ATTR_RO(phys_id); | |
1445 | ||
1446 | static ssize_t vendor_show(struct device *dev, | |
1447 | struct device_attribute *attr, char *buf) | |
1448 | { | |
1449 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1450 | ||
5ad9a7fd | 1451 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1452 | } |
1453 | static DEVICE_ATTR_RO(vendor); | |
1454 | ||
1455 | static ssize_t rev_id_show(struct device *dev, | |
1456 | struct device_attribute *attr, char *buf) | |
1457 | { | |
1458 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1459 | ||
5ad9a7fd | 1460 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1461 | } |
1462 | static DEVICE_ATTR_RO(rev_id); | |
1463 | ||
1464 | static ssize_t device_show(struct device *dev, | |
1465 | struct device_attribute *attr, char *buf) | |
1466 | { | |
1467 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1468 | ||
5ad9a7fd | 1469 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1470 | } |
1471 | static DEVICE_ATTR_RO(device); | |
1472 | ||
6ca72085 DW |
1473 | static ssize_t subsystem_vendor_show(struct device *dev, |
1474 | struct device_attribute *attr, char *buf) | |
1475 | { | |
1476 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1477 | ||
1478 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1479 | } | |
1480 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1481 | ||
1482 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1483 | struct device_attribute *attr, char *buf) | |
1484 | { | |
1485 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1486 | ||
1487 | return sprintf(buf, "0x%04x\n", | |
1488 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1489 | } | |
1490 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1491 | ||
1492 | static ssize_t subsystem_device_show(struct device *dev, | |
1493 | struct device_attribute *attr, char *buf) | |
1494 | { | |
1495 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1496 | ||
1497 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1498 | } | |
1499 | static DEVICE_ATTR_RO(subsystem_device); | |
1500 | ||
8cc6ddfc DW |
1501 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1502 | { | |
1503 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1504 | int formats = 0; | |
1505 | ||
1506 | if (nfit_mem->memdev_pmem) | |
1507 | formats++; | |
1508 | if (nfit_mem->memdev_bdw) | |
1509 | formats++; | |
1510 | return formats; | |
1511 | } | |
1512 | ||
e6dfb2de DW |
1513 | static ssize_t format_show(struct device *dev, |
1514 | struct device_attribute *attr, char *buf) | |
1515 | { | |
1516 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1517 | ||
1bcbf42d | 1518 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1519 | } |
1520 | static DEVICE_ATTR_RO(format); | |
1521 | ||
8cc6ddfc DW |
1522 | static ssize_t format1_show(struct device *dev, |
1523 | struct device_attribute *attr, char *buf) | |
1524 | { | |
1525 | u32 handle; | |
1526 | ssize_t rc = -ENXIO; | |
1527 | struct nfit_mem *nfit_mem; | |
1528 | struct nfit_memdev *nfit_memdev; | |
1529 | struct acpi_nfit_desc *acpi_desc; | |
1530 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1531 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1532 | ||
1533 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1534 | acpi_desc = nfit_mem->acpi_desc; | |
1535 | handle = to_nfit_memdev(dev)->device_handle; | |
1536 | ||
1537 | /* assumes DIMMs have at most 2 published interface codes */ | |
1538 | mutex_lock(&acpi_desc->init_mutex); | |
1539 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1540 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1541 | struct nfit_dcr *nfit_dcr; | |
1542 | ||
1543 | if (memdev->device_handle != handle) | |
1544 | continue; | |
1545 | ||
1546 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1547 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1548 | continue; | |
1549 | if (nfit_dcr->dcr->code == dcr->code) | |
1550 | continue; | |
1bcbf42d DW |
1551 | rc = sprintf(buf, "0x%04x\n", |
1552 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1553 | break; |
1554 | } | |
1555 | if (rc != ENXIO) | |
1556 | break; | |
1557 | } | |
1558 | mutex_unlock(&acpi_desc->init_mutex); | |
1559 | return rc; | |
1560 | } | |
1561 | static DEVICE_ATTR_RO(format1); | |
1562 | ||
1563 | static ssize_t formats_show(struct device *dev, | |
1564 | struct device_attribute *attr, char *buf) | |
1565 | { | |
1566 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1567 | ||
1568 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1569 | } | |
1570 | static DEVICE_ATTR_RO(formats); | |
1571 | ||
e6dfb2de DW |
1572 | static ssize_t serial_show(struct device *dev, |
1573 | struct device_attribute *attr, char *buf) | |
1574 | { | |
1575 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1576 | ||
5ad9a7fd | 1577 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1578 | } |
1579 | static DEVICE_ATTR_RO(serial); | |
1580 | ||
a94e3fbe DW |
1581 | static ssize_t family_show(struct device *dev, |
1582 | struct device_attribute *attr, char *buf) | |
1583 | { | |
1584 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1585 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1586 | ||
1587 | if (nfit_mem->family < 0) | |
1588 | return -ENXIO; | |
1589 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1590 | } | |
1591 | static DEVICE_ATTR_RO(family); | |
1592 | ||
1593 | static ssize_t dsm_mask_show(struct device *dev, | |
1594 | struct device_attribute *attr, char *buf) | |
1595 | { | |
1596 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1597 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1598 | ||
1599 | if (nfit_mem->family < 0) | |
1600 | return -ENXIO; | |
1601 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1602 | } | |
1603 | static DEVICE_ATTR_RO(dsm_mask); | |
1604 | ||
58138820 DW |
1605 | static ssize_t flags_show(struct device *dev, |
1606 | struct device_attribute *attr, char *buf) | |
1607 | { | |
0ead1118 DW |
1608 | struct nvdimm *nvdimm = to_nvdimm(dev); |
1609 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1610 | u16 flags = __to_nfit_memdev(nfit_mem)->flags; | |
1611 | ||
1612 | if (test_bit(NFIT_MEM_DIRTY, &nfit_mem->flags)) | |
1613 | flags |= ACPI_NFIT_MEM_FLUSH_FAILED; | |
58138820 | 1614 | |
ffab9385 | 1615 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
402bae59 TK |
1616 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1617 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1618 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1619 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
ffab9385 DW |
1620 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
1621 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", | |
1622 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); | |
58138820 DW |
1623 | } |
1624 | static DEVICE_ATTR_RO(flags); | |
1625 | ||
38a879ba TK |
1626 | static ssize_t id_show(struct device *dev, |
1627 | struct device_attribute *attr, char *buf) | |
1628 | { | |
d6548ae4 DJ |
1629 | struct nvdimm *nvdimm = to_nvdimm(dev); |
1630 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
38a879ba | 1631 | |
d6548ae4 | 1632 | return sprintf(buf, "%s\n", nfit_mem->id); |
38a879ba TK |
1633 | } |
1634 | static DEVICE_ATTR_RO(id); | |
1635 | ||
0ead1118 DW |
1636 | static ssize_t dirty_shutdown_show(struct device *dev, |
1637 | struct device_attribute *attr, char *buf) | |
1638 | { | |
1639 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1640 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1641 | ||
1642 | return sprintf(buf, "%d\n", nfit_mem->dirty_shutdown); | |
1643 | } | |
1644 | static DEVICE_ATTR_RO(dirty_shutdown); | |
1645 | ||
e6dfb2de DW |
1646 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1647 | &dev_attr_handle.attr, | |
1648 | &dev_attr_phys_id.attr, | |
1649 | &dev_attr_vendor.attr, | |
1650 | &dev_attr_device.attr, | |
6ca72085 DW |
1651 | &dev_attr_rev_id.attr, |
1652 | &dev_attr_subsystem_vendor.attr, | |
1653 | &dev_attr_subsystem_device.attr, | |
1654 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1655 | &dev_attr_format.attr, |
8cc6ddfc DW |
1656 | &dev_attr_formats.attr, |
1657 | &dev_attr_format1.attr, | |
e6dfb2de | 1658 | &dev_attr_serial.attr, |
58138820 | 1659 | &dev_attr_flags.attr, |
38a879ba | 1660 | &dev_attr_id.attr, |
a94e3fbe DW |
1661 | &dev_attr_family.attr, |
1662 | &dev_attr_dsm_mask.attr, | |
0ead1118 | 1663 | &dev_attr_dirty_shutdown.attr, |
e6dfb2de DW |
1664 | NULL, |
1665 | }; | |
1666 | ||
1667 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1668 | struct attribute *a, int n) | |
1669 | { | |
1670 | struct device *dev = container_of(kobj, struct device, kobj); | |
8cc6ddfc | 1671 | struct nvdimm *nvdimm = to_nvdimm(dev); |
0ead1118 | 1672 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
e6dfb2de | 1673 | |
1499934d DW |
1674 | if (!to_nfit_dcr(dev)) { |
1675 | /* Without a dcr only the memdev attributes can be surfaced */ | |
1676 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr | |
1677 | || a == &dev_attr_flags.attr | |
1678 | || a == &dev_attr_family.attr | |
1679 | || a == &dev_attr_dsm_mask.attr) | |
1680 | return a->mode; | |
8cc6ddfc | 1681 | return 0; |
1499934d DW |
1682 | } |
1683 | ||
8cc6ddfc | 1684 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
e6dfb2de | 1685 | return 0; |
0ead1118 DW |
1686 | |
1687 | if (!test_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags) | |
1688 | && a == &dev_attr_dirty_shutdown.attr) | |
1689 | return 0; | |
1690 | ||
8cc6ddfc | 1691 | return a->mode; |
e6dfb2de DW |
1692 | } |
1693 | ||
5e93746f | 1694 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
e6dfb2de DW |
1695 | .name = "nfit", |
1696 | .attrs = acpi_nfit_dimm_attributes, | |
1697 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1698 | }; | |
1699 | ||
1700 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 1701 | &nvdimm_attribute_group, |
4d88a97a | 1702 | &nd_device_attribute_group, |
e6dfb2de DW |
1703 | &acpi_nfit_dimm_attribute_group, |
1704 | NULL, | |
1705 | }; | |
1706 | ||
1707 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1708 | u32 device_handle) | |
1709 | { | |
1710 | struct nfit_mem *nfit_mem; | |
1711 | ||
1712 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1713 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1714 | return nfit_mem->nvdimm; | |
1715 | ||
1716 | return NULL; | |
1717 | } | |
1718 | ||
231bf117 | 1719 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1720 | { |
1721 | struct nfit_mem *nfit_mem; | |
1722 | struct acpi_nfit_desc *acpi_desc; | |
1723 | ||
b814735f | 1724 | dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev), |
ba9c8dd3 DW |
1725 | event); |
1726 | ||
1727 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1728 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1729 | event); | |
1730 | return; | |
1731 | } | |
1732 | ||
1733 | acpi_desc = dev_get_drvdata(dev->parent); | |
1734 | if (!acpi_desc) | |
1735 | return; | |
1736 | ||
1737 | /* | |
1738 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1739 | * is still valid. | |
1740 | */ | |
1741 | nfit_mem = dev_get_drvdata(dev); | |
1742 | if (nfit_mem && nfit_mem->flags_attr) | |
1743 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1744 | } | |
231bf117 | 1745 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1746 | |
1747 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1748 | { | |
1749 | struct acpi_device *adev = data; | |
1750 | struct device *dev = &adev->dev; | |
1751 | ||
87a30e1f | 1752 | nfit_device_lock(dev->parent); |
ba9c8dd3 | 1753 | __acpi_nvdimm_notify(dev, event); |
87a30e1f | 1754 | nfit_device_unlock(dev->parent); |
ba9c8dd3 DW |
1755 | } |
1756 | ||
466d1493 DW |
1757 | static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) |
1758 | { | |
1759 | acpi_handle handle; | |
1760 | acpi_status status; | |
1761 | ||
1762 | status = acpi_get_handle(adev->handle, method, &handle); | |
1763 | ||
1764 | if (ACPI_SUCCESS(status)) | |
1765 | return true; | |
1766 | return false; | |
1767 | } | |
1768 | ||
f1101766 | 1769 | __weak void nfit_intel_shutdown_status(struct nfit_mem *nfit_mem) |
0ead1118 | 1770 | { |
f596c884 | 1771 | struct device *dev = &nfit_mem->adev->dev; |
0ead1118 DW |
1772 | struct nd_intel_smart smart = { 0 }; |
1773 | union acpi_object in_buf = { | |
f596c884 DW |
1774 | .buffer.type = ACPI_TYPE_BUFFER, |
1775 | .buffer.length = 0, | |
0ead1118 DW |
1776 | }; |
1777 | union acpi_object in_obj = { | |
f596c884 | 1778 | .package.type = ACPI_TYPE_PACKAGE, |
0ead1118 DW |
1779 | .package.count = 1, |
1780 | .package.elements = &in_buf, | |
1781 | }; | |
1782 | const u8 func = ND_INTEL_SMART; | |
1783 | const guid_t *guid = to_nfit_uuid(nfit_mem->family); | |
1784 | u8 revid = nfit_dsm_revid(nfit_mem->family, func); | |
1785 | struct acpi_device *adev = nfit_mem->adev; | |
1786 | acpi_handle handle = adev->handle; | |
1787 | union acpi_object *out_obj; | |
1788 | ||
1789 | if ((nfit_mem->dsm_mask & (1 << func)) == 0) | |
1790 | return; | |
1791 | ||
1792 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); | |
f596c884 DW |
1793 | if (!out_obj || out_obj->type != ACPI_TYPE_BUFFER |
1794 | || out_obj->buffer.length < sizeof(smart)) { | |
1795 | dev_dbg(dev->parent, "%s: failed to retrieve initial health\n", | |
1796 | dev_name(dev)); | |
1797 | ACPI_FREE(out_obj); | |
0ead1118 | 1798 | return; |
f596c884 DW |
1799 | } |
1800 | memcpy(&smart, out_obj->buffer.pointer, sizeof(smart)); | |
1801 | ACPI_FREE(out_obj); | |
0ead1118 DW |
1802 | |
1803 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_VALID) { | |
1804 | if (smart.shutdown_state) | |
1805 | set_bit(NFIT_MEM_DIRTY, &nfit_mem->flags); | |
1806 | } | |
1807 | ||
1808 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_COUNT_VALID) { | |
1809 | set_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags); | |
1810 | nfit_mem->dirty_shutdown = smart.shutdown_count; | |
1811 | } | |
0ead1118 DW |
1812 | } |
1813 | ||
1814 | static void populate_shutdown_status(struct nfit_mem *nfit_mem) | |
1815 | { | |
1816 | /* | |
1817 | * For DIMMs that provide a dynamic facility to retrieve a | |
1818 | * dirty-shutdown status and/or a dirty-shutdown count, cache | |
1819 | * these values in nfit_mem. | |
1820 | */ | |
1821 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
1822 | nfit_intel_shutdown_status(nfit_mem); | |
1823 | } | |
1824 | ||
62232e45 DW |
1825 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1826 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1827 | { | |
1828 | struct acpi_device *adev, *adev_dimm; | |
1829 | struct device *dev = acpi_desc->dev; | |
099b07a2 | 1830 | unsigned long dsm_mask, label_mask; |
41c8bdb3 | 1831 | const guid_t *guid; |
60e95f43 | 1832 | int i; |
ba650cfc | 1833 | int family = -1; |
d6548ae4 | 1834 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
62232e45 | 1835 | |
e3654eca DW |
1836 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1837 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1838 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
d6548ae4 DJ |
1839 | |
1840 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1841 | sprintf(nfit_mem->id, "%04x-%02x-%04x-%08x", | |
1842 | be16_to_cpu(dcr->vendor_id), | |
1843 | dcr->manufacturing_location, | |
1844 | be16_to_cpu(dcr->manufacturing_date), | |
1845 | be32_to_cpu(dcr->serial_number)); | |
1846 | else | |
1847 | sprintf(nfit_mem->id, "%04x-%08x", | |
1848 | be16_to_cpu(dcr->vendor_id), | |
1849 | be32_to_cpu(dcr->serial_number)); | |
1850 | ||
62232e45 | 1851 | adev = to_acpi_dev(acpi_desc); |
f1101766 DW |
1852 | if (!adev) { |
1853 | /* unit test case */ | |
1854 | populate_shutdown_status(nfit_mem); | |
62232e45 | 1855 | return 0; |
f1101766 | 1856 | } |
62232e45 DW |
1857 | |
1858 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1859 | nfit_mem->adev = adev_dimm; | |
1860 | if (!adev_dimm) { | |
1861 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1862 | device_handle); | |
4d88a97a | 1863 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1864 | } |
1865 | ||
ba9c8dd3 DW |
1866 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1867 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1868 | dev_err(dev, "%s: notification registration failed\n", | |
1869 | dev_name(&adev_dimm->dev)); | |
1870 | return -ENXIO; | |
1871 | } | |
adf68957 DW |
1872 | /* |
1873 | * Record nfit_mem for the notification path to track back to | |
1874 | * the nfit sysfs attributes for this dimm device object. | |
1875 | */ | |
1876 | dev_set_drvdata(&adev_dimm->dev, nfit_mem); | |
ba9c8dd3 | 1877 | |
31eca76b | 1878 | /* |
1194c413 DC |
1879 | * There are 4 "legacy" NVDIMM command sets |
1880 | * (NVDIMM_FAMILY_{INTEL,MSFT,HPE1,HPE2}) that were created before | |
1881 | * an EFI working group was established to constrain this | |
1882 | * proliferation. The nfit driver probes for the supported command | |
1883 | * set by GUID. Note, if you're a platform developer looking to add | |
1884 | * a new command set to this probe, consider using an existing set, | |
1885 | * or otherwise seek approval to publish the command set at | |
1886 | * http://www.uefi.org/RFIC_LIST. | |
1887 | * | |
1888 | * Note, that checking for function0 (bit0) tells us if any commands | |
1889 | * are reachable through this GUID. | |
31eca76b | 1890 | */ |
11e14270 | 1891 | for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) |
a7225598 | 1892 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
ba650cfc LK |
1893 | if (family < 0 || i == default_dsm_family) |
1894 | family = i; | |
31eca76b DW |
1895 | |
1896 | /* limit the supported commands to those that are publicly documented */ | |
ba650cfc | 1897 | nfit_mem->family = family; |
095ab4b3 LK |
1898 | if (override_dsm_mask && !disable_vendor_specific) |
1899 | dsm_mask = override_dsm_mask; | |
1900 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { | |
11e14270 | 1901 | dsm_mask = NVDIMM_INTEL_CMDMASK; |
87554098 DW |
1902 | if (disable_vendor_specific) |
1903 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1904 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1905 | dsm_mask = 0x1c3c76; |
e02fb726 | 1906 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1907 | dsm_mask = 0x1fe; |
87554098 DW |
1908 | if (disable_vendor_specific) |
1909 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1910 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1911 | dsm_mask = 0xffffffff; | |
1194c413 DC |
1912 | } else if (nfit_mem->family == NVDIMM_FAMILY_HYPERV) { |
1913 | dsm_mask = 0x1f; | |
87554098 | 1914 | } else { |
a7225598 | 1915 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1916 | nfit_mem->family = -1; |
a7225598 DW |
1917 | /* DSMs are optional, continue loading the driver... */ |
1918 | return 0; | |
31eca76b DW |
1919 | } |
1920 | ||
5e9e38d0 DW |
1921 | /* |
1922 | * Function 0 is the command interrogation function, don't | |
1923 | * export it to potential userspace use, and enable it to be | |
1924 | * used as an error value in acpi_nfit_ctl(). | |
1925 | */ | |
1926 | dsm_mask &= ~1UL; | |
1927 | ||
41c8bdb3 | 1928 | guid = to_nfit_uuid(nfit_mem->family); |
31eca76b | 1929 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
11e14270 DW |
1930 | if (acpi_check_dsm(adev_dimm->handle, guid, |
1931 | nfit_dsm_revid(nfit_mem->family, i), | |
1932 | 1ULL << i)) | |
62232e45 DW |
1933 | set_bit(i, &nfit_mem->dsm_mask); |
1934 | ||
099b07a2 DW |
1935 | /* |
1936 | * Prefer the NVDIMM_FAMILY_INTEL label read commands if present | |
1937 | * due to their better semantics handling locked capacity. | |
1938 | */ | |
1939 | label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA | |
1940 | | 1 << ND_CMD_SET_CONFIG_DATA; | |
1941 | if (family == NVDIMM_FAMILY_INTEL | |
1942 | && (dsm_mask & label_mask) == label_mask) | |
f596c884 DW |
1943 | /* skip _LS{I,R,W} enabling */; |
1944 | else { | |
1945 | if (acpi_nvdimm_has_method(adev_dimm, "_LSI") | |
1946 | && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { | |
1947 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); | |
1948 | set_bit(NFIT_MEM_LSR, &nfit_mem->flags); | |
1949 | } | |
099b07a2 | 1950 | |
f596c884 DW |
1951 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
1952 | && acpi_nvdimm_has_method(adev_dimm, "_LSW")) { | |
1953 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); | |
1954 | set_bit(NFIT_MEM_LSW, &nfit_mem->flags); | |
1955 | } | |
4b27db7e | 1956 | |
0171b6b7 DW |
1957 | /* |
1958 | * Quirk read-only label configurations to preserve | |
1959 | * access to label-less namespaces by default. | |
1960 | */ | |
1961 | if (!test_bit(NFIT_MEM_LSW, &nfit_mem->flags) | |
1962 | && !force_labels) { | |
1963 | dev_dbg(dev, "%s: No _LSW, disable labels\n", | |
1964 | dev_name(&adev_dimm->dev)); | |
1965 | clear_bit(NFIT_MEM_LSR, &nfit_mem->flags); | |
1966 | } else | |
1967 | dev_dbg(dev, "%s: Force enable labels\n", | |
1968 | dev_name(&adev_dimm->dev)); | |
4b27db7e DW |
1969 | } |
1970 | ||
0ead1118 DW |
1971 | populate_shutdown_status(nfit_mem); |
1972 | ||
60e95f43 | 1973 | return 0; |
62232e45 DW |
1974 | } |
1975 | ||
ba9c8dd3 DW |
1976 | static void shutdown_dimm_notify(void *data) |
1977 | { | |
1978 | struct acpi_nfit_desc *acpi_desc = data; | |
1979 | struct nfit_mem *nfit_mem; | |
1980 | ||
1981 | mutex_lock(&acpi_desc->init_mutex); | |
1982 | /* | |
1983 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1984 | * notifications. | |
1985 | */ | |
1986 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1987 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1988 | ||
ba9c8dd3 DW |
1989 | if (nfit_mem->flags_attr) { |
1990 | sysfs_put(nfit_mem->flags_attr); | |
1991 | nfit_mem->flags_attr = NULL; | |
1992 | } | |
adf68957 | 1993 | if (adev_dimm) { |
231bf117 DW |
1994 | acpi_remove_notify_handler(adev_dimm->handle, |
1995 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
adf68957 DW |
1996 | dev_set_drvdata(&adev_dimm->dev, NULL); |
1997 | } | |
ba9c8dd3 DW |
1998 | } |
1999 | mutex_unlock(&acpi_desc->init_mutex); | |
2000 | } | |
2001 | ||
f2989396 DJ |
2002 | static const struct nvdimm_security_ops *acpi_nfit_get_security_ops(int family) |
2003 | { | |
2004 | switch (family) { | |
2005 | case NVDIMM_FAMILY_INTEL: | |
2006 | return intel_security_ops; | |
2007 | default: | |
2008 | return NULL; | |
2009 | } | |
2010 | } | |
2011 | ||
e6dfb2de DW |
2012 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
2013 | { | |
2014 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
2015 | int dimm_count = 0, rc; |
2016 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
2017 | |
2018 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 2019 | struct acpi_nfit_flush_address *flush; |
31eca76b | 2020 | unsigned long flags = 0, cmd_mask; |
caa603aa | 2021 | struct nfit_memdev *nfit_memdev; |
e6dfb2de | 2022 | u32 device_handle; |
58138820 | 2023 | u16 mem_flags; |
e6dfb2de DW |
2024 | |
2025 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
2026 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
2027 | if (nvdimm) { | |
20985164 | 2028 | dimm_count++; |
e6dfb2de DW |
2029 | continue; |
2030 | } | |
2031 | ||
2032 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
8f078b38 | 2033 | set_bit(NDD_ALIASING, &flags); |
e6dfb2de | 2034 | |
caa603aa DW |
2035 | /* collate flags across all memdevs for this dimm */ |
2036 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
2037 | struct acpi_nfit_memory_map *dimm_memdev; | |
2038 | ||
2039 | dimm_memdev = __to_nfit_memdev(nfit_mem); | |
2040 | if (dimm_memdev->device_handle | |
2041 | != nfit_memdev->memdev->device_handle) | |
2042 | continue; | |
2043 | dimm_memdev->flags |= nfit_memdev->memdev->flags; | |
2044 | } | |
2045 | ||
58138820 | 2046 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 2047 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
8f078b38 | 2048 | set_bit(NDD_UNARMED, &flags); |
58138820 | 2049 | |
62232e45 DW |
2050 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
2051 | if (rc) | |
2052 | continue; | |
2053 | ||
e3654eca | 2054 | /* |
31eca76b DW |
2055 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
2056 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
2057 | * userspace interface. | |
e3654eca | 2058 | */ |
31eca76b | 2059 | cmd_mask = 1UL << ND_CMD_CALL; |
b9b1504d DW |
2060 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
2061 | /* | |
2062 | * These commands have a 1:1 correspondence | |
2063 | * between DSM payload and libnvdimm ioctl | |
2064 | * payload format. | |
2065 | */ | |
2066 | cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; | |
2067 | } | |
31eca76b | 2068 | |
d5d30d5a DW |
2069 | /* Quirk to ignore LOCAL for labels on HYPERV DIMMs */ |
2070 | if (nfit_mem->family == NVDIMM_FAMILY_HYPERV) | |
2071 | set_bit(NDD_NOBLK, &flags); | |
2072 | ||
6f07f86c | 2073 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { |
4b27db7e | 2074 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); |
4b27db7e | 2075 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); |
466d1493 | 2076 | } |
6f07f86c | 2077 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) |
4b27db7e DW |
2078 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); |
2079 | ||
e5ae3b25 DW |
2080 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
2081 | : NULL; | |
d6548ae4 | 2082 | nvdimm = __nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 2083 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 | 2084 | flags, cmd_mask, flush ? flush->hint_count : 0, |
f2989396 DJ |
2085 | nfit_mem->flush_wpq, &nfit_mem->id[0], |
2086 | acpi_nfit_get_security_ops(nfit_mem->family)); | |
e6dfb2de DW |
2087 | if (!nvdimm) |
2088 | return -ENOMEM; | |
2089 | ||
2090 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 2091 | dimm_count++; |
58138820 DW |
2092 | |
2093 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
2094 | continue; | |
2095 | ||
5c9d62d0 | 2096 | dev_err(acpi_desc->dev, "Error found in NVDIMM %s flags:%s%s%s%s%s\n", |
58138820 | 2097 | nvdimm_name(nvdimm), |
402bae59 TK |
2098 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
2099 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
2100 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
1499934d DW |
2101 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
2102 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); | |
58138820 | 2103 | |
e6dfb2de DW |
2104 | } |
2105 | ||
ba9c8dd3 DW |
2106 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
2107 | if (rc) | |
2108 | return rc; | |
2109 | ||
2110 | /* | |
2111 | * Now that dimms are successfully registered, and async registration | |
2112 | * is flushed, attempt to enable event notification. | |
2113 | */ | |
2114 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
2115 | struct kernfs_node *nfit_kernfs; | |
2116 | ||
2117 | nvdimm = nfit_mem->nvdimm; | |
23fbd7c7 TK |
2118 | if (!nvdimm) |
2119 | continue; | |
2120 | ||
ba9c8dd3 DW |
2121 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
2122 | if (nfit_kernfs) | |
2123 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
2124 | "flags"); | |
2125 | sysfs_put(nfit_kernfs); | |
2126 | if (!nfit_mem->flags_attr) | |
2127 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
2128 | nvdimm_name(nvdimm)); | |
2129 | } | |
2130 | ||
2131 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
2132 | acpi_desc); | |
e6dfb2de DW |
2133 | } |
2134 | ||
7db5bb33 JH |
2135 | /* |
2136 | * These constants are private because there are no kernel consumers of | |
2137 | * these commands. | |
2138 | */ | |
2139 | enum nfit_aux_cmds { | |
2140 | NFIT_CMD_TRANSLATE_SPA = 5, | |
2141 | NFIT_CMD_ARS_INJECT_SET = 7, | |
2142 | NFIT_CMD_ARS_INJECT_CLEAR = 8, | |
2143 | NFIT_CMD_ARS_INJECT_GET = 9, | |
2144 | }; | |
2145 | ||
62232e45 DW |
2146 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
2147 | { | |
2148 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
41c8bdb3 | 2149 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 | 2150 | struct acpi_device *adev; |
7db5bb33 | 2151 | unsigned long dsm_mask; |
62232e45 DW |
2152 | int i; |
2153 | ||
e3654eca | 2154 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
b37b3fd3 | 2155 | nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en; |
62232e45 DW |
2156 | adev = to_acpi_dev(acpi_desc); |
2157 | if (!adev) | |
2158 | return; | |
2159 | ||
d4f32367 | 2160 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
94116f81 | 2161 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
e3654eca | 2162 | set_bit(i, &nd_desc->cmd_mask); |
37d74841 | 2163 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
7db5bb33 JH |
2164 | |
2165 | dsm_mask = | |
2166 | (1 << ND_CMD_ARS_CAP) | | |
2167 | (1 << ND_CMD_ARS_START) | | |
2168 | (1 << ND_CMD_ARS_STATUS) | | |
2169 | (1 << ND_CMD_CLEAR_ERROR) | | |
2170 | (1 << NFIT_CMD_TRANSLATE_SPA) | | |
2171 | (1 << NFIT_CMD_ARS_INJECT_SET) | | |
2172 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | | |
2173 | (1 << NFIT_CMD_ARS_INJECT_GET); | |
2174 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
2175 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) | |
2176 | set_bit(i, &nd_desc->bus_dsm_mask); | |
62232e45 DW |
2177 | } |
2178 | ||
1f7df6f8 DW |
2179 | static ssize_t range_index_show(struct device *dev, |
2180 | struct device_attribute *attr, char *buf) | |
2181 | { | |
2182 | struct nd_region *nd_region = to_nd_region(dev); | |
2183 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
2184 | ||
2185 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
2186 | } | |
2187 | static DEVICE_ATTR_RO(range_index); | |
2188 | ||
2189 | static struct attribute *acpi_nfit_region_attributes[] = { | |
2190 | &dev_attr_range_index.attr, | |
2191 | NULL, | |
2192 | }; | |
2193 | ||
5e93746f | 2194 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
1f7df6f8 DW |
2195 | .name = "nfit", |
2196 | .attrs = acpi_nfit_region_attributes, | |
2197 | }; | |
2198 | ||
2199 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
2200 | &nd_region_attribute_group, | |
2201 | &nd_mapping_attribute_group, | |
3d88002e | 2202 | &nd_device_attribute_group, |
74ae66c3 | 2203 | &nd_numa_attribute_group, |
1f7df6f8 DW |
2204 | &acpi_nfit_region_attribute_group, |
2205 | NULL, | |
2206 | }; | |
2207 | ||
eaf96153 DW |
2208 | /* enough info to uniquely specify an interleave set */ |
2209 | struct nfit_set_info { | |
2210 | struct nfit_set_info_map { | |
2211 | u64 region_offset; | |
2212 | u32 serial_number; | |
2213 | u32 pad; | |
2214 | } mapping[0]; | |
2215 | }; | |
2216 | ||
c12c48ce DW |
2217 | struct nfit_set_info2 { |
2218 | struct nfit_set_info_map2 { | |
2219 | u64 region_offset; | |
2220 | u32 serial_number; | |
2221 | u16 vendor_id; | |
2222 | u16 manufacturing_date; | |
2223 | u8 manufacturing_location; | |
2224 | u8 reserved[31]; | |
2225 | } mapping[0]; | |
2226 | }; | |
2227 | ||
eaf96153 DW |
2228 | static size_t sizeof_nfit_set_info(int num_mappings) |
2229 | { | |
2230 | return sizeof(struct nfit_set_info) | |
2231 | + num_mappings * sizeof(struct nfit_set_info_map); | |
2232 | } | |
2233 | ||
c12c48ce DW |
2234 | static size_t sizeof_nfit_set_info2(int num_mappings) |
2235 | { | |
2236 | return sizeof(struct nfit_set_info2) | |
2237 | + num_mappings * sizeof(struct nfit_set_info_map2); | |
2238 | } | |
2239 | ||
86ef58a4 | 2240 | static int cmp_map_compat(const void *m0, const void *m1) |
eaf96153 DW |
2241 | { |
2242 | const struct nfit_set_info_map *map0 = m0; | |
2243 | const struct nfit_set_info_map *map1 = m1; | |
2244 | ||
2245 | return memcmp(&map0->region_offset, &map1->region_offset, | |
2246 | sizeof(u64)); | |
2247 | } | |
2248 | ||
86ef58a4 DW |
2249 | static int cmp_map(const void *m0, const void *m1) |
2250 | { | |
2251 | const struct nfit_set_info_map *map0 = m0; | |
2252 | const struct nfit_set_info_map *map1 = m1; | |
2253 | ||
b03b99a3 DW |
2254 | if (map0->region_offset < map1->region_offset) |
2255 | return -1; | |
2256 | else if (map0->region_offset > map1->region_offset) | |
2257 | return 1; | |
2258 | return 0; | |
86ef58a4 DW |
2259 | } |
2260 | ||
c12c48ce DW |
2261 | static int cmp_map2(const void *m0, const void *m1) |
2262 | { | |
2263 | const struct nfit_set_info_map2 *map0 = m0; | |
2264 | const struct nfit_set_info_map2 *map1 = m1; | |
2265 | ||
2266 | if (map0->region_offset < map1->region_offset) | |
2267 | return -1; | |
2268 | else if (map0->region_offset > map1->region_offset) | |
2269 | return 1; | |
2270 | return 0; | |
2271 | } | |
2272 | ||
eaf96153 DW |
2273 | /* Retrieve the nth entry referencing this spa */ |
2274 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
2275 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
2276 | { | |
2277 | struct nfit_memdev *nfit_memdev; | |
2278 | ||
2279 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
2280 | if (nfit_memdev->memdev->range_index == range_index) | |
2281 | if (n-- == 0) | |
2282 | return nfit_memdev->memdev; | |
2283 | return NULL; | |
2284 | } | |
2285 | ||
2286 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
2287 | struct nd_region_desc *ndr_desc, | |
2288 | struct acpi_nfit_system_address *spa) | |
2289 | { | |
eaf96153 DW |
2290 | struct device *dev = acpi_desc->dev; |
2291 | struct nd_interleave_set *nd_set; | |
2292 | u16 nr = ndr_desc->num_mappings; | |
c12c48ce | 2293 | struct nfit_set_info2 *info2; |
eaf96153 | 2294 | struct nfit_set_info *info; |
8f2bc243 | 2295 | int i; |
eaf96153 | 2296 | |
faec6f8a DW |
2297 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
2298 | if (!nd_set) | |
2299 | return -ENOMEM; | |
faec6f8a DW |
2300 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); |
2301 | ||
eaf96153 DW |
2302 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
2303 | if (!info) | |
2304 | return -ENOMEM; | |
c12c48ce DW |
2305 | |
2306 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); | |
2307 | if (!info2) | |
2308 | return -ENOMEM; | |
2309 | ||
eaf96153 | 2310 | for (i = 0; i < nr; i++) { |
44c462eb | 2311 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
eaf96153 | 2312 | struct nfit_set_info_map *map = &info->mapping[i]; |
c12c48ce | 2313 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
44c462eb | 2314 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 DW |
2315 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
2316 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
2317 | spa->range_index, i); | |
dcb79b15 | 2318 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
eaf96153 DW |
2319 | |
2320 | if (!memdev || !nfit_mem->dcr) { | |
2321 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
2322 | return -ENODEV; | |
2323 | } | |
2324 | ||
2325 | map->region_offset = memdev->region_offset; | |
dcb79b15 | 2326 | map->serial_number = dcr->serial_number; |
c12c48ce DW |
2327 | |
2328 | map2->region_offset = memdev->region_offset; | |
dcb79b15 DW |
2329 | map2->serial_number = dcr->serial_number; |
2330 | map2->vendor_id = dcr->vendor_id; | |
2331 | map2->manufacturing_date = dcr->manufacturing_date; | |
2332 | map2->manufacturing_location = dcr->manufacturing_location; | |
eaf96153 DW |
2333 | } |
2334 | ||
c12c48ce | 2335 | /* v1.1 namespaces */ |
eaf96153 DW |
2336 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
2337 | cmp_map, NULL); | |
c12c48ce DW |
2338 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
2339 | ||
2340 | /* v1.2 namespaces */ | |
2341 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), | |
2342 | cmp_map2, NULL); | |
2343 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); | |
86ef58a4 | 2344 | |
c12c48ce | 2345 | /* support v1.1 namespaces created with the wrong sort order */ |
86ef58a4 DW |
2346 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
2347 | cmp_map_compat, NULL); | |
2348 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
2349 | ||
401c0a19 DW |
2350 | /* record the result of the sort for the mapping position */ |
2351 | for (i = 0; i < nr; i++) { | |
2352 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; | |
2353 | int j; | |
2354 | ||
2355 | for (j = 0; j < nr; j++) { | |
2356 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; | |
2357 | struct nvdimm *nvdimm = mapping->nvdimm; | |
2358 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
dcb79b15 | 2359 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
401c0a19 | 2360 | |
dcb79b15 DW |
2361 | if (map2->serial_number == dcr->serial_number && |
2362 | map2->vendor_id == dcr->vendor_id && | |
2363 | map2->manufacturing_date == dcr->manufacturing_date && | |
401c0a19 | 2364 | map2->manufacturing_location |
dcb79b15 | 2365 | == dcr->manufacturing_location) { |
401c0a19 DW |
2366 | mapping->position = i; |
2367 | break; | |
2368 | } | |
2369 | } | |
2370 | } | |
2371 | ||
eaf96153 DW |
2372 | ndr_desc->nd_set = nd_set; |
2373 | devm_kfree(dev, info); | |
c12c48ce | 2374 | devm_kfree(dev, info2); |
eaf96153 DW |
2375 | |
2376 | return 0; | |
2377 | } | |
2378 | ||
047fc8a1 RZ |
2379 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
2380 | { | |
2381 | struct acpi_nfit_interleave *idt = mmio->idt; | |
2382 | u32 sub_line_offset, line_index, line_offset; | |
2383 | u64 line_no, table_skip_count, table_offset; | |
2384 | ||
2385 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
2386 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
2387 | line_offset = idt->line_offset[line_index] | |
2388 | * mmio->line_size; | |
2389 | table_offset = table_skip_count * mmio->table_size; | |
2390 | ||
2391 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
2392 | } | |
2393 | ||
de4a196c | 2394 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
2395 | { |
2396 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
2397 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
68202c9f | 2398 | const u32 STATUS_MASK = 0x80000037; |
047fc8a1 RZ |
2399 | |
2400 | if (mmio->num_lines) | |
2401 | offset = to_interleave_offset(offset, mmio); | |
2402 | ||
68202c9f | 2403 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
047fc8a1 RZ |
2404 | } |
2405 | ||
2406 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
2407 | resource_size_t dpa, unsigned int len, unsigned int write) | |
2408 | { | |
2409 | u64 cmd, offset; | |
2410 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
2411 | ||
2412 | enum { | |
2413 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
2414 | BCW_LEN_SHIFT = 48, | |
2415 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
2416 | BCW_CMD_SHIFT = 56, | |
2417 | }; | |
2418 | ||
2419 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
2420 | len = len >> L1_CACHE_SHIFT; | |
2421 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
2422 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
2423 | ||
2424 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
2425 | if (mmio->num_lines) | |
2426 | offset = to_interleave_offset(offset, mmio); | |
2427 | ||
67a3e8fe | 2428 | writeq(cmd, mmio->addr.base + offset); |
c5d4355d | 2429 | nvdimm_flush(nfit_blk->nd_region, NULL); |
f0f2c072 | 2430 | |
aef25338 | 2431 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 2432 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
2433 | } |
2434 | ||
2435 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
2436 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
2437 | unsigned int lane) | |
2438 | { | |
2439 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
2440 | unsigned int copied = 0; | |
2441 | u64 base_offset; | |
2442 | int rc; | |
2443 | ||
2444 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
2445 | + lane * mmio->size; | |
047fc8a1 RZ |
2446 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
2447 | while (len) { | |
2448 | unsigned int c; | |
2449 | u64 offset; | |
2450 | ||
2451 | if (mmio->num_lines) { | |
2452 | u32 line_offset; | |
2453 | ||
2454 | offset = to_interleave_offset(base_offset + copied, | |
2455 | mmio); | |
2456 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
2457 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
2458 | } else { | |
2459 | offset = base_offset + nfit_blk->bdw_offset; | |
2460 | c = len; | |
2461 | } | |
2462 | ||
2463 | if (rw) | |
0aed55af | 2464 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
67a3e8fe | 2465 | else { |
aef25338 | 2466 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
5deb67f7 | 2467 | arch_invalidate_pmem((void __force *) |
67a3e8fe RZ |
2468 | mmio->addr.aperture + offset, c); |
2469 | ||
6abccd1b | 2470 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
67a3e8fe | 2471 | } |
047fc8a1 RZ |
2472 | |
2473 | copied += c; | |
2474 | len -= c; | |
2475 | } | |
c2ad2954 RZ |
2476 | |
2477 | if (rw) | |
c5d4355d | 2478 | nvdimm_flush(nfit_blk->nd_region, NULL); |
c2ad2954 | 2479 | |
047fc8a1 RZ |
2480 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
2481 | return rc; | |
2482 | } | |
2483 | ||
2484 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
2485 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
2486 | { | |
2487 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
2488 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
2489 | struct nd_region *nd_region = nfit_blk->nd_region; | |
2490 | unsigned int lane, copied = 0; | |
2491 | int rc = 0; | |
2492 | ||
2493 | lane = nd_region_acquire_lane(nd_region); | |
2494 | while (len) { | |
2495 | u64 c = min(len, mmio->size); | |
2496 | ||
2497 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
2498 | iobuf + copied, c, rw, lane); | |
2499 | if (rc) | |
2500 | break; | |
2501 | ||
2502 | copied += c; | |
2503 | len -= c; | |
2504 | } | |
2505 | nd_region_release_lane(nd_region, lane); | |
2506 | ||
2507 | return rc; | |
2508 | } | |
2509 | ||
047fc8a1 RZ |
2510 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
2511 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
2512 | { | |
2513 | if (idt) { | |
2514 | mmio->num_lines = idt->line_count; | |
2515 | mmio->line_size = idt->line_size; | |
2516 | if (interleave_ways == 0) | |
2517 | return -ENXIO; | |
2518 | mmio->table_size = mmio->num_lines * interleave_ways | |
2519 | * mmio->line_size; | |
2520 | } | |
2521 | ||
2522 | return 0; | |
2523 | } | |
2524 | ||
f0f2c072 RZ |
2525 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
2526 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
2527 | { | |
2528 | struct nd_cmd_dimm_flags flags; | |
2529 | int rc; | |
2530 | ||
2531 | memset(&flags, 0, sizeof(flags)); | |
2532 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 2533 | sizeof(flags), NULL); |
f0f2c072 RZ |
2534 | |
2535 | if (rc >= 0 && flags.status == 0) | |
2536 | nfit_blk->dimm_flags = flags.flags; | |
2537 | else if (rc == -ENOTTY) { | |
2538 | /* fall back to a conservative default */ | |
aef25338 | 2539 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
2540 | rc = 0; |
2541 | } else | |
2542 | rc = -ENXIO; | |
2543 | ||
2544 | return rc; | |
2545 | } | |
2546 | ||
047fc8a1 RZ |
2547 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
2548 | struct device *dev) | |
2549 | { | |
2550 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
047fc8a1 RZ |
2551 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
2552 | struct nfit_blk_mmio *mmio; | |
2553 | struct nfit_blk *nfit_blk; | |
2554 | struct nfit_mem *nfit_mem; | |
2555 | struct nvdimm *nvdimm; | |
2556 | int rc; | |
2557 | ||
2558 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
2559 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2560 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
b814735f | 2561 | dev_dbg(dev, "missing%s%s%s\n", |
047fc8a1 | 2562 | nfit_mem ? "" : " nfit_mem", |
193ccca4 DW |
2563 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
2564 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
2565 | return -ENXIO; |
2566 | } | |
2567 | ||
2568 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
2569 | if (!nfit_blk) | |
2570 | return -ENOMEM; | |
2571 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
2572 | nfit_blk->nd_region = to_nd_region(dev); | |
2573 | ||
2574 | /* map block aperture memory */ | |
2575 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
2576 | mmio = &nfit_blk->mmio[BDW]; | |
29b9aa0a | 2577 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
ca6a4657 | 2578 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
67a3e8fe | 2579 | if (!mmio->addr.base) { |
b814735f | 2580 | dev_dbg(dev, "%s failed to map bdw\n", |
047fc8a1 RZ |
2581 | nvdimm_name(nvdimm)); |
2582 | return -ENOMEM; | |
2583 | } | |
2584 | mmio->size = nfit_mem->bdw->size; | |
2585 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
2586 | mmio->idt = nfit_mem->idt_bdw; | |
2587 | mmio->spa = nfit_mem->spa_bdw; | |
2588 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
2589 | nfit_mem->memdev_bdw->interleave_ways); | |
2590 | if (rc) { | |
b814735f JT |
2591 | dev_dbg(dev, "%s failed to init bdw interleave\n", |
2592 | nvdimm_name(nvdimm)); | |
047fc8a1 RZ |
2593 | return rc; |
2594 | } | |
2595 | ||
2596 | /* map block control memory */ | |
2597 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
2598 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
2599 | mmio = &nfit_blk->mmio[DCR]; | |
29b9aa0a DW |
2600 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
2601 | nfit_mem->spa_dcr->length); | |
67a3e8fe | 2602 | if (!mmio->addr.base) { |
b814735f | 2603 | dev_dbg(dev, "%s failed to map dcr\n", |
047fc8a1 RZ |
2604 | nvdimm_name(nvdimm)); |
2605 | return -ENOMEM; | |
2606 | } | |
2607 | mmio->size = nfit_mem->dcr->window_size; | |
2608 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
2609 | mmio->idt = nfit_mem->idt_dcr; | |
2610 | mmio->spa = nfit_mem->spa_dcr; | |
2611 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
2612 | nfit_mem->memdev_dcr->interleave_ways); | |
2613 | if (rc) { | |
b814735f JT |
2614 | dev_dbg(dev, "%s failed to init dcr interleave\n", |
2615 | nvdimm_name(nvdimm)); | |
047fc8a1 RZ |
2616 | return rc; |
2617 | } | |
2618 | ||
f0f2c072 RZ |
2619 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
2620 | if (rc < 0) { | |
b814735f JT |
2621 | dev_dbg(dev, "%s failed get DIMM flags\n", |
2622 | nvdimm_name(nvdimm)); | |
f0f2c072 RZ |
2623 | return rc; |
2624 | } | |
2625 | ||
f284a4f2 | 2626 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
c2ad2954 RZ |
2627 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
2628 | ||
047fc8a1 RZ |
2629 | if (mmio->line_size == 0) |
2630 | return 0; | |
2631 | ||
2632 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
2633 | + 8 > mmio->line_size) { | |
2634 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
2635 | return -ENXIO; | |
2636 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
2637 | + 8 > mmio->line_size) { | |
2638 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
2639 | return -ENXIO; | |
2640 | } | |
2641 | ||
2642 | return 0; | |
2643 | } | |
2644 | ||
aef25338 | 2645 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2646 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 2647 | { |
aef25338 | 2648 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 2649 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
2650 | int cmd_rc, rc; |
2651 | ||
1cf03c00 DW |
2652 | cmd->address = spa->address; |
2653 | cmd->length = spa->length; | |
aef25338 DW |
2654 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
2655 | sizeof(*cmd), &cmd_rc); | |
2656 | if (rc < 0) | |
2657 | return rc; | |
1cf03c00 | 2658 | return cmd_rc; |
0caeef63 VV |
2659 | } |
2660 | ||
d3abaf43 DW |
2661 | static int ars_start(struct acpi_nfit_desc *acpi_desc, |
2662 | struct nfit_spa *nfit_spa, enum nfit_ars_state req_type) | |
0caeef63 VV |
2663 | { |
2664 | int rc; | |
1cf03c00 DW |
2665 | int cmd_rc; |
2666 | struct nd_cmd_ars_start ars_start; | |
2667 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2668 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 2669 | |
1cf03c00 DW |
2670 | memset(&ars_start, 0, sizeof(ars_start)); |
2671 | ars_start.address = spa->address; | |
2672 | ars_start.length = spa->length; | |
d3abaf43 | 2673 | if (req_type == ARS_REQ_SHORT) |
bc6ba808 | 2674 | ars_start.flags = ND_ARS_RETURN_PREV_DATA; |
1cf03c00 DW |
2675 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
2676 | ars_start.type = ND_ARS_PERSISTENT; | |
2677 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
2678 | ars_start.type = ND_ARS_VOLATILE; | |
2679 | else | |
2680 | return -ENOTTY; | |
aef25338 | 2681 | |
1cf03c00 DW |
2682 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2683 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 2684 | |
1cf03c00 DW |
2685 | if (rc < 0) |
2686 | return rc; | |
78153dd4 DW |
2687 | if (cmd_rc < 0) |
2688 | return cmd_rc; | |
2689 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); | |
2690 | return 0; | |
0caeef63 VV |
2691 | } |
2692 | ||
1cf03c00 | 2693 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2694 | { |
aef25338 | 2695 | int rc, cmd_rc; |
1cf03c00 DW |
2696 | struct nd_cmd_ars_start ars_start; |
2697 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2698 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2699 | ||
317a992a DW |
2700 | ars_start = (struct nd_cmd_ars_start) { |
2701 | .address = ars_status->restart_address, | |
2702 | .length = ars_status->restart_length, | |
2703 | .type = ars_status->type, | |
2704 | }; | |
1cf03c00 DW |
2705 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2706 | sizeof(ars_start), &cmd_rc); | |
2707 | if (rc < 0) | |
2708 | return rc; | |
2709 | return cmd_rc; | |
2710 | } | |
0caeef63 | 2711 | |
1cf03c00 DW |
2712 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
2713 | { | |
2714 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2715 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2716 | int rc, cmd_rc; | |
aef25338 | 2717 | |
1cf03c00 | 2718 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
459d0ddb | 2719 | acpi_desc->max_ars, &cmd_rc); |
1cf03c00 DW |
2720 | if (rc < 0) |
2721 | return rc; | |
2722 | return cmd_rc; | |
0caeef63 VV |
2723 | } |
2724 | ||
bc6ba808 DW |
2725 | static void ars_complete(struct acpi_nfit_desc *acpi_desc, |
2726 | struct nfit_spa *nfit_spa) | |
2727 | { | |
2728 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2729 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2730 | struct nd_region *nd_region = nfit_spa->nd_region; | |
2731 | struct device *dev; | |
2732 | ||
d3abaf43 DW |
2733 | lockdep_assert_held(&acpi_desc->init_mutex); |
2734 | /* | |
2735 | * Only advance the ARS state for ARS runs initiated by the | |
2736 | * kernel, ignore ARS results from BIOS initiated runs for scrub | |
2737 | * completion tracking. | |
2738 | */ | |
2739 | if (acpi_desc->scrub_spa != nfit_spa) | |
2740 | return; | |
2741 | ||
bc6ba808 DW |
2742 | if ((ars_status->address >= spa->address && ars_status->address |
2743 | < spa->address + spa->length) | |
2744 | || (ars_status->address < spa->address)) { | |
2745 | /* | |
2746 | * Assume that if a scrub starts at an offset from the | |
2747 | * start of nfit_spa that we are in the continuation | |
2748 | * case. | |
2749 | * | |
2750 | * Otherwise, if the scrub covers the spa range, mark | |
2751 | * any pending request complete. | |
2752 | */ | |
2753 | if (ars_status->address + ars_status->length | |
2754 | >= spa->address + spa->length) | |
2755 | /* complete */; | |
2756 | else | |
2757 | return; | |
2758 | } else | |
2759 | return; | |
2760 | ||
d3abaf43 | 2761 | acpi_desc->scrub_spa = NULL; |
bc6ba808 DW |
2762 | if (nd_region) { |
2763 | dev = nd_region_dev(nd_region); | |
2764 | nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON); | |
2765 | } else | |
2766 | dev = acpi_desc->dev; | |
d3abaf43 | 2767 | dev_dbg(dev, "ARS: range %d complete\n", spa->range_index); |
bc6ba808 DW |
2768 | } |
2769 | ||
459d0ddb | 2770 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2771 | { |
82aa37cf | 2772 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
459d0ddb | 2773 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
0caeef63 VV |
2774 | int rc; |
2775 | u32 i; | |
2776 | ||
82aa37cf DW |
2777 | /* |
2778 | * First record starts at 44 byte offset from the start of the | |
2779 | * payload. | |
2780 | */ | |
2781 | if (ars_status->out_length < 44) | |
2782 | return 0; | |
78153dd4 DW |
2783 | |
2784 | /* | |
2785 | * Ignore potentially stale results that are only refreshed | |
2786 | * after a start-ARS event. | |
2787 | */ | |
2788 | if (!test_and_clear_bit(ARS_VALID, &acpi_desc->scrub_flags)) { | |
2789 | dev_dbg(acpi_desc->dev, "skip %d stale records\n", | |
2790 | ars_status->num_records); | |
2791 | return 0; | |
2792 | } | |
2793 | ||
0caeef63 | 2794 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2795 | /* only process full records */ |
2796 | if (ars_status->out_length | |
2797 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2798 | break; | |
aa9ad44a | 2799 | rc = nvdimm_bus_add_badrange(nvdimm_bus, |
0caeef63 VV |
2800 | ars_status->records[i].err_address, |
2801 | ars_status->records[i].length); | |
2802 | if (rc) | |
2803 | return rc; | |
2804 | } | |
82aa37cf DW |
2805 | if (i < ars_status->num_records) |
2806 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2807 | |
2808 | return 0; | |
2809 | } | |
2810 | ||
af1996ef TK |
2811 | static void acpi_nfit_remove_resource(void *data) |
2812 | { | |
2813 | struct resource *res = data; | |
2814 | ||
2815 | remove_resource(res); | |
2816 | } | |
2817 | ||
2818 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2819 | struct nd_region_desc *ndr_desc) | |
2820 | { | |
2821 | struct resource *res, *nd_res = ndr_desc->res; | |
2822 | int is_pmem, ret; | |
2823 | ||
2824 | /* No operation if the region is already registered as PMEM */ | |
2825 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2826 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2827 | if (is_pmem == REGION_INTERSECTS) | |
2828 | return 0; | |
2829 | ||
2830 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2831 | if (!res) | |
2832 | return -ENOMEM; | |
2833 | ||
2834 | res->name = "Persistent Memory"; | |
2835 | res->start = nd_res->start; | |
2836 | res->end = nd_res->end; | |
2837 | res->flags = IORESOURCE_MEM; | |
2838 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2839 | ||
2840 | ret = insert_resource(&iomem_resource, res); | |
2841 | if (ret) | |
2842 | return ret; | |
2843 | ||
d932dd2c SV |
2844 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2845 | acpi_nfit_remove_resource, | |
2846 | res); | |
2847 | if (ret) | |
af1996ef | 2848 | return ret; |
af1996ef TK |
2849 | |
2850 | return 0; | |
2851 | } | |
2852 | ||
1f7df6f8 | 2853 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2854 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2855 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2856 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2857 | { |
2858 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2859 | memdev->device_handle); | |
1cf03c00 | 2860 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 2861 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 | 2862 | struct nfit_mem *nfit_mem; |
0731de47 | 2863 | int rc; |
1f7df6f8 DW |
2864 | |
2865 | if (!nvdimm) { | |
2866 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2867 | spa->range_index, memdev->device_handle); | |
2868 | return -ENODEV; | |
2869 | } | |
2870 | ||
44c462eb | 2871 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2872 | switch (nfit_spa_type(spa)) { |
2873 | case NFIT_SPA_PM: | |
2874 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2875 | mapping->start = memdev->address; |
2876 | mapping->size = memdev->region_size; | |
1f7df6f8 DW |
2877 | break; |
2878 | case NFIT_SPA_DCR: | |
2879 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2880 | if (!nfit_mem || !nfit_mem->bdw) { | |
2881 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
2882 | spa->range_index, nvdimm_name(nvdimm)); | |
0731de47 | 2883 | break; |
1f7df6f8 DW |
2884 | } |
2885 | ||
0731de47 DW |
2886 | mapping->size = nfit_mem->bdw->capacity; |
2887 | mapping->start = nfit_mem->bdw->start_address; | |
2888 | ndr_desc->num_lanes = nfit_mem->bdw->windows; | |
44c462eb | 2889 | ndr_desc->mapping = mapping; |
0731de47 | 2890 | ndr_desc->num_mappings = 1; |
047fc8a1 RZ |
2891 | ndbr_desc = to_blk_region_desc(ndr_desc); |
2892 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
6bc75619 | 2893 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
faec6f8a DW |
2894 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
2895 | if (rc) | |
2896 | return rc; | |
1cf03c00 DW |
2897 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
2898 | ndr_desc); | |
2899 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
2900 | return -ENOMEM; |
2901 | break; | |
2902 | } | |
2903 | ||
2904 | return 0; | |
2905 | } | |
2906 | ||
c2f32acd LCY |
2907 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2908 | { | |
2909 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2910 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2911 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2912 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2913 | } | |
2914 | ||
c9e582aa DW |
2915 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
2916 | { | |
2917 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2918 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2919 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); | |
2920 | } | |
2921 | ||
1f7df6f8 DW |
2922 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2923 | struct nfit_spa *nfit_spa) | |
2924 | { | |
44c462eb | 2925 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2926 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 RZ |
2927 | struct nd_blk_region_desc ndbr_desc; |
2928 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 2929 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2930 | struct nvdimm_bus *nvdimm_bus; |
2931 | struct resource res; | |
eaf96153 | 2932 | int count = 0, rc; |
1f7df6f8 | 2933 | |
1cf03c00 | 2934 | if (nfit_spa->nd_region) |
20985164 VV |
2935 | return 0; |
2936 | ||
c2f32acd | 2937 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
b814735f | 2938 | dev_dbg(acpi_desc->dev, "detected invalid spa index\n"); |
1f7df6f8 DW |
2939 | return 0; |
2940 | } | |
2941 | ||
2942 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2943 | memset(&mappings, 0, sizeof(mappings)); |
047fc8a1 | 2944 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
2945 | res.start = spa->address; |
2946 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
2947 | ndr_desc = &ndbr_desc.ndr_desc; |
2948 | ndr_desc->res = &res; | |
2949 | ndr_desc->provider_data = nfit_spa; | |
2950 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
8fc5c735 | 2951 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) { |
41d7a6d6 TK |
2952 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
2953 | spa->proximity_domain); | |
8fc5c735 DW |
2954 | ndr_desc->target_node = acpi_map_pxm_to_node( |
2955 | spa->proximity_domain); | |
2956 | } else { | |
41d7a6d6 | 2957 | ndr_desc->numa_node = NUMA_NO_NODE; |
8fc5c735 DW |
2958 | ndr_desc->target_node = NUMA_NO_NODE; |
2959 | } | |
41d7a6d6 | 2960 | |
fe9a552e DW |
2961 | /* |
2962 | * Persistence domain bits are hierarchical, if | |
2963 | * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then | |
2964 | * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied. | |
2965 | */ | |
2966 | if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH) | |
06e8ccda | 2967 | set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags); |
fe9a552e | 2968 | else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH) |
30e6d7bf DJ |
2969 | set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags); |
2970 | ||
1f7df6f8 DW |
2971 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2972 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2973 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
2974 | |
2975 | if (memdev->range_index != spa->range_index) | |
2976 | continue; | |
2977 | if (count >= ND_MAX_MAPPINGS) { | |
2978 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2979 | spa->range_index, ND_MAX_MAPPINGS); | |
2980 | return -ENXIO; | |
2981 | } | |
44c462eb DW |
2982 | mapping = &mappings[count++]; |
2983 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2984 | memdev, nfit_spa); |
1f7df6f8 | 2985 | if (rc) |
1cf03c00 | 2986 | goto out; |
1f7df6f8 DW |
2987 | } |
2988 | ||
44c462eb | 2989 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2990 | ndr_desc->num_mappings = count; |
2991 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2992 | if (rc) |
1cf03c00 | 2993 | goto out; |
eaf96153 | 2994 | |
1f7df6f8 DW |
2995 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2996 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2997 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2998 | if (rc) { |
af1996ef TK |
2999 | dev_warn(acpi_desc->dev, |
3000 | "failed to insert pmem resource to iomem: %d\n", | |
3001 | rc); | |
48901165 | 3002 | goto out; |
0caeef63 | 3003 | } |
48901165 | 3004 | |
1cf03c00 DW |
3005 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
3006 | ndr_desc); | |
3007 | if (!nfit_spa->nd_region) | |
3008 | rc = -ENOMEM; | |
c9e582aa | 3009 | } else if (nfit_spa_is_volatile(spa)) { |
1cf03c00 DW |
3010 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
3011 | ndr_desc); | |
3012 | if (!nfit_spa->nd_region) | |
3013 | rc = -ENOMEM; | |
c2f32acd LCY |
3014 | } else if (nfit_spa_is_virtual(spa)) { |
3015 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
3016 | ndr_desc); | |
3017 | if (!nfit_spa->nd_region) | |
3018 | rc = -ENOMEM; | |
1f7df6f8 | 3019 | } |
20985164 | 3020 | |
1cf03c00 DW |
3021 | out: |
3022 | if (rc) | |
3023 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
3024 | nfit_spa->spa->range_index); | |
3025 | return rc; | |
3026 | } | |
3027 | ||
459d0ddb | 3028 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc) |
1cf03c00 DW |
3029 | { |
3030 | struct device *dev = acpi_desc->dev; | |
3031 | struct nd_cmd_ars_status *ars_status; | |
3032 | ||
459d0ddb DW |
3033 | if (acpi_desc->ars_status) { |
3034 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); | |
1cf03c00 DW |
3035 | return 0; |
3036 | } | |
3037 | ||
459d0ddb | 3038 | ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL); |
1cf03c00 DW |
3039 | if (!ars_status) |
3040 | return -ENOMEM; | |
3041 | acpi_desc->ars_status = ars_status; | |
1f7df6f8 DW |
3042 | return 0; |
3043 | } | |
3044 | ||
459d0ddb | 3045 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc) |
1cf03c00 | 3046 | { |
1cf03c00 DW |
3047 | int rc; |
3048 | ||
459d0ddb | 3049 | if (ars_status_alloc(acpi_desc)) |
1cf03c00 DW |
3050 | return -ENOMEM; |
3051 | ||
3052 | rc = ars_get_status(acpi_desc); | |
bc6ba808 | 3053 | |
1cf03c00 DW |
3054 | if (rc < 0 && rc != -ENOSPC) |
3055 | return rc; | |
3056 | ||
459d0ddb | 3057 | if (ars_status_process_records(acpi_desc)) |
3fa58dca | 3058 | dev_err(acpi_desc->dev, "Failed to process ARS records\n"); |
1cf03c00 | 3059 | |
3fa58dca | 3060 | return rc; |
1cf03c00 DW |
3061 | } |
3062 | ||
d3abaf43 DW |
3063 | static int ars_register(struct acpi_nfit_desc *acpi_desc, |
3064 | struct nfit_spa *nfit_spa) | |
1cf03c00 | 3065 | { |
d3abaf43 | 3066 | int rc; |
1cf03c00 | 3067 | |
fa3ed4d9 | 3068 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
bca811a7 | 3069 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
1cf03c00 | 3070 | |
d3abaf43 | 3071 | set_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
fa3ed4d9 DW |
3072 | if (!no_init_ars) |
3073 | set_bit(ARS_REQ_LONG, &nfit_spa->ars_state); | |
1cf03c00 | 3074 | |
d3abaf43 | 3075 | switch (acpi_nfit_query_poison(acpi_desc)) { |
bc6ba808 | 3076 | case 0: |
c6c5df29 | 3077 | case -ENOSPC: |
bc6ba808 | 3078 | case -EAGAIN: |
d3abaf43 DW |
3079 | rc = ars_start(acpi_desc, nfit_spa, ARS_REQ_SHORT); |
3080 | /* shouldn't happen, try again later */ | |
3081 | if (rc == -EBUSY) | |
1cf03c00 | 3082 | break; |
d3abaf43 | 3083 | if (rc) { |
bc6ba808 DW |
3084 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
3085 | break; | |
1cf03c00 | 3086 | } |
d3abaf43 DW |
3087 | clear_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
3088 | rc = acpi_nfit_query_poison(acpi_desc); | |
3089 | if (rc) | |
3090 | break; | |
3091 | acpi_desc->scrub_spa = nfit_spa; | |
3092 | ars_complete(acpi_desc, nfit_spa); | |
3093 | /* | |
3094 | * If ars_complete() says we didn't complete the | |
3095 | * short scrub, we'll try again with a long | |
3096 | * request. | |
3097 | */ | |
3098 | acpi_desc->scrub_spa = NULL; | |
1cf03c00 | 3099 | break; |
bc6ba808 | 3100 | case -EBUSY: |
d3abaf43 | 3101 | case -ENOMEM: |
d3abaf43 DW |
3102 | /* |
3103 | * BIOS was using ARS, wait for it to complete (or | |
3104 | * resources to become available) and then perform our | |
3105 | * own scrubs. | |
3106 | */ | |
1cf03c00 | 3107 | break; |
bc6ba808 DW |
3108 | default: |
3109 | set_bit(ARS_FAILED, &nfit_spa->ars_state); | |
3110 | break; | |
3111 | } | |
3112 | ||
bc6ba808 | 3113 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
1cf03c00 DW |
3114 | } |
3115 | ||
bc6ba808 | 3116 | static void ars_complete_all(struct acpi_nfit_desc *acpi_desc) |
1f7df6f8 DW |
3117 | { |
3118 | struct nfit_spa *nfit_spa; | |
1cf03c00 | 3119 | |
1f7df6f8 | 3120 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 | 3121 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
1cf03c00 | 3122 | continue; |
bc6ba808 DW |
3123 | ars_complete(acpi_desc, nfit_spa); |
3124 | } | |
3125 | } | |
1cf03c00 | 3126 | |
bc6ba808 DW |
3127 | static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc, |
3128 | int query_rc) | |
3129 | { | |
3130 | unsigned int tmo = acpi_desc->scrub_tmo; | |
3131 | struct device *dev = acpi_desc->dev; | |
3132 | struct nfit_spa *nfit_spa; | |
1cf03c00 | 3133 | |
d3abaf43 DW |
3134 | lockdep_assert_held(&acpi_desc->init_mutex); |
3135 | ||
e34b8252 | 3136 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) |
bc6ba808 | 3137 | return 0; |
1cf03c00 | 3138 | |
bc6ba808 DW |
3139 | if (query_rc == -EBUSY) { |
3140 | dev_dbg(dev, "ARS: ARS busy\n"); | |
3141 | return min(30U * 60U, tmo * 2); | |
3142 | } | |
3143 | if (query_rc == -ENOSPC) { | |
3144 | dev_dbg(dev, "ARS: ARS continue\n"); | |
3145 | ars_continue(acpi_desc); | |
3146 | return 1; | |
3147 | } | |
3148 | if (query_rc && query_rc != -EAGAIN) { | |
3149 | unsigned long long addr, end; | |
1cf03c00 | 3150 | |
bc6ba808 DW |
3151 | addr = acpi_desc->ars_status->address; |
3152 | end = addr + acpi_desc->ars_status->length; | |
3153 | dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end, | |
3154 | query_rc); | |
1f7df6f8 | 3155 | } |
1cf03c00 | 3156 | |
bc6ba808 | 3157 | ars_complete_all(acpi_desc); |
1cf03c00 | 3158 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
d3abaf43 DW |
3159 | enum nfit_ars_state req_type; |
3160 | int rc; | |
3161 | ||
bc6ba808 DW |
3162 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
3163 | continue; | |
d3abaf43 DW |
3164 | |
3165 | /* prefer short ARS requests first */ | |
3166 | if (test_bit(ARS_REQ_SHORT, &nfit_spa->ars_state)) | |
3167 | req_type = ARS_REQ_SHORT; | |
3168 | else if (test_bit(ARS_REQ_LONG, &nfit_spa->ars_state)) | |
3169 | req_type = ARS_REQ_LONG; | |
3170 | else | |
3171 | continue; | |
3172 | rc = ars_start(acpi_desc, nfit_spa, req_type); | |
3173 | ||
3174 | dev = nd_region_dev(nfit_spa->nd_region); | |
3175 | dev_dbg(dev, "ARS: range %d ARS start %s (%d)\n", | |
3176 | nfit_spa->spa->range_index, | |
3177 | req_type == ARS_REQ_SHORT ? "short" : "long", | |
3178 | rc); | |
3179 | /* | |
3180 | * Hmm, we raced someone else starting ARS? Try again in | |
3181 | * a bit. | |
3182 | */ | |
3183 | if (rc == -EBUSY) | |
3184 | return 1; | |
3185 | if (rc == 0) { | |
3186 | dev_WARN_ONCE(dev, acpi_desc->scrub_spa, | |
3187 | "scrub start while range %d active\n", | |
3188 | acpi_desc->scrub_spa->spa->range_index); | |
3189 | clear_bit(req_type, &nfit_spa->ars_state); | |
3190 | acpi_desc->scrub_spa = nfit_spa; | |
3191 | /* | |
3192 | * Consider this spa last for future scrub | |
3193 | * requests | |
3194 | */ | |
3195 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); | |
3196 | return 1; | |
37b137ff | 3197 | } |
d3abaf43 DW |
3198 | |
3199 | dev_err(dev, "ARS: range %d ARS failed (%d)\n", | |
3200 | nfit_spa->spa->range_index, rc); | |
3201 | set_bit(ARS_FAILED, &nfit_spa->ars_state); | |
1cf03c00 | 3202 | } |
bc6ba808 DW |
3203 | return 0; |
3204 | } | |
1cf03c00 | 3205 | |
33cc2c96 DW |
3206 | static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo) |
3207 | { | |
3208 | lockdep_assert_held(&acpi_desc->init_mutex); | |
3209 | ||
e34b8252 | 3210 | set_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
33cc2c96 DW |
3211 | /* note this should only be set from within the workqueue */ |
3212 | if (tmo) | |
3213 | acpi_desc->scrub_tmo = tmo; | |
3214 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ); | |
3215 | } | |
3216 | ||
3217 | static void sched_ars(struct acpi_nfit_desc *acpi_desc) | |
3218 | { | |
3219 | __sched_ars(acpi_desc, 0); | |
3220 | } | |
3221 | ||
3222 | static void notify_ars_done(struct acpi_nfit_desc *acpi_desc) | |
3223 | { | |
3224 | lockdep_assert_held(&acpi_desc->init_mutex); | |
3225 | ||
e34b8252 | 3226 | clear_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
33cc2c96 DW |
3227 | acpi_desc->scrub_count++; |
3228 | if (acpi_desc->scrub_count_state) | |
3229 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
3230 | } | |
3231 | ||
bc6ba808 DW |
3232 | static void acpi_nfit_scrub(struct work_struct *work) |
3233 | { | |
3234 | struct acpi_nfit_desc *acpi_desc; | |
3235 | unsigned int tmo; | |
3236 | int query_rc; | |
3237 | ||
3238 | acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work); | |
3239 | mutex_lock(&acpi_desc->init_mutex); | |
3240 | query_rc = acpi_nfit_query_poison(acpi_desc); | |
3241 | tmo = __acpi_nfit_scrub(acpi_desc, query_rc); | |
33cc2c96 DW |
3242 | if (tmo) |
3243 | __sched_ars(acpi_desc, tmo); | |
3244 | else | |
3245 | notify_ars_done(acpi_desc); | |
bc6ba808 | 3246 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
5479b275 | 3247 | clear_bit(ARS_POLL, &acpi_desc->scrub_flags); |
1cf03c00 DW |
3248 | mutex_unlock(&acpi_desc->init_mutex); |
3249 | } | |
3250 | ||
459d0ddb DW |
3251 | static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc, |
3252 | struct nfit_spa *nfit_spa) | |
3253 | { | |
3254 | int type = nfit_spa_type(nfit_spa->spa); | |
3255 | struct nd_cmd_ars_cap ars_cap; | |
3256 | int rc; | |
3257 | ||
d3abaf43 | 3258 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
459d0ddb DW |
3259 | memset(&ars_cap, 0, sizeof(ars_cap)); |
3260 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
3261 | if (rc < 0) | |
3262 | return; | |
3263 | /* check that the supported scrub types match the spa type */ | |
3264 | if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16) | |
3265 | & ND_ARS_VOLATILE) == 0) | |
3266 | return; | |
3267 | if (type == NFIT_SPA_PM && ((ars_cap.status >> 16) | |
3268 | & ND_ARS_PERSISTENT) == 0) | |
3269 | return; | |
3270 | ||
3271 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
3272 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
3273 | acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars); | |
bc6ba808 | 3274 | clear_bit(ARS_FAILED, &nfit_spa->ars_state); |
459d0ddb DW |
3275 | } |
3276 | ||
1cf03c00 DW |
3277 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
3278 | { | |
3279 | struct nfit_spa *nfit_spa; | |
d3abaf43 | 3280 | int rc; |
1cf03c00 | 3281 | |
78153dd4 | 3282 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); |
8d0d8ed3 | 3283 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 DW |
3284 | switch (nfit_spa_type(nfit_spa->spa)) { |
3285 | case NFIT_SPA_VOLATILE: | |
3286 | case NFIT_SPA_PM: | |
459d0ddb | 3287 | acpi_nfit_init_ars(acpi_desc, nfit_spa); |
bc6ba808 | 3288 | break; |
459d0ddb | 3289 | } |
8d0d8ed3 | 3290 | } |
1cf03c00 | 3291 | |
1cf03c00 | 3292 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
bc6ba808 DW |
3293 | switch (nfit_spa_type(nfit_spa->spa)) { |
3294 | case NFIT_SPA_VOLATILE: | |
3295 | case NFIT_SPA_PM: | |
3296 | /* register regions and kick off initial ARS run */ | |
d3abaf43 | 3297 | rc = ars_register(acpi_desc, nfit_spa); |
bc6ba808 DW |
3298 | if (rc) |
3299 | return rc; | |
3300 | break; | |
3301 | case NFIT_SPA_BDW: | |
3302 | /* nothing to register */ | |
3303 | break; | |
3304 | case NFIT_SPA_DCR: | |
3305 | case NFIT_SPA_VDISK: | |
3306 | case NFIT_SPA_VCD: | |
3307 | case NFIT_SPA_PDISK: | |
3308 | case NFIT_SPA_PCD: | |
3309 | /* register known regions that don't support ARS */ | |
1cf03c00 DW |
3310 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
3311 | if (rc) | |
3312 | return rc; | |
bc6ba808 DW |
3313 | break; |
3314 | default: | |
3315 | /* don't register unknown regions */ | |
3316 | break; | |
1cf03c00 DW |
3317 | } |
3318 | ||
33cc2c96 | 3319 | sched_ars(acpi_desc); |
1f7df6f8 DW |
3320 | return 0; |
3321 | } | |
3322 | ||
20985164 VV |
3323 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
3324 | struct nfit_table_prev *prev) | |
3325 | { | |
3326 | struct device *dev = acpi_desc->dev; | |
3327 | ||
3328 | if (!list_empty(&prev->spas) || | |
3329 | !list_empty(&prev->memdevs) || | |
3330 | !list_empty(&prev->dcrs) || | |
3331 | !list_empty(&prev->bdws) || | |
3332 | !list_empty(&prev->idts) || | |
3333 | !list_empty(&prev->flushes)) { | |
3334 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
3335 | return -ENXIO; | |
3336 | } | |
3337 | return 0; | |
3338 | } | |
3339 | ||
37b137ff VV |
3340 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
3341 | { | |
3342 | struct device *dev = acpi_desc->dev; | |
3343 | struct kernfs_node *nfit; | |
3344 | struct device *bus_dev; | |
3345 | ||
3346 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
3347 | return 0; | |
3348 | ||
3349 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3350 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
3351 | if (!nfit) { | |
3352 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
3353 | return -ENODEV; | |
3354 | } | |
3355 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
3356 | sysfs_put(nfit); | |
3357 | if (!acpi_desc->scrub_count_state) { | |
3358 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
3359 | return -ENODEV; | |
3360 | } | |
3361 | ||
3362 | return 0; | |
3363 | } | |
3364 | ||
fbabd829 | 3365 | static void acpi_nfit_unregister(void *data) |
58cd71b4 DW |
3366 | { |
3367 | struct acpi_nfit_desc *acpi_desc = data; | |
3368 | ||
58cd71b4 | 3369 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
58cd71b4 DW |
3370 | } |
3371 | ||
e7a11b44 | 3372 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
3373 | { |
3374 | struct device *dev = acpi_desc->dev; | |
20985164 | 3375 | struct nfit_table_prev prev; |
b94d5230 | 3376 | const void *end; |
1f7df6f8 | 3377 | int rc; |
b94d5230 | 3378 | |
58cd71b4 | 3379 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
3380 | acpi_nfit_init_dsms(acpi_desc); |
3381 | ||
58cd71b4 DW |
3382 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
3383 | &acpi_desc->nd_desc); | |
3384 | if (!acpi_desc->nvdimm_bus) | |
3385 | return -ENOMEM; | |
37b137ff | 3386 | |
fbabd829 | 3387 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
58cd71b4 DW |
3388 | acpi_desc); |
3389 | if (rc) | |
3390 | return rc; | |
37b137ff VV |
3391 | |
3392 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
3393 | if (rc) | |
3394 | return rc; | |
6839a6d9 VV |
3395 | |
3396 | /* register this acpi_desc for mce notifications */ | |
3397 | mutex_lock(&acpi_desc_lock); | |
3398 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
3399 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
3400 | } |
3401 | ||
20985164 VV |
3402 | mutex_lock(&acpi_desc->init_mutex); |
3403 | ||
3404 | INIT_LIST_HEAD(&prev.spas); | |
3405 | INIT_LIST_HEAD(&prev.memdevs); | |
3406 | INIT_LIST_HEAD(&prev.dcrs); | |
3407 | INIT_LIST_HEAD(&prev.bdws); | |
3408 | INIT_LIST_HEAD(&prev.idts); | |
3409 | INIT_LIST_HEAD(&prev.flushes); | |
3410 | ||
3411 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
3412 | acpi_desc->spas.prev); | |
3413 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
3414 | acpi_desc->memdevs.prev); | |
3415 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
3416 | acpi_desc->dcrs.prev); | |
3417 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
3418 | acpi_desc->bdws.prev); | |
3419 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
3420 | acpi_desc->idts.prev); | |
3421 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
3422 | acpi_desc->flushes.prev); | |
b94d5230 | 3423 | |
b94d5230 | 3424 | end = data + sz; |
b94d5230 | 3425 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 3426 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
3427 | |
3428 | if (IS_ERR(data)) { | |
b814735f | 3429 | dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data)); |
20985164 VV |
3430 | rc = PTR_ERR(data); |
3431 | goto out_unlock; | |
b94d5230 DW |
3432 | } |
3433 | ||
20985164 VV |
3434 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
3435 | if (rc) | |
3436 | goto out_unlock; | |
3437 | ||
81ed4e36 DW |
3438 | rc = nfit_mem_init(acpi_desc); |
3439 | if (rc) | |
20985164 | 3440 | goto out_unlock; |
62232e45 | 3441 | |
1f7df6f8 DW |
3442 | rc = acpi_nfit_register_dimms(acpi_desc); |
3443 | if (rc) | |
20985164 VV |
3444 | goto out_unlock; |
3445 | ||
3446 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 3447 | |
20985164 VV |
3448 | out_unlock: |
3449 | mutex_unlock(&acpi_desc->init_mutex); | |
3450 | return rc; | |
b94d5230 | 3451 | } |
6bc75619 | 3452 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 3453 | |
7ae0fa43 DW |
3454 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
3455 | { | |
8a7f02f6 | 3456 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
7ae0fa43 | 3457 | struct device *dev = acpi_desc->dev; |
7ae0fa43 | 3458 | |
bc6ba808 | 3459 | /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
87a30e1f DW |
3460 | nfit_device_lock(dev); |
3461 | nfit_device_unlock(dev); | |
7ae0fa43 | 3462 | |
bc6ba808 | 3463 | /* Bounce the init_mutex to complete initial registration */ |
9ccaed4b | 3464 | mutex_lock(&acpi_desc->init_mutex); |
fbabd829 | 3465 | mutex_unlock(&acpi_desc->init_mutex); |
e471486c | 3466 | |
bc6ba808 | 3467 | return 0; |
7ae0fa43 DW |
3468 | } |
3469 | ||
b3ed2ce0 | 3470 | static int __acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
87bf572e DW |
3471 | struct nvdimm *nvdimm, unsigned int cmd) |
3472 | { | |
8a7f02f6 | 3473 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
87bf572e DW |
3474 | |
3475 | if (nvdimm) | |
3476 | return 0; | |
3477 | if (cmd != ND_CMD_ARS_START) | |
3478 | return 0; | |
3479 | ||
3480 | /* | |
3481 | * The kernel and userspace may race to initiate a scrub, but | |
3482 | * the scrub thread is prepared to lose that initial race. It | |
59486121 DW |
3483 | * just needs guarantees that any ARS it initiates are not |
3484 | * interrupted by any intervening start requests from userspace. | |
87bf572e | 3485 | */ |
2121db09 DW |
3486 | if (work_busy(&acpi_desc->dwork.work)) |
3487 | return -EBUSY; | |
87bf572e | 3488 | |
2121db09 | 3489 | return 0; |
87bf572e DW |
3490 | } |
3491 | ||
b3ed2ce0 DJ |
3492 | /* prevent security commands from being issued via ioctl */ |
3493 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, | |
3494 | struct nvdimm *nvdimm, unsigned int cmd, void *buf) | |
3495 | { | |
3496 | struct nd_cmd_pkg *call_pkg = buf; | |
3497 | unsigned int func; | |
3498 | ||
3499 | if (nvdimm && cmd == ND_CMD_CALL && | |
3500 | call_pkg->nd_family == NVDIMM_FAMILY_INTEL) { | |
3501 | func = call_pkg->nd_command; | |
3502 | if ((1 << func) & NVDIMM_INTEL_SECURITY_CMDMASK) | |
3503 | return -EOPNOTSUPP; | |
3504 | } | |
3505 | ||
3506 | return __acpi_nfit_clear_to_send(nd_desc, nvdimm, cmd); | |
3507 | } | |
3508 | ||
d3abaf43 DW |
3509 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, |
3510 | enum nfit_ars_state req_type) | |
37b137ff VV |
3511 | { |
3512 | struct device *dev = acpi_desc->dev; | |
bc6ba808 | 3513 | int scheduled = 0, busy = 0; |
37b137ff VV |
3514 | struct nfit_spa *nfit_spa; |
3515 | ||
fbabd829 | 3516 | mutex_lock(&acpi_desc->init_mutex); |
e34b8252 | 3517 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) { |
fbabd829 | 3518 | mutex_unlock(&acpi_desc->init_mutex); |
37b137ff | 3519 | return 0; |
fbabd829 | 3520 | } |
37b137ff | 3521 | |
37b137ff | 3522 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 | 3523 | int type = nfit_spa_type(nfit_spa->spa); |
37b137ff | 3524 | |
bc6ba808 DW |
3525 | if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE) |
3526 | continue; | |
3527 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) | |
37b137ff VV |
3528 | continue; |
3529 | ||
d3abaf43 | 3530 | if (test_and_set_bit(req_type, &nfit_spa->ars_state)) |
bc6ba808 | 3531 | busy++; |
d3abaf43 | 3532 | else |
bc6ba808 | 3533 | scheduled++; |
bc6ba808 DW |
3534 | } |
3535 | if (scheduled) { | |
33cc2c96 | 3536 | sched_ars(acpi_desc); |
bc6ba808 | 3537 | dev_dbg(dev, "ars_scan triggered\n"); |
37b137ff | 3538 | } |
37b137ff VV |
3539 | mutex_unlock(&acpi_desc->init_mutex); |
3540 | ||
bc6ba808 DW |
3541 | if (scheduled) |
3542 | return 0; | |
3543 | if (busy) | |
3544 | return -EBUSY; | |
3545 | return -ENOTTY; | |
37b137ff VV |
3546 | } |
3547 | ||
a61fe6f7 | 3548 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
3549 | { |
3550 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
3551 | |
3552 | dev_set_drvdata(dev, acpi_desc); | |
3553 | acpi_desc->dev = dev; | |
6bc75619 | 3554 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
3555 | nd_desc = &acpi_desc->nd_desc; |
3556 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 3557 | nd_desc->module = THIS_MODULE; |
b94d5230 | 3558 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 3559 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 3560 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 3561 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 3562 | |
20985164 VV |
3563 | INIT_LIST_HEAD(&acpi_desc->spas); |
3564 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
3565 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
3566 | INIT_LIST_HEAD(&acpi_desc->idts); | |
3567 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
3568 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
3569 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 3570 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 3571 | mutex_init(&acpi_desc->init_mutex); |
bc6ba808 DW |
3572 | acpi_desc->scrub_tmo = 1; |
3573 | INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub); | |
20985164 | 3574 | } |
a61fe6f7 | 3575 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 | 3576 | |
3c87f372 DW |
3577 | static void acpi_nfit_put_table(void *table) |
3578 | { | |
3579 | acpi_put_table(table); | |
3580 | } | |
3581 | ||
fbabd829 DW |
3582 | void acpi_nfit_shutdown(void *data) |
3583 | { | |
3584 | struct acpi_nfit_desc *acpi_desc = data; | |
3585 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3586 | ||
3587 | /* | |
3588 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
3589 | * race teardown | |
3590 | */ | |
3591 | mutex_lock(&acpi_desc_lock); | |
3592 | list_del(&acpi_desc->list); | |
3593 | mutex_unlock(&acpi_desc_lock); | |
3594 | ||
3595 | mutex_lock(&acpi_desc->init_mutex); | |
e34b8252 | 3596 | set_bit(ARS_CANCEL, &acpi_desc->scrub_flags); |
bc6ba808 | 3597 | cancel_delayed_work_sync(&acpi_desc->dwork); |
fbabd829 DW |
3598 | mutex_unlock(&acpi_desc->init_mutex); |
3599 | ||
3600 | /* | |
3601 | * Bounce the nvdimm bus lock to make sure any in-flight | |
3602 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
3603 | * either submit or see ->cancel set. | |
3604 | */ | |
87a30e1f DW |
3605 | nfit_device_lock(bus_dev); |
3606 | nfit_device_unlock(bus_dev); | |
fbabd829 DW |
3607 | |
3608 | flush_workqueue(nfit_wq); | |
3609 | } | |
3610 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); | |
3611 | ||
20985164 VV |
3612 | static int acpi_nfit_add(struct acpi_device *adev) |
3613 | { | |
3614 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
3615 | struct acpi_nfit_desc *acpi_desc; | |
3616 | struct device *dev = &adev->dev; | |
3617 | struct acpi_table_header *tbl; | |
3618 | acpi_status status = AE_OK; | |
3619 | acpi_size sz; | |
31932041 | 3620 | int rc = 0; |
20985164 | 3621 | |
6b11d1d6 | 3622 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
20985164 | 3623 | if (ACPI_FAILURE(status)) { |
9f619d47 OH |
3624 | /* The NVDIMM root device allows OS to trigger enumeration of |
3625 | * NVDIMMs through NFIT at boot time and re-enumeration at | |
3626 | * root level via the _FIT method during runtime. | |
3627 | * This is ok to return 0 here, we could have an nvdimm | |
3628 | * hotplugged later and evaluate _FIT method which returns | |
3629 | * data in the format of a series of NFIT Structures. | |
3630 | */ | |
20985164 VV |
3631 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
3632 | return 0; | |
3633 | } | |
3c87f372 DW |
3634 | |
3635 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); | |
3636 | if (rc) | |
3637 | return rc; | |
6b11d1d6 | 3638 | sz = tbl->length; |
20985164 | 3639 | |
a61fe6f7 DW |
3640 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3641 | if (!acpi_desc) | |
3642 | return -ENOMEM; | |
3643 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 3644 | |
e7a11b44 | 3645 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 3646 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
3647 | |
3648 | /* Evaluate _FIT and override with that if present */ | |
3649 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
3650 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
3651 | union acpi_object *obj = buf.pointer; |
3652 | ||
3653 | if (obj->type == ACPI_TYPE_BUFFER) | |
3654 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
3655 | obj->buffer.length); | |
3656 | else | |
b814735f JT |
3657 | dev_dbg(dev, "invalid type %d, ignoring _FIT\n", |
3658 | (int) obj->type); | |
31932041 DW |
3659 | kfree(buf.pointer); |
3660 | } else | |
e7a11b44 DW |
3661 | /* skip over the lead-in header table */ |
3662 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
3663 | + sizeof(struct acpi_table_nfit), | |
3664 | sz - sizeof(struct acpi_table_nfit)); | |
fbabd829 DW |
3665 | |
3666 | if (rc) | |
3667 | return rc; | |
3668 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); | |
b94d5230 DW |
3669 | } |
3670 | ||
3671 | static int acpi_nfit_remove(struct acpi_device *adev) | |
3672 | { | |
fbabd829 | 3673 | /* see acpi_nfit_unregister */ |
b94d5230 DW |
3674 | return 0; |
3675 | } | |
3676 | ||
56b47fe6 | 3677 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
20985164 | 3678 | { |
c14a868a | 3679 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 3680 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 3681 | union acpi_object *obj; |
20985164 VV |
3682 | acpi_status status; |
3683 | int ret; | |
3684 | ||
20985164 VV |
3685 | if (!dev->driver) { |
3686 | /* dev->driver may be null if we're being removed */ | |
b814735f | 3687 | dev_dbg(dev, "no driver found for dev\n"); |
c14a868a | 3688 | return; |
20985164 VV |
3689 | } |
3690 | ||
3691 | if (!acpi_desc) { | |
a61fe6f7 DW |
3692 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3693 | if (!acpi_desc) | |
c14a868a DW |
3694 | return; |
3695 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
3696 | } else { |
3697 | /* | |
3698 | * Finish previous registration before considering new | |
3699 | * regions. | |
3700 | */ | |
3701 | flush_workqueue(nfit_wq); | |
20985164 VV |
3702 | } |
3703 | ||
3704 | /* Evaluate _FIT */ | |
c14a868a | 3705 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
3706 | if (ACPI_FAILURE(status)) { |
3707 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 3708 | return; |
20985164 VV |
3709 | } |
3710 | ||
6b577c9d LK |
3711 | obj = buf.pointer; |
3712 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
3713 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
3714 | obj->buffer.length); | |
31932041 | 3715 | if (ret) |
6b577c9d | 3716 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 3717 | } else |
6b577c9d | 3718 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 3719 | kfree(buf.pointer); |
c14a868a | 3720 | } |
56b47fe6 TK |
3721 | |
3722 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) | |
3723 | { | |
3724 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); | |
3725 | ||
d3abaf43 DW |
3726 | if (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) |
3727 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); | |
3728 | else | |
3729 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_SHORT); | |
56b47fe6 TK |
3730 | } |
3731 | ||
3732 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) | |
3733 | { | |
b814735f | 3734 | dev_dbg(dev, "event: 0x%x\n", event); |
56b47fe6 TK |
3735 | |
3736 | switch (event) { | |
3737 | case NFIT_NOTIFY_UPDATE: | |
3738 | return acpi_nfit_update_notify(dev, handle); | |
3739 | case NFIT_NOTIFY_UC_MEMORY_ERROR: | |
3740 | return acpi_nfit_uc_error_notify(dev, handle); | |
3741 | default: | |
3742 | return; | |
3743 | } | |
3744 | } | |
c14a868a | 3745 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
20985164 | 3746 | |
c14a868a DW |
3747 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
3748 | { | |
87a30e1f | 3749 | nfit_device_lock(&adev->dev); |
c14a868a | 3750 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
87a30e1f | 3751 | nfit_device_unlock(&adev->dev); |
20985164 VV |
3752 | } |
3753 | ||
b94d5230 DW |
3754 | static const struct acpi_device_id acpi_nfit_ids[] = { |
3755 | { "ACPI0012", 0 }, | |
3756 | { "", 0 }, | |
3757 | }; | |
3758 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
3759 | ||
3760 | static struct acpi_driver acpi_nfit_driver = { | |
3761 | .name = KBUILD_MODNAME, | |
3762 | .ids = acpi_nfit_ids, | |
3763 | .ops = { | |
3764 | .add = acpi_nfit_add, | |
3765 | .remove = acpi_nfit_remove, | |
20985164 | 3766 | .notify = acpi_nfit_notify, |
b94d5230 DW |
3767 | }, |
3768 | }; | |
3769 | ||
3770 | static __init int nfit_init(void) | |
3771 | { | |
7e700d2c PB |
3772 | int ret; |
3773 | ||
b94d5230 DW |
3774 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
3775 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
3776 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
3777 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
3778 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
3779 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
3780 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
06e8ccda | 3781 | BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16); |
b94d5230 | 3782 | |
41c8bdb3 AS |
3783 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
3784 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); | |
3785 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); | |
3786 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); | |
3787 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); | |
3788 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); | |
3789 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); | |
3790 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); | |
3791 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); | |
3792 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); | |
3793 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); | |
3794 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
3795 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); | |
1194c413 | 3796 | guid_parse(UUID_NFIT_DIMM_N_HYPERV, &nfit_uuid[NFIT_DEV_DIMM_N_HYPERV]); |
b94d5230 | 3797 | |
7ae0fa43 DW |
3798 | nfit_wq = create_singlethread_workqueue("nfit"); |
3799 | if (!nfit_wq) | |
3800 | return -ENOMEM; | |
3801 | ||
6839a6d9 | 3802 | nfit_mce_register(); |
7e700d2c PB |
3803 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
3804 | if (ret) { | |
3805 | nfit_mce_unregister(); | |
3806 | destroy_workqueue(nfit_wq); | |
3807 | } | |
3808 | ||
3809 | return ret; | |
6839a6d9 | 3810 | |
b94d5230 DW |
3811 | } |
3812 | ||
3813 | static __exit void nfit_exit(void) | |
3814 | { | |
6839a6d9 | 3815 | nfit_mce_unregister(); |
b94d5230 | 3816 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 3817 | destroy_workqueue(nfit_wq); |
6839a6d9 | 3818 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
3819 | } |
3820 | ||
3821 | module_init(nfit_init); | |
3822 | module_exit(nfit_exit); | |
3823 | MODULE_LICENSE("GPL v2"); | |
3824 | MODULE_AUTHOR("Intel Corporation"); |