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b94d5230 DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #include <linux/list_sort.h> | |
14 | #include <linux/libnvdimm.h> | |
15 | #include <linux/module.h> | |
047fc8a1 | 16 | #include <linux/mutex.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
37b137ff | 18 | #include <linux/sysfs.h> |
0caeef63 | 19 | #include <linux/delay.h> |
b94d5230 DW |
20 | #include <linux/list.h> |
21 | #include <linux/acpi.h> | |
eaf96153 | 22 | #include <linux/sort.h> |
c2ad2954 | 23 | #include <linux/pmem.h> |
047fc8a1 | 24 | #include <linux/io.h> |
1cf03c00 | 25 | #include <linux/nd.h> |
96601adb | 26 | #include <asm/cacheflush.h> |
b94d5230 DW |
27 | #include "nfit.h" |
28 | ||
047fc8a1 RZ |
29 | /* |
30 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
31 | * irrelevant. | |
32 | */ | |
2f8e2c87 | 33 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 34 | |
4d88a97a DW |
35 | static bool force_enable_dimms; |
36 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
37 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
38 | ||
1cf03c00 DW |
39 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
40 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); | |
41 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); | |
42 | ||
43 | /* after three payloads of overflow, it's dead jim */ | |
44 | static unsigned int scrub_overflow_abort = 3; | |
45 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); | |
46 | MODULE_PARM_DESC(scrub_overflow_abort, | |
47 | "Number of times we overflow ARS results before abort"); | |
48 | ||
87554098 DW |
49 | static bool disable_vendor_specific; |
50 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
51 | MODULE_PARM_DESC(disable_vendor_specific, | |
52 | "Limit commands to the publicly specified set\n"); | |
53 | ||
6839a6d9 VV |
54 | LIST_HEAD(acpi_descs); |
55 | DEFINE_MUTEX(acpi_desc_lock); | |
56 | ||
7ae0fa43 DW |
57 | static struct workqueue_struct *nfit_wq; |
58 | ||
20985164 VV |
59 | struct nfit_table_prev { |
60 | struct list_head spas; | |
61 | struct list_head memdevs; | |
62 | struct list_head dcrs; | |
63 | struct list_head bdws; | |
64 | struct list_head idts; | |
65 | struct list_head flushes; | |
66 | }; | |
67 | ||
b94d5230 DW |
68 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
69 | ||
6bc75619 | 70 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 DW |
71 | { |
72 | return nfit_uuid[id]; | |
73 | } | |
6bc75619 | 74 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 75 | |
62232e45 DW |
76 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
77 | struct nvdimm_bus_descriptor *nd_desc) | |
78 | { | |
79 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
80 | } | |
81 | ||
82 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) | |
83 | { | |
84 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
85 | ||
86 | /* | |
87 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
88 | * acpi_device. | |
89 | */ | |
90 | if (!nd_desc->provider_name | |
91 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
92 | return NULL; | |
93 | ||
94 | return to_acpi_device(acpi_desc->dev); | |
95 | } | |
96 | ||
11294d63 | 97 | static int xlat_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 98 | { |
d4f32367 | 99 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 100 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
101 | u16 flags; |
102 | ||
103 | switch (cmd) { | |
104 | case ND_CMD_ARS_CAP: | |
11294d63 | 105 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
106 | return -ENOTTY; |
107 | ||
108 | /* Command failed */ | |
11294d63 | 109 | if (status & 0xffff) |
aef25338 DW |
110 | return -EIO; |
111 | ||
112 | /* No supported scan types for this range */ | |
113 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 114 | if ((status >> 16 & flags) == 0) |
aef25338 | 115 | return -ENOTTY; |
9a901f54 | 116 | return 0; |
aef25338 | 117 | case ND_CMD_ARS_START: |
aef25338 | 118 | /* ARS is in progress */ |
11294d63 | 119 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
120 | return -EBUSY; |
121 | ||
122 | /* Command failed */ | |
11294d63 | 123 | if (status & 0xffff) |
aef25338 | 124 | return -EIO; |
9a901f54 | 125 | return 0; |
aef25338 DW |
126 | case ND_CMD_ARS_STATUS: |
127 | ars_status = buf; | |
128 | /* Command failed */ | |
11294d63 | 129 | if (status & 0xffff) |
aef25338 DW |
130 | return -EIO; |
131 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 132 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
133 | return 0; |
134 | ||
135 | /* ARS is in progress */ | |
11294d63 | 136 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
137 | return -EBUSY; |
138 | ||
139 | /* No ARS performed for the current boot */ | |
11294d63 | 140 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
141 | return -EAGAIN; |
142 | ||
143 | /* | |
144 | * ARS interrupted, either we overflowed or some other | |
145 | * agent wants the scan to stop. If we didn't overflow | |
146 | * then just continue with the returned results. | |
147 | */ | |
11294d63 | 148 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
149 | if (ars_status->out_length >= 40 && (ars_status->flags |
150 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
151 | return -ENOSPC; |
152 | return 0; | |
153 | } | |
154 | ||
155 | /* Unknown status */ | |
11294d63 | 156 | if (status >> 16) |
aef25338 | 157 | return -EIO; |
9a901f54 | 158 | return 0; |
d4f32367 DW |
159 | case ND_CMD_CLEAR_ERROR: |
160 | clear_err = buf; | |
11294d63 | 161 | if (status & 0xffff) |
d4f32367 DW |
162 | return -EIO; |
163 | if (!clear_err->cleared) | |
164 | return -EIO; | |
165 | if (clear_err->length > clear_err->cleared) | |
166 | return clear_err->cleared; | |
9a901f54 | 167 | return 0; |
aef25338 DW |
168 | default: |
169 | break; | |
170 | } | |
171 | ||
11294d63 DW |
172 | /* all other non-zero status results in an error */ |
173 | if (status) | |
174 | return -EIO; | |
aef25338 DW |
175 | return 0; |
176 | } | |
177 | ||
b94d5230 DW |
178 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
179 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | |
aef25338 | 180 | unsigned int buf_len, int *cmd_rc) |
b94d5230 | 181 | { |
62232e45 | 182 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
62232e45 | 183 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 184 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 185 | struct device *dev = acpi_desc->dev; |
31eca76b | 186 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 187 | const char *cmd_name, *dimm_name; |
31eca76b | 188 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 189 | u32 offset, fw_status = 0; |
62232e45 | 190 | acpi_handle handle; |
31eca76b | 191 | unsigned int func; |
62232e45 | 192 | const u8 *uuid; |
62232e45 DW |
193 | int rc, i; |
194 | ||
31eca76b DW |
195 | func = cmd; |
196 | if (cmd == ND_CMD_CALL) { | |
197 | call_pkg = buf; | |
198 | func = call_pkg->nd_command; | |
199 | } | |
200 | ||
62232e45 DW |
201 | if (nvdimm) { |
202 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
203 | struct acpi_device *adev = nfit_mem->adev; | |
204 | ||
205 | if (!adev) | |
206 | return -ENOTTY; | |
31eca76b DW |
207 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
208 | return -ENOTTY; | |
209 | ||
047fc8a1 | 210 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 211 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 212 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
213 | dsm_mask = nfit_mem->dsm_mask; |
214 | desc = nd_cmd_dimm_desc(cmd); | |
31eca76b | 215 | uuid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
216 | handle = adev->handle; |
217 | } else { | |
218 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
219 | ||
220 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 221 | cmd_mask = nd_desc->cmd_mask; |
31eca76b | 222 | dsm_mask = cmd_mask; |
62232e45 DW |
223 | desc = nd_cmd_bus_desc(cmd); |
224 | uuid = to_nfit_uuid(NFIT_DEV_BUS); | |
225 | handle = adev->handle; | |
226 | dimm_name = "bus"; | |
227 | } | |
228 | ||
229 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
230 | return -ENOTTY; | |
231 | ||
31eca76b | 232 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
62232e45 DW |
233 | return -ENOTTY; |
234 | ||
235 | in_obj.type = ACPI_TYPE_PACKAGE; | |
236 | in_obj.package.count = 1; | |
237 | in_obj.package.elements = &in_buf; | |
238 | in_buf.type = ACPI_TYPE_BUFFER; | |
239 | in_buf.buffer.pointer = buf; | |
240 | in_buf.buffer.length = 0; | |
241 | ||
242 | /* libnvdimm has already validated the input envelope */ | |
243 | for (i = 0; i < desc->in_num; i++) | |
244 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
245 | i, buf); | |
246 | ||
31eca76b DW |
247 | if (call_pkg) { |
248 | /* skip over package wrapper */ | |
249 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
250 | in_buf.buffer.length = call_pkg->nd_size_in; | |
251 | } | |
252 | ||
62232e45 | 253 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
31eca76b DW |
254 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
255 | __func__, dimm_name, cmd, func, | |
256 | in_buf.buffer.length); | |
257 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
258 | in_buf.buffer.pointer, | |
259 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 DW |
260 | } |
261 | ||
31eca76b | 262 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj); |
62232e45 DW |
263 | if (!out_obj) { |
264 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, | |
265 | cmd_name); | |
266 | return -EINVAL; | |
267 | } | |
268 | ||
31eca76b DW |
269 | if (call_pkg) { |
270 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
271 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
272 | out_obj->buffer.pointer, | |
273 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
274 | ||
275 | ACPI_FREE(out_obj); | |
276 | /* | |
277 | * Need to support FW function w/o known size in advance. | |
278 | * Caller can determine required size based upon nd_fw_size. | |
279 | * If we return an error (like elsewhere) then caller wouldn't | |
280 | * be able to rely upon data returned to make calculation. | |
281 | */ | |
282 | return 0; | |
283 | } | |
284 | ||
62232e45 DW |
285 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
286 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", | |
287 | __func__, dimm_name, cmd_name, out_obj->type); | |
288 | rc = -EINVAL; | |
289 | goto out; | |
290 | } | |
291 | ||
292 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { | |
293 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, | |
294 | dimm_name, cmd_name, out_obj->buffer.length); | |
295 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, | |
296 | 4, out_obj->buffer.pointer, min_t(u32, 128, | |
297 | out_obj->buffer.length), true); | |
298 | } | |
299 | ||
300 | for (i = 0, offset = 0; i < desc->out_num; i++) { | |
301 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
302 | (u32 *) out_obj->buffer.pointer, |
303 | out_obj->buffer.length - offset); | |
62232e45 DW |
304 | |
305 | if (offset + out_size > out_obj->buffer.length) { | |
306 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", | |
307 | __func__, dimm_name, cmd_name, i); | |
308 | break; | |
309 | } | |
310 | ||
311 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
312 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", | |
313 | __func__, dimm_name, cmd_name, i); | |
314 | rc = -ENXIO; | |
315 | goto out; | |
316 | } | |
317 | memcpy(buf + in_buf.buffer.length + offset, | |
318 | out_obj->buffer.pointer + offset, out_size); | |
319 | offset += out_size; | |
320 | } | |
11294d63 DW |
321 | |
322 | /* | |
323 | * Set fw_status for all the commands with a known format to be | |
324 | * later interpreted by xlat_status(). | |
325 | */ | |
326 | if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) | |
327 | || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) | |
328 | fw_status = *(u32 *) out_obj->buffer.pointer; | |
329 | ||
62232e45 DW |
330 | if (offset + in_buf.buffer.length < buf_len) { |
331 | if (i >= 1) { | |
332 | /* | |
333 | * status valid, return the number of bytes left | |
334 | * unfilled in the output buffer | |
335 | */ | |
336 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 337 | if (cmd_rc) |
11294d63 | 338 | *cmd_rc = xlat_status(buf, cmd, fw_status); |
62232e45 DW |
339 | } else { |
340 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
341 | __func__, dimm_name, cmd_name, buf_len, | |
342 | offset); | |
343 | rc = -ENXIO; | |
344 | } | |
2eea6582 | 345 | } else { |
62232e45 | 346 | rc = 0; |
2eea6582 | 347 | if (cmd_rc) |
11294d63 | 348 | *cmd_rc = xlat_status(buf, cmd, fw_status); |
2eea6582 | 349 | } |
62232e45 DW |
350 | |
351 | out: | |
352 | ACPI_FREE(out_obj); | |
353 | ||
354 | return rc; | |
b94d5230 DW |
355 | } |
356 | ||
357 | static const char *spa_type_name(u16 type) | |
358 | { | |
359 | static const char *to_name[] = { | |
360 | [NFIT_SPA_VOLATILE] = "volatile", | |
361 | [NFIT_SPA_PM] = "pmem", | |
362 | [NFIT_SPA_DCR] = "dimm-control-region", | |
363 | [NFIT_SPA_BDW] = "block-data-window", | |
364 | [NFIT_SPA_VDISK] = "volatile-disk", | |
365 | [NFIT_SPA_VCD] = "volatile-cd", | |
366 | [NFIT_SPA_PDISK] = "persistent-disk", | |
367 | [NFIT_SPA_PCD] = "persistent-cd", | |
368 | ||
369 | }; | |
370 | ||
371 | if (type > NFIT_SPA_PCD) | |
372 | return "unknown"; | |
373 | ||
374 | return to_name[type]; | |
375 | } | |
376 | ||
6839a6d9 | 377 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 DW |
378 | { |
379 | int i; | |
380 | ||
381 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
382 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) | |
383 | return i; | |
384 | return -1; | |
385 | } | |
386 | ||
387 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 388 | struct nfit_table_prev *prev, |
b94d5230 DW |
389 | struct acpi_nfit_system_address *spa) |
390 | { | |
391 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
392 | struct nfit_spa *nfit_spa; |
393 | ||
31932041 DW |
394 | if (spa->header.length != sizeof(*spa)) |
395 | return false; | |
396 | ||
20985164 | 397 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
31932041 | 398 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
20985164 VV |
399 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
400 | return true; | |
401 | } | |
402 | } | |
b94d5230 | 403 | |
31932041 DW |
404 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
405 | GFP_KERNEL); | |
b94d5230 DW |
406 | if (!nfit_spa) |
407 | return false; | |
408 | INIT_LIST_HEAD(&nfit_spa->list); | |
31932041 | 409 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
b94d5230 DW |
410 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
411 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, | |
412 | spa->range_index, | |
413 | spa_type_name(nfit_spa_type(spa))); | |
414 | return true; | |
415 | } | |
416 | ||
417 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 418 | struct nfit_table_prev *prev, |
b94d5230 DW |
419 | struct acpi_nfit_memory_map *memdev) |
420 | { | |
421 | struct device *dev = acpi_desc->dev; | |
20985164 | 422 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 423 | |
31932041 DW |
424 | if (memdev->header.length != sizeof(*memdev)) |
425 | return false; | |
426 | ||
20985164 | 427 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 428 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
429 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
430 | return true; | |
431 | } | |
432 | ||
31932041 DW |
433 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
434 | GFP_KERNEL); | |
b94d5230 DW |
435 | if (!nfit_memdev) |
436 | return false; | |
437 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 438 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 DW |
439 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
440 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", | |
441 | __func__, memdev->device_handle, memdev->range_index, | |
442 | memdev->region_index); | |
443 | return true; | |
444 | } | |
445 | ||
31932041 DW |
446 | /* |
447 | * An implementation may provide a truncated control region if no block windows | |
448 | * are defined. | |
449 | */ | |
450 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
451 | { | |
452 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
453 | window_size)) | |
454 | return 0; | |
455 | if (dcr->windows) | |
456 | return sizeof(*dcr); | |
457 | return offsetof(struct acpi_nfit_control_region, window_size); | |
458 | } | |
459 | ||
b94d5230 | 460 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 461 | struct nfit_table_prev *prev, |
b94d5230 DW |
462 | struct acpi_nfit_control_region *dcr) |
463 | { | |
464 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
465 | struct nfit_dcr *nfit_dcr; |
466 | ||
31932041 DW |
467 | if (!sizeof_dcr(dcr)) |
468 | return false; | |
469 | ||
20985164 | 470 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 471 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
472 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
473 | return true; | |
474 | } | |
b94d5230 | 475 | |
31932041 DW |
476 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
477 | GFP_KERNEL); | |
b94d5230 DW |
478 | if (!nfit_dcr) |
479 | return false; | |
480 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 481 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 DW |
482 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
483 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, | |
484 | dcr->region_index, dcr->windows); | |
485 | return true; | |
486 | } | |
487 | ||
488 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 489 | struct nfit_table_prev *prev, |
b94d5230 DW |
490 | struct acpi_nfit_data_region *bdw) |
491 | { | |
492 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
493 | struct nfit_bdw *nfit_bdw; |
494 | ||
31932041 DW |
495 | if (bdw->header.length != sizeof(*bdw)) |
496 | return false; | |
20985164 | 497 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 498 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
499 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
500 | return true; | |
501 | } | |
b94d5230 | 502 | |
31932041 DW |
503 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
504 | GFP_KERNEL); | |
b94d5230 DW |
505 | if (!nfit_bdw) |
506 | return false; | |
507 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 508 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 DW |
509 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
510 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, | |
511 | bdw->region_index, bdw->windows); | |
512 | return true; | |
513 | } | |
514 | ||
31932041 DW |
515 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
516 | { | |
517 | if (idt->header.length < sizeof(*idt)) | |
518 | return 0; | |
519 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); | |
520 | } | |
521 | ||
047fc8a1 | 522 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 523 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
524 | struct acpi_nfit_interleave *idt) |
525 | { | |
526 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
527 | struct nfit_idt *nfit_idt; |
528 | ||
31932041 DW |
529 | if (!sizeof_idt(idt)) |
530 | return false; | |
531 | ||
532 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
533 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
534 | continue; | |
535 | ||
536 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
537 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
538 | return true; | |
539 | } | |
31932041 | 540 | } |
047fc8a1 | 541 | |
31932041 DW |
542 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
543 | GFP_KERNEL); | |
047fc8a1 RZ |
544 | if (!nfit_idt) |
545 | return false; | |
546 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 547 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 RZ |
548 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
549 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, | |
550 | idt->interleave_index, idt->line_count); | |
551 | return true; | |
552 | } | |
553 | ||
31932041 DW |
554 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
555 | { | |
556 | if (flush->header.length < sizeof(*flush)) | |
557 | return 0; | |
558 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); | |
559 | } | |
560 | ||
c2ad2954 | 561 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 562 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
563 | struct acpi_nfit_flush_address *flush) |
564 | { | |
565 | struct device *dev = acpi_desc->dev; | |
20985164 | 566 | struct nfit_flush *nfit_flush; |
c2ad2954 | 567 | |
31932041 DW |
568 | if (!sizeof_flush(flush)) |
569 | return false; | |
570 | ||
571 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
572 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
573 | continue; | |
574 | ||
575 | if (memcmp(nfit_flush->flush, flush, | |
576 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
577 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
578 | return true; | |
579 | } | |
31932041 | 580 | } |
20985164 | 581 | |
31932041 DW |
582 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
583 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
584 | if (!nfit_flush) |
585 | return false; | |
586 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 587 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 RZ |
588 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
589 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, | |
590 | flush->device_handle, flush->hint_count); | |
591 | return true; | |
592 | } | |
593 | ||
20985164 VV |
594 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
595 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
596 | { |
597 | struct device *dev = acpi_desc->dev; | |
598 | struct acpi_nfit_header *hdr; | |
599 | void *err = ERR_PTR(-ENOMEM); | |
600 | ||
601 | if (table >= end) | |
602 | return NULL; | |
603 | ||
604 | hdr = table; | |
564d5011 VV |
605 | if (!hdr->length) { |
606 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
607 | hdr->type); | |
608 | return NULL; | |
609 | } | |
610 | ||
b94d5230 DW |
611 | switch (hdr->type) { |
612 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 613 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
614 | return err; |
615 | break; | |
616 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 617 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
618 | return err; |
619 | break; | |
620 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 621 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
622 | return err; |
623 | break; | |
624 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 625 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
626 | return err; |
627 | break; | |
b94d5230 | 628 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 629 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 630 | return err; |
b94d5230 DW |
631 | break; |
632 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 633 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 634 | return err; |
b94d5230 DW |
635 | break; |
636 | case ACPI_NFIT_TYPE_SMBIOS: | |
637 | dev_dbg(dev, "%s: smbios\n", __func__); | |
638 | break; | |
639 | default: | |
640 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
641 | break; | |
642 | } | |
643 | ||
644 | return table + hdr->length; | |
645 | } | |
646 | ||
647 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
648 | struct nfit_mem *nfit_mem) | |
649 | { | |
650 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
651 | u16 dcr = nfit_mem->dcr->region_index; | |
652 | struct nfit_spa *nfit_spa; | |
653 | ||
654 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
655 | u16 range_index = nfit_spa->spa->range_index; | |
656 | int type = nfit_spa_type(nfit_spa->spa); | |
657 | struct nfit_memdev *nfit_memdev; | |
658 | ||
659 | if (type != NFIT_SPA_BDW) | |
660 | continue; | |
661 | ||
662 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
663 | if (nfit_memdev->memdev->range_index != range_index) | |
664 | continue; | |
665 | if (nfit_memdev->memdev->device_handle != device_handle) | |
666 | continue; | |
667 | if (nfit_memdev->memdev->region_index != dcr) | |
668 | continue; | |
669 | ||
670 | nfit_mem->spa_bdw = nfit_spa->spa; | |
671 | return; | |
672 | } | |
673 | } | |
674 | ||
675 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
676 | nfit_mem->spa_dcr->range_index); | |
677 | nfit_mem->bdw = NULL; | |
678 | } | |
679 | ||
6697b2cf | 680 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
681 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
682 | { | |
683 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 684 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 685 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
686 | struct nfit_idt *nfit_idt; |
687 | u16 idt_idx, range_index; | |
b94d5230 | 688 | |
b94d5230 DW |
689 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
690 | if (nfit_bdw->bdw->region_index != dcr) | |
691 | continue; | |
692 | nfit_mem->bdw = nfit_bdw->bdw; | |
693 | break; | |
694 | } | |
695 | ||
696 | if (!nfit_mem->bdw) | |
6697b2cf | 697 | return; |
b94d5230 DW |
698 | |
699 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
700 | |
701 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 702 | return; |
047fc8a1 RZ |
703 | |
704 | range_index = nfit_mem->spa_bdw->range_index; | |
705 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
706 | if (nfit_memdev->memdev->range_index != range_index || | |
707 | nfit_memdev->memdev->region_index != dcr) | |
708 | continue; | |
709 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
710 | idt_idx = nfit_memdev->memdev->interleave_index; | |
711 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
712 | if (nfit_idt->idt->interleave_index != idt_idx) | |
713 | continue; | |
714 | nfit_mem->idt_bdw = nfit_idt->idt; | |
715 | break; | |
716 | } | |
717 | break; | |
718 | } | |
b94d5230 DW |
719 | } |
720 | ||
721 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, | |
722 | struct acpi_nfit_system_address *spa) | |
723 | { | |
724 | struct nfit_mem *nfit_mem, *found; | |
725 | struct nfit_memdev *nfit_memdev; | |
726 | int type = nfit_spa_type(spa); | |
b94d5230 DW |
727 | |
728 | switch (type) { | |
729 | case NFIT_SPA_DCR: | |
730 | case NFIT_SPA_PM: | |
731 | break; | |
732 | default: | |
733 | return 0; | |
734 | } | |
735 | ||
736 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
ad9ac5e1 | 737 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
738 | struct nfit_dcr *nfit_dcr; |
739 | u32 device_handle; | |
740 | u16 dcr; | |
b94d5230 DW |
741 | |
742 | if (nfit_memdev->memdev->range_index != spa->range_index) | |
743 | continue; | |
744 | found = NULL; | |
745 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 746 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 747 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
748 | if (__to_nfit_memdev(nfit_mem)->device_handle |
749 | == device_handle) { | |
b94d5230 DW |
750 | found = nfit_mem; |
751 | break; | |
752 | } | |
753 | ||
754 | if (found) | |
755 | nfit_mem = found; | |
756 | else { | |
757 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
758 | sizeof(*nfit_mem), GFP_KERNEL); | |
759 | if (!nfit_mem) | |
760 | return -ENOMEM; | |
761 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 762 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
763 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
764 | } | |
765 | ||
766 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
767 | if (nfit_dcr->dcr->region_index != dcr) | |
768 | continue; | |
769 | /* | |
770 | * Record the control region for the dimm. For | |
771 | * the ACPI 6.1 case, where there are separate | |
772 | * control regions for the pmem vs blk | |
773 | * interfaces, be sure to record the extended | |
774 | * blk details. | |
775 | */ | |
776 | if (!nfit_mem->dcr) | |
777 | nfit_mem->dcr = nfit_dcr->dcr; | |
778 | else if (nfit_mem->dcr->windows == 0 | |
779 | && nfit_dcr->dcr->windows) | |
780 | nfit_mem->dcr = nfit_dcr->dcr; | |
781 | break; | |
782 | } | |
783 | ||
ad9ac5e1 | 784 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
785 | struct acpi_nfit_flush_address *flush; |
786 | u16 i; | |
787 | ||
ad9ac5e1 DW |
788 | if (nfit_flush->flush->device_handle != device_handle) |
789 | continue; | |
790 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 DW |
791 | flush = nfit_flush->flush; |
792 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, | |
793 | flush->hint_count | |
794 | * sizeof(struct resource), GFP_KERNEL); | |
795 | if (!nfit_mem->flush_wpq) | |
796 | return -ENOMEM; | |
797 | for (i = 0; i < flush->hint_count; i++) { | |
798 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
799 | ||
800 | res->start = flush->hint_address[i]; | |
801 | res->end = res->start + 8 - 1; | |
802 | } | |
ad9ac5e1 DW |
803 | break; |
804 | } | |
805 | ||
6697b2cf DW |
806 | if (dcr && !nfit_mem->dcr) { |
807 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
808 | spa->range_index, dcr); | |
809 | return -ENODEV; | |
b94d5230 DW |
810 | } |
811 | ||
812 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
813 | struct nfit_idt *nfit_idt; |
814 | u16 idt_idx; | |
815 | ||
b94d5230 DW |
816 | /* multiple dimms may share a SPA when interleaved */ |
817 | nfit_mem->spa_dcr = spa; | |
818 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
819 | idt_idx = nfit_memdev->memdev->interleave_index; |
820 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
821 | if (nfit_idt->idt->interleave_index != idt_idx) | |
822 | continue; | |
823 | nfit_mem->idt_dcr = nfit_idt->idt; | |
824 | break; | |
825 | } | |
6697b2cf | 826 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
b94d5230 DW |
827 | } else { |
828 | /* | |
829 | * A single dimm may belong to multiple SPA-PM | |
830 | * ranges, record at least one in addition to | |
831 | * any SPA-DCR range. | |
832 | */ | |
833 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
834 | } | |
b94d5230 DW |
835 | } |
836 | ||
837 | return 0; | |
838 | } | |
839 | ||
840 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
841 | { | |
842 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
843 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
844 | u32 handleA, handleB; | |
845 | ||
846 | handleA = __to_nfit_memdev(a)->device_handle; | |
847 | handleB = __to_nfit_memdev(b)->device_handle; | |
848 | if (handleA < handleB) | |
849 | return -1; | |
850 | else if (handleA > handleB) | |
851 | return 1; | |
852 | return 0; | |
853 | } | |
854 | ||
855 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
856 | { | |
857 | struct nfit_spa *nfit_spa; | |
858 | ||
859 | /* | |
860 | * For each SPA-DCR or SPA-PMEM address range find its | |
861 | * corresponding MEMDEV(s). From each MEMDEV find the | |
862 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
863 | * try to find a SPA-BDW and a corresponding BDW that references | |
864 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
865 | * BDWs are optional. | |
866 | */ | |
867 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
868 | int rc; | |
869 | ||
870 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); | |
871 | if (rc) | |
872 | return rc; | |
873 | } | |
874 | ||
875 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); | |
876 | ||
877 | return 0; | |
878 | } | |
879 | ||
45def22c DW |
880 | static ssize_t revision_show(struct device *dev, |
881 | struct device_attribute *attr, char *buf) | |
882 | { | |
883 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
884 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
885 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
886 | ||
6b577c9d | 887 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
888 | } |
889 | static DEVICE_ATTR_RO(revision); | |
890 | ||
9ffd6350 VV |
891 | static ssize_t hw_error_scrub_show(struct device *dev, |
892 | struct device_attribute *attr, char *buf) | |
893 | { | |
894 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
895 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
896 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
897 | ||
898 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
899 | } | |
900 | ||
901 | /* | |
902 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
903 | * '0': Switch to the default mode where an exception will only insert | |
904 | * the address of the memory error into the poison and badblocks lists. | |
905 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
906 | * received. | |
907 | */ | |
908 | static ssize_t hw_error_scrub_store(struct device *dev, | |
909 | struct device_attribute *attr, const char *buf, size_t size) | |
910 | { | |
911 | struct nvdimm_bus_descriptor *nd_desc; | |
912 | ssize_t rc; | |
913 | long val; | |
914 | ||
915 | rc = kstrtol(buf, 0, &val); | |
916 | if (rc) | |
917 | return rc; | |
918 | ||
919 | device_lock(dev); | |
920 | nd_desc = dev_get_drvdata(dev); | |
921 | if (nd_desc) { | |
922 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
923 | ||
924 | switch (val) { | |
925 | case HW_ERROR_SCRUB_ON: | |
926 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
927 | break; | |
928 | case HW_ERROR_SCRUB_OFF: | |
929 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
930 | break; | |
931 | default: | |
932 | rc = -EINVAL; | |
933 | break; | |
934 | } | |
935 | } | |
936 | device_unlock(dev); | |
937 | if (rc) | |
938 | return rc; | |
939 | return size; | |
940 | } | |
941 | static DEVICE_ATTR_RW(hw_error_scrub); | |
942 | ||
37b137ff VV |
943 | /* |
944 | * This shows the number of full Address Range Scrubs that have been | |
945 | * completed since driver load time. Userspace can wait on this using | |
946 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
947 | */ | |
948 | static ssize_t scrub_show(struct device *dev, | |
949 | struct device_attribute *attr, char *buf) | |
950 | { | |
951 | struct nvdimm_bus_descriptor *nd_desc; | |
952 | ssize_t rc = -ENXIO; | |
953 | ||
954 | device_lock(dev); | |
955 | nd_desc = dev_get_drvdata(dev); | |
956 | if (nd_desc) { | |
957 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
958 | ||
959 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, | |
960 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); | |
961 | } | |
962 | device_unlock(dev); | |
963 | return rc; | |
964 | } | |
965 | ||
37b137ff VV |
966 | static ssize_t scrub_store(struct device *dev, |
967 | struct device_attribute *attr, const char *buf, size_t size) | |
968 | { | |
969 | struct nvdimm_bus_descriptor *nd_desc; | |
970 | ssize_t rc; | |
971 | long val; | |
972 | ||
973 | rc = kstrtol(buf, 0, &val); | |
974 | if (rc) | |
975 | return rc; | |
976 | if (val != 1) | |
977 | return -EINVAL; | |
978 | ||
979 | device_lock(dev); | |
980 | nd_desc = dev_get_drvdata(dev); | |
981 | if (nd_desc) { | |
982 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
983 | ||
984 | rc = acpi_nfit_ars_rescan(acpi_desc); | |
985 | } | |
986 | device_unlock(dev); | |
987 | if (rc) | |
988 | return rc; | |
989 | return size; | |
990 | } | |
991 | static DEVICE_ATTR_RW(scrub); | |
992 | ||
993 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
994 | { | |
995 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
996 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
997 | | 1 << ND_CMD_ARS_STATUS; | |
998 | ||
999 | return (nd_desc->cmd_mask & mask) == mask; | |
1000 | } | |
1001 | ||
1002 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1003 | { | |
1004 | struct device *dev = container_of(kobj, struct device, kobj); | |
1005 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1006 | ||
1007 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) | |
1008 | return 0; | |
1009 | return a->mode; | |
1010 | } | |
1011 | ||
45def22c DW |
1012 | static struct attribute *acpi_nfit_attributes[] = { |
1013 | &dev_attr_revision.attr, | |
37b137ff | 1014 | &dev_attr_scrub.attr, |
9ffd6350 | 1015 | &dev_attr_hw_error_scrub.attr, |
45def22c DW |
1016 | NULL, |
1017 | }; | |
1018 | ||
1019 | static struct attribute_group acpi_nfit_attribute_group = { | |
1020 | .name = "nfit", | |
1021 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1022 | .is_visible = nfit_visible, |
45def22c DW |
1023 | }; |
1024 | ||
a61fe6f7 | 1025 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1026 | &nvdimm_bus_attribute_group, |
1027 | &acpi_nfit_attribute_group, | |
1028 | NULL, | |
1029 | }; | |
1030 | ||
e6dfb2de DW |
1031 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1032 | { | |
1033 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1034 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1035 | ||
1036 | return __to_nfit_memdev(nfit_mem); | |
1037 | } | |
1038 | ||
1039 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1040 | { | |
1041 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1042 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1043 | ||
1044 | return nfit_mem->dcr; | |
1045 | } | |
1046 | ||
1047 | static ssize_t handle_show(struct device *dev, | |
1048 | struct device_attribute *attr, char *buf) | |
1049 | { | |
1050 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1051 | ||
1052 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1053 | } | |
1054 | static DEVICE_ATTR_RO(handle); | |
1055 | ||
1056 | static ssize_t phys_id_show(struct device *dev, | |
1057 | struct device_attribute *attr, char *buf) | |
1058 | { | |
1059 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1060 | ||
1061 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1062 | } | |
1063 | static DEVICE_ATTR_RO(phys_id); | |
1064 | ||
1065 | static ssize_t vendor_show(struct device *dev, | |
1066 | struct device_attribute *attr, char *buf) | |
1067 | { | |
1068 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1069 | ||
5ad9a7fd | 1070 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1071 | } |
1072 | static DEVICE_ATTR_RO(vendor); | |
1073 | ||
1074 | static ssize_t rev_id_show(struct device *dev, | |
1075 | struct device_attribute *attr, char *buf) | |
1076 | { | |
1077 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1078 | ||
5ad9a7fd | 1079 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1080 | } |
1081 | static DEVICE_ATTR_RO(rev_id); | |
1082 | ||
1083 | static ssize_t device_show(struct device *dev, | |
1084 | struct device_attribute *attr, char *buf) | |
1085 | { | |
1086 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1087 | ||
5ad9a7fd | 1088 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1089 | } |
1090 | static DEVICE_ATTR_RO(device); | |
1091 | ||
6ca72085 DW |
1092 | static ssize_t subsystem_vendor_show(struct device *dev, |
1093 | struct device_attribute *attr, char *buf) | |
1094 | { | |
1095 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1096 | ||
1097 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1098 | } | |
1099 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1100 | ||
1101 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1102 | struct device_attribute *attr, char *buf) | |
1103 | { | |
1104 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1105 | ||
1106 | return sprintf(buf, "0x%04x\n", | |
1107 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1108 | } | |
1109 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1110 | ||
1111 | static ssize_t subsystem_device_show(struct device *dev, | |
1112 | struct device_attribute *attr, char *buf) | |
1113 | { | |
1114 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1115 | ||
1116 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1117 | } | |
1118 | static DEVICE_ATTR_RO(subsystem_device); | |
1119 | ||
8cc6ddfc DW |
1120 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1121 | { | |
1122 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1123 | int formats = 0; | |
1124 | ||
1125 | if (nfit_mem->memdev_pmem) | |
1126 | formats++; | |
1127 | if (nfit_mem->memdev_bdw) | |
1128 | formats++; | |
1129 | return formats; | |
1130 | } | |
1131 | ||
e6dfb2de DW |
1132 | static ssize_t format_show(struct device *dev, |
1133 | struct device_attribute *attr, char *buf) | |
1134 | { | |
1135 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1136 | ||
1bcbf42d | 1137 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1138 | } |
1139 | static DEVICE_ATTR_RO(format); | |
1140 | ||
8cc6ddfc DW |
1141 | static ssize_t format1_show(struct device *dev, |
1142 | struct device_attribute *attr, char *buf) | |
1143 | { | |
1144 | u32 handle; | |
1145 | ssize_t rc = -ENXIO; | |
1146 | struct nfit_mem *nfit_mem; | |
1147 | struct nfit_memdev *nfit_memdev; | |
1148 | struct acpi_nfit_desc *acpi_desc; | |
1149 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1150 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1151 | ||
1152 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1153 | acpi_desc = nfit_mem->acpi_desc; | |
1154 | handle = to_nfit_memdev(dev)->device_handle; | |
1155 | ||
1156 | /* assumes DIMMs have at most 2 published interface codes */ | |
1157 | mutex_lock(&acpi_desc->init_mutex); | |
1158 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1159 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1160 | struct nfit_dcr *nfit_dcr; | |
1161 | ||
1162 | if (memdev->device_handle != handle) | |
1163 | continue; | |
1164 | ||
1165 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1166 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1167 | continue; | |
1168 | if (nfit_dcr->dcr->code == dcr->code) | |
1169 | continue; | |
1bcbf42d DW |
1170 | rc = sprintf(buf, "0x%04x\n", |
1171 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1172 | break; |
1173 | } | |
1174 | if (rc != ENXIO) | |
1175 | break; | |
1176 | } | |
1177 | mutex_unlock(&acpi_desc->init_mutex); | |
1178 | return rc; | |
1179 | } | |
1180 | static DEVICE_ATTR_RO(format1); | |
1181 | ||
1182 | static ssize_t formats_show(struct device *dev, | |
1183 | struct device_attribute *attr, char *buf) | |
1184 | { | |
1185 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1186 | ||
1187 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1188 | } | |
1189 | static DEVICE_ATTR_RO(formats); | |
1190 | ||
e6dfb2de DW |
1191 | static ssize_t serial_show(struct device *dev, |
1192 | struct device_attribute *attr, char *buf) | |
1193 | { | |
1194 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1195 | ||
5ad9a7fd | 1196 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1197 | } |
1198 | static DEVICE_ATTR_RO(serial); | |
1199 | ||
a94e3fbe DW |
1200 | static ssize_t family_show(struct device *dev, |
1201 | struct device_attribute *attr, char *buf) | |
1202 | { | |
1203 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1204 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1205 | ||
1206 | if (nfit_mem->family < 0) | |
1207 | return -ENXIO; | |
1208 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1209 | } | |
1210 | static DEVICE_ATTR_RO(family); | |
1211 | ||
1212 | static ssize_t dsm_mask_show(struct device *dev, | |
1213 | struct device_attribute *attr, char *buf) | |
1214 | { | |
1215 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1216 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1217 | ||
1218 | if (nfit_mem->family < 0) | |
1219 | return -ENXIO; | |
1220 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1221 | } | |
1222 | static DEVICE_ATTR_RO(dsm_mask); | |
1223 | ||
58138820 DW |
1224 | static ssize_t flags_show(struct device *dev, |
1225 | struct device_attribute *attr, char *buf) | |
1226 | { | |
1227 | u16 flags = to_nfit_memdev(dev)->flags; | |
1228 | ||
1229 | return sprintf(buf, "%s%s%s%s%s\n", | |
402bae59 TK |
1230 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1231 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1232 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1233 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
402bae59 | 1234 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
58138820 DW |
1235 | } |
1236 | static DEVICE_ATTR_RO(flags); | |
1237 | ||
38a879ba TK |
1238 | static ssize_t id_show(struct device *dev, |
1239 | struct device_attribute *attr, char *buf) | |
1240 | { | |
1241 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1242 | ||
1243 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1244 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", | |
1245 | be16_to_cpu(dcr->vendor_id), | |
1246 | dcr->manufacturing_location, | |
1247 | be16_to_cpu(dcr->manufacturing_date), | |
1248 | be32_to_cpu(dcr->serial_number)); | |
1249 | else | |
1250 | return sprintf(buf, "%04x-%08x\n", | |
1251 | be16_to_cpu(dcr->vendor_id), | |
1252 | be32_to_cpu(dcr->serial_number)); | |
1253 | } | |
1254 | static DEVICE_ATTR_RO(id); | |
1255 | ||
e6dfb2de DW |
1256 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1257 | &dev_attr_handle.attr, | |
1258 | &dev_attr_phys_id.attr, | |
1259 | &dev_attr_vendor.attr, | |
1260 | &dev_attr_device.attr, | |
6ca72085 DW |
1261 | &dev_attr_rev_id.attr, |
1262 | &dev_attr_subsystem_vendor.attr, | |
1263 | &dev_attr_subsystem_device.attr, | |
1264 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1265 | &dev_attr_format.attr, |
8cc6ddfc DW |
1266 | &dev_attr_formats.attr, |
1267 | &dev_attr_format1.attr, | |
e6dfb2de | 1268 | &dev_attr_serial.attr, |
58138820 | 1269 | &dev_attr_flags.attr, |
38a879ba | 1270 | &dev_attr_id.attr, |
a94e3fbe DW |
1271 | &dev_attr_family.attr, |
1272 | &dev_attr_dsm_mask.attr, | |
e6dfb2de DW |
1273 | NULL, |
1274 | }; | |
1275 | ||
1276 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1277 | struct attribute *a, int n) | |
1278 | { | |
1279 | struct device *dev = container_of(kobj, struct device, kobj); | |
8cc6ddfc | 1280 | struct nvdimm *nvdimm = to_nvdimm(dev); |
e6dfb2de | 1281 | |
8cc6ddfc DW |
1282 | if (!to_nfit_dcr(dev)) |
1283 | return 0; | |
1284 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) | |
e6dfb2de | 1285 | return 0; |
8cc6ddfc | 1286 | return a->mode; |
e6dfb2de DW |
1287 | } |
1288 | ||
1289 | static struct attribute_group acpi_nfit_dimm_attribute_group = { | |
1290 | .name = "nfit", | |
1291 | .attrs = acpi_nfit_dimm_attributes, | |
1292 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1293 | }; | |
1294 | ||
1295 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 1296 | &nvdimm_attribute_group, |
4d88a97a | 1297 | &nd_device_attribute_group, |
e6dfb2de DW |
1298 | &acpi_nfit_dimm_attribute_group, |
1299 | NULL, | |
1300 | }; | |
1301 | ||
1302 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1303 | u32 device_handle) | |
1304 | { | |
1305 | struct nfit_mem *nfit_mem; | |
1306 | ||
1307 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1308 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1309 | return nfit_mem->nvdimm; | |
1310 | ||
1311 | return NULL; | |
1312 | } | |
1313 | ||
231bf117 | 1314 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1315 | { |
1316 | struct nfit_mem *nfit_mem; | |
1317 | struct acpi_nfit_desc *acpi_desc; | |
1318 | ||
1319 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, | |
1320 | event); | |
1321 | ||
1322 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1323 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1324 | event); | |
1325 | return; | |
1326 | } | |
1327 | ||
1328 | acpi_desc = dev_get_drvdata(dev->parent); | |
1329 | if (!acpi_desc) | |
1330 | return; | |
1331 | ||
1332 | /* | |
1333 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1334 | * is still valid. | |
1335 | */ | |
1336 | nfit_mem = dev_get_drvdata(dev); | |
1337 | if (nfit_mem && nfit_mem->flags_attr) | |
1338 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1339 | } | |
231bf117 | 1340 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1341 | |
1342 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1343 | { | |
1344 | struct acpi_device *adev = data; | |
1345 | struct device *dev = &adev->dev; | |
1346 | ||
1347 | device_lock(dev->parent); | |
1348 | __acpi_nvdimm_notify(dev, event); | |
1349 | device_unlock(dev->parent); | |
1350 | } | |
1351 | ||
62232e45 DW |
1352 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1353 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1354 | { | |
1355 | struct acpi_device *adev, *adev_dimm; | |
1356 | struct device *dev = acpi_desc->dev; | |
31eca76b DW |
1357 | unsigned long dsm_mask; |
1358 | const u8 *uuid; | |
60e95f43 | 1359 | int i; |
62232e45 | 1360 | |
e3654eca DW |
1361 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1362 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1363 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
62232e45 DW |
1364 | adev = to_acpi_dev(acpi_desc); |
1365 | if (!adev) | |
1366 | return 0; | |
1367 | ||
1368 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1369 | nfit_mem->adev = adev_dimm; | |
1370 | if (!adev_dimm) { | |
1371 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1372 | device_handle); | |
4d88a97a | 1373 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1374 | } |
1375 | ||
ba9c8dd3 DW |
1376 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1377 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1378 | dev_err(dev, "%s: notification registration failed\n", | |
1379 | dev_name(&adev_dimm->dev)); | |
1380 | return -ENXIO; | |
1381 | } | |
1382 | ||
31eca76b | 1383 | /* |
e02fb726 | 1384 | * Until standardization materializes we need to consider 4 |
a7225598 DW |
1385 | * different command sets. Note, that checking for function0 (bit0) |
1386 | * tells us if any commands are reachable through this uuid. | |
31eca76b | 1387 | */ |
e02fb726 | 1388 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
a7225598 | 1389 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
31eca76b DW |
1390 | break; |
1391 | ||
1392 | /* limit the supported commands to those that are publicly documented */ | |
1393 | nfit_mem->family = i; | |
87554098 | 1394 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
31eca76b | 1395 | dsm_mask = 0x3fe; |
87554098 DW |
1396 | if (disable_vendor_specific) |
1397 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1398 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1399 | dsm_mask = 0x1c3c76; |
e02fb726 | 1400 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1401 | dsm_mask = 0x1fe; |
87554098 DW |
1402 | if (disable_vendor_specific) |
1403 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1404 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1405 | dsm_mask = 0xffffffff; | |
87554098 | 1406 | } else { |
a7225598 | 1407 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1408 | nfit_mem->family = -1; |
a7225598 DW |
1409 | /* DSMs are optional, continue loading the driver... */ |
1410 | return 0; | |
31eca76b DW |
1411 | } |
1412 | ||
1413 | uuid = to_nfit_uuid(nfit_mem->family); | |
1414 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
62232e45 DW |
1415 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) |
1416 | set_bit(i, &nfit_mem->dsm_mask); | |
1417 | ||
60e95f43 | 1418 | return 0; |
62232e45 DW |
1419 | } |
1420 | ||
ba9c8dd3 DW |
1421 | static void shutdown_dimm_notify(void *data) |
1422 | { | |
1423 | struct acpi_nfit_desc *acpi_desc = data; | |
1424 | struct nfit_mem *nfit_mem; | |
1425 | ||
1426 | mutex_lock(&acpi_desc->init_mutex); | |
1427 | /* | |
1428 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1429 | * notifications. | |
1430 | */ | |
1431 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1432 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1433 | ||
ba9c8dd3 DW |
1434 | if (nfit_mem->flags_attr) { |
1435 | sysfs_put(nfit_mem->flags_attr); | |
1436 | nfit_mem->flags_attr = NULL; | |
1437 | } | |
231bf117 DW |
1438 | if (adev_dimm) |
1439 | acpi_remove_notify_handler(adev_dimm->handle, | |
1440 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
ba9c8dd3 DW |
1441 | } |
1442 | mutex_unlock(&acpi_desc->init_mutex); | |
1443 | } | |
1444 | ||
e6dfb2de DW |
1445 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
1446 | { | |
1447 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
1448 | int dimm_count = 0, rc; |
1449 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
1450 | |
1451 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 1452 | struct acpi_nfit_flush_address *flush; |
31eca76b | 1453 | unsigned long flags = 0, cmd_mask; |
e6dfb2de | 1454 | u32 device_handle; |
58138820 | 1455 | u16 mem_flags; |
e6dfb2de DW |
1456 | |
1457 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
1458 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
1459 | if (nvdimm) { | |
20985164 | 1460 | dimm_count++; |
e6dfb2de DW |
1461 | continue; |
1462 | } | |
1463 | ||
1464 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
1465 | flags |= NDD_ALIASING; | |
1466 | ||
58138820 | 1467 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 1468 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
58138820 DW |
1469 | flags |= NDD_UNARMED; |
1470 | ||
62232e45 DW |
1471 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
1472 | if (rc) | |
1473 | continue; | |
1474 | ||
e3654eca | 1475 | /* |
31eca76b DW |
1476 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
1477 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
1478 | * userspace interface. | |
e3654eca | 1479 | */ |
31eca76b DW |
1480 | cmd_mask = 1UL << ND_CMD_CALL; |
1481 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
1482 | cmd_mask |= nfit_mem->dsm_mask; | |
1483 | ||
e5ae3b25 DW |
1484 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
1485 | : NULL; | |
e6dfb2de | 1486 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 1487 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 DW |
1488 | flags, cmd_mask, flush ? flush->hint_count : 0, |
1489 | nfit_mem->flush_wpq); | |
e6dfb2de DW |
1490 | if (!nvdimm) |
1491 | return -ENOMEM; | |
1492 | ||
1493 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 1494 | dimm_count++; |
58138820 DW |
1495 | |
1496 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
1497 | continue; | |
1498 | ||
402bae59 | 1499 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
58138820 | 1500 | nvdimm_name(nvdimm), |
402bae59 TK |
1501 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
1502 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
1503 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
ca321d1c | 1504 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
58138820 | 1505 | |
e6dfb2de DW |
1506 | } |
1507 | ||
ba9c8dd3 DW |
1508 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
1509 | if (rc) | |
1510 | return rc; | |
1511 | ||
1512 | /* | |
1513 | * Now that dimms are successfully registered, and async registration | |
1514 | * is flushed, attempt to enable event notification. | |
1515 | */ | |
1516 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
1517 | struct kernfs_node *nfit_kernfs; | |
1518 | ||
1519 | nvdimm = nfit_mem->nvdimm; | |
1520 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); | |
1521 | if (nfit_kernfs) | |
1522 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
1523 | "flags"); | |
1524 | sysfs_put(nfit_kernfs); | |
1525 | if (!nfit_mem->flags_attr) | |
1526 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
1527 | nvdimm_name(nvdimm)); | |
1528 | } | |
1529 | ||
1530 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
1531 | acpi_desc); | |
e6dfb2de DW |
1532 | } |
1533 | ||
62232e45 DW |
1534 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
1535 | { | |
1536 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1537 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); | |
1538 | struct acpi_device *adev; | |
1539 | int i; | |
1540 | ||
e3654eca | 1541 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
62232e45 DW |
1542 | adev = to_acpi_dev(acpi_desc); |
1543 | if (!adev) | |
1544 | return; | |
1545 | ||
d4f32367 | 1546 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
62232e45 | 1547 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
e3654eca | 1548 | set_bit(i, &nd_desc->cmd_mask); |
62232e45 DW |
1549 | } |
1550 | ||
1f7df6f8 DW |
1551 | static ssize_t range_index_show(struct device *dev, |
1552 | struct device_attribute *attr, char *buf) | |
1553 | { | |
1554 | struct nd_region *nd_region = to_nd_region(dev); | |
1555 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1556 | ||
1557 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
1558 | } | |
1559 | static DEVICE_ATTR_RO(range_index); | |
1560 | ||
1561 | static struct attribute *acpi_nfit_region_attributes[] = { | |
1562 | &dev_attr_range_index.attr, | |
1563 | NULL, | |
1564 | }; | |
1565 | ||
1566 | static struct attribute_group acpi_nfit_region_attribute_group = { | |
1567 | .name = "nfit", | |
1568 | .attrs = acpi_nfit_region_attributes, | |
1569 | }; | |
1570 | ||
1571 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1572 | &nd_region_attribute_group, | |
1573 | &nd_mapping_attribute_group, | |
3d88002e | 1574 | &nd_device_attribute_group, |
74ae66c3 | 1575 | &nd_numa_attribute_group, |
1f7df6f8 DW |
1576 | &acpi_nfit_region_attribute_group, |
1577 | NULL, | |
1578 | }; | |
1579 | ||
eaf96153 DW |
1580 | /* enough info to uniquely specify an interleave set */ |
1581 | struct nfit_set_info { | |
1582 | struct nfit_set_info_map { | |
1583 | u64 region_offset; | |
1584 | u32 serial_number; | |
1585 | u32 pad; | |
1586 | } mapping[0]; | |
1587 | }; | |
1588 | ||
1589 | static size_t sizeof_nfit_set_info(int num_mappings) | |
1590 | { | |
1591 | return sizeof(struct nfit_set_info) | |
1592 | + num_mappings * sizeof(struct nfit_set_info_map); | |
1593 | } | |
1594 | ||
1595 | static int cmp_map(const void *m0, const void *m1) | |
1596 | { | |
1597 | const struct nfit_set_info_map *map0 = m0; | |
1598 | const struct nfit_set_info_map *map1 = m1; | |
1599 | ||
1600 | return memcmp(&map0->region_offset, &map1->region_offset, | |
1601 | sizeof(u64)); | |
1602 | } | |
1603 | ||
1604 | /* Retrieve the nth entry referencing this spa */ | |
1605 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
1606 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
1607 | { | |
1608 | struct nfit_memdev *nfit_memdev; | |
1609 | ||
1610 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
1611 | if (nfit_memdev->memdev->range_index == range_index) | |
1612 | if (n-- == 0) | |
1613 | return nfit_memdev->memdev; | |
1614 | return NULL; | |
1615 | } | |
1616 | ||
1617 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
1618 | struct nd_region_desc *ndr_desc, | |
1619 | struct acpi_nfit_system_address *spa) | |
1620 | { | |
1621 | int i, spa_type = nfit_spa_type(spa); | |
1622 | struct device *dev = acpi_desc->dev; | |
1623 | struct nd_interleave_set *nd_set; | |
1624 | u16 nr = ndr_desc->num_mappings; | |
1625 | struct nfit_set_info *info; | |
1626 | ||
1627 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) | |
1628 | /* pass */; | |
1629 | else | |
1630 | return 0; | |
1631 | ||
1632 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); | |
1633 | if (!nd_set) | |
1634 | return -ENOMEM; | |
1635 | ||
1636 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); | |
1637 | if (!info) | |
1638 | return -ENOMEM; | |
1639 | for (i = 0; i < nr; i++) { | |
44c462eb | 1640 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
eaf96153 | 1641 | struct nfit_set_info_map *map = &info->mapping[i]; |
44c462eb | 1642 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 DW |
1643 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
1644 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
1645 | spa->range_index, i); | |
1646 | ||
1647 | if (!memdev || !nfit_mem->dcr) { | |
1648 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
1649 | return -ENODEV; | |
1650 | } | |
1651 | ||
1652 | map->region_offset = memdev->region_offset; | |
1653 | map->serial_number = nfit_mem->dcr->serial_number; | |
1654 | } | |
1655 | ||
1656 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), | |
1657 | cmp_map, NULL); | |
1658 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
1659 | ndr_desc->nd_set = nd_set; | |
1660 | devm_kfree(dev, info); | |
1661 | ||
1662 | return 0; | |
1663 | } | |
1664 | ||
047fc8a1 RZ |
1665 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
1666 | { | |
1667 | struct acpi_nfit_interleave *idt = mmio->idt; | |
1668 | u32 sub_line_offset, line_index, line_offset; | |
1669 | u64 line_no, table_skip_count, table_offset; | |
1670 | ||
1671 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
1672 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
1673 | line_offset = idt->line_offset[line_index] | |
1674 | * mmio->line_size; | |
1675 | table_offset = table_skip_count * mmio->table_size; | |
1676 | ||
1677 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
1678 | } | |
1679 | ||
de4a196c | 1680 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
1681 | { |
1682 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1683 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
68202c9f | 1684 | const u32 STATUS_MASK = 0x80000037; |
047fc8a1 RZ |
1685 | |
1686 | if (mmio->num_lines) | |
1687 | offset = to_interleave_offset(offset, mmio); | |
1688 | ||
68202c9f | 1689 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
047fc8a1 RZ |
1690 | } |
1691 | ||
1692 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
1693 | resource_size_t dpa, unsigned int len, unsigned int write) | |
1694 | { | |
1695 | u64 cmd, offset; | |
1696 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1697 | ||
1698 | enum { | |
1699 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
1700 | BCW_LEN_SHIFT = 48, | |
1701 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
1702 | BCW_CMD_SHIFT = 56, | |
1703 | }; | |
1704 | ||
1705 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
1706 | len = len >> L1_CACHE_SHIFT; | |
1707 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
1708 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
1709 | ||
1710 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
1711 | if (mmio->num_lines) | |
1712 | offset = to_interleave_offset(offset, mmio); | |
1713 | ||
67a3e8fe | 1714 | writeq(cmd, mmio->addr.base + offset); |
f284a4f2 | 1715 | nvdimm_flush(nfit_blk->nd_region); |
f0f2c072 | 1716 | |
aef25338 | 1717 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 1718 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
1719 | } |
1720 | ||
1721 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
1722 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
1723 | unsigned int lane) | |
1724 | { | |
1725 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1726 | unsigned int copied = 0; | |
1727 | u64 base_offset; | |
1728 | int rc; | |
1729 | ||
1730 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
1731 | + lane * mmio->size; | |
047fc8a1 RZ |
1732 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
1733 | while (len) { | |
1734 | unsigned int c; | |
1735 | u64 offset; | |
1736 | ||
1737 | if (mmio->num_lines) { | |
1738 | u32 line_offset; | |
1739 | ||
1740 | offset = to_interleave_offset(base_offset + copied, | |
1741 | mmio); | |
1742 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
1743 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
1744 | } else { | |
1745 | offset = base_offset + nfit_blk->bdw_offset; | |
1746 | c = len; | |
1747 | } | |
1748 | ||
1749 | if (rw) | |
67a3e8fe | 1750 | memcpy_to_pmem(mmio->addr.aperture + offset, |
c2ad2954 | 1751 | iobuf + copied, c); |
67a3e8fe | 1752 | else { |
aef25338 | 1753 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
67a3e8fe RZ |
1754 | mmio_flush_range((void __force *) |
1755 | mmio->addr.aperture + offset, c); | |
1756 | ||
c2ad2954 | 1757 | memcpy_from_pmem(iobuf + copied, |
67a3e8fe RZ |
1758 | mmio->addr.aperture + offset, c); |
1759 | } | |
047fc8a1 RZ |
1760 | |
1761 | copied += c; | |
1762 | len -= c; | |
1763 | } | |
c2ad2954 RZ |
1764 | |
1765 | if (rw) | |
f284a4f2 | 1766 | nvdimm_flush(nfit_blk->nd_region); |
c2ad2954 | 1767 | |
047fc8a1 RZ |
1768 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
1769 | return rc; | |
1770 | } | |
1771 | ||
1772 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
1773 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
1774 | { | |
1775 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
1776 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1777 | struct nd_region *nd_region = nfit_blk->nd_region; | |
1778 | unsigned int lane, copied = 0; | |
1779 | int rc = 0; | |
1780 | ||
1781 | lane = nd_region_acquire_lane(nd_region); | |
1782 | while (len) { | |
1783 | u64 c = min(len, mmio->size); | |
1784 | ||
1785 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
1786 | iobuf + copied, c, rw, lane); | |
1787 | if (rc) | |
1788 | break; | |
1789 | ||
1790 | copied += c; | |
1791 | len -= c; | |
1792 | } | |
1793 | nd_region_release_lane(nd_region, lane); | |
1794 | ||
1795 | return rc; | |
1796 | } | |
1797 | ||
047fc8a1 RZ |
1798 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
1799 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
1800 | { | |
1801 | if (idt) { | |
1802 | mmio->num_lines = idt->line_count; | |
1803 | mmio->line_size = idt->line_size; | |
1804 | if (interleave_ways == 0) | |
1805 | return -ENXIO; | |
1806 | mmio->table_size = mmio->num_lines * interleave_ways | |
1807 | * mmio->line_size; | |
1808 | } | |
1809 | ||
1810 | return 0; | |
1811 | } | |
1812 | ||
f0f2c072 RZ |
1813 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
1814 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
1815 | { | |
1816 | struct nd_cmd_dimm_flags flags; | |
1817 | int rc; | |
1818 | ||
1819 | memset(&flags, 0, sizeof(flags)); | |
1820 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 1821 | sizeof(flags), NULL); |
f0f2c072 RZ |
1822 | |
1823 | if (rc >= 0 && flags.status == 0) | |
1824 | nfit_blk->dimm_flags = flags.flags; | |
1825 | else if (rc == -ENOTTY) { | |
1826 | /* fall back to a conservative default */ | |
aef25338 | 1827 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
1828 | rc = 0; |
1829 | } else | |
1830 | rc = -ENXIO; | |
1831 | ||
1832 | return rc; | |
1833 | } | |
1834 | ||
047fc8a1 RZ |
1835 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
1836 | struct device *dev) | |
1837 | { | |
1838 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
047fc8a1 RZ |
1839 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
1840 | struct nfit_blk_mmio *mmio; | |
1841 | struct nfit_blk *nfit_blk; | |
1842 | struct nfit_mem *nfit_mem; | |
1843 | struct nvdimm *nvdimm; | |
1844 | int rc; | |
1845 | ||
1846 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
1847 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1848 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
1849 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, | |
1850 | nfit_mem ? "" : " nfit_mem", | |
193ccca4 DW |
1851 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
1852 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
1853 | return -ENXIO; |
1854 | } | |
1855 | ||
1856 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
1857 | if (!nfit_blk) | |
1858 | return -ENOMEM; | |
1859 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
1860 | nfit_blk->nd_region = to_nd_region(dev); | |
1861 | ||
1862 | /* map block aperture memory */ | |
1863 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
1864 | mmio = &nfit_blk->mmio[BDW]; | |
29b9aa0a DW |
1865 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
1866 | nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM); | |
67a3e8fe | 1867 | if (!mmio->addr.base) { |
047fc8a1 RZ |
1868 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
1869 | nvdimm_name(nvdimm)); | |
1870 | return -ENOMEM; | |
1871 | } | |
1872 | mmio->size = nfit_mem->bdw->size; | |
1873 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
1874 | mmio->idt = nfit_mem->idt_bdw; | |
1875 | mmio->spa = nfit_mem->spa_bdw; | |
1876 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
1877 | nfit_mem->memdev_bdw->interleave_ways); | |
1878 | if (rc) { | |
1879 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", | |
1880 | __func__, nvdimm_name(nvdimm)); | |
1881 | return rc; | |
1882 | } | |
1883 | ||
1884 | /* map block control memory */ | |
1885 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
1886 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
1887 | mmio = &nfit_blk->mmio[DCR]; | |
29b9aa0a DW |
1888 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
1889 | nfit_mem->spa_dcr->length); | |
67a3e8fe | 1890 | if (!mmio->addr.base) { |
047fc8a1 RZ |
1891 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
1892 | nvdimm_name(nvdimm)); | |
1893 | return -ENOMEM; | |
1894 | } | |
1895 | mmio->size = nfit_mem->dcr->window_size; | |
1896 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
1897 | mmio->idt = nfit_mem->idt_dcr; | |
1898 | mmio->spa = nfit_mem->spa_dcr; | |
1899 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
1900 | nfit_mem->memdev_dcr->interleave_ways); | |
1901 | if (rc) { | |
1902 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", | |
1903 | __func__, nvdimm_name(nvdimm)); | |
1904 | return rc; | |
1905 | } | |
1906 | ||
f0f2c072 RZ |
1907 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
1908 | if (rc < 0) { | |
1909 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", | |
1910 | __func__, nvdimm_name(nvdimm)); | |
1911 | return rc; | |
1912 | } | |
1913 | ||
f284a4f2 | 1914 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
c2ad2954 RZ |
1915 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
1916 | ||
047fc8a1 RZ |
1917 | if (mmio->line_size == 0) |
1918 | return 0; | |
1919 | ||
1920 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
1921 | + 8 > mmio->line_size) { | |
1922 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
1923 | return -ENXIO; | |
1924 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
1925 | + 8 > mmio->line_size) { | |
1926 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
1927 | return -ENXIO; | |
1928 | } | |
1929 | ||
1930 | return 0; | |
1931 | } | |
1932 | ||
aef25338 | 1933 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 1934 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 1935 | { |
aef25338 | 1936 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 1937 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
1938 | int cmd_rc, rc; |
1939 | ||
1cf03c00 DW |
1940 | cmd->address = spa->address; |
1941 | cmd->length = spa->length; | |
aef25338 DW |
1942 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
1943 | sizeof(*cmd), &cmd_rc); | |
1944 | if (rc < 0) | |
1945 | return rc; | |
1cf03c00 | 1946 | return cmd_rc; |
0caeef63 VV |
1947 | } |
1948 | ||
1cf03c00 | 1949 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
0caeef63 VV |
1950 | { |
1951 | int rc; | |
1cf03c00 DW |
1952 | int cmd_rc; |
1953 | struct nd_cmd_ars_start ars_start; | |
1954 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
1955 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 1956 | |
1cf03c00 DW |
1957 | memset(&ars_start, 0, sizeof(ars_start)); |
1958 | ars_start.address = spa->address; | |
1959 | ars_start.length = spa->length; | |
1960 | if (nfit_spa_type(spa) == NFIT_SPA_PM) | |
1961 | ars_start.type = ND_ARS_PERSISTENT; | |
1962 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
1963 | ars_start.type = ND_ARS_VOLATILE; | |
1964 | else | |
1965 | return -ENOTTY; | |
aef25338 | 1966 | |
1cf03c00 DW |
1967 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
1968 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 1969 | |
1cf03c00 DW |
1970 | if (rc < 0) |
1971 | return rc; | |
1972 | return cmd_rc; | |
0caeef63 VV |
1973 | } |
1974 | ||
1cf03c00 | 1975 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 1976 | { |
aef25338 | 1977 | int rc, cmd_rc; |
1cf03c00 DW |
1978 | struct nd_cmd_ars_start ars_start; |
1979 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1980 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
1981 | ||
1982 | memset(&ars_start, 0, sizeof(ars_start)); | |
1983 | ars_start.address = ars_status->restart_address; | |
1984 | ars_start.length = ars_status->restart_length; | |
1985 | ars_start.type = ars_status->type; | |
1986 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, | |
1987 | sizeof(ars_start), &cmd_rc); | |
1988 | if (rc < 0) | |
1989 | return rc; | |
1990 | return cmd_rc; | |
1991 | } | |
0caeef63 | 1992 | |
1cf03c00 DW |
1993 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
1994 | { | |
1995 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1996 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
1997 | int rc, cmd_rc; | |
aef25338 | 1998 | |
1cf03c00 DW |
1999 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
2000 | acpi_desc->ars_status_size, &cmd_rc); | |
2001 | if (rc < 0) | |
2002 | return rc; | |
2003 | return cmd_rc; | |
0caeef63 VV |
2004 | } |
2005 | ||
82aa37cf | 2006 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2007 | struct nd_cmd_ars_status *ars_status) |
0caeef63 | 2008 | { |
82aa37cf | 2009 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
0caeef63 VV |
2010 | int rc; |
2011 | u32 i; | |
2012 | ||
82aa37cf DW |
2013 | /* |
2014 | * First record starts at 44 byte offset from the start of the | |
2015 | * payload. | |
2016 | */ | |
2017 | if (ars_status->out_length < 44) | |
2018 | return 0; | |
0caeef63 | 2019 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2020 | /* only process full records */ |
2021 | if (ars_status->out_length | |
2022 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2023 | break; | |
0caeef63 VV |
2024 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
2025 | ars_status->records[i].err_address, | |
2026 | ars_status->records[i].length); | |
2027 | if (rc) | |
2028 | return rc; | |
2029 | } | |
82aa37cf DW |
2030 | if (i < ars_status->num_records) |
2031 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2032 | |
2033 | return 0; | |
2034 | } | |
2035 | ||
af1996ef TK |
2036 | static void acpi_nfit_remove_resource(void *data) |
2037 | { | |
2038 | struct resource *res = data; | |
2039 | ||
2040 | remove_resource(res); | |
2041 | } | |
2042 | ||
2043 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2044 | struct nd_region_desc *ndr_desc) | |
2045 | { | |
2046 | struct resource *res, *nd_res = ndr_desc->res; | |
2047 | int is_pmem, ret; | |
2048 | ||
2049 | /* No operation if the region is already registered as PMEM */ | |
2050 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2051 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2052 | if (is_pmem == REGION_INTERSECTS) | |
2053 | return 0; | |
2054 | ||
2055 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2056 | if (!res) | |
2057 | return -ENOMEM; | |
2058 | ||
2059 | res->name = "Persistent Memory"; | |
2060 | res->start = nd_res->start; | |
2061 | res->end = nd_res->end; | |
2062 | res->flags = IORESOURCE_MEM; | |
2063 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2064 | ||
2065 | ret = insert_resource(&iomem_resource, res); | |
2066 | if (ret) | |
2067 | return ret; | |
2068 | ||
d932dd2c SV |
2069 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2070 | acpi_nfit_remove_resource, | |
2071 | res); | |
2072 | if (ret) | |
af1996ef | 2073 | return ret; |
af1996ef TK |
2074 | |
2075 | return 0; | |
2076 | } | |
2077 | ||
1f7df6f8 | 2078 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2079 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2080 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2081 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2082 | { |
2083 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2084 | memdev->device_handle); | |
1cf03c00 | 2085 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 2086 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 DW |
2087 | struct nfit_mem *nfit_mem; |
2088 | int blk_valid = 0; | |
2089 | ||
2090 | if (!nvdimm) { | |
2091 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2092 | spa->range_index, memdev->device_handle); | |
2093 | return -ENODEV; | |
2094 | } | |
2095 | ||
44c462eb | 2096 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2097 | switch (nfit_spa_type(spa)) { |
2098 | case NFIT_SPA_PM: | |
2099 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2100 | mapping->start = memdev->address; |
2101 | mapping->size = memdev->region_size; | |
1f7df6f8 DW |
2102 | break; |
2103 | case NFIT_SPA_DCR: | |
2104 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2105 | if (!nfit_mem || !nfit_mem->bdw) { | |
2106 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
2107 | spa->range_index, nvdimm_name(nvdimm)); | |
2108 | } else { | |
44c462eb DW |
2109 | mapping->size = nfit_mem->bdw->capacity; |
2110 | mapping->start = nfit_mem->bdw->start_address; | |
5212e11f | 2111 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
1f7df6f8 DW |
2112 | blk_valid = 1; |
2113 | } | |
2114 | ||
44c462eb | 2115 | ndr_desc->mapping = mapping; |
1f7df6f8 | 2116 | ndr_desc->num_mappings = blk_valid; |
047fc8a1 RZ |
2117 | ndbr_desc = to_blk_region_desc(ndr_desc); |
2118 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
6bc75619 | 2119 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
1cf03c00 DW |
2120 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
2121 | ndr_desc); | |
2122 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
2123 | return -ENOMEM; |
2124 | break; | |
2125 | } | |
2126 | ||
2127 | return 0; | |
2128 | } | |
2129 | ||
c2f32acd LCY |
2130 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2131 | { | |
2132 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2133 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2134 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2135 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2136 | } | |
2137 | ||
1f7df6f8 DW |
2138 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2139 | struct nfit_spa *nfit_spa) | |
2140 | { | |
44c462eb | 2141 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2142 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 RZ |
2143 | struct nd_blk_region_desc ndbr_desc; |
2144 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 2145 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2146 | struct nvdimm_bus *nvdimm_bus; |
2147 | struct resource res; | |
eaf96153 | 2148 | int count = 0, rc; |
1f7df6f8 | 2149 | |
1cf03c00 | 2150 | if (nfit_spa->nd_region) |
20985164 VV |
2151 | return 0; |
2152 | ||
c2f32acd | 2153 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
1f7df6f8 DW |
2154 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
2155 | __func__); | |
2156 | return 0; | |
2157 | } | |
2158 | ||
2159 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2160 | memset(&mappings, 0, sizeof(mappings)); |
047fc8a1 | 2161 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
2162 | res.start = spa->address; |
2163 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
2164 | ndr_desc = &ndbr_desc.ndr_desc; |
2165 | ndr_desc->res = &res; | |
2166 | ndr_desc->provider_data = nfit_spa; | |
2167 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
41d7a6d6 TK |
2168 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
2169 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( | |
2170 | spa->proximity_domain); | |
2171 | else | |
2172 | ndr_desc->numa_node = NUMA_NO_NODE; | |
2173 | ||
1f7df6f8 DW |
2174 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2175 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2176 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
2177 | |
2178 | if (memdev->range_index != spa->range_index) | |
2179 | continue; | |
2180 | if (count >= ND_MAX_MAPPINGS) { | |
2181 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2182 | spa->range_index, ND_MAX_MAPPINGS); | |
2183 | return -ENXIO; | |
2184 | } | |
44c462eb DW |
2185 | mapping = &mappings[count++]; |
2186 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2187 | memdev, nfit_spa); |
1f7df6f8 | 2188 | if (rc) |
1cf03c00 | 2189 | goto out; |
1f7df6f8 DW |
2190 | } |
2191 | ||
44c462eb | 2192 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2193 | ndr_desc->num_mappings = count; |
2194 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2195 | if (rc) |
1cf03c00 | 2196 | goto out; |
eaf96153 | 2197 | |
1f7df6f8 DW |
2198 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2199 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2200 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2201 | if (rc) { |
af1996ef TK |
2202 | dev_warn(acpi_desc->dev, |
2203 | "failed to insert pmem resource to iomem: %d\n", | |
2204 | rc); | |
48901165 | 2205 | goto out; |
0caeef63 | 2206 | } |
48901165 | 2207 | |
1cf03c00 DW |
2208 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
2209 | ndr_desc); | |
2210 | if (!nfit_spa->nd_region) | |
2211 | rc = -ENOMEM; | |
1f7df6f8 | 2212 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
1cf03c00 DW |
2213 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
2214 | ndr_desc); | |
2215 | if (!nfit_spa->nd_region) | |
2216 | rc = -ENOMEM; | |
c2f32acd LCY |
2217 | } else if (nfit_spa_is_virtual(spa)) { |
2218 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
2219 | ndr_desc); | |
2220 | if (!nfit_spa->nd_region) | |
2221 | rc = -ENOMEM; | |
1f7df6f8 | 2222 | } |
20985164 | 2223 | |
1cf03c00 DW |
2224 | out: |
2225 | if (rc) | |
2226 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
2227 | nfit_spa->spa->range_index); | |
2228 | return rc; | |
2229 | } | |
2230 | ||
2231 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, | |
2232 | u32 max_ars) | |
2233 | { | |
2234 | struct device *dev = acpi_desc->dev; | |
2235 | struct nd_cmd_ars_status *ars_status; | |
2236 | ||
2237 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { | |
2238 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); | |
2239 | return 0; | |
2240 | } | |
2241 | ||
2242 | if (acpi_desc->ars_status) | |
2243 | devm_kfree(dev, acpi_desc->ars_status); | |
2244 | acpi_desc->ars_status = NULL; | |
2245 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); | |
2246 | if (!ars_status) | |
2247 | return -ENOMEM; | |
2248 | acpi_desc->ars_status = ars_status; | |
2249 | acpi_desc->ars_status_size = max_ars; | |
1f7df6f8 DW |
2250 | return 0; |
2251 | } | |
2252 | ||
1cf03c00 DW |
2253 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
2254 | struct nfit_spa *nfit_spa) | |
2255 | { | |
2256 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2257 | int rc; | |
2258 | ||
2259 | if (!nfit_spa->max_ars) { | |
2260 | struct nd_cmd_ars_cap ars_cap; | |
2261 | ||
2262 | memset(&ars_cap, 0, sizeof(ars_cap)); | |
2263 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
2264 | if (rc < 0) | |
2265 | return rc; | |
2266 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
2267 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
2268 | /* check that the supported scrub types match the spa type */ | |
2269 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && | |
2270 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) | |
2271 | return -ENOTTY; | |
2272 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && | |
2273 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) | |
2274 | return -ENOTTY; | |
2275 | } | |
2276 | ||
2277 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) | |
2278 | return -ENOMEM; | |
2279 | ||
2280 | rc = ars_get_status(acpi_desc); | |
2281 | if (rc < 0 && rc != -ENOSPC) | |
2282 | return rc; | |
2283 | ||
82aa37cf | 2284 | if (ars_status_process_records(acpi_desc, acpi_desc->ars_status)) |
1cf03c00 DW |
2285 | return -ENOMEM; |
2286 | ||
2287 | return 0; | |
2288 | } | |
2289 | ||
2290 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, | |
2291 | struct nfit_spa *nfit_spa) | |
2292 | { | |
2293 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2294 | unsigned int overflow_retry = scrub_overflow_abort; | |
2295 | u64 init_ars_start = 0, init_ars_len = 0; | |
2296 | struct device *dev = acpi_desc->dev; | |
2297 | unsigned int tmo = scrub_timeout; | |
2298 | int rc; | |
2299 | ||
37b137ff | 2300 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
1cf03c00 DW |
2301 | return; |
2302 | ||
2303 | rc = ars_start(acpi_desc, nfit_spa); | |
2304 | /* | |
2305 | * If we timed out the initial scan we'll still be busy here, | |
2306 | * and will wait another timeout before giving up permanently. | |
2307 | */ | |
2308 | if (rc < 0 && rc != -EBUSY) | |
2309 | return; | |
2310 | ||
2311 | do { | |
2312 | u64 ars_start, ars_len; | |
2313 | ||
2314 | if (acpi_desc->cancel) | |
2315 | break; | |
2316 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2317 | if (rc == -ENOTTY) | |
2318 | break; | |
2319 | if (rc == -EBUSY && !tmo) { | |
2320 | dev_warn(dev, "range %d ars timeout, aborting\n", | |
2321 | spa->range_index); | |
2322 | break; | |
2323 | } | |
2324 | ||
2325 | if (rc == -EBUSY) { | |
2326 | /* | |
2327 | * Note, entries may be appended to the list | |
2328 | * while the lock is dropped, but the workqueue | |
2329 | * being active prevents entries being deleted / | |
2330 | * freed. | |
2331 | */ | |
2332 | mutex_unlock(&acpi_desc->init_mutex); | |
2333 | ssleep(1); | |
2334 | tmo--; | |
2335 | mutex_lock(&acpi_desc->init_mutex); | |
2336 | continue; | |
2337 | } | |
2338 | ||
2339 | /* we got some results, but there are more pending... */ | |
2340 | if (rc == -ENOSPC && overflow_retry--) { | |
2341 | if (!init_ars_len) { | |
2342 | init_ars_len = acpi_desc->ars_status->length; | |
2343 | init_ars_start = acpi_desc->ars_status->address; | |
2344 | } | |
2345 | rc = ars_continue(acpi_desc); | |
2346 | } | |
2347 | ||
2348 | if (rc < 0) { | |
2349 | dev_warn(dev, "range %d ars continuation failed\n", | |
2350 | spa->range_index); | |
2351 | break; | |
2352 | } | |
2353 | ||
2354 | if (init_ars_len) { | |
2355 | ars_start = init_ars_start; | |
2356 | ars_len = init_ars_len; | |
2357 | } else { | |
2358 | ars_start = acpi_desc->ars_status->address; | |
2359 | ars_len = acpi_desc->ars_status->length; | |
2360 | } | |
2361 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", | |
2362 | spa->range_index, ars_start, ars_len); | |
2363 | /* notify the region about new poison entries */ | |
2364 | nvdimm_region_notify(nfit_spa->nd_region, | |
2365 | NVDIMM_REVALIDATE_POISON); | |
2366 | break; | |
2367 | } while (1); | |
2368 | } | |
2369 | ||
2370 | static void acpi_nfit_scrub(struct work_struct *work) | |
1f7df6f8 | 2371 | { |
1cf03c00 DW |
2372 | struct device *dev; |
2373 | u64 init_scrub_length = 0; | |
1f7df6f8 | 2374 | struct nfit_spa *nfit_spa; |
1cf03c00 DW |
2375 | u64 init_scrub_address = 0; |
2376 | bool init_ars_done = false; | |
2377 | struct acpi_nfit_desc *acpi_desc; | |
2378 | unsigned int tmo = scrub_timeout; | |
2379 | unsigned int overflow_retry = scrub_overflow_abort; | |
2380 | ||
2381 | acpi_desc = container_of(work, typeof(*acpi_desc), work); | |
2382 | dev = acpi_desc->dev; | |
1f7df6f8 | 2383 | |
1cf03c00 DW |
2384 | /* |
2385 | * We scrub in 2 phases. The first phase waits for any platform | |
2386 | * firmware initiated scrubs to complete and then we go search for the | |
2387 | * affected spa regions to mark them scanned. In the second phase we | |
2388 | * initiate a directed scrub for every range that was not scrubbed in | |
37b137ff VV |
2389 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
2390 | * the first phase, but really only care about running phase 2, where | |
2391 | * regions can be notified of new poison. | |
1cf03c00 DW |
2392 | */ |
2393 | ||
2394 | /* process platform firmware initiated scrubs */ | |
2395 | retry: | |
2396 | mutex_lock(&acpi_desc->init_mutex); | |
1f7df6f8 | 2397 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
1cf03c00 DW |
2398 | struct nd_cmd_ars_status *ars_status; |
2399 | struct acpi_nfit_system_address *spa; | |
2400 | u64 ars_start, ars_len; | |
2401 | int rc; | |
1f7df6f8 | 2402 | |
1cf03c00 DW |
2403 | if (acpi_desc->cancel) |
2404 | break; | |
2405 | ||
2406 | if (nfit_spa->nd_region) | |
2407 | continue; | |
2408 | ||
2409 | if (init_ars_done) { | |
2410 | /* | |
2411 | * No need to re-query, we're now just | |
2412 | * reconciling all the ranges covered by the | |
2413 | * initial scrub | |
2414 | */ | |
2415 | rc = 0; | |
2416 | } else | |
2417 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2418 | ||
2419 | if (rc == -ENOTTY) { | |
2420 | /* no ars capability, just register spa and move on */ | |
2421 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2422 | continue; | |
2423 | } | |
2424 | ||
2425 | if (rc == -EBUSY && !tmo) { | |
2426 | /* fallthrough to directed scrub in phase 2 */ | |
2427 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); | |
2428 | break; | |
2429 | } else if (rc == -EBUSY) { | |
2430 | mutex_unlock(&acpi_desc->init_mutex); | |
2431 | ssleep(1); | |
2432 | tmo--; | |
2433 | goto retry; | |
2434 | } | |
2435 | ||
2436 | /* we got some results, but there are more pending... */ | |
2437 | if (rc == -ENOSPC && overflow_retry--) { | |
2438 | ars_status = acpi_desc->ars_status; | |
2439 | /* | |
2440 | * Record the original scrub range, so that we | |
2441 | * can recall all the ranges impacted by the | |
2442 | * initial scrub. | |
2443 | */ | |
2444 | if (!init_scrub_length) { | |
2445 | init_scrub_length = ars_status->length; | |
2446 | init_scrub_address = ars_status->address; | |
2447 | } | |
2448 | rc = ars_continue(acpi_desc); | |
2449 | if (rc == 0) { | |
2450 | mutex_unlock(&acpi_desc->init_mutex); | |
2451 | goto retry; | |
2452 | } | |
2453 | } | |
2454 | ||
2455 | if (rc < 0) { | |
2456 | /* | |
2457 | * Initial scrub failed, we'll give it one more | |
2458 | * try below... | |
2459 | */ | |
2460 | break; | |
2461 | } | |
2462 | ||
2463 | /* We got some final results, record completed ranges */ | |
2464 | ars_status = acpi_desc->ars_status; | |
2465 | if (init_scrub_length) { | |
2466 | ars_start = init_scrub_address; | |
2467 | ars_len = ars_start + init_scrub_length; | |
2468 | } else { | |
2469 | ars_start = ars_status->address; | |
2470 | ars_len = ars_status->length; | |
2471 | } | |
2472 | spa = nfit_spa->spa; | |
2473 | ||
2474 | if (!init_ars_done) { | |
2475 | init_ars_done = true; | |
2476 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", | |
2477 | ars_start, ars_len); | |
2478 | } | |
2479 | if (ars_start <= spa->address && ars_start + ars_len | |
2480 | >= spa->address + spa->length) | |
2481 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
1f7df6f8 | 2482 | } |
1cf03c00 DW |
2483 | |
2484 | /* | |
2485 | * For all the ranges not covered by an initial scrub we still | |
2486 | * want to see if there are errors, but it's ok to discover them | |
2487 | * asynchronously. | |
2488 | */ | |
2489 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2490 | /* | |
2491 | * Flag all the ranges that still need scrubbing, but | |
2492 | * register them now to make data available. | |
2493 | */ | |
37b137ff VV |
2494 | if (!nfit_spa->nd_region) { |
2495 | nfit_spa->ars_required = 1; | |
1cf03c00 | 2496 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
37b137ff | 2497 | } |
1cf03c00 DW |
2498 | } |
2499 | ||
2500 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2501 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); | |
37b137ff VV |
2502 | acpi_desc->scrub_count++; |
2503 | if (acpi_desc->scrub_count_state) | |
2504 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
1cf03c00 DW |
2505 | mutex_unlock(&acpi_desc->init_mutex); |
2506 | } | |
2507 | ||
2508 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) | |
2509 | { | |
2510 | struct nfit_spa *nfit_spa; | |
2511 | int rc; | |
2512 | ||
2513 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2514 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { | |
2515 | /* BLK regions don't need to wait for ars results */ | |
2516 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2517 | if (rc) | |
2518 | return rc; | |
2519 | } | |
2520 | ||
2521 | queue_work(nfit_wq, &acpi_desc->work); | |
1f7df6f8 DW |
2522 | return 0; |
2523 | } | |
2524 | ||
20985164 VV |
2525 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
2526 | struct nfit_table_prev *prev) | |
2527 | { | |
2528 | struct device *dev = acpi_desc->dev; | |
2529 | ||
2530 | if (!list_empty(&prev->spas) || | |
2531 | !list_empty(&prev->memdevs) || | |
2532 | !list_empty(&prev->dcrs) || | |
2533 | !list_empty(&prev->bdws) || | |
2534 | !list_empty(&prev->idts) || | |
2535 | !list_empty(&prev->flushes)) { | |
2536 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
2537 | return -ENXIO; | |
2538 | } | |
2539 | return 0; | |
2540 | } | |
2541 | ||
37b137ff VV |
2542 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
2543 | { | |
2544 | struct device *dev = acpi_desc->dev; | |
2545 | struct kernfs_node *nfit; | |
2546 | struct device *bus_dev; | |
2547 | ||
2548 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
2549 | return 0; | |
2550 | ||
2551 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
2552 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
2553 | if (!nfit) { | |
2554 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
2555 | return -ENODEV; | |
2556 | } | |
2557 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
2558 | sysfs_put(nfit); | |
2559 | if (!acpi_desc->scrub_count_state) { | |
2560 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
2561 | return -ENODEV; | |
2562 | } | |
2563 | ||
2564 | return 0; | |
2565 | } | |
2566 | ||
58cd71b4 DW |
2567 | static void acpi_nfit_destruct(void *data) |
2568 | { | |
2569 | struct acpi_nfit_desc *acpi_desc = data; | |
37b137ff | 2570 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
58cd71b4 | 2571 | |
6839a6d9 VV |
2572 | /* |
2573 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
2574 | * race teardown | |
2575 | */ | |
2576 | mutex_lock(&acpi_desc_lock); | |
58cd71b4 | 2577 | acpi_desc->cancel = 1; |
37b137ff VV |
2578 | /* |
2579 | * Bounce the nvdimm bus lock to make sure any in-flight | |
2580 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
2581 | * either submit or see ->cancel set. | |
2582 | */ | |
2583 | device_lock(bus_dev); | |
2584 | device_unlock(bus_dev); | |
2585 | ||
58cd71b4 | 2586 | flush_workqueue(nfit_wq); |
37b137ff VV |
2587 | if (acpi_desc->scrub_count_state) |
2588 | sysfs_put(acpi_desc->scrub_count_state); | |
58cd71b4 DW |
2589 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
2590 | acpi_desc->nvdimm_bus = NULL; | |
6839a6d9 VV |
2591 | list_del(&acpi_desc->list); |
2592 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
2593 | } |
2594 | ||
e7a11b44 | 2595 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
2596 | { |
2597 | struct device *dev = acpi_desc->dev; | |
20985164 | 2598 | struct nfit_table_prev prev; |
b94d5230 | 2599 | const void *end; |
1f7df6f8 | 2600 | int rc; |
b94d5230 | 2601 | |
58cd71b4 | 2602 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
2603 | acpi_nfit_init_dsms(acpi_desc); |
2604 | ||
58cd71b4 DW |
2605 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
2606 | &acpi_desc->nd_desc); | |
2607 | if (!acpi_desc->nvdimm_bus) | |
2608 | return -ENOMEM; | |
37b137ff | 2609 | |
58cd71b4 DW |
2610 | rc = devm_add_action_or_reset(dev, acpi_nfit_destruct, |
2611 | acpi_desc); | |
2612 | if (rc) | |
2613 | return rc; | |
37b137ff VV |
2614 | |
2615 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
2616 | if (rc) | |
2617 | return rc; | |
6839a6d9 VV |
2618 | |
2619 | /* register this acpi_desc for mce notifications */ | |
2620 | mutex_lock(&acpi_desc_lock); | |
2621 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
2622 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
2623 | } |
2624 | ||
20985164 VV |
2625 | mutex_lock(&acpi_desc->init_mutex); |
2626 | ||
2627 | INIT_LIST_HEAD(&prev.spas); | |
2628 | INIT_LIST_HEAD(&prev.memdevs); | |
2629 | INIT_LIST_HEAD(&prev.dcrs); | |
2630 | INIT_LIST_HEAD(&prev.bdws); | |
2631 | INIT_LIST_HEAD(&prev.idts); | |
2632 | INIT_LIST_HEAD(&prev.flushes); | |
2633 | ||
2634 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
2635 | acpi_desc->spas.prev); | |
2636 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
2637 | acpi_desc->memdevs.prev); | |
2638 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
2639 | acpi_desc->dcrs.prev); | |
2640 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
2641 | acpi_desc->bdws.prev); | |
2642 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
2643 | acpi_desc->idts.prev); | |
2644 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
2645 | acpi_desc->flushes.prev); | |
b94d5230 | 2646 | |
b94d5230 | 2647 | end = data + sz; |
b94d5230 | 2648 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 2649 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
2650 | |
2651 | if (IS_ERR(data)) { | |
2652 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, | |
2653 | PTR_ERR(data)); | |
20985164 VV |
2654 | rc = PTR_ERR(data); |
2655 | goto out_unlock; | |
b94d5230 DW |
2656 | } |
2657 | ||
20985164 VV |
2658 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
2659 | if (rc) | |
2660 | goto out_unlock; | |
2661 | ||
81ed4e36 DW |
2662 | rc = nfit_mem_init(acpi_desc); |
2663 | if (rc) | |
20985164 | 2664 | goto out_unlock; |
62232e45 | 2665 | |
1f7df6f8 DW |
2666 | rc = acpi_nfit_register_dimms(acpi_desc); |
2667 | if (rc) | |
20985164 VV |
2668 | goto out_unlock; |
2669 | ||
2670 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 2671 | |
20985164 VV |
2672 | out_unlock: |
2673 | mutex_unlock(&acpi_desc->init_mutex); | |
2674 | return rc; | |
b94d5230 | 2675 | } |
6bc75619 | 2676 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 2677 | |
7ae0fa43 DW |
2678 | struct acpi_nfit_flush_work { |
2679 | struct work_struct work; | |
2680 | struct completion cmp; | |
2681 | }; | |
2682 | ||
2683 | static void flush_probe(struct work_struct *work) | |
2684 | { | |
2685 | struct acpi_nfit_flush_work *flush; | |
2686 | ||
2687 | flush = container_of(work, typeof(*flush), work); | |
2688 | complete(&flush->cmp); | |
2689 | } | |
2690 | ||
2691 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) | |
2692 | { | |
2693 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2694 | struct device *dev = acpi_desc->dev; | |
2695 | struct acpi_nfit_flush_work flush; | |
2696 | ||
2697 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ | |
2698 | device_lock(dev); | |
2699 | device_unlock(dev); | |
2700 | ||
2701 | /* | |
2702 | * Scrub work could take 10s of seconds, userspace may give up so we | |
2703 | * need to be interruptible while waiting. | |
2704 | */ | |
2705 | INIT_WORK_ONSTACK(&flush.work, flush_probe); | |
2706 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); | |
2707 | queue_work(nfit_wq, &flush.work); | |
2708 | return wait_for_completion_interruptible(&flush.cmp); | |
2709 | } | |
2710 | ||
87bf572e DW |
2711 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
2712 | struct nvdimm *nvdimm, unsigned int cmd) | |
2713 | { | |
2714 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2715 | ||
2716 | if (nvdimm) | |
2717 | return 0; | |
2718 | if (cmd != ND_CMD_ARS_START) | |
2719 | return 0; | |
2720 | ||
2721 | /* | |
2722 | * The kernel and userspace may race to initiate a scrub, but | |
2723 | * the scrub thread is prepared to lose that initial race. It | |
2724 | * just needs guarantees that any ars it initiates are not | |
2725 | * interrupted by any intervening start reqeusts from userspace. | |
2726 | */ | |
2727 | if (work_busy(&acpi_desc->work)) | |
2728 | return -EBUSY; | |
2729 | ||
2730 | return 0; | |
2731 | } | |
2732 | ||
6839a6d9 | 2733 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc) |
37b137ff VV |
2734 | { |
2735 | struct device *dev = acpi_desc->dev; | |
2736 | struct nfit_spa *nfit_spa; | |
2737 | ||
2738 | if (work_busy(&acpi_desc->work)) | |
2739 | return -EBUSY; | |
2740 | ||
2741 | if (acpi_desc->cancel) | |
2742 | return 0; | |
2743 | ||
2744 | mutex_lock(&acpi_desc->init_mutex); | |
2745 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2746 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2747 | ||
2748 | if (nfit_spa_type(spa) != NFIT_SPA_PM) | |
2749 | continue; | |
2750 | ||
2751 | nfit_spa->ars_required = 1; | |
2752 | } | |
2753 | queue_work(nfit_wq, &acpi_desc->work); | |
2754 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); | |
2755 | mutex_unlock(&acpi_desc->init_mutex); | |
2756 | ||
2757 | return 0; | |
2758 | } | |
2759 | ||
a61fe6f7 | 2760 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
2761 | { |
2762 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
2763 | |
2764 | dev_set_drvdata(dev, acpi_desc); | |
2765 | acpi_desc->dev = dev; | |
6bc75619 | 2766 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
2767 | nd_desc = &acpi_desc->nd_desc; |
2768 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 2769 | nd_desc->module = THIS_MODULE; |
b94d5230 | 2770 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 2771 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 2772 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 2773 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 2774 | |
20985164 VV |
2775 | INIT_LIST_HEAD(&acpi_desc->spas); |
2776 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
2777 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
2778 | INIT_LIST_HEAD(&acpi_desc->idts); | |
2779 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
2780 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
2781 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 2782 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 2783 | mutex_init(&acpi_desc->init_mutex); |
1cf03c00 | 2784 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
20985164 | 2785 | } |
a61fe6f7 | 2786 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 VV |
2787 | |
2788 | static int acpi_nfit_add(struct acpi_device *adev) | |
2789 | { | |
2790 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
2791 | struct acpi_nfit_desc *acpi_desc; | |
2792 | struct device *dev = &adev->dev; | |
2793 | struct acpi_table_header *tbl; | |
2794 | acpi_status status = AE_OK; | |
2795 | acpi_size sz; | |
31932041 | 2796 | int rc = 0; |
20985164 | 2797 | |
82595423 | 2798 | status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz); |
20985164 VV |
2799 | if (ACPI_FAILURE(status)) { |
2800 | /* This is ok, we could have an nvdimm hotplugged later */ | |
2801 | dev_dbg(dev, "failed to find NFIT at startup\n"); | |
2802 | return 0; | |
2803 | } | |
2804 | ||
a61fe6f7 DW |
2805 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
2806 | if (!acpi_desc) | |
2807 | return -ENOMEM; | |
2808 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 2809 | |
e7a11b44 | 2810 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 2811 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
2812 | |
2813 | /* Evaluate _FIT and override with that if present */ | |
2814 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
2815 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
2816 | union acpi_object *obj = buf.pointer; |
2817 | ||
2818 | if (obj->type == ACPI_TYPE_BUFFER) | |
2819 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
2820 | obj->buffer.length); | |
2821 | else | |
6b577c9d LK |
2822 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
2823 | __func__, (int) obj->type); | |
31932041 DW |
2824 | kfree(buf.pointer); |
2825 | } else | |
e7a11b44 DW |
2826 | /* skip over the lead-in header table */ |
2827 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
2828 | + sizeof(struct acpi_table_nfit), | |
2829 | sz - sizeof(struct acpi_table_nfit)); | |
e7a11b44 | 2830 | return rc; |
b94d5230 DW |
2831 | } |
2832 | ||
2833 | static int acpi_nfit_remove(struct acpi_device *adev) | |
2834 | { | |
58cd71b4 | 2835 | /* see acpi_nfit_destruct */ |
b94d5230 DW |
2836 | return 0; |
2837 | } | |
2838 | ||
c14a868a | 2839 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) |
20985164 | 2840 | { |
c14a868a | 2841 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 2842 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 2843 | union acpi_object *obj; |
20985164 VV |
2844 | acpi_status status; |
2845 | int ret; | |
2846 | ||
2847 | dev_dbg(dev, "%s: event: %d\n", __func__, event); | |
2848 | ||
c09f1218 VV |
2849 | if (event != NFIT_NOTIFY_UPDATE) |
2850 | return; | |
2851 | ||
20985164 VV |
2852 | if (!dev->driver) { |
2853 | /* dev->driver may be null if we're being removed */ | |
2854 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); | |
c14a868a | 2855 | return; |
20985164 VV |
2856 | } |
2857 | ||
2858 | if (!acpi_desc) { | |
a61fe6f7 DW |
2859 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
2860 | if (!acpi_desc) | |
c14a868a DW |
2861 | return; |
2862 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
2863 | } else { |
2864 | /* | |
2865 | * Finish previous registration before considering new | |
2866 | * regions. | |
2867 | */ | |
2868 | flush_workqueue(nfit_wq); | |
20985164 VV |
2869 | } |
2870 | ||
2871 | /* Evaluate _FIT */ | |
c14a868a | 2872 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
2873 | if (ACPI_FAILURE(status)) { |
2874 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 2875 | return; |
20985164 VV |
2876 | } |
2877 | ||
6b577c9d LK |
2878 | obj = buf.pointer; |
2879 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
2880 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
2881 | obj->buffer.length); | |
31932041 | 2882 | if (ret) |
6b577c9d | 2883 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 2884 | } else |
6b577c9d | 2885 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 2886 | kfree(buf.pointer); |
c14a868a DW |
2887 | } |
2888 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); | |
20985164 | 2889 | |
c14a868a DW |
2890 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
2891 | { | |
2892 | device_lock(&adev->dev); | |
2893 | __acpi_nfit_notify(&adev->dev, adev->handle, event); | |
2894 | device_unlock(&adev->dev); | |
20985164 VV |
2895 | } |
2896 | ||
b94d5230 DW |
2897 | static const struct acpi_device_id acpi_nfit_ids[] = { |
2898 | { "ACPI0012", 0 }, | |
2899 | { "", 0 }, | |
2900 | }; | |
2901 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
2902 | ||
2903 | static struct acpi_driver acpi_nfit_driver = { | |
2904 | .name = KBUILD_MODNAME, | |
2905 | .ids = acpi_nfit_ids, | |
2906 | .ops = { | |
2907 | .add = acpi_nfit_add, | |
2908 | .remove = acpi_nfit_remove, | |
20985164 | 2909 | .notify = acpi_nfit_notify, |
b94d5230 DW |
2910 | }, |
2911 | }; | |
2912 | ||
2913 | static __init int nfit_init(void) | |
2914 | { | |
2915 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); | |
2916 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
2917 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
2918 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
2919 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
2920 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
2921 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
2922 | ||
2923 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); | |
2924 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); | |
2925 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); | |
2926 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); | |
2927 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); | |
2928 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); | |
2929 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); | |
2930 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); | |
2931 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); | |
2932 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); | |
31eca76b DW |
2933 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
2934 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
e02fb726 | 2935 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
b94d5230 | 2936 | |
7ae0fa43 DW |
2937 | nfit_wq = create_singlethread_workqueue("nfit"); |
2938 | if (!nfit_wq) | |
2939 | return -ENOMEM; | |
2940 | ||
6839a6d9 VV |
2941 | nfit_mce_register(); |
2942 | ||
b94d5230 DW |
2943 | return acpi_bus_register_driver(&acpi_nfit_driver); |
2944 | } | |
2945 | ||
2946 | static __exit void nfit_exit(void) | |
2947 | { | |
6839a6d9 | 2948 | nfit_mce_unregister(); |
b94d5230 | 2949 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 2950 | destroy_workqueue(nfit_wq); |
6839a6d9 | 2951 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
2952 | } |
2953 | ||
2954 | module_init(nfit_init); | |
2955 | module_exit(nfit_exit); | |
2956 | MODULE_LICENSE("GPL v2"); | |
2957 | MODULE_AUTHOR("Intel Corporation"); |