Commit | Line | Data |
---|---|---|
b94d5230 DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #include <linux/list_sort.h> | |
14 | #include <linux/libnvdimm.h> | |
15 | #include <linux/module.h> | |
047fc8a1 | 16 | #include <linux/mutex.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
37b137ff | 18 | #include <linux/sysfs.h> |
0caeef63 | 19 | #include <linux/delay.h> |
b94d5230 DW |
20 | #include <linux/list.h> |
21 | #include <linux/acpi.h> | |
eaf96153 | 22 | #include <linux/sort.h> |
c2ad2954 | 23 | #include <linux/pmem.h> |
047fc8a1 | 24 | #include <linux/io.h> |
1cf03c00 | 25 | #include <linux/nd.h> |
96601adb | 26 | #include <asm/cacheflush.h> |
b94d5230 DW |
27 | #include "nfit.h" |
28 | ||
047fc8a1 RZ |
29 | /* |
30 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
31 | * irrelevant. | |
32 | */ | |
2f8e2c87 | 33 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 34 | |
4d88a97a DW |
35 | static bool force_enable_dimms; |
36 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
37 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
38 | ||
1cf03c00 DW |
39 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
40 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); | |
41 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); | |
42 | ||
43 | /* after three payloads of overflow, it's dead jim */ | |
44 | static unsigned int scrub_overflow_abort = 3; | |
45 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); | |
46 | MODULE_PARM_DESC(scrub_overflow_abort, | |
47 | "Number of times we overflow ARS results before abort"); | |
48 | ||
87554098 DW |
49 | static bool disable_vendor_specific; |
50 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
51 | MODULE_PARM_DESC(disable_vendor_specific, | |
f2668fa7 | 52 | "Limit commands to the publicly specified set"); |
87554098 | 53 | |
095ab4b3 LK |
54 | static unsigned long override_dsm_mask; |
55 | module_param(override_dsm_mask, ulong, S_IRUGO); | |
56 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); | |
57 | ||
ba650cfc LK |
58 | static int default_dsm_family = -1; |
59 | module_param(default_dsm_family, int, S_IRUGO); | |
60 | MODULE_PARM_DESC(default_dsm_family, | |
61 | "Try this DSM type first when identifying NVDIMM family"); | |
62 | ||
6839a6d9 VV |
63 | LIST_HEAD(acpi_descs); |
64 | DEFINE_MUTEX(acpi_desc_lock); | |
65 | ||
7ae0fa43 DW |
66 | static struct workqueue_struct *nfit_wq; |
67 | ||
20985164 VV |
68 | struct nfit_table_prev { |
69 | struct list_head spas; | |
70 | struct list_head memdevs; | |
71 | struct list_head dcrs; | |
72 | struct list_head bdws; | |
73 | struct list_head idts; | |
74 | struct list_head flushes; | |
75 | }; | |
76 | ||
41c8bdb3 | 77 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
b94d5230 | 78 | |
41c8bdb3 | 79 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 | 80 | { |
41c8bdb3 | 81 | return &nfit_uuid[id]; |
b94d5230 | 82 | } |
6bc75619 | 83 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 84 | |
62232e45 DW |
85 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
86 | struct nvdimm_bus_descriptor *nd_desc) | |
87 | { | |
88 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); | |
89 | } | |
90 | ||
91 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) | |
92 | { | |
93 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
94 | ||
95 | /* | |
96 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
97 | * acpi_device. | |
98 | */ | |
99 | if (!nd_desc->provider_name | |
100 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
101 | return NULL; | |
102 | ||
103 | return to_acpi_device(acpi_desc->dev); | |
104 | } | |
105 | ||
d6eb270c | 106 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 107 | { |
d4f32367 | 108 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 109 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
110 | u16 flags; |
111 | ||
112 | switch (cmd) { | |
113 | case ND_CMD_ARS_CAP: | |
11294d63 | 114 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
115 | return -ENOTTY; |
116 | ||
117 | /* Command failed */ | |
11294d63 | 118 | if (status & 0xffff) |
aef25338 DW |
119 | return -EIO; |
120 | ||
121 | /* No supported scan types for this range */ | |
122 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 123 | if ((status >> 16 & flags) == 0) |
aef25338 | 124 | return -ENOTTY; |
9a901f54 | 125 | return 0; |
aef25338 | 126 | case ND_CMD_ARS_START: |
aef25338 | 127 | /* ARS is in progress */ |
11294d63 | 128 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
129 | return -EBUSY; |
130 | ||
131 | /* Command failed */ | |
11294d63 | 132 | if (status & 0xffff) |
aef25338 | 133 | return -EIO; |
9a901f54 | 134 | return 0; |
aef25338 DW |
135 | case ND_CMD_ARS_STATUS: |
136 | ars_status = buf; | |
137 | /* Command failed */ | |
11294d63 | 138 | if (status & 0xffff) |
aef25338 DW |
139 | return -EIO; |
140 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 141 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
142 | return 0; |
143 | ||
144 | /* ARS is in progress */ | |
11294d63 | 145 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
146 | return -EBUSY; |
147 | ||
148 | /* No ARS performed for the current boot */ | |
11294d63 | 149 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
150 | return -EAGAIN; |
151 | ||
152 | /* | |
153 | * ARS interrupted, either we overflowed or some other | |
154 | * agent wants the scan to stop. If we didn't overflow | |
155 | * then just continue with the returned results. | |
156 | */ | |
11294d63 | 157 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
158 | if (ars_status->out_length >= 40 && (ars_status->flags |
159 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
160 | return -ENOSPC; |
161 | return 0; | |
162 | } | |
163 | ||
164 | /* Unknown status */ | |
11294d63 | 165 | if (status >> 16) |
aef25338 | 166 | return -EIO; |
9a901f54 | 167 | return 0; |
d4f32367 DW |
168 | case ND_CMD_CLEAR_ERROR: |
169 | clear_err = buf; | |
11294d63 | 170 | if (status & 0xffff) |
d4f32367 DW |
171 | return -EIO; |
172 | if (!clear_err->cleared) | |
173 | return -EIO; | |
174 | if (clear_err->length > clear_err->cleared) | |
175 | return clear_err->cleared; | |
9a901f54 | 176 | return 0; |
aef25338 DW |
177 | default: |
178 | break; | |
179 | } | |
180 | ||
11294d63 DW |
181 | /* all other non-zero status results in an error */ |
182 | if (status) | |
183 | return -EIO; | |
aef25338 DW |
184 | return 0; |
185 | } | |
186 | ||
9d62ed96 DW |
187 | static int xlat_nvdimm_status(void *buf, unsigned int cmd, u32 status) |
188 | { | |
189 | switch (cmd) { | |
190 | case ND_CMD_GET_CONFIG_SIZE: | |
191 | if (status >> 16 & ND_CONFIG_LOCKED) | |
192 | return -EACCES; | |
193 | break; | |
194 | default: | |
195 | break; | |
196 | } | |
197 | ||
198 | /* all other non-zero status results in an error */ | |
199 | if (status) | |
200 | return -EIO; | |
201 | return 0; | |
202 | } | |
203 | ||
d6eb270c DW |
204 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
205 | u32 status) | |
206 | { | |
207 | if (!nvdimm) | |
208 | return xlat_bus_status(buf, cmd, status); | |
9d62ed96 | 209 | return xlat_nvdimm_status(buf, cmd, status); |
d6eb270c DW |
210 | } |
211 | ||
a7de92da DW |
212 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
213 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) | |
b94d5230 | 214 | { |
62232e45 | 215 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
62232e45 | 216 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 217 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 218 | struct device *dev = acpi_desc->dev; |
31eca76b | 219 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 220 | const char *cmd_name, *dimm_name; |
31eca76b | 221 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 222 | u32 offset, fw_status = 0; |
62232e45 | 223 | acpi_handle handle; |
31eca76b | 224 | unsigned int func; |
41c8bdb3 | 225 | const guid_t *guid; |
62232e45 DW |
226 | int rc, i; |
227 | ||
31eca76b DW |
228 | func = cmd; |
229 | if (cmd == ND_CMD_CALL) { | |
230 | call_pkg = buf; | |
231 | func = call_pkg->nd_command; | |
232 | } | |
233 | ||
62232e45 DW |
234 | if (nvdimm) { |
235 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
236 | struct acpi_device *adev = nfit_mem->adev; | |
237 | ||
238 | if (!adev) | |
239 | return -ENOTTY; | |
31eca76b DW |
240 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
241 | return -ENOTTY; | |
242 | ||
047fc8a1 | 243 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 244 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 245 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
246 | dsm_mask = nfit_mem->dsm_mask; |
247 | desc = nd_cmd_dimm_desc(cmd); | |
41c8bdb3 | 248 | guid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
249 | handle = adev->handle; |
250 | } else { | |
251 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
252 | ||
253 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 254 | cmd_mask = nd_desc->cmd_mask; |
31eca76b | 255 | dsm_mask = cmd_mask; |
62232e45 | 256 | desc = nd_cmd_bus_desc(cmd); |
41c8bdb3 | 257 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 DW |
258 | handle = adev->handle; |
259 | dimm_name = "bus"; | |
260 | } | |
261 | ||
262 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
263 | return -ENOTTY; | |
264 | ||
31eca76b | 265 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
62232e45 DW |
266 | return -ENOTTY; |
267 | ||
268 | in_obj.type = ACPI_TYPE_PACKAGE; | |
269 | in_obj.package.count = 1; | |
270 | in_obj.package.elements = &in_buf; | |
271 | in_buf.type = ACPI_TYPE_BUFFER; | |
272 | in_buf.buffer.pointer = buf; | |
273 | in_buf.buffer.length = 0; | |
274 | ||
275 | /* libnvdimm has already validated the input envelope */ | |
276 | for (i = 0; i < desc->in_num; i++) | |
277 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
278 | i, buf); | |
279 | ||
31eca76b DW |
280 | if (call_pkg) { |
281 | /* skip over package wrapper */ | |
282 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
283 | in_buf.buffer.length = call_pkg->nd_size_in; | |
284 | } | |
285 | ||
7699a6a3 DW |
286 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
287 | __func__, dimm_name, cmd, func, in_buf.buffer.length); | |
288 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
31eca76b DW |
289 | in_buf.buffer.pointer, |
290 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 | 291 | |
94116f81 | 292 | out_obj = acpi_evaluate_dsm(handle, guid, 1, func, &in_obj); |
62232e45 DW |
293 | if (!out_obj) { |
294 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, | |
295 | cmd_name); | |
296 | return -EINVAL; | |
297 | } | |
298 | ||
31eca76b DW |
299 | if (call_pkg) { |
300 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
301 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
302 | out_obj->buffer.pointer, | |
303 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
304 | ||
305 | ACPI_FREE(out_obj); | |
306 | /* | |
307 | * Need to support FW function w/o known size in advance. | |
308 | * Caller can determine required size based upon nd_fw_size. | |
309 | * If we return an error (like elsewhere) then caller wouldn't | |
310 | * be able to rely upon data returned to make calculation. | |
311 | */ | |
312 | return 0; | |
313 | } | |
314 | ||
62232e45 DW |
315 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
316 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", | |
317 | __func__, dimm_name, cmd_name, out_obj->type); | |
318 | rc = -EINVAL; | |
319 | goto out; | |
320 | } | |
321 | ||
7699a6a3 DW |
322 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, dimm_name, |
323 | cmd_name, out_obj->buffer.length); | |
324 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, | |
325 | out_obj->buffer.pointer, | |
326 | min_t(u32, 128, out_obj->buffer.length), true); | |
62232e45 DW |
327 | |
328 | for (i = 0, offset = 0; i < desc->out_num; i++) { | |
329 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
330 | (u32 *) out_obj->buffer.pointer, |
331 | out_obj->buffer.length - offset); | |
62232e45 DW |
332 | |
333 | if (offset + out_size > out_obj->buffer.length) { | |
334 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", | |
335 | __func__, dimm_name, cmd_name, i); | |
336 | break; | |
337 | } | |
338 | ||
339 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
340 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", | |
341 | __func__, dimm_name, cmd_name, i); | |
342 | rc = -ENXIO; | |
343 | goto out; | |
344 | } | |
345 | memcpy(buf + in_buf.buffer.length + offset, | |
346 | out_obj->buffer.pointer + offset, out_size); | |
347 | offset += out_size; | |
348 | } | |
11294d63 DW |
349 | |
350 | /* | |
351 | * Set fw_status for all the commands with a known format to be | |
352 | * later interpreted by xlat_status(). | |
353 | */ | |
354 | if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) | |
355 | || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) | |
356 | fw_status = *(u32 *) out_obj->buffer.pointer; | |
357 | ||
62232e45 DW |
358 | if (offset + in_buf.buffer.length < buf_len) { |
359 | if (i >= 1) { | |
360 | /* | |
361 | * status valid, return the number of bytes left | |
362 | * unfilled in the output buffer | |
363 | */ | |
364 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 365 | if (cmd_rc) |
d6eb270c DW |
366 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
367 | fw_status); | |
62232e45 DW |
368 | } else { |
369 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
370 | __func__, dimm_name, cmd_name, buf_len, | |
371 | offset); | |
372 | rc = -ENXIO; | |
373 | } | |
2eea6582 | 374 | } else { |
62232e45 | 375 | rc = 0; |
2eea6582 | 376 | if (cmd_rc) |
d6eb270c | 377 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
2eea6582 | 378 | } |
62232e45 DW |
379 | |
380 | out: | |
381 | ACPI_FREE(out_obj); | |
382 | ||
383 | return rc; | |
b94d5230 | 384 | } |
a7de92da | 385 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
b94d5230 DW |
386 | |
387 | static const char *spa_type_name(u16 type) | |
388 | { | |
389 | static const char *to_name[] = { | |
390 | [NFIT_SPA_VOLATILE] = "volatile", | |
391 | [NFIT_SPA_PM] = "pmem", | |
392 | [NFIT_SPA_DCR] = "dimm-control-region", | |
393 | [NFIT_SPA_BDW] = "block-data-window", | |
394 | [NFIT_SPA_VDISK] = "volatile-disk", | |
395 | [NFIT_SPA_VCD] = "volatile-cd", | |
396 | [NFIT_SPA_PDISK] = "persistent-disk", | |
397 | [NFIT_SPA_PCD] = "persistent-cd", | |
398 | ||
399 | }; | |
400 | ||
401 | if (type > NFIT_SPA_PCD) | |
402 | return "unknown"; | |
403 | ||
404 | return to_name[type]; | |
405 | } | |
406 | ||
6839a6d9 | 407 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 DW |
408 | { |
409 | int i; | |
410 | ||
411 | for (i = 0; i < NFIT_UUID_MAX; i++) | |
41c8bdb3 | 412 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
b94d5230 DW |
413 | return i; |
414 | return -1; | |
415 | } | |
416 | ||
417 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 418 | struct nfit_table_prev *prev, |
b94d5230 DW |
419 | struct acpi_nfit_system_address *spa) |
420 | { | |
421 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
422 | struct nfit_spa *nfit_spa; |
423 | ||
31932041 DW |
424 | if (spa->header.length != sizeof(*spa)) |
425 | return false; | |
426 | ||
20985164 | 427 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
31932041 | 428 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
20985164 VV |
429 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
430 | return true; | |
431 | } | |
432 | } | |
b94d5230 | 433 | |
31932041 DW |
434 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
435 | GFP_KERNEL); | |
b94d5230 DW |
436 | if (!nfit_spa) |
437 | return false; | |
438 | INIT_LIST_HEAD(&nfit_spa->list); | |
31932041 | 439 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
b94d5230 DW |
440 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
441 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, | |
442 | spa->range_index, | |
443 | spa_type_name(nfit_spa_type(spa))); | |
444 | return true; | |
445 | } | |
446 | ||
447 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 448 | struct nfit_table_prev *prev, |
b94d5230 DW |
449 | struct acpi_nfit_memory_map *memdev) |
450 | { | |
451 | struct device *dev = acpi_desc->dev; | |
20985164 | 452 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 453 | |
31932041 DW |
454 | if (memdev->header.length != sizeof(*memdev)) |
455 | return false; | |
456 | ||
20985164 | 457 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 458 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
459 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
460 | return true; | |
461 | } | |
462 | ||
31932041 DW |
463 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
464 | GFP_KERNEL); | |
b94d5230 DW |
465 | if (!nfit_memdev) |
466 | return false; | |
467 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 468 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 | 469 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
caa603aa | 470 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
b94d5230 | 471 | __func__, memdev->device_handle, memdev->range_index, |
caa603aa | 472 | memdev->region_index, memdev->flags); |
b94d5230 DW |
473 | return true; |
474 | } | |
475 | ||
31932041 DW |
476 | /* |
477 | * An implementation may provide a truncated control region if no block windows | |
478 | * are defined. | |
479 | */ | |
480 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
481 | { | |
482 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
483 | window_size)) | |
484 | return 0; | |
485 | if (dcr->windows) | |
486 | return sizeof(*dcr); | |
487 | return offsetof(struct acpi_nfit_control_region, window_size); | |
488 | } | |
489 | ||
b94d5230 | 490 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 491 | struct nfit_table_prev *prev, |
b94d5230 DW |
492 | struct acpi_nfit_control_region *dcr) |
493 | { | |
494 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
495 | struct nfit_dcr *nfit_dcr; |
496 | ||
31932041 DW |
497 | if (!sizeof_dcr(dcr)) |
498 | return false; | |
499 | ||
20985164 | 500 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 501 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
502 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
503 | return true; | |
504 | } | |
b94d5230 | 505 | |
31932041 DW |
506 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
507 | GFP_KERNEL); | |
b94d5230 DW |
508 | if (!nfit_dcr) |
509 | return false; | |
510 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 511 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 DW |
512 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
513 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, | |
514 | dcr->region_index, dcr->windows); | |
515 | return true; | |
516 | } | |
517 | ||
518 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 519 | struct nfit_table_prev *prev, |
b94d5230 DW |
520 | struct acpi_nfit_data_region *bdw) |
521 | { | |
522 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
523 | struct nfit_bdw *nfit_bdw; |
524 | ||
31932041 DW |
525 | if (bdw->header.length != sizeof(*bdw)) |
526 | return false; | |
20985164 | 527 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 528 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
529 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
530 | return true; | |
531 | } | |
b94d5230 | 532 | |
31932041 DW |
533 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
534 | GFP_KERNEL); | |
b94d5230 DW |
535 | if (!nfit_bdw) |
536 | return false; | |
537 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 538 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 DW |
539 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
540 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, | |
541 | bdw->region_index, bdw->windows); | |
542 | return true; | |
543 | } | |
544 | ||
31932041 DW |
545 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
546 | { | |
547 | if (idt->header.length < sizeof(*idt)) | |
548 | return 0; | |
549 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); | |
550 | } | |
551 | ||
047fc8a1 | 552 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 553 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
554 | struct acpi_nfit_interleave *idt) |
555 | { | |
556 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
557 | struct nfit_idt *nfit_idt; |
558 | ||
31932041 DW |
559 | if (!sizeof_idt(idt)) |
560 | return false; | |
561 | ||
562 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
563 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
564 | continue; | |
565 | ||
566 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
567 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
568 | return true; | |
569 | } | |
31932041 | 570 | } |
047fc8a1 | 571 | |
31932041 DW |
572 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
573 | GFP_KERNEL); | |
047fc8a1 RZ |
574 | if (!nfit_idt) |
575 | return false; | |
576 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 577 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 RZ |
578 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
579 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, | |
580 | idt->interleave_index, idt->line_count); | |
581 | return true; | |
582 | } | |
583 | ||
31932041 DW |
584 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
585 | { | |
586 | if (flush->header.length < sizeof(*flush)) | |
587 | return 0; | |
588 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); | |
589 | } | |
590 | ||
c2ad2954 | 591 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 592 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
593 | struct acpi_nfit_flush_address *flush) |
594 | { | |
595 | struct device *dev = acpi_desc->dev; | |
20985164 | 596 | struct nfit_flush *nfit_flush; |
c2ad2954 | 597 | |
31932041 DW |
598 | if (!sizeof_flush(flush)) |
599 | return false; | |
600 | ||
601 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
602 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
603 | continue; | |
604 | ||
605 | if (memcmp(nfit_flush->flush, flush, | |
606 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
607 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
608 | return true; | |
609 | } | |
31932041 | 610 | } |
20985164 | 611 | |
31932041 DW |
612 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
613 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
614 | if (!nfit_flush) |
615 | return false; | |
616 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 617 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 RZ |
618 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
619 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, | |
620 | flush->device_handle, flush->hint_count); | |
621 | return true; | |
622 | } | |
623 | ||
20985164 VV |
624 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
625 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
626 | { |
627 | struct device *dev = acpi_desc->dev; | |
628 | struct acpi_nfit_header *hdr; | |
629 | void *err = ERR_PTR(-ENOMEM); | |
630 | ||
631 | if (table >= end) | |
632 | return NULL; | |
633 | ||
634 | hdr = table; | |
564d5011 VV |
635 | if (!hdr->length) { |
636 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
637 | hdr->type); | |
638 | return NULL; | |
639 | } | |
640 | ||
b94d5230 DW |
641 | switch (hdr->type) { |
642 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 643 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
644 | return err; |
645 | break; | |
646 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 647 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
648 | return err; |
649 | break; | |
650 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 651 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
652 | return err; |
653 | break; | |
654 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 655 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
656 | return err; |
657 | break; | |
b94d5230 | 658 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 659 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 660 | return err; |
b94d5230 DW |
661 | break; |
662 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 663 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 664 | return err; |
b94d5230 DW |
665 | break; |
666 | case ACPI_NFIT_TYPE_SMBIOS: | |
667 | dev_dbg(dev, "%s: smbios\n", __func__); | |
668 | break; | |
669 | default: | |
670 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
671 | break; | |
672 | } | |
673 | ||
674 | return table + hdr->length; | |
675 | } | |
676 | ||
677 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, | |
678 | struct nfit_mem *nfit_mem) | |
679 | { | |
680 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
681 | u16 dcr = nfit_mem->dcr->region_index; | |
682 | struct nfit_spa *nfit_spa; | |
683 | ||
684 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
685 | u16 range_index = nfit_spa->spa->range_index; | |
686 | int type = nfit_spa_type(nfit_spa->spa); | |
687 | struct nfit_memdev *nfit_memdev; | |
688 | ||
689 | if (type != NFIT_SPA_BDW) | |
690 | continue; | |
691 | ||
692 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
693 | if (nfit_memdev->memdev->range_index != range_index) | |
694 | continue; | |
695 | if (nfit_memdev->memdev->device_handle != device_handle) | |
696 | continue; | |
697 | if (nfit_memdev->memdev->region_index != dcr) | |
698 | continue; | |
699 | ||
700 | nfit_mem->spa_bdw = nfit_spa->spa; | |
701 | return; | |
702 | } | |
703 | } | |
704 | ||
705 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", | |
706 | nfit_mem->spa_dcr->range_index); | |
707 | nfit_mem->bdw = NULL; | |
708 | } | |
709 | ||
6697b2cf | 710 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
711 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
712 | { | |
713 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; | |
047fc8a1 | 714 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 715 | struct nfit_bdw *nfit_bdw; |
047fc8a1 RZ |
716 | struct nfit_idt *nfit_idt; |
717 | u16 idt_idx, range_index; | |
b94d5230 | 718 | |
b94d5230 DW |
719 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
720 | if (nfit_bdw->bdw->region_index != dcr) | |
721 | continue; | |
722 | nfit_mem->bdw = nfit_bdw->bdw; | |
723 | break; | |
724 | } | |
725 | ||
726 | if (!nfit_mem->bdw) | |
6697b2cf | 727 | return; |
b94d5230 DW |
728 | |
729 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); | |
047fc8a1 RZ |
730 | |
731 | if (!nfit_mem->spa_bdw) | |
6697b2cf | 732 | return; |
047fc8a1 RZ |
733 | |
734 | range_index = nfit_mem->spa_bdw->range_index; | |
735 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
736 | if (nfit_memdev->memdev->range_index != range_index || | |
737 | nfit_memdev->memdev->region_index != dcr) | |
738 | continue; | |
739 | nfit_mem->memdev_bdw = nfit_memdev->memdev; | |
740 | idt_idx = nfit_memdev->memdev->interleave_index; | |
741 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
742 | if (nfit_idt->idt->interleave_index != idt_idx) | |
743 | continue; | |
744 | nfit_mem->idt_bdw = nfit_idt->idt; | |
745 | break; | |
746 | } | |
747 | break; | |
748 | } | |
b94d5230 DW |
749 | } |
750 | ||
1499934d | 751 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
752 | struct acpi_nfit_system_address *spa) |
753 | { | |
754 | struct nfit_mem *nfit_mem, *found; | |
755 | struct nfit_memdev *nfit_memdev; | |
1499934d | 756 | int type = spa ? nfit_spa_type(spa) : 0; |
b94d5230 DW |
757 | |
758 | switch (type) { | |
759 | case NFIT_SPA_DCR: | |
760 | case NFIT_SPA_PM: | |
761 | break; | |
762 | default: | |
1499934d DW |
763 | if (spa) |
764 | return 0; | |
b94d5230 DW |
765 | } |
766 | ||
1499934d DW |
767 | /* |
768 | * This loop runs in two modes, when a dimm is mapped the loop | |
769 | * adds memdev associations to an existing dimm, or creates a | |
770 | * dimm. In the unmapped dimm case this loop sweeps for memdev | |
771 | * instances with an invalid / zero range_index and adds those | |
772 | * dimms without spa associations. | |
773 | */ | |
b94d5230 | 774 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
ad9ac5e1 | 775 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
776 | struct nfit_dcr *nfit_dcr; |
777 | u32 device_handle; | |
778 | u16 dcr; | |
b94d5230 | 779 | |
1499934d DW |
780 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
781 | continue; | |
782 | if (!spa && nfit_memdev->memdev->range_index) | |
b94d5230 DW |
783 | continue; |
784 | found = NULL; | |
785 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 786 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 787 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
788 | if (__to_nfit_memdev(nfit_mem)->device_handle |
789 | == device_handle) { | |
b94d5230 DW |
790 | found = nfit_mem; |
791 | break; | |
792 | } | |
793 | ||
794 | if (found) | |
795 | nfit_mem = found; | |
796 | else { | |
797 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
798 | sizeof(*nfit_mem), GFP_KERNEL); | |
799 | if (!nfit_mem) | |
800 | return -ENOMEM; | |
801 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 802 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
803 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
804 | } | |
805 | ||
806 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
807 | if (nfit_dcr->dcr->region_index != dcr) | |
808 | continue; | |
809 | /* | |
810 | * Record the control region for the dimm. For | |
811 | * the ACPI 6.1 case, where there are separate | |
812 | * control regions for the pmem vs blk | |
813 | * interfaces, be sure to record the extended | |
814 | * blk details. | |
815 | */ | |
816 | if (!nfit_mem->dcr) | |
817 | nfit_mem->dcr = nfit_dcr->dcr; | |
818 | else if (nfit_mem->dcr->windows == 0 | |
819 | && nfit_dcr->dcr->windows) | |
820 | nfit_mem->dcr = nfit_dcr->dcr; | |
821 | break; | |
822 | } | |
823 | ||
ad9ac5e1 | 824 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
825 | struct acpi_nfit_flush_address *flush; |
826 | u16 i; | |
827 | ||
ad9ac5e1 DW |
828 | if (nfit_flush->flush->device_handle != device_handle) |
829 | continue; | |
830 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 DW |
831 | flush = nfit_flush->flush; |
832 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, | |
833 | flush->hint_count | |
834 | * sizeof(struct resource), GFP_KERNEL); | |
835 | if (!nfit_mem->flush_wpq) | |
836 | return -ENOMEM; | |
837 | for (i = 0; i < flush->hint_count; i++) { | |
838 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
839 | ||
840 | res->start = flush->hint_address[i]; | |
841 | res->end = res->start + 8 - 1; | |
842 | } | |
ad9ac5e1 DW |
843 | break; |
844 | } | |
845 | ||
6697b2cf DW |
846 | if (dcr && !nfit_mem->dcr) { |
847 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
848 | spa->range_index, dcr); | |
849 | return -ENODEV; | |
b94d5230 DW |
850 | } |
851 | ||
852 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
853 | struct nfit_idt *nfit_idt; |
854 | u16 idt_idx; | |
855 | ||
b94d5230 DW |
856 | /* multiple dimms may share a SPA when interleaved */ |
857 | nfit_mem->spa_dcr = spa; | |
858 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
859 | idt_idx = nfit_memdev->memdev->interleave_index; |
860 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
861 | if (nfit_idt->idt->interleave_index != idt_idx) | |
862 | continue; | |
863 | nfit_mem->idt_dcr = nfit_idt->idt; | |
864 | break; | |
865 | } | |
6697b2cf | 866 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
1499934d | 867 | } else if (type == NFIT_SPA_PM) { |
b94d5230 DW |
868 | /* |
869 | * A single dimm may belong to multiple SPA-PM | |
870 | * ranges, record at least one in addition to | |
871 | * any SPA-DCR range. | |
872 | */ | |
873 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
1499934d DW |
874 | } else |
875 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
b94d5230 DW |
876 | } |
877 | ||
878 | return 0; | |
879 | } | |
880 | ||
881 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) | |
882 | { | |
883 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
884 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
885 | u32 handleA, handleB; | |
886 | ||
887 | handleA = __to_nfit_memdev(a)->device_handle; | |
888 | handleB = __to_nfit_memdev(b)->device_handle; | |
889 | if (handleA < handleB) | |
890 | return -1; | |
891 | else if (handleA > handleB) | |
892 | return 1; | |
893 | return 0; | |
894 | } | |
895 | ||
896 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
897 | { | |
898 | struct nfit_spa *nfit_spa; | |
1499934d DW |
899 | int rc; |
900 | ||
b94d5230 DW |
901 | |
902 | /* | |
903 | * For each SPA-DCR or SPA-PMEM address range find its | |
904 | * corresponding MEMDEV(s). From each MEMDEV find the | |
905 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
906 | * try to find a SPA-BDW and a corresponding BDW that references | |
907 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
908 | * BDWs are optional. | |
909 | */ | |
910 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
1499934d | 911 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
b94d5230 DW |
912 | if (rc) |
913 | return rc; | |
914 | } | |
915 | ||
1499934d DW |
916 | /* |
917 | * If a DIMM has failed to be mapped into SPA there will be no | |
918 | * SPA entries above. Find and register all the unmapped DIMMs | |
919 | * for reporting and recovery purposes. | |
920 | */ | |
921 | rc = __nfit_mem_init(acpi_desc, NULL); | |
922 | if (rc) | |
923 | return rc; | |
924 | ||
b94d5230 DW |
925 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
926 | ||
927 | return 0; | |
928 | } | |
929 | ||
45def22c DW |
930 | static ssize_t revision_show(struct device *dev, |
931 | struct device_attribute *attr, char *buf) | |
932 | { | |
933 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
934 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
935 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
936 | ||
6b577c9d | 937 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
938 | } |
939 | static DEVICE_ATTR_RO(revision); | |
940 | ||
9ffd6350 VV |
941 | static ssize_t hw_error_scrub_show(struct device *dev, |
942 | struct device_attribute *attr, char *buf) | |
943 | { | |
944 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
945 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
946 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
947 | ||
948 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
949 | } | |
950 | ||
951 | /* | |
952 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
953 | * '0': Switch to the default mode where an exception will only insert | |
954 | * the address of the memory error into the poison and badblocks lists. | |
955 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
956 | * received. | |
957 | */ | |
958 | static ssize_t hw_error_scrub_store(struct device *dev, | |
959 | struct device_attribute *attr, const char *buf, size_t size) | |
960 | { | |
961 | struct nvdimm_bus_descriptor *nd_desc; | |
962 | ssize_t rc; | |
963 | long val; | |
964 | ||
965 | rc = kstrtol(buf, 0, &val); | |
966 | if (rc) | |
967 | return rc; | |
968 | ||
969 | device_lock(dev); | |
970 | nd_desc = dev_get_drvdata(dev); | |
971 | if (nd_desc) { | |
972 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
973 | ||
974 | switch (val) { | |
975 | case HW_ERROR_SCRUB_ON: | |
976 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
977 | break; | |
978 | case HW_ERROR_SCRUB_OFF: | |
979 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
980 | break; | |
981 | default: | |
982 | rc = -EINVAL; | |
983 | break; | |
984 | } | |
985 | } | |
986 | device_unlock(dev); | |
987 | if (rc) | |
988 | return rc; | |
989 | return size; | |
990 | } | |
991 | static DEVICE_ATTR_RW(hw_error_scrub); | |
992 | ||
37b137ff VV |
993 | /* |
994 | * This shows the number of full Address Range Scrubs that have been | |
995 | * completed since driver load time. Userspace can wait on this using | |
996 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
997 | */ | |
998 | static ssize_t scrub_show(struct device *dev, | |
999 | struct device_attribute *attr, char *buf) | |
1000 | { | |
1001 | struct nvdimm_bus_descriptor *nd_desc; | |
1002 | ssize_t rc = -ENXIO; | |
1003 | ||
1004 | device_lock(dev); | |
1005 | nd_desc = dev_get_drvdata(dev); | |
1006 | if (nd_desc) { | |
1007 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1008 | ||
1009 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, | |
1010 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); | |
1011 | } | |
1012 | device_unlock(dev); | |
1013 | return rc; | |
1014 | } | |
1015 | ||
37b137ff VV |
1016 | static ssize_t scrub_store(struct device *dev, |
1017 | struct device_attribute *attr, const char *buf, size_t size) | |
1018 | { | |
1019 | struct nvdimm_bus_descriptor *nd_desc; | |
1020 | ssize_t rc; | |
1021 | long val; | |
1022 | ||
1023 | rc = kstrtol(buf, 0, &val); | |
1024 | if (rc) | |
1025 | return rc; | |
1026 | if (val != 1) | |
1027 | return -EINVAL; | |
1028 | ||
1029 | device_lock(dev); | |
1030 | nd_desc = dev_get_drvdata(dev); | |
1031 | if (nd_desc) { | |
1032 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1033 | ||
1034 | rc = acpi_nfit_ars_rescan(acpi_desc); | |
1035 | } | |
1036 | device_unlock(dev); | |
1037 | if (rc) | |
1038 | return rc; | |
1039 | return size; | |
1040 | } | |
1041 | static DEVICE_ATTR_RW(scrub); | |
1042 | ||
1043 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
1044 | { | |
1045 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1046 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
1047 | | 1 << ND_CMD_ARS_STATUS; | |
1048 | ||
1049 | return (nd_desc->cmd_mask & mask) == mask; | |
1050 | } | |
1051 | ||
1052 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1053 | { | |
1054 | struct device *dev = container_of(kobj, struct device, kobj); | |
1055 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1056 | ||
1057 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) | |
1058 | return 0; | |
1059 | return a->mode; | |
1060 | } | |
1061 | ||
45def22c DW |
1062 | static struct attribute *acpi_nfit_attributes[] = { |
1063 | &dev_attr_revision.attr, | |
37b137ff | 1064 | &dev_attr_scrub.attr, |
9ffd6350 | 1065 | &dev_attr_hw_error_scrub.attr, |
45def22c DW |
1066 | NULL, |
1067 | }; | |
1068 | ||
5e93746f | 1069 | static const struct attribute_group acpi_nfit_attribute_group = { |
45def22c DW |
1070 | .name = "nfit", |
1071 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1072 | .is_visible = nfit_visible, |
45def22c DW |
1073 | }; |
1074 | ||
a61fe6f7 | 1075 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1076 | &nvdimm_bus_attribute_group, |
1077 | &acpi_nfit_attribute_group, | |
1078 | NULL, | |
1079 | }; | |
1080 | ||
e6dfb2de DW |
1081 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1082 | { | |
1083 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1084 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1085 | ||
1086 | return __to_nfit_memdev(nfit_mem); | |
1087 | } | |
1088 | ||
1089 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1090 | { | |
1091 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1092 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1093 | ||
1094 | return nfit_mem->dcr; | |
1095 | } | |
1096 | ||
1097 | static ssize_t handle_show(struct device *dev, | |
1098 | struct device_attribute *attr, char *buf) | |
1099 | { | |
1100 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1101 | ||
1102 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1103 | } | |
1104 | static DEVICE_ATTR_RO(handle); | |
1105 | ||
1106 | static ssize_t phys_id_show(struct device *dev, | |
1107 | struct device_attribute *attr, char *buf) | |
1108 | { | |
1109 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1110 | ||
1111 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1112 | } | |
1113 | static DEVICE_ATTR_RO(phys_id); | |
1114 | ||
1115 | static ssize_t vendor_show(struct device *dev, | |
1116 | struct device_attribute *attr, char *buf) | |
1117 | { | |
1118 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1119 | ||
5ad9a7fd | 1120 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1121 | } |
1122 | static DEVICE_ATTR_RO(vendor); | |
1123 | ||
1124 | static ssize_t rev_id_show(struct device *dev, | |
1125 | struct device_attribute *attr, char *buf) | |
1126 | { | |
1127 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1128 | ||
5ad9a7fd | 1129 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1130 | } |
1131 | static DEVICE_ATTR_RO(rev_id); | |
1132 | ||
1133 | static ssize_t device_show(struct device *dev, | |
1134 | struct device_attribute *attr, char *buf) | |
1135 | { | |
1136 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1137 | ||
5ad9a7fd | 1138 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1139 | } |
1140 | static DEVICE_ATTR_RO(device); | |
1141 | ||
6ca72085 DW |
1142 | static ssize_t subsystem_vendor_show(struct device *dev, |
1143 | struct device_attribute *attr, char *buf) | |
1144 | { | |
1145 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1146 | ||
1147 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1148 | } | |
1149 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1150 | ||
1151 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1152 | struct device_attribute *attr, char *buf) | |
1153 | { | |
1154 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1155 | ||
1156 | return sprintf(buf, "0x%04x\n", | |
1157 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1158 | } | |
1159 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1160 | ||
1161 | static ssize_t subsystem_device_show(struct device *dev, | |
1162 | struct device_attribute *attr, char *buf) | |
1163 | { | |
1164 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1165 | ||
1166 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1167 | } | |
1168 | static DEVICE_ATTR_RO(subsystem_device); | |
1169 | ||
8cc6ddfc DW |
1170 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1171 | { | |
1172 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1173 | int formats = 0; | |
1174 | ||
1175 | if (nfit_mem->memdev_pmem) | |
1176 | formats++; | |
1177 | if (nfit_mem->memdev_bdw) | |
1178 | formats++; | |
1179 | return formats; | |
1180 | } | |
1181 | ||
e6dfb2de DW |
1182 | static ssize_t format_show(struct device *dev, |
1183 | struct device_attribute *attr, char *buf) | |
1184 | { | |
1185 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1186 | ||
1bcbf42d | 1187 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1188 | } |
1189 | static DEVICE_ATTR_RO(format); | |
1190 | ||
8cc6ddfc DW |
1191 | static ssize_t format1_show(struct device *dev, |
1192 | struct device_attribute *attr, char *buf) | |
1193 | { | |
1194 | u32 handle; | |
1195 | ssize_t rc = -ENXIO; | |
1196 | struct nfit_mem *nfit_mem; | |
1197 | struct nfit_memdev *nfit_memdev; | |
1198 | struct acpi_nfit_desc *acpi_desc; | |
1199 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1200 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1201 | ||
1202 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1203 | acpi_desc = nfit_mem->acpi_desc; | |
1204 | handle = to_nfit_memdev(dev)->device_handle; | |
1205 | ||
1206 | /* assumes DIMMs have at most 2 published interface codes */ | |
1207 | mutex_lock(&acpi_desc->init_mutex); | |
1208 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1209 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1210 | struct nfit_dcr *nfit_dcr; | |
1211 | ||
1212 | if (memdev->device_handle != handle) | |
1213 | continue; | |
1214 | ||
1215 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1216 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1217 | continue; | |
1218 | if (nfit_dcr->dcr->code == dcr->code) | |
1219 | continue; | |
1bcbf42d DW |
1220 | rc = sprintf(buf, "0x%04x\n", |
1221 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1222 | break; |
1223 | } | |
1224 | if (rc != ENXIO) | |
1225 | break; | |
1226 | } | |
1227 | mutex_unlock(&acpi_desc->init_mutex); | |
1228 | return rc; | |
1229 | } | |
1230 | static DEVICE_ATTR_RO(format1); | |
1231 | ||
1232 | static ssize_t formats_show(struct device *dev, | |
1233 | struct device_attribute *attr, char *buf) | |
1234 | { | |
1235 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1236 | ||
1237 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1238 | } | |
1239 | static DEVICE_ATTR_RO(formats); | |
1240 | ||
e6dfb2de DW |
1241 | static ssize_t serial_show(struct device *dev, |
1242 | struct device_attribute *attr, char *buf) | |
1243 | { | |
1244 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1245 | ||
5ad9a7fd | 1246 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1247 | } |
1248 | static DEVICE_ATTR_RO(serial); | |
1249 | ||
a94e3fbe DW |
1250 | static ssize_t family_show(struct device *dev, |
1251 | struct device_attribute *attr, char *buf) | |
1252 | { | |
1253 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1254 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1255 | ||
1256 | if (nfit_mem->family < 0) | |
1257 | return -ENXIO; | |
1258 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1259 | } | |
1260 | static DEVICE_ATTR_RO(family); | |
1261 | ||
1262 | static ssize_t dsm_mask_show(struct device *dev, | |
1263 | struct device_attribute *attr, char *buf) | |
1264 | { | |
1265 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1266 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1267 | ||
1268 | if (nfit_mem->family < 0) | |
1269 | return -ENXIO; | |
1270 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1271 | } | |
1272 | static DEVICE_ATTR_RO(dsm_mask); | |
1273 | ||
58138820 DW |
1274 | static ssize_t flags_show(struct device *dev, |
1275 | struct device_attribute *attr, char *buf) | |
1276 | { | |
1277 | u16 flags = to_nfit_memdev(dev)->flags; | |
1278 | ||
ffab9385 | 1279 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
402bae59 TK |
1280 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1281 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1282 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1283 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
ffab9385 DW |
1284 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
1285 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", | |
1286 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); | |
58138820 DW |
1287 | } |
1288 | static DEVICE_ATTR_RO(flags); | |
1289 | ||
38a879ba TK |
1290 | static ssize_t id_show(struct device *dev, |
1291 | struct device_attribute *attr, char *buf) | |
1292 | { | |
1293 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1294 | ||
1295 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1296 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", | |
1297 | be16_to_cpu(dcr->vendor_id), | |
1298 | dcr->manufacturing_location, | |
1299 | be16_to_cpu(dcr->manufacturing_date), | |
1300 | be32_to_cpu(dcr->serial_number)); | |
1301 | else | |
1302 | return sprintf(buf, "%04x-%08x\n", | |
1303 | be16_to_cpu(dcr->vendor_id), | |
1304 | be32_to_cpu(dcr->serial_number)); | |
1305 | } | |
1306 | static DEVICE_ATTR_RO(id); | |
1307 | ||
e6dfb2de DW |
1308 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1309 | &dev_attr_handle.attr, | |
1310 | &dev_attr_phys_id.attr, | |
1311 | &dev_attr_vendor.attr, | |
1312 | &dev_attr_device.attr, | |
6ca72085 DW |
1313 | &dev_attr_rev_id.attr, |
1314 | &dev_attr_subsystem_vendor.attr, | |
1315 | &dev_attr_subsystem_device.attr, | |
1316 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1317 | &dev_attr_format.attr, |
8cc6ddfc DW |
1318 | &dev_attr_formats.attr, |
1319 | &dev_attr_format1.attr, | |
e6dfb2de | 1320 | &dev_attr_serial.attr, |
58138820 | 1321 | &dev_attr_flags.attr, |
38a879ba | 1322 | &dev_attr_id.attr, |
a94e3fbe DW |
1323 | &dev_attr_family.attr, |
1324 | &dev_attr_dsm_mask.attr, | |
e6dfb2de DW |
1325 | NULL, |
1326 | }; | |
1327 | ||
1328 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1329 | struct attribute *a, int n) | |
1330 | { | |
1331 | struct device *dev = container_of(kobj, struct device, kobj); | |
8cc6ddfc | 1332 | struct nvdimm *nvdimm = to_nvdimm(dev); |
e6dfb2de | 1333 | |
1499934d DW |
1334 | if (!to_nfit_dcr(dev)) { |
1335 | /* Without a dcr only the memdev attributes can be surfaced */ | |
1336 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr | |
1337 | || a == &dev_attr_flags.attr | |
1338 | || a == &dev_attr_family.attr | |
1339 | || a == &dev_attr_dsm_mask.attr) | |
1340 | return a->mode; | |
8cc6ddfc | 1341 | return 0; |
1499934d DW |
1342 | } |
1343 | ||
8cc6ddfc | 1344 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
e6dfb2de | 1345 | return 0; |
8cc6ddfc | 1346 | return a->mode; |
e6dfb2de DW |
1347 | } |
1348 | ||
5e93746f | 1349 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
e6dfb2de DW |
1350 | .name = "nfit", |
1351 | .attrs = acpi_nfit_dimm_attributes, | |
1352 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1353 | }; | |
1354 | ||
1355 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
62232e45 | 1356 | &nvdimm_attribute_group, |
4d88a97a | 1357 | &nd_device_attribute_group, |
e6dfb2de DW |
1358 | &acpi_nfit_dimm_attribute_group, |
1359 | NULL, | |
1360 | }; | |
1361 | ||
1362 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1363 | u32 device_handle) | |
1364 | { | |
1365 | struct nfit_mem *nfit_mem; | |
1366 | ||
1367 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1368 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1369 | return nfit_mem->nvdimm; | |
1370 | ||
1371 | return NULL; | |
1372 | } | |
1373 | ||
231bf117 | 1374 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1375 | { |
1376 | struct nfit_mem *nfit_mem; | |
1377 | struct acpi_nfit_desc *acpi_desc; | |
1378 | ||
1379 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, | |
1380 | event); | |
1381 | ||
1382 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1383 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1384 | event); | |
1385 | return; | |
1386 | } | |
1387 | ||
1388 | acpi_desc = dev_get_drvdata(dev->parent); | |
1389 | if (!acpi_desc) | |
1390 | return; | |
1391 | ||
1392 | /* | |
1393 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1394 | * is still valid. | |
1395 | */ | |
1396 | nfit_mem = dev_get_drvdata(dev); | |
1397 | if (nfit_mem && nfit_mem->flags_attr) | |
1398 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1399 | } | |
231bf117 | 1400 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1401 | |
1402 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1403 | { | |
1404 | struct acpi_device *adev = data; | |
1405 | struct device *dev = &adev->dev; | |
1406 | ||
1407 | device_lock(dev->parent); | |
1408 | __acpi_nvdimm_notify(dev, event); | |
1409 | device_unlock(dev->parent); | |
1410 | } | |
1411 | ||
62232e45 DW |
1412 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1413 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1414 | { | |
1415 | struct acpi_device *adev, *adev_dimm; | |
1416 | struct device *dev = acpi_desc->dev; | |
31eca76b | 1417 | unsigned long dsm_mask; |
41c8bdb3 | 1418 | const guid_t *guid; |
60e95f43 | 1419 | int i; |
ba650cfc | 1420 | int family = -1; |
62232e45 | 1421 | |
e3654eca DW |
1422 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1423 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1424 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
62232e45 DW |
1425 | adev = to_acpi_dev(acpi_desc); |
1426 | if (!adev) | |
1427 | return 0; | |
1428 | ||
1429 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1430 | nfit_mem->adev = adev_dimm; | |
1431 | if (!adev_dimm) { | |
1432 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1433 | device_handle); | |
4d88a97a | 1434 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1435 | } |
1436 | ||
ba9c8dd3 DW |
1437 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1438 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1439 | dev_err(dev, "%s: notification registration failed\n", | |
1440 | dev_name(&adev_dimm->dev)); | |
1441 | return -ENXIO; | |
1442 | } | |
1443 | ||
31eca76b | 1444 | /* |
e02fb726 | 1445 | * Until standardization materializes we need to consider 4 |
a7225598 | 1446 | * different command sets. Note, that checking for function0 (bit0) |
41c8bdb3 | 1447 | * tells us if any commands are reachable through this GUID. |
31eca76b | 1448 | */ |
e02fb726 | 1449 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
a7225598 | 1450 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
ba650cfc LK |
1451 | if (family < 0 || i == default_dsm_family) |
1452 | family = i; | |
31eca76b DW |
1453 | |
1454 | /* limit the supported commands to those that are publicly documented */ | |
ba650cfc | 1455 | nfit_mem->family = family; |
095ab4b3 LK |
1456 | if (override_dsm_mask && !disable_vendor_specific) |
1457 | dsm_mask = override_dsm_mask; | |
1458 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { | |
31eca76b | 1459 | dsm_mask = 0x3fe; |
87554098 DW |
1460 | if (disable_vendor_specific) |
1461 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1462 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1463 | dsm_mask = 0x1c3c76; |
e02fb726 | 1464 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1465 | dsm_mask = 0x1fe; |
87554098 DW |
1466 | if (disable_vendor_specific) |
1467 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1468 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1469 | dsm_mask = 0xffffffff; | |
87554098 | 1470 | } else { |
a7225598 | 1471 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1472 | nfit_mem->family = -1; |
a7225598 DW |
1473 | /* DSMs are optional, continue loading the driver... */ |
1474 | return 0; | |
31eca76b DW |
1475 | } |
1476 | ||
41c8bdb3 | 1477 | guid = to_nfit_uuid(nfit_mem->family); |
31eca76b | 1478 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
94116f81 | 1479 | if (acpi_check_dsm(adev_dimm->handle, guid, 1, 1ULL << i)) |
62232e45 DW |
1480 | set_bit(i, &nfit_mem->dsm_mask); |
1481 | ||
60e95f43 | 1482 | return 0; |
62232e45 DW |
1483 | } |
1484 | ||
ba9c8dd3 DW |
1485 | static void shutdown_dimm_notify(void *data) |
1486 | { | |
1487 | struct acpi_nfit_desc *acpi_desc = data; | |
1488 | struct nfit_mem *nfit_mem; | |
1489 | ||
1490 | mutex_lock(&acpi_desc->init_mutex); | |
1491 | /* | |
1492 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1493 | * notifications. | |
1494 | */ | |
1495 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1496 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1497 | ||
ba9c8dd3 DW |
1498 | if (nfit_mem->flags_attr) { |
1499 | sysfs_put(nfit_mem->flags_attr); | |
1500 | nfit_mem->flags_attr = NULL; | |
1501 | } | |
231bf117 DW |
1502 | if (adev_dimm) |
1503 | acpi_remove_notify_handler(adev_dimm->handle, | |
1504 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
ba9c8dd3 DW |
1505 | } |
1506 | mutex_unlock(&acpi_desc->init_mutex); | |
1507 | } | |
1508 | ||
e6dfb2de DW |
1509 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
1510 | { | |
1511 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
1512 | int dimm_count = 0, rc; |
1513 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
1514 | |
1515 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 1516 | struct acpi_nfit_flush_address *flush; |
31eca76b | 1517 | unsigned long flags = 0, cmd_mask; |
caa603aa | 1518 | struct nfit_memdev *nfit_memdev; |
e6dfb2de | 1519 | u32 device_handle; |
58138820 | 1520 | u16 mem_flags; |
e6dfb2de DW |
1521 | |
1522 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
1523 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
1524 | if (nvdimm) { | |
20985164 | 1525 | dimm_count++; |
e6dfb2de DW |
1526 | continue; |
1527 | } | |
1528 | ||
1529 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) | |
8f078b38 | 1530 | set_bit(NDD_ALIASING, &flags); |
e6dfb2de | 1531 | |
caa603aa DW |
1532 | /* collate flags across all memdevs for this dimm */ |
1533 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1534 | struct acpi_nfit_memory_map *dimm_memdev; | |
1535 | ||
1536 | dimm_memdev = __to_nfit_memdev(nfit_mem); | |
1537 | if (dimm_memdev->device_handle | |
1538 | != nfit_memdev->memdev->device_handle) | |
1539 | continue; | |
1540 | dimm_memdev->flags |= nfit_memdev->memdev->flags; | |
1541 | } | |
1542 | ||
58138820 | 1543 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 1544 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
8f078b38 | 1545 | set_bit(NDD_UNARMED, &flags); |
58138820 | 1546 | |
62232e45 DW |
1547 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
1548 | if (rc) | |
1549 | continue; | |
1550 | ||
e3654eca | 1551 | /* |
31eca76b DW |
1552 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
1553 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
1554 | * userspace interface. | |
e3654eca | 1555 | */ |
31eca76b DW |
1556 | cmd_mask = 1UL << ND_CMD_CALL; |
1557 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
1558 | cmd_mask |= nfit_mem->dsm_mask; | |
1559 | ||
e5ae3b25 DW |
1560 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
1561 | : NULL; | |
e6dfb2de | 1562 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 1563 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 DW |
1564 | flags, cmd_mask, flush ? flush->hint_count : 0, |
1565 | nfit_mem->flush_wpq); | |
e6dfb2de DW |
1566 | if (!nvdimm) |
1567 | return -ENOMEM; | |
1568 | ||
1569 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 1570 | dimm_count++; |
58138820 DW |
1571 | |
1572 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
1573 | continue; | |
1574 | ||
1499934d | 1575 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n", |
58138820 | 1576 | nvdimm_name(nvdimm), |
402bae59 TK |
1577 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
1578 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
1579 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
1499934d DW |
1580 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
1581 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); | |
58138820 | 1582 | |
e6dfb2de DW |
1583 | } |
1584 | ||
ba9c8dd3 DW |
1585 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
1586 | if (rc) | |
1587 | return rc; | |
1588 | ||
1589 | /* | |
1590 | * Now that dimms are successfully registered, and async registration | |
1591 | * is flushed, attempt to enable event notification. | |
1592 | */ | |
1593 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
1594 | struct kernfs_node *nfit_kernfs; | |
1595 | ||
1596 | nvdimm = nfit_mem->nvdimm; | |
1597 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); | |
1598 | if (nfit_kernfs) | |
1599 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
1600 | "flags"); | |
1601 | sysfs_put(nfit_kernfs); | |
1602 | if (!nfit_mem->flags_attr) | |
1603 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
1604 | nvdimm_name(nvdimm)); | |
1605 | } | |
1606 | ||
1607 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
1608 | acpi_desc); | |
e6dfb2de DW |
1609 | } |
1610 | ||
62232e45 DW |
1611 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
1612 | { | |
1613 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
41c8bdb3 | 1614 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
62232e45 DW |
1615 | struct acpi_device *adev; |
1616 | int i; | |
1617 | ||
e3654eca | 1618 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
62232e45 DW |
1619 | adev = to_acpi_dev(acpi_desc); |
1620 | if (!adev) | |
1621 | return; | |
1622 | ||
d4f32367 | 1623 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
94116f81 | 1624 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
e3654eca | 1625 | set_bit(i, &nd_desc->cmd_mask); |
62232e45 DW |
1626 | } |
1627 | ||
1f7df6f8 DW |
1628 | static ssize_t range_index_show(struct device *dev, |
1629 | struct device_attribute *attr, char *buf) | |
1630 | { | |
1631 | struct nd_region *nd_region = to_nd_region(dev); | |
1632 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
1633 | ||
1634 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
1635 | } | |
1636 | static DEVICE_ATTR_RO(range_index); | |
1637 | ||
1638 | static struct attribute *acpi_nfit_region_attributes[] = { | |
1639 | &dev_attr_range_index.attr, | |
1640 | NULL, | |
1641 | }; | |
1642 | ||
5e93746f | 1643 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
1f7df6f8 DW |
1644 | .name = "nfit", |
1645 | .attrs = acpi_nfit_region_attributes, | |
1646 | }; | |
1647 | ||
1648 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1649 | &nd_region_attribute_group, | |
1650 | &nd_mapping_attribute_group, | |
3d88002e | 1651 | &nd_device_attribute_group, |
74ae66c3 | 1652 | &nd_numa_attribute_group, |
1f7df6f8 DW |
1653 | &acpi_nfit_region_attribute_group, |
1654 | NULL, | |
1655 | }; | |
1656 | ||
eaf96153 DW |
1657 | /* enough info to uniquely specify an interleave set */ |
1658 | struct nfit_set_info { | |
1659 | struct nfit_set_info_map { | |
1660 | u64 region_offset; | |
1661 | u32 serial_number; | |
1662 | u32 pad; | |
1663 | } mapping[0]; | |
1664 | }; | |
1665 | ||
c12c48ce DW |
1666 | struct nfit_set_info2 { |
1667 | struct nfit_set_info_map2 { | |
1668 | u64 region_offset; | |
1669 | u32 serial_number; | |
1670 | u16 vendor_id; | |
1671 | u16 manufacturing_date; | |
1672 | u8 manufacturing_location; | |
1673 | u8 reserved[31]; | |
1674 | } mapping[0]; | |
1675 | }; | |
1676 | ||
eaf96153 DW |
1677 | static size_t sizeof_nfit_set_info(int num_mappings) |
1678 | { | |
1679 | return sizeof(struct nfit_set_info) | |
1680 | + num_mappings * sizeof(struct nfit_set_info_map); | |
1681 | } | |
1682 | ||
c12c48ce DW |
1683 | static size_t sizeof_nfit_set_info2(int num_mappings) |
1684 | { | |
1685 | return sizeof(struct nfit_set_info2) | |
1686 | + num_mappings * sizeof(struct nfit_set_info_map2); | |
1687 | } | |
1688 | ||
86ef58a4 | 1689 | static int cmp_map_compat(const void *m0, const void *m1) |
eaf96153 DW |
1690 | { |
1691 | const struct nfit_set_info_map *map0 = m0; | |
1692 | const struct nfit_set_info_map *map1 = m1; | |
1693 | ||
1694 | return memcmp(&map0->region_offset, &map1->region_offset, | |
1695 | sizeof(u64)); | |
1696 | } | |
1697 | ||
86ef58a4 DW |
1698 | static int cmp_map(const void *m0, const void *m1) |
1699 | { | |
1700 | const struct nfit_set_info_map *map0 = m0; | |
1701 | const struct nfit_set_info_map *map1 = m1; | |
1702 | ||
b03b99a3 DW |
1703 | if (map0->region_offset < map1->region_offset) |
1704 | return -1; | |
1705 | else if (map0->region_offset > map1->region_offset) | |
1706 | return 1; | |
1707 | return 0; | |
86ef58a4 DW |
1708 | } |
1709 | ||
c12c48ce DW |
1710 | static int cmp_map2(const void *m0, const void *m1) |
1711 | { | |
1712 | const struct nfit_set_info_map2 *map0 = m0; | |
1713 | const struct nfit_set_info_map2 *map1 = m1; | |
1714 | ||
1715 | if (map0->region_offset < map1->region_offset) | |
1716 | return -1; | |
1717 | else if (map0->region_offset > map1->region_offset) | |
1718 | return 1; | |
1719 | return 0; | |
1720 | } | |
1721 | ||
eaf96153 DW |
1722 | /* Retrieve the nth entry referencing this spa */ |
1723 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
1724 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
1725 | { | |
1726 | struct nfit_memdev *nfit_memdev; | |
1727 | ||
1728 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
1729 | if (nfit_memdev->memdev->range_index == range_index) | |
1730 | if (n-- == 0) | |
1731 | return nfit_memdev->memdev; | |
1732 | return NULL; | |
1733 | } | |
1734 | ||
1735 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
1736 | struct nd_region_desc *ndr_desc, | |
1737 | struct acpi_nfit_system_address *spa) | |
1738 | { | |
eaf96153 DW |
1739 | struct device *dev = acpi_desc->dev; |
1740 | struct nd_interleave_set *nd_set; | |
1741 | u16 nr = ndr_desc->num_mappings; | |
c12c48ce | 1742 | struct nfit_set_info2 *info2; |
eaf96153 | 1743 | struct nfit_set_info *info; |
8f2bc243 | 1744 | int i; |
eaf96153 | 1745 | |
faec6f8a DW |
1746 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
1747 | if (!nd_set) | |
1748 | return -ENOMEM; | |
1749 | ndr_desc->nd_set = nd_set; | |
1750 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); | |
1751 | ||
eaf96153 DW |
1752 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
1753 | if (!info) | |
1754 | return -ENOMEM; | |
c12c48ce DW |
1755 | |
1756 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); | |
1757 | if (!info2) | |
1758 | return -ENOMEM; | |
1759 | ||
eaf96153 | 1760 | for (i = 0; i < nr; i++) { |
44c462eb | 1761 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
eaf96153 | 1762 | struct nfit_set_info_map *map = &info->mapping[i]; |
c12c48ce | 1763 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
44c462eb | 1764 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 DW |
1765 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
1766 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, | |
1767 | spa->range_index, i); | |
1768 | ||
1769 | if (!memdev || !nfit_mem->dcr) { | |
1770 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
1771 | return -ENODEV; | |
1772 | } | |
1773 | ||
1774 | map->region_offset = memdev->region_offset; | |
1775 | map->serial_number = nfit_mem->dcr->serial_number; | |
c12c48ce DW |
1776 | |
1777 | map2->region_offset = memdev->region_offset; | |
1778 | map2->serial_number = nfit_mem->dcr->serial_number; | |
1779 | map2->vendor_id = nfit_mem->dcr->vendor_id; | |
1780 | map2->manufacturing_date = nfit_mem->dcr->manufacturing_date; | |
1781 | map2->manufacturing_location = nfit_mem->dcr->manufacturing_location; | |
eaf96153 DW |
1782 | } |
1783 | ||
c12c48ce | 1784 | /* v1.1 namespaces */ |
eaf96153 DW |
1785 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
1786 | cmp_map, NULL); | |
c12c48ce DW |
1787 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
1788 | ||
1789 | /* v1.2 namespaces */ | |
1790 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), | |
1791 | cmp_map2, NULL); | |
1792 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); | |
86ef58a4 | 1793 | |
c12c48ce | 1794 | /* support v1.1 namespaces created with the wrong sort order */ |
86ef58a4 DW |
1795 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
1796 | cmp_map_compat, NULL); | |
1797 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); | |
1798 | ||
eaf96153 DW |
1799 | ndr_desc->nd_set = nd_set; |
1800 | devm_kfree(dev, info); | |
c12c48ce | 1801 | devm_kfree(dev, info2); |
eaf96153 DW |
1802 | |
1803 | return 0; | |
1804 | } | |
1805 | ||
047fc8a1 RZ |
1806 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
1807 | { | |
1808 | struct acpi_nfit_interleave *idt = mmio->idt; | |
1809 | u32 sub_line_offset, line_index, line_offset; | |
1810 | u64 line_no, table_skip_count, table_offset; | |
1811 | ||
1812 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); | |
1813 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); | |
1814 | line_offset = idt->line_offset[line_index] | |
1815 | * mmio->line_size; | |
1816 | table_offset = table_skip_count * mmio->table_size; | |
1817 | ||
1818 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; | |
1819 | } | |
1820 | ||
de4a196c | 1821 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
047fc8a1 RZ |
1822 | { |
1823 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1824 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; | |
68202c9f | 1825 | const u32 STATUS_MASK = 0x80000037; |
047fc8a1 RZ |
1826 | |
1827 | if (mmio->num_lines) | |
1828 | offset = to_interleave_offset(offset, mmio); | |
1829 | ||
68202c9f | 1830 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
047fc8a1 RZ |
1831 | } |
1832 | ||
1833 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, | |
1834 | resource_size_t dpa, unsigned int len, unsigned int write) | |
1835 | { | |
1836 | u64 cmd, offset; | |
1837 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; | |
1838 | ||
1839 | enum { | |
1840 | BCW_OFFSET_MASK = (1ULL << 48)-1, | |
1841 | BCW_LEN_SHIFT = 48, | |
1842 | BCW_LEN_MASK = (1ULL << 8) - 1, | |
1843 | BCW_CMD_SHIFT = 56, | |
1844 | }; | |
1845 | ||
1846 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; | |
1847 | len = len >> L1_CACHE_SHIFT; | |
1848 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; | |
1849 | cmd |= ((u64) write) << BCW_CMD_SHIFT; | |
1850 | ||
1851 | offset = nfit_blk->cmd_offset + mmio->size * bw; | |
1852 | if (mmio->num_lines) | |
1853 | offset = to_interleave_offset(offset, mmio); | |
1854 | ||
67a3e8fe | 1855 | writeq(cmd, mmio->addr.base + offset); |
f284a4f2 | 1856 | nvdimm_flush(nfit_blk->nd_region); |
f0f2c072 | 1857 | |
aef25338 | 1858 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
67a3e8fe | 1859 | readq(mmio->addr.base + offset); |
047fc8a1 RZ |
1860 | } |
1861 | ||
1862 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, | |
1863 | resource_size_t dpa, void *iobuf, size_t len, int rw, | |
1864 | unsigned int lane) | |
1865 | { | |
1866 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1867 | unsigned int copied = 0; | |
1868 | u64 base_offset; | |
1869 | int rc; | |
1870 | ||
1871 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES | |
1872 | + lane * mmio->size; | |
047fc8a1 RZ |
1873 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
1874 | while (len) { | |
1875 | unsigned int c; | |
1876 | u64 offset; | |
1877 | ||
1878 | if (mmio->num_lines) { | |
1879 | u32 line_offset; | |
1880 | ||
1881 | offset = to_interleave_offset(base_offset + copied, | |
1882 | mmio); | |
1883 | div_u64_rem(offset, mmio->line_size, &line_offset); | |
1884 | c = min_t(size_t, len, mmio->line_size - line_offset); | |
1885 | } else { | |
1886 | offset = base_offset + nfit_blk->bdw_offset; | |
1887 | c = len; | |
1888 | } | |
1889 | ||
1890 | if (rw) | |
67a3e8fe | 1891 | memcpy_to_pmem(mmio->addr.aperture + offset, |
c2ad2954 | 1892 | iobuf + copied, c); |
67a3e8fe | 1893 | else { |
aef25338 | 1894 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
67a3e8fe RZ |
1895 | mmio_flush_range((void __force *) |
1896 | mmio->addr.aperture + offset, c); | |
1897 | ||
6abccd1b | 1898 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
67a3e8fe | 1899 | } |
047fc8a1 RZ |
1900 | |
1901 | copied += c; | |
1902 | len -= c; | |
1903 | } | |
c2ad2954 RZ |
1904 | |
1905 | if (rw) | |
f284a4f2 | 1906 | nvdimm_flush(nfit_blk->nd_region); |
c2ad2954 | 1907 | |
047fc8a1 RZ |
1908 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
1909 | return rc; | |
1910 | } | |
1911 | ||
1912 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, | |
1913 | resource_size_t dpa, void *iobuf, u64 len, int rw) | |
1914 | { | |
1915 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); | |
1916 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; | |
1917 | struct nd_region *nd_region = nfit_blk->nd_region; | |
1918 | unsigned int lane, copied = 0; | |
1919 | int rc = 0; | |
1920 | ||
1921 | lane = nd_region_acquire_lane(nd_region); | |
1922 | while (len) { | |
1923 | u64 c = min(len, mmio->size); | |
1924 | ||
1925 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, | |
1926 | iobuf + copied, c, rw, lane); | |
1927 | if (rc) | |
1928 | break; | |
1929 | ||
1930 | copied += c; | |
1931 | len -= c; | |
1932 | } | |
1933 | nd_region_release_lane(nd_region, lane); | |
1934 | ||
1935 | return rc; | |
1936 | } | |
1937 | ||
047fc8a1 RZ |
1938 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
1939 | struct acpi_nfit_interleave *idt, u16 interleave_ways) | |
1940 | { | |
1941 | if (idt) { | |
1942 | mmio->num_lines = idt->line_count; | |
1943 | mmio->line_size = idt->line_size; | |
1944 | if (interleave_ways == 0) | |
1945 | return -ENXIO; | |
1946 | mmio->table_size = mmio->num_lines * interleave_ways | |
1947 | * mmio->line_size; | |
1948 | } | |
1949 | ||
1950 | return 0; | |
1951 | } | |
1952 | ||
f0f2c072 RZ |
1953 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
1954 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) | |
1955 | { | |
1956 | struct nd_cmd_dimm_flags flags; | |
1957 | int rc; | |
1958 | ||
1959 | memset(&flags, 0, sizeof(flags)); | |
1960 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, | |
aef25338 | 1961 | sizeof(flags), NULL); |
f0f2c072 RZ |
1962 | |
1963 | if (rc >= 0 && flags.status == 0) | |
1964 | nfit_blk->dimm_flags = flags.flags; | |
1965 | else if (rc == -ENOTTY) { | |
1966 | /* fall back to a conservative default */ | |
aef25338 | 1967 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
f0f2c072 RZ |
1968 | rc = 0; |
1969 | } else | |
1970 | rc = -ENXIO; | |
1971 | ||
1972 | return rc; | |
1973 | } | |
1974 | ||
047fc8a1 RZ |
1975 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
1976 | struct device *dev) | |
1977 | { | |
1978 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
047fc8a1 RZ |
1979 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
1980 | struct nfit_blk_mmio *mmio; | |
1981 | struct nfit_blk *nfit_blk; | |
1982 | struct nfit_mem *nfit_mem; | |
1983 | struct nvdimm *nvdimm; | |
1984 | int rc; | |
1985 | ||
1986 | nvdimm = nd_blk_region_to_dimm(ndbr); | |
1987 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1988 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { | |
1989 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, | |
1990 | nfit_mem ? "" : " nfit_mem", | |
193ccca4 DW |
1991 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
1992 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); | |
047fc8a1 RZ |
1993 | return -ENXIO; |
1994 | } | |
1995 | ||
1996 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); | |
1997 | if (!nfit_blk) | |
1998 | return -ENOMEM; | |
1999 | nd_blk_region_set_provider_data(ndbr, nfit_blk); | |
2000 | nfit_blk->nd_region = to_nd_region(dev); | |
2001 | ||
2002 | /* map block aperture memory */ | |
2003 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; | |
2004 | mmio = &nfit_blk->mmio[BDW]; | |
29b9aa0a DW |
2005 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
2006 | nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM); | |
67a3e8fe | 2007 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2008 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
2009 | nvdimm_name(nvdimm)); | |
2010 | return -ENOMEM; | |
2011 | } | |
2012 | mmio->size = nfit_mem->bdw->size; | |
2013 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; | |
2014 | mmio->idt = nfit_mem->idt_bdw; | |
2015 | mmio->spa = nfit_mem->spa_bdw; | |
2016 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, | |
2017 | nfit_mem->memdev_bdw->interleave_ways); | |
2018 | if (rc) { | |
2019 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", | |
2020 | __func__, nvdimm_name(nvdimm)); | |
2021 | return rc; | |
2022 | } | |
2023 | ||
2024 | /* map block control memory */ | |
2025 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; | |
2026 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; | |
2027 | mmio = &nfit_blk->mmio[DCR]; | |
29b9aa0a DW |
2028 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
2029 | nfit_mem->spa_dcr->length); | |
67a3e8fe | 2030 | if (!mmio->addr.base) { |
047fc8a1 RZ |
2031 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
2032 | nvdimm_name(nvdimm)); | |
2033 | return -ENOMEM; | |
2034 | } | |
2035 | mmio->size = nfit_mem->dcr->window_size; | |
2036 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; | |
2037 | mmio->idt = nfit_mem->idt_dcr; | |
2038 | mmio->spa = nfit_mem->spa_dcr; | |
2039 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, | |
2040 | nfit_mem->memdev_dcr->interleave_ways); | |
2041 | if (rc) { | |
2042 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", | |
2043 | __func__, nvdimm_name(nvdimm)); | |
2044 | return rc; | |
2045 | } | |
2046 | ||
f0f2c072 RZ |
2047 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
2048 | if (rc < 0) { | |
2049 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", | |
2050 | __func__, nvdimm_name(nvdimm)); | |
2051 | return rc; | |
2052 | } | |
2053 | ||
f284a4f2 | 2054 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
c2ad2954 RZ |
2055 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
2056 | ||
047fc8a1 RZ |
2057 | if (mmio->line_size == 0) |
2058 | return 0; | |
2059 | ||
2060 | if ((u32) nfit_blk->cmd_offset % mmio->line_size | |
2061 | + 8 > mmio->line_size) { | |
2062 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); | |
2063 | return -ENXIO; | |
2064 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size | |
2065 | + 8 > mmio->line_size) { | |
2066 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); | |
2067 | return -ENXIO; | |
2068 | } | |
2069 | ||
2070 | return 0; | |
2071 | } | |
2072 | ||
aef25338 | 2073 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2074 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 2075 | { |
aef25338 | 2076 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 2077 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
2078 | int cmd_rc, rc; |
2079 | ||
1cf03c00 DW |
2080 | cmd->address = spa->address; |
2081 | cmd->length = spa->length; | |
aef25338 DW |
2082 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
2083 | sizeof(*cmd), &cmd_rc); | |
2084 | if (rc < 0) | |
2085 | return rc; | |
1cf03c00 | 2086 | return cmd_rc; |
0caeef63 VV |
2087 | } |
2088 | ||
1cf03c00 | 2089 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
0caeef63 VV |
2090 | { |
2091 | int rc; | |
1cf03c00 DW |
2092 | int cmd_rc; |
2093 | struct nd_cmd_ars_start ars_start; | |
2094 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2095 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 2096 | |
1cf03c00 DW |
2097 | memset(&ars_start, 0, sizeof(ars_start)); |
2098 | ars_start.address = spa->address; | |
2099 | ars_start.length = spa->length; | |
2100 | if (nfit_spa_type(spa) == NFIT_SPA_PM) | |
2101 | ars_start.type = ND_ARS_PERSISTENT; | |
2102 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
2103 | ars_start.type = ND_ARS_VOLATILE; | |
2104 | else | |
2105 | return -ENOTTY; | |
aef25338 | 2106 | |
1cf03c00 DW |
2107 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2108 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 2109 | |
1cf03c00 DW |
2110 | if (rc < 0) |
2111 | return rc; | |
2112 | return cmd_rc; | |
0caeef63 VV |
2113 | } |
2114 | ||
1cf03c00 | 2115 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2116 | { |
aef25338 | 2117 | int rc, cmd_rc; |
1cf03c00 DW |
2118 | struct nd_cmd_ars_start ars_start; |
2119 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2120 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2121 | ||
2122 | memset(&ars_start, 0, sizeof(ars_start)); | |
2123 | ars_start.address = ars_status->restart_address; | |
2124 | ars_start.length = ars_status->restart_length; | |
2125 | ars_start.type = ars_status->type; | |
2126 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, | |
2127 | sizeof(ars_start), &cmd_rc); | |
2128 | if (rc < 0) | |
2129 | return rc; | |
2130 | return cmd_rc; | |
2131 | } | |
0caeef63 | 2132 | |
1cf03c00 DW |
2133 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
2134 | { | |
2135 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2136 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2137 | int rc, cmd_rc; | |
aef25338 | 2138 | |
1cf03c00 DW |
2139 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
2140 | acpi_desc->ars_status_size, &cmd_rc); | |
2141 | if (rc < 0) | |
2142 | return rc; | |
2143 | return cmd_rc; | |
0caeef63 VV |
2144 | } |
2145 | ||
82aa37cf | 2146 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2147 | struct nd_cmd_ars_status *ars_status) |
0caeef63 | 2148 | { |
82aa37cf | 2149 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
0caeef63 VV |
2150 | int rc; |
2151 | u32 i; | |
2152 | ||
82aa37cf DW |
2153 | /* |
2154 | * First record starts at 44 byte offset from the start of the | |
2155 | * payload. | |
2156 | */ | |
2157 | if (ars_status->out_length < 44) | |
2158 | return 0; | |
0caeef63 | 2159 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2160 | /* only process full records */ |
2161 | if (ars_status->out_length | |
2162 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2163 | break; | |
0caeef63 VV |
2164 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
2165 | ars_status->records[i].err_address, | |
2166 | ars_status->records[i].length); | |
2167 | if (rc) | |
2168 | return rc; | |
2169 | } | |
82aa37cf DW |
2170 | if (i < ars_status->num_records) |
2171 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2172 | |
2173 | return 0; | |
2174 | } | |
2175 | ||
af1996ef TK |
2176 | static void acpi_nfit_remove_resource(void *data) |
2177 | { | |
2178 | struct resource *res = data; | |
2179 | ||
2180 | remove_resource(res); | |
2181 | } | |
2182 | ||
2183 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2184 | struct nd_region_desc *ndr_desc) | |
2185 | { | |
2186 | struct resource *res, *nd_res = ndr_desc->res; | |
2187 | int is_pmem, ret; | |
2188 | ||
2189 | /* No operation if the region is already registered as PMEM */ | |
2190 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2191 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2192 | if (is_pmem == REGION_INTERSECTS) | |
2193 | return 0; | |
2194 | ||
2195 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2196 | if (!res) | |
2197 | return -ENOMEM; | |
2198 | ||
2199 | res->name = "Persistent Memory"; | |
2200 | res->start = nd_res->start; | |
2201 | res->end = nd_res->end; | |
2202 | res->flags = IORESOURCE_MEM; | |
2203 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2204 | ||
2205 | ret = insert_resource(&iomem_resource, res); | |
2206 | if (ret) | |
2207 | return ret; | |
2208 | ||
d932dd2c SV |
2209 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2210 | acpi_nfit_remove_resource, | |
2211 | res); | |
2212 | if (ret) | |
af1996ef | 2213 | return ret; |
af1996ef TK |
2214 | |
2215 | return 0; | |
2216 | } | |
2217 | ||
1f7df6f8 | 2218 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2219 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2220 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2221 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2222 | { |
2223 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2224 | memdev->device_handle); | |
1cf03c00 | 2225 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 | 2226 | struct nd_blk_region_desc *ndbr_desc; |
1f7df6f8 | 2227 | struct nfit_mem *nfit_mem; |
faec6f8a | 2228 | int blk_valid = 0, rc; |
1f7df6f8 DW |
2229 | |
2230 | if (!nvdimm) { | |
2231 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2232 | spa->range_index, memdev->device_handle); | |
2233 | return -ENODEV; | |
2234 | } | |
2235 | ||
44c462eb | 2236 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2237 | switch (nfit_spa_type(spa)) { |
2238 | case NFIT_SPA_PM: | |
2239 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2240 | mapping->start = memdev->address; |
2241 | mapping->size = memdev->region_size; | |
1f7df6f8 DW |
2242 | break; |
2243 | case NFIT_SPA_DCR: | |
2244 | nfit_mem = nvdimm_provider_data(nvdimm); | |
2245 | if (!nfit_mem || !nfit_mem->bdw) { | |
2246 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", | |
2247 | spa->range_index, nvdimm_name(nvdimm)); | |
2248 | } else { | |
44c462eb DW |
2249 | mapping->size = nfit_mem->bdw->capacity; |
2250 | mapping->start = nfit_mem->bdw->start_address; | |
5212e11f | 2251 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
1f7df6f8 DW |
2252 | blk_valid = 1; |
2253 | } | |
2254 | ||
44c462eb | 2255 | ndr_desc->mapping = mapping; |
1f7df6f8 | 2256 | ndr_desc->num_mappings = blk_valid; |
047fc8a1 RZ |
2257 | ndbr_desc = to_blk_region_desc(ndr_desc); |
2258 | ndbr_desc->enable = acpi_nfit_blk_region_enable; | |
6bc75619 | 2259 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
faec6f8a DW |
2260 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
2261 | if (rc) | |
2262 | return rc; | |
1cf03c00 DW |
2263 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
2264 | ndr_desc); | |
2265 | if (!nfit_spa->nd_region) | |
1f7df6f8 DW |
2266 | return -ENOMEM; |
2267 | break; | |
2268 | } | |
2269 | ||
2270 | return 0; | |
2271 | } | |
2272 | ||
c2f32acd LCY |
2273 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2274 | { | |
2275 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2276 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2277 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2278 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2279 | } | |
2280 | ||
1f7df6f8 DW |
2281 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2282 | struct nfit_spa *nfit_spa) | |
2283 | { | |
44c462eb | 2284 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2285 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
047fc8a1 RZ |
2286 | struct nd_blk_region_desc ndbr_desc; |
2287 | struct nd_region_desc *ndr_desc; | |
1f7df6f8 | 2288 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2289 | struct nvdimm_bus *nvdimm_bus; |
2290 | struct resource res; | |
eaf96153 | 2291 | int count = 0, rc; |
1f7df6f8 | 2292 | |
1cf03c00 | 2293 | if (nfit_spa->nd_region) |
20985164 VV |
2294 | return 0; |
2295 | ||
c2f32acd | 2296 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
1f7df6f8 DW |
2297 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
2298 | __func__); | |
2299 | return 0; | |
2300 | } | |
2301 | ||
2302 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2303 | memset(&mappings, 0, sizeof(mappings)); |
047fc8a1 | 2304 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
1f7df6f8 DW |
2305 | res.start = spa->address; |
2306 | res.end = res.start + spa->length - 1; | |
047fc8a1 RZ |
2307 | ndr_desc = &ndbr_desc.ndr_desc; |
2308 | ndr_desc->res = &res; | |
2309 | ndr_desc->provider_data = nfit_spa; | |
2310 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
41d7a6d6 TK |
2311 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
2312 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( | |
2313 | spa->proximity_domain); | |
2314 | else | |
2315 | ndr_desc->numa_node = NUMA_NO_NODE; | |
2316 | ||
1f7df6f8 DW |
2317 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2318 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2319 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
2320 | |
2321 | if (memdev->range_index != spa->range_index) | |
2322 | continue; | |
2323 | if (count >= ND_MAX_MAPPINGS) { | |
2324 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2325 | spa->range_index, ND_MAX_MAPPINGS); | |
2326 | return -ENXIO; | |
2327 | } | |
44c462eb DW |
2328 | mapping = &mappings[count++]; |
2329 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2330 | memdev, nfit_spa); |
1f7df6f8 | 2331 | if (rc) |
1cf03c00 | 2332 | goto out; |
1f7df6f8 DW |
2333 | } |
2334 | ||
44c462eb | 2335 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2336 | ndr_desc->num_mappings = count; |
2337 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2338 | if (rc) |
1cf03c00 | 2339 | goto out; |
eaf96153 | 2340 | |
1f7df6f8 DW |
2341 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2342 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2343 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2344 | if (rc) { |
af1996ef TK |
2345 | dev_warn(acpi_desc->dev, |
2346 | "failed to insert pmem resource to iomem: %d\n", | |
2347 | rc); | |
48901165 | 2348 | goto out; |
0caeef63 | 2349 | } |
48901165 | 2350 | |
1cf03c00 DW |
2351 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
2352 | ndr_desc); | |
2353 | if (!nfit_spa->nd_region) | |
2354 | rc = -ENOMEM; | |
1f7df6f8 | 2355 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
1cf03c00 DW |
2356 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
2357 | ndr_desc); | |
2358 | if (!nfit_spa->nd_region) | |
2359 | rc = -ENOMEM; | |
c2f32acd LCY |
2360 | } else if (nfit_spa_is_virtual(spa)) { |
2361 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
2362 | ndr_desc); | |
2363 | if (!nfit_spa->nd_region) | |
2364 | rc = -ENOMEM; | |
1f7df6f8 | 2365 | } |
20985164 | 2366 | |
1cf03c00 DW |
2367 | out: |
2368 | if (rc) | |
2369 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
2370 | nfit_spa->spa->range_index); | |
2371 | return rc; | |
2372 | } | |
2373 | ||
2374 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, | |
2375 | u32 max_ars) | |
2376 | { | |
2377 | struct device *dev = acpi_desc->dev; | |
2378 | struct nd_cmd_ars_status *ars_status; | |
2379 | ||
2380 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { | |
2381 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); | |
2382 | return 0; | |
2383 | } | |
2384 | ||
2385 | if (acpi_desc->ars_status) | |
2386 | devm_kfree(dev, acpi_desc->ars_status); | |
2387 | acpi_desc->ars_status = NULL; | |
2388 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); | |
2389 | if (!ars_status) | |
2390 | return -ENOMEM; | |
2391 | acpi_desc->ars_status = ars_status; | |
2392 | acpi_desc->ars_status_size = max_ars; | |
1f7df6f8 DW |
2393 | return 0; |
2394 | } | |
2395 | ||
1cf03c00 DW |
2396 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
2397 | struct nfit_spa *nfit_spa) | |
2398 | { | |
2399 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2400 | int rc; | |
2401 | ||
2402 | if (!nfit_spa->max_ars) { | |
2403 | struct nd_cmd_ars_cap ars_cap; | |
2404 | ||
2405 | memset(&ars_cap, 0, sizeof(ars_cap)); | |
2406 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
2407 | if (rc < 0) | |
2408 | return rc; | |
2409 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
2410 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
2411 | /* check that the supported scrub types match the spa type */ | |
2412 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && | |
2413 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) | |
2414 | return -ENOTTY; | |
2415 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && | |
2416 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) | |
2417 | return -ENOTTY; | |
2418 | } | |
2419 | ||
2420 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) | |
2421 | return -ENOMEM; | |
2422 | ||
2423 | rc = ars_get_status(acpi_desc); | |
2424 | if (rc < 0 && rc != -ENOSPC) | |
2425 | return rc; | |
2426 | ||
82aa37cf | 2427 | if (ars_status_process_records(acpi_desc, acpi_desc->ars_status)) |
1cf03c00 DW |
2428 | return -ENOMEM; |
2429 | ||
2430 | return 0; | |
2431 | } | |
2432 | ||
2433 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, | |
2434 | struct nfit_spa *nfit_spa) | |
2435 | { | |
2436 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2437 | unsigned int overflow_retry = scrub_overflow_abort; | |
2438 | u64 init_ars_start = 0, init_ars_len = 0; | |
2439 | struct device *dev = acpi_desc->dev; | |
2440 | unsigned int tmo = scrub_timeout; | |
2441 | int rc; | |
2442 | ||
37b137ff | 2443 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
1cf03c00 DW |
2444 | return; |
2445 | ||
2446 | rc = ars_start(acpi_desc, nfit_spa); | |
2447 | /* | |
2448 | * If we timed out the initial scan we'll still be busy here, | |
2449 | * and will wait another timeout before giving up permanently. | |
2450 | */ | |
2451 | if (rc < 0 && rc != -EBUSY) | |
2452 | return; | |
2453 | ||
2454 | do { | |
2455 | u64 ars_start, ars_len; | |
2456 | ||
2457 | if (acpi_desc->cancel) | |
2458 | break; | |
2459 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2460 | if (rc == -ENOTTY) | |
2461 | break; | |
2462 | if (rc == -EBUSY && !tmo) { | |
2463 | dev_warn(dev, "range %d ars timeout, aborting\n", | |
2464 | spa->range_index); | |
2465 | break; | |
2466 | } | |
2467 | ||
2468 | if (rc == -EBUSY) { | |
2469 | /* | |
2470 | * Note, entries may be appended to the list | |
2471 | * while the lock is dropped, but the workqueue | |
2472 | * being active prevents entries being deleted / | |
2473 | * freed. | |
2474 | */ | |
2475 | mutex_unlock(&acpi_desc->init_mutex); | |
2476 | ssleep(1); | |
2477 | tmo--; | |
2478 | mutex_lock(&acpi_desc->init_mutex); | |
2479 | continue; | |
2480 | } | |
2481 | ||
2482 | /* we got some results, but there are more pending... */ | |
2483 | if (rc == -ENOSPC && overflow_retry--) { | |
2484 | if (!init_ars_len) { | |
2485 | init_ars_len = acpi_desc->ars_status->length; | |
2486 | init_ars_start = acpi_desc->ars_status->address; | |
2487 | } | |
2488 | rc = ars_continue(acpi_desc); | |
2489 | } | |
2490 | ||
2491 | if (rc < 0) { | |
2492 | dev_warn(dev, "range %d ars continuation failed\n", | |
2493 | spa->range_index); | |
2494 | break; | |
2495 | } | |
2496 | ||
2497 | if (init_ars_len) { | |
2498 | ars_start = init_ars_start; | |
2499 | ars_len = init_ars_len; | |
2500 | } else { | |
2501 | ars_start = acpi_desc->ars_status->address; | |
2502 | ars_len = acpi_desc->ars_status->length; | |
2503 | } | |
2504 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", | |
2505 | spa->range_index, ars_start, ars_len); | |
2506 | /* notify the region about new poison entries */ | |
2507 | nvdimm_region_notify(nfit_spa->nd_region, | |
2508 | NVDIMM_REVALIDATE_POISON); | |
2509 | break; | |
2510 | } while (1); | |
2511 | } | |
2512 | ||
2513 | static void acpi_nfit_scrub(struct work_struct *work) | |
1f7df6f8 | 2514 | { |
1cf03c00 DW |
2515 | struct device *dev; |
2516 | u64 init_scrub_length = 0; | |
1f7df6f8 | 2517 | struct nfit_spa *nfit_spa; |
1cf03c00 DW |
2518 | u64 init_scrub_address = 0; |
2519 | bool init_ars_done = false; | |
2520 | struct acpi_nfit_desc *acpi_desc; | |
2521 | unsigned int tmo = scrub_timeout; | |
2522 | unsigned int overflow_retry = scrub_overflow_abort; | |
2523 | ||
2524 | acpi_desc = container_of(work, typeof(*acpi_desc), work); | |
2525 | dev = acpi_desc->dev; | |
1f7df6f8 | 2526 | |
1cf03c00 DW |
2527 | /* |
2528 | * We scrub in 2 phases. The first phase waits for any platform | |
2529 | * firmware initiated scrubs to complete and then we go search for the | |
2530 | * affected spa regions to mark them scanned. In the second phase we | |
2531 | * initiate a directed scrub for every range that was not scrubbed in | |
37b137ff VV |
2532 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
2533 | * the first phase, but really only care about running phase 2, where | |
2534 | * regions can be notified of new poison. | |
1cf03c00 DW |
2535 | */ |
2536 | ||
2537 | /* process platform firmware initiated scrubs */ | |
2538 | retry: | |
2539 | mutex_lock(&acpi_desc->init_mutex); | |
1f7df6f8 | 2540 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
1cf03c00 DW |
2541 | struct nd_cmd_ars_status *ars_status; |
2542 | struct acpi_nfit_system_address *spa; | |
2543 | u64 ars_start, ars_len; | |
2544 | int rc; | |
1f7df6f8 | 2545 | |
1cf03c00 DW |
2546 | if (acpi_desc->cancel) |
2547 | break; | |
2548 | ||
2549 | if (nfit_spa->nd_region) | |
2550 | continue; | |
2551 | ||
2552 | if (init_ars_done) { | |
2553 | /* | |
2554 | * No need to re-query, we're now just | |
2555 | * reconciling all the ranges covered by the | |
2556 | * initial scrub | |
2557 | */ | |
2558 | rc = 0; | |
2559 | } else | |
2560 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); | |
2561 | ||
2562 | if (rc == -ENOTTY) { | |
2563 | /* no ars capability, just register spa and move on */ | |
2564 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2565 | continue; | |
2566 | } | |
2567 | ||
2568 | if (rc == -EBUSY && !tmo) { | |
2569 | /* fallthrough to directed scrub in phase 2 */ | |
2570 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); | |
2571 | break; | |
2572 | } else if (rc == -EBUSY) { | |
2573 | mutex_unlock(&acpi_desc->init_mutex); | |
2574 | ssleep(1); | |
2575 | tmo--; | |
2576 | goto retry; | |
2577 | } | |
2578 | ||
2579 | /* we got some results, but there are more pending... */ | |
2580 | if (rc == -ENOSPC && overflow_retry--) { | |
2581 | ars_status = acpi_desc->ars_status; | |
2582 | /* | |
2583 | * Record the original scrub range, so that we | |
2584 | * can recall all the ranges impacted by the | |
2585 | * initial scrub. | |
2586 | */ | |
2587 | if (!init_scrub_length) { | |
2588 | init_scrub_length = ars_status->length; | |
2589 | init_scrub_address = ars_status->address; | |
2590 | } | |
2591 | rc = ars_continue(acpi_desc); | |
2592 | if (rc == 0) { | |
2593 | mutex_unlock(&acpi_desc->init_mutex); | |
2594 | goto retry; | |
2595 | } | |
2596 | } | |
2597 | ||
2598 | if (rc < 0) { | |
2599 | /* | |
2600 | * Initial scrub failed, we'll give it one more | |
2601 | * try below... | |
2602 | */ | |
2603 | break; | |
2604 | } | |
2605 | ||
2606 | /* We got some final results, record completed ranges */ | |
2607 | ars_status = acpi_desc->ars_status; | |
2608 | if (init_scrub_length) { | |
2609 | ars_start = init_scrub_address; | |
2610 | ars_len = ars_start + init_scrub_length; | |
2611 | } else { | |
2612 | ars_start = ars_status->address; | |
2613 | ars_len = ars_status->length; | |
2614 | } | |
2615 | spa = nfit_spa->spa; | |
2616 | ||
2617 | if (!init_ars_done) { | |
2618 | init_ars_done = true; | |
2619 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", | |
2620 | ars_start, ars_len); | |
2621 | } | |
2622 | if (ars_start <= spa->address && ars_start + ars_len | |
2623 | >= spa->address + spa->length) | |
2624 | acpi_nfit_register_region(acpi_desc, nfit_spa); | |
1f7df6f8 | 2625 | } |
1cf03c00 DW |
2626 | |
2627 | /* | |
2628 | * For all the ranges not covered by an initial scrub we still | |
2629 | * want to see if there are errors, but it's ok to discover them | |
2630 | * asynchronously. | |
2631 | */ | |
2632 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
2633 | /* | |
2634 | * Flag all the ranges that still need scrubbing, but | |
2635 | * register them now to make data available. | |
2636 | */ | |
37b137ff VV |
2637 | if (!nfit_spa->nd_region) { |
2638 | nfit_spa->ars_required = 1; | |
1cf03c00 | 2639 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
37b137ff | 2640 | } |
1cf03c00 | 2641 | } |
9ccaed4b | 2642 | acpi_desc->init_complete = 1; |
1cf03c00 DW |
2643 | |
2644 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2645 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); | |
37b137ff VV |
2646 | acpi_desc->scrub_count++; |
2647 | if (acpi_desc->scrub_count_state) | |
2648 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
1cf03c00 DW |
2649 | mutex_unlock(&acpi_desc->init_mutex); |
2650 | } | |
2651 | ||
2652 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) | |
2653 | { | |
2654 | struct nfit_spa *nfit_spa; | |
2655 | int rc; | |
2656 | ||
2657 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) | |
2658 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { | |
2659 | /* BLK regions don't need to wait for ars results */ | |
2660 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); | |
2661 | if (rc) | |
2662 | return rc; | |
2663 | } | |
2664 | ||
fbabd829 DW |
2665 | if (!acpi_desc->cancel) |
2666 | queue_work(nfit_wq, &acpi_desc->work); | |
1f7df6f8 DW |
2667 | return 0; |
2668 | } | |
2669 | ||
20985164 VV |
2670 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
2671 | struct nfit_table_prev *prev) | |
2672 | { | |
2673 | struct device *dev = acpi_desc->dev; | |
2674 | ||
2675 | if (!list_empty(&prev->spas) || | |
2676 | !list_empty(&prev->memdevs) || | |
2677 | !list_empty(&prev->dcrs) || | |
2678 | !list_empty(&prev->bdws) || | |
2679 | !list_empty(&prev->idts) || | |
2680 | !list_empty(&prev->flushes)) { | |
2681 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
2682 | return -ENXIO; | |
2683 | } | |
2684 | return 0; | |
2685 | } | |
2686 | ||
37b137ff VV |
2687 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
2688 | { | |
2689 | struct device *dev = acpi_desc->dev; | |
2690 | struct kernfs_node *nfit; | |
2691 | struct device *bus_dev; | |
2692 | ||
2693 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
2694 | return 0; | |
2695 | ||
2696 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
2697 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
2698 | if (!nfit) { | |
2699 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
2700 | return -ENODEV; | |
2701 | } | |
2702 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
2703 | sysfs_put(nfit); | |
2704 | if (!acpi_desc->scrub_count_state) { | |
2705 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
2706 | return -ENODEV; | |
2707 | } | |
2708 | ||
2709 | return 0; | |
2710 | } | |
2711 | ||
fbabd829 | 2712 | static void acpi_nfit_unregister(void *data) |
58cd71b4 DW |
2713 | { |
2714 | struct acpi_nfit_desc *acpi_desc = data; | |
2715 | ||
58cd71b4 | 2716 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
58cd71b4 DW |
2717 | } |
2718 | ||
e7a11b44 | 2719 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
2720 | { |
2721 | struct device *dev = acpi_desc->dev; | |
20985164 | 2722 | struct nfit_table_prev prev; |
b94d5230 | 2723 | const void *end; |
1f7df6f8 | 2724 | int rc; |
b94d5230 | 2725 | |
58cd71b4 | 2726 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
2727 | acpi_nfit_init_dsms(acpi_desc); |
2728 | ||
58cd71b4 DW |
2729 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
2730 | &acpi_desc->nd_desc); | |
2731 | if (!acpi_desc->nvdimm_bus) | |
2732 | return -ENOMEM; | |
37b137ff | 2733 | |
fbabd829 | 2734 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
58cd71b4 DW |
2735 | acpi_desc); |
2736 | if (rc) | |
2737 | return rc; | |
37b137ff VV |
2738 | |
2739 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
2740 | if (rc) | |
2741 | return rc; | |
6839a6d9 VV |
2742 | |
2743 | /* register this acpi_desc for mce notifications */ | |
2744 | mutex_lock(&acpi_desc_lock); | |
2745 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
2746 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
2747 | } |
2748 | ||
20985164 VV |
2749 | mutex_lock(&acpi_desc->init_mutex); |
2750 | ||
2751 | INIT_LIST_HEAD(&prev.spas); | |
2752 | INIT_LIST_HEAD(&prev.memdevs); | |
2753 | INIT_LIST_HEAD(&prev.dcrs); | |
2754 | INIT_LIST_HEAD(&prev.bdws); | |
2755 | INIT_LIST_HEAD(&prev.idts); | |
2756 | INIT_LIST_HEAD(&prev.flushes); | |
2757 | ||
2758 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
2759 | acpi_desc->spas.prev); | |
2760 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
2761 | acpi_desc->memdevs.prev); | |
2762 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
2763 | acpi_desc->dcrs.prev); | |
2764 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
2765 | acpi_desc->bdws.prev); | |
2766 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
2767 | acpi_desc->idts.prev); | |
2768 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
2769 | acpi_desc->flushes.prev); | |
b94d5230 | 2770 | |
b94d5230 | 2771 | end = data + sz; |
b94d5230 | 2772 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 2773 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
2774 | |
2775 | if (IS_ERR(data)) { | |
2776 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, | |
2777 | PTR_ERR(data)); | |
20985164 VV |
2778 | rc = PTR_ERR(data); |
2779 | goto out_unlock; | |
b94d5230 DW |
2780 | } |
2781 | ||
20985164 VV |
2782 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
2783 | if (rc) | |
2784 | goto out_unlock; | |
2785 | ||
81ed4e36 DW |
2786 | rc = nfit_mem_init(acpi_desc); |
2787 | if (rc) | |
20985164 | 2788 | goto out_unlock; |
62232e45 | 2789 | |
1f7df6f8 DW |
2790 | rc = acpi_nfit_register_dimms(acpi_desc); |
2791 | if (rc) | |
20985164 VV |
2792 | goto out_unlock; |
2793 | ||
2794 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 2795 | |
20985164 VV |
2796 | out_unlock: |
2797 | mutex_unlock(&acpi_desc->init_mutex); | |
2798 | return rc; | |
b94d5230 | 2799 | } |
6bc75619 | 2800 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 2801 | |
7ae0fa43 DW |
2802 | struct acpi_nfit_flush_work { |
2803 | struct work_struct work; | |
2804 | struct completion cmp; | |
2805 | }; | |
2806 | ||
2807 | static void flush_probe(struct work_struct *work) | |
2808 | { | |
2809 | struct acpi_nfit_flush_work *flush; | |
2810 | ||
2811 | flush = container_of(work, typeof(*flush), work); | |
2812 | complete(&flush->cmp); | |
2813 | } | |
2814 | ||
2815 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) | |
2816 | { | |
2817 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2818 | struct device *dev = acpi_desc->dev; | |
2819 | struct acpi_nfit_flush_work flush; | |
e471486c | 2820 | int rc; |
7ae0fa43 DW |
2821 | |
2822 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ | |
2823 | device_lock(dev); | |
2824 | device_unlock(dev); | |
2825 | ||
9ccaed4b DW |
2826 | /* bounce the init_mutex to make init_complete valid */ |
2827 | mutex_lock(&acpi_desc->init_mutex); | |
fbabd829 DW |
2828 | if (acpi_desc->cancel || acpi_desc->init_complete) { |
2829 | mutex_unlock(&acpi_desc->init_mutex); | |
9ccaed4b | 2830 | return 0; |
fbabd829 | 2831 | } |
9ccaed4b | 2832 | |
7ae0fa43 DW |
2833 | /* |
2834 | * Scrub work could take 10s of seconds, userspace may give up so we | |
2835 | * need to be interruptible while waiting. | |
2836 | */ | |
2837 | INIT_WORK_ONSTACK(&flush.work, flush_probe); | |
2838 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); | |
2839 | queue_work(nfit_wq, &flush.work); | |
fbabd829 | 2840 | mutex_unlock(&acpi_desc->init_mutex); |
e471486c DW |
2841 | |
2842 | rc = wait_for_completion_interruptible(&flush.cmp); | |
2843 | cancel_work_sync(&flush.work); | |
2844 | return rc; | |
7ae0fa43 DW |
2845 | } |
2846 | ||
87bf572e DW |
2847 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
2848 | struct nvdimm *nvdimm, unsigned int cmd) | |
2849 | { | |
2850 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); | |
2851 | ||
2852 | if (nvdimm) | |
2853 | return 0; | |
2854 | if (cmd != ND_CMD_ARS_START) | |
2855 | return 0; | |
2856 | ||
2857 | /* | |
2858 | * The kernel and userspace may race to initiate a scrub, but | |
2859 | * the scrub thread is prepared to lose that initial race. It | |
2860 | * just needs guarantees that any ars it initiates are not | |
2861 | * interrupted by any intervening start reqeusts from userspace. | |
2862 | */ | |
2863 | if (work_busy(&acpi_desc->work)) | |
2864 | return -EBUSY; | |
2865 | ||
2866 | return 0; | |
2867 | } | |
2868 | ||
6839a6d9 | 2869 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc) |
37b137ff VV |
2870 | { |
2871 | struct device *dev = acpi_desc->dev; | |
2872 | struct nfit_spa *nfit_spa; | |
2873 | ||
2874 | if (work_busy(&acpi_desc->work)) | |
2875 | return -EBUSY; | |
2876 | ||
fbabd829 DW |
2877 | mutex_lock(&acpi_desc->init_mutex); |
2878 | if (acpi_desc->cancel) { | |
2879 | mutex_unlock(&acpi_desc->init_mutex); | |
37b137ff | 2880 | return 0; |
fbabd829 | 2881 | } |
37b137ff | 2882 | |
37b137ff VV |
2883 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
2884 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2885 | ||
2886 | if (nfit_spa_type(spa) != NFIT_SPA_PM) | |
2887 | continue; | |
2888 | ||
2889 | nfit_spa->ars_required = 1; | |
2890 | } | |
2891 | queue_work(nfit_wq, &acpi_desc->work); | |
2892 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); | |
2893 | mutex_unlock(&acpi_desc->init_mutex); | |
2894 | ||
2895 | return 0; | |
2896 | } | |
2897 | ||
a61fe6f7 | 2898 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
2899 | { |
2900 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
2901 | |
2902 | dev_set_drvdata(dev, acpi_desc); | |
2903 | acpi_desc->dev = dev; | |
6bc75619 | 2904 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
b94d5230 DW |
2905 | nd_desc = &acpi_desc->nd_desc; |
2906 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 2907 | nd_desc->module = THIS_MODULE; |
b94d5230 | 2908 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 2909 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 2910 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 2911 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 2912 | |
20985164 VV |
2913 | INIT_LIST_HEAD(&acpi_desc->spas); |
2914 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
2915 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
2916 | INIT_LIST_HEAD(&acpi_desc->idts); | |
2917 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
2918 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
2919 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 2920 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 2921 | mutex_init(&acpi_desc->init_mutex); |
1cf03c00 | 2922 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
20985164 | 2923 | } |
a61fe6f7 | 2924 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 | 2925 | |
3c87f372 DW |
2926 | static void acpi_nfit_put_table(void *table) |
2927 | { | |
2928 | acpi_put_table(table); | |
2929 | } | |
2930 | ||
fbabd829 DW |
2931 | void acpi_nfit_shutdown(void *data) |
2932 | { | |
2933 | struct acpi_nfit_desc *acpi_desc = data; | |
2934 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
2935 | ||
2936 | /* | |
2937 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
2938 | * race teardown | |
2939 | */ | |
2940 | mutex_lock(&acpi_desc_lock); | |
2941 | list_del(&acpi_desc->list); | |
2942 | mutex_unlock(&acpi_desc_lock); | |
2943 | ||
2944 | mutex_lock(&acpi_desc->init_mutex); | |
2945 | acpi_desc->cancel = 1; | |
2946 | mutex_unlock(&acpi_desc->init_mutex); | |
2947 | ||
2948 | /* | |
2949 | * Bounce the nvdimm bus lock to make sure any in-flight | |
2950 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
2951 | * either submit or see ->cancel set. | |
2952 | */ | |
2953 | device_lock(bus_dev); | |
2954 | device_unlock(bus_dev); | |
2955 | ||
2956 | flush_workqueue(nfit_wq); | |
2957 | } | |
2958 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); | |
2959 | ||
20985164 VV |
2960 | static int acpi_nfit_add(struct acpi_device *adev) |
2961 | { | |
2962 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
2963 | struct acpi_nfit_desc *acpi_desc; | |
2964 | struct device *dev = &adev->dev; | |
2965 | struct acpi_table_header *tbl; | |
2966 | acpi_status status = AE_OK; | |
2967 | acpi_size sz; | |
31932041 | 2968 | int rc = 0; |
20985164 | 2969 | |
6b11d1d6 | 2970 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
20985164 VV |
2971 | if (ACPI_FAILURE(status)) { |
2972 | /* This is ok, we could have an nvdimm hotplugged later */ | |
2973 | dev_dbg(dev, "failed to find NFIT at startup\n"); | |
2974 | return 0; | |
2975 | } | |
3c87f372 DW |
2976 | |
2977 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); | |
2978 | if (rc) | |
2979 | return rc; | |
6b11d1d6 | 2980 | sz = tbl->length; |
20985164 | 2981 | |
a61fe6f7 DW |
2982 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
2983 | if (!acpi_desc) | |
2984 | return -ENOMEM; | |
2985 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 2986 | |
e7a11b44 | 2987 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 2988 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
2989 | |
2990 | /* Evaluate _FIT and override with that if present */ | |
2991 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
2992 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
2993 | union acpi_object *obj = buf.pointer; |
2994 | ||
2995 | if (obj->type == ACPI_TYPE_BUFFER) | |
2996 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
2997 | obj->buffer.length); | |
2998 | else | |
6b577c9d LK |
2999 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
3000 | __func__, (int) obj->type); | |
31932041 DW |
3001 | kfree(buf.pointer); |
3002 | } else | |
e7a11b44 DW |
3003 | /* skip over the lead-in header table */ |
3004 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
3005 | + sizeof(struct acpi_table_nfit), | |
3006 | sz - sizeof(struct acpi_table_nfit)); | |
fbabd829 DW |
3007 | |
3008 | if (rc) | |
3009 | return rc; | |
3010 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); | |
b94d5230 DW |
3011 | } |
3012 | ||
3013 | static int acpi_nfit_remove(struct acpi_device *adev) | |
3014 | { | |
fbabd829 | 3015 | /* see acpi_nfit_unregister */ |
b94d5230 DW |
3016 | return 0; |
3017 | } | |
3018 | ||
56b47fe6 | 3019 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
20985164 | 3020 | { |
c14a868a | 3021 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 3022 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 3023 | union acpi_object *obj; |
20985164 VV |
3024 | acpi_status status; |
3025 | int ret; | |
3026 | ||
20985164 VV |
3027 | if (!dev->driver) { |
3028 | /* dev->driver may be null if we're being removed */ | |
3029 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); | |
c14a868a | 3030 | return; |
20985164 VV |
3031 | } |
3032 | ||
3033 | if (!acpi_desc) { | |
a61fe6f7 DW |
3034 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3035 | if (!acpi_desc) | |
c14a868a DW |
3036 | return; |
3037 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
3038 | } else { |
3039 | /* | |
3040 | * Finish previous registration before considering new | |
3041 | * regions. | |
3042 | */ | |
3043 | flush_workqueue(nfit_wq); | |
20985164 VV |
3044 | } |
3045 | ||
3046 | /* Evaluate _FIT */ | |
c14a868a | 3047 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
3048 | if (ACPI_FAILURE(status)) { |
3049 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 3050 | return; |
20985164 VV |
3051 | } |
3052 | ||
6b577c9d LK |
3053 | obj = buf.pointer; |
3054 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
3055 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
3056 | obj->buffer.length); | |
31932041 | 3057 | if (ret) |
6b577c9d | 3058 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 3059 | } else |
6b577c9d | 3060 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 3061 | kfree(buf.pointer); |
c14a868a | 3062 | } |
56b47fe6 TK |
3063 | |
3064 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) | |
3065 | { | |
3066 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); | |
3067 | ||
3068 | acpi_nfit_ars_rescan(acpi_desc); | |
3069 | } | |
3070 | ||
3071 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) | |
3072 | { | |
3073 | dev_dbg(dev, "%s: event: 0x%x\n", __func__, event); | |
3074 | ||
3075 | switch (event) { | |
3076 | case NFIT_NOTIFY_UPDATE: | |
3077 | return acpi_nfit_update_notify(dev, handle); | |
3078 | case NFIT_NOTIFY_UC_MEMORY_ERROR: | |
3079 | return acpi_nfit_uc_error_notify(dev, handle); | |
3080 | default: | |
3081 | return; | |
3082 | } | |
3083 | } | |
c14a868a | 3084 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
20985164 | 3085 | |
c14a868a DW |
3086 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
3087 | { | |
3088 | device_lock(&adev->dev); | |
3089 | __acpi_nfit_notify(&adev->dev, adev->handle, event); | |
3090 | device_unlock(&adev->dev); | |
20985164 VV |
3091 | } |
3092 | ||
b94d5230 DW |
3093 | static const struct acpi_device_id acpi_nfit_ids[] = { |
3094 | { "ACPI0012", 0 }, | |
3095 | { "", 0 }, | |
3096 | }; | |
3097 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
3098 | ||
3099 | static struct acpi_driver acpi_nfit_driver = { | |
3100 | .name = KBUILD_MODNAME, | |
3101 | .ids = acpi_nfit_ids, | |
3102 | .ops = { | |
3103 | .add = acpi_nfit_add, | |
3104 | .remove = acpi_nfit_remove, | |
20985164 | 3105 | .notify = acpi_nfit_notify, |
b94d5230 DW |
3106 | }, |
3107 | }; | |
3108 | ||
3109 | static __init int nfit_init(void) | |
3110 | { | |
3111 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); | |
3112 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); | |
3113 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); | |
3114 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); | |
3115 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); | |
3116 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); | |
3117 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
3118 | ||
41c8bdb3 AS |
3119 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
3120 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); | |
3121 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); | |
3122 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); | |
3123 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); | |
3124 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); | |
3125 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); | |
3126 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); | |
3127 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); | |
3128 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); | |
3129 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); | |
3130 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
3131 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); | |
b94d5230 | 3132 | |
7ae0fa43 DW |
3133 | nfit_wq = create_singlethread_workqueue("nfit"); |
3134 | if (!nfit_wq) | |
3135 | return -ENOMEM; | |
3136 | ||
6839a6d9 VV |
3137 | nfit_mce_register(); |
3138 | ||
b94d5230 DW |
3139 | return acpi_bus_register_driver(&acpi_nfit_driver); |
3140 | } | |
3141 | ||
3142 | static __exit void nfit_exit(void) | |
3143 | { | |
6839a6d9 | 3144 | nfit_mce_unregister(); |
b94d5230 | 3145 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 3146 | destroy_workqueue(nfit_wq); |
6839a6d9 | 3147 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
3148 | } |
3149 | ||
3150 | module_init(nfit_init); | |
3151 | module_exit(nfit_exit); | |
3152 | MODULE_LICENSE("GPL v2"); | |
3153 | MODULE_AUTHOR("Intel Corporation"); |