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95857638 | 1 | // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 |
1da177e4 LT |
2 | /****************************************************************************** |
3 | * | |
4 | * Module Name: hwgpe - Low level GPE enable/disable/clear functions | |
5 | * | |
800ba7c5 | 6 | * Copyright (C) 2000 - 2020, Intel Corp. |
1da177e4 | 7 | * |
95857638 | 8 | *****************************************************************************/ |
1da177e4 LT |
9 | |
10 | #include <acpi/acpi.h> | |
e2f7a777 LB |
11 | #include "accommon.h" |
12 | #include "acevents.h" | |
1da177e4 LT |
13 | |
14 | #define _COMPONENT ACPI_HARDWARE | |
4be44fcd | 15 | ACPI_MODULE_NAME("hwgpe") |
33620c54 | 16 | #if (!ACPI_REDUCED_HARDWARE) /* Entire module */ |
44f6c012 | 17 | /* Local prototypes */ |
44f6c012 | 18 | static acpi_status |
4be44fcd | 19 | acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info, |
e97d6bf1 BM |
20 | struct acpi_gpe_block_info *gpe_block, |
21 | void *context); | |
1da177e4 | 22 | |
1c4c81a2 LZ |
23 | static acpi_status |
24 | acpi_hw_gpe_enable_write(u8 enable_mask, | |
25 | struct acpi_gpe_register_info *gpe_register_info); | |
26 | ||
e4e9a735 RW |
27 | /****************************************************************************** |
28 | * | |
b76df673 | 29 | * FUNCTION: acpi_hw_get_gpe_register_bit |
e4e9a735 RW |
30 | * |
31 | * PARAMETERS: gpe_event_info - Info block for the GPE | |
e4e9a735 | 32 | * |
da503373 | 33 | * RETURN: Register mask with a one in the GPE bit position |
e4e9a735 | 34 | * |
da503373 LM |
35 | * DESCRIPTION: Compute the register mask for this GPE. One bit is set in the |
36 | * correct position for the input GPE. | |
e4e9a735 RW |
37 | * |
38 | ******************************************************************************/ | |
39 | ||
1d94e1e8 | 40 | u32 acpi_hw_get_gpe_register_bit(struct acpi_gpe_event_info *gpe_event_info) |
e4e9a735 | 41 | { |
9c0d7939 LZ |
42 | |
43 | return ((u32)1 << | |
44 | (gpe_event_info->gpe_number - | |
45 | gpe_event_info->register_info->base_gpe_number)); | |
e4e9a735 RW |
46 | } |
47 | ||
e38e8a07 BM |
48 | /****************************************************************************** |
49 | * | |
fd247447 | 50 | * FUNCTION: acpi_hw_low_set_gpe |
e38e8a07 BM |
51 | * |
52 | * PARAMETERS: gpe_event_info - Info block for the GPE to be disabled | |
fd247447 | 53 | * action - Enable or disable |
e38e8a07 BM |
54 | * |
55 | * RETURN: Status | |
56 | * | |
da503373 | 57 | * DESCRIPTION: Enable or disable a single GPE in the parent enable register. |
0ee0d349 RW |
58 | * The enable_mask field of the involved GPE register must be |
59 | * updated by the caller if necessary. | |
e38e8a07 BM |
60 | * |
61 | ******************************************************************************/ | |
62 | ||
fd247447 | 63 | acpi_status |
da503373 | 64 | acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action) |
e38e8a07 BM |
65 | { |
66 | struct acpi_gpe_register_info *gpe_register_info; | |
2af52c2b | 67 | acpi_status status = AE_OK; |
8381c54f | 68 | u64 enable_mask; |
e4e9a735 | 69 | u32 register_bit; |
e38e8a07 | 70 | |
fd247447 RW |
71 | ACPI_FUNCTION_ENTRY(); |
72 | ||
e38e8a07 BM |
73 | /* Get the info block for the entire GPE register */ |
74 | ||
75 | gpe_register_info = gpe_event_info->register_info; | |
76 | if (!gpe_register_info) { | |
77 | return (AE_NOT_EXIST); | |
78 | } | |
79 | ||
80 | /* Get current value of the enable register that contains this GPE */ | |
81 | ||
c6b5774c | 82 | status = acpi_hw_read(&enable_mask, &gpe_register_info->enable_address); |
e38e8a07 BM |
83 | if (ACPI_FAILURE(status)) { |
84 | return (status); | |
85 | } | |
86 | ||
da503373 | 87 | /* Set or clear just the bit that corresponds to this GPE */ |
e38e8a07 | 88 | |
1d94e1e8 | 89 | register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info); |
0ee0d349 | 90 | switch (action) { |
3a37898d | 91 | case ACPI_GPE_CONDITIONAL_ENABLE: |
da503373 | 92 | |
c50f13c6 | 93 | /* Only enable if the corresponding enable_mask bit is set */ |
da503373 | 94 | |
c50f13c6 | 95 | if (!(register_bit & gpe_register_info->enable_mask)) { |
c9a8bbb7 | 96 | return (AE_BAD_PARAMETER); |
da503373 LM |
97 | } |
98 | ||
99 | /*lint -fallthrough */ | |
c9a8bbb7 | 100 | |
fd247447 | 101 | case ACPI_GPE_ENABLE: |
1d1ea1b7 | 102 | |
fd247447 RW |
103 | ACPI_SET_BIT(enable_mask, register_bit); |
104 | break; | |
105 | ||
106 | case ACPI_GPE_DISABLE: | |
1d1ea1b7 | 107 | |
fd247447 RW |
108 | ACPI_CLEAR_BIT(enable_mask, register_bit); |
109 | break; | |
110 | ||
111 | default: | |
1d1ea1b7 | 112 | |
5e30a96e | 113 | ACPI_ERROR((AE_INFO, "Invalid GPE Action, %u", action)); |
fd247447 RW |
114 | return (AE_BAD_PARAMETER); |
115 | } | |
e38e8a07 | 116 | |
2af52c2b | 117 | if (!(register_bit & gpe_register_info->mask_for_run)) { |
e38e8a07 | 118 | |
2af52c2b LZ |
119 | /* Write the updated enable mask */ |
120 | ||
121 | status = | |
122 | acpi_hw_write(enable_mask, | |
123 | &gpe_register_info->enable_address); | |
124 | } | |
e38e8a07 BM |
125 | return (status); |
126 | } | |
127 | ||
1da177e4 LT |
128 | /****************************************************************************** |
129 | * | |
130 | * FUNCTION: acpi_hw_clear_gpe | |
131 | * | |
132 | * PARAMETERS: gpe_event_info - Info block for the GPE to be cleared | |
133 | * | |
134 | * RETURN: Status | |
135 | * | |
136 | * DESCRIPTION: Clear the status bit for a single GPE. | |
137 | * | |
138 | ******************************************************************************/ | |
139 | ||
f5c1e1c5 | 140 | acpi_status acpi_hw_clear_gpe(struct acpi_gpe_event_info *gpe_event_info) |
1da177e4 | 141 | { |
e4e9a735 | 142 | struct acpi_gpe_register_info *gpe_register_info; |
4be44fcd | 143 | acpi_status status; |
e4e9a735 | 144 | u32 register_bit; |
1da177e4 | 145 | |
4be44fcd | 146 | ACPI_FUNCTION_ENTRY(); |
1da177e4 | 147 | |
e4e9a735 RW |
148 | /* Get the info block for the entire GPE register */ |
149 | ||
150 | gpe_register_info = gpe_event_info->register_info; | |
151 | if (!gpe_register_info) { | |
152 | return (AE_NOT_EXIST); | |
153 | } | |
154 | ||
1da177e4 LT |
155 | /* |
156 | * Write a one to the appropriate bit in the status register to | |
157 | * clear this GPE. | |
158 | */ | |
1d94e1e8 | 159 | register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info); |
da503373 | 160 | |
1fad8738 BM |
161 | status = |
162 | acpi_hw_write(register_bit, &gpe_register_info->status_address); | |
1da177e4 LT |
163 | return (status); |
164 | } | |
165 | ||
1da177e4 LT |
166 | /****************************************************************************** |
167 | * | |
168 | * FUNCTION: acpi_hw_get_gpe_status | |
169 | * | |
170 | * PARAMETERS: gpe_event_info - Info block for the GPE to queried | |
171 | * event_status - Where the GPE status is returned | |
172 | * | |
173 | * RETURN: Status | |
174 | * | |
175 | * DESCRIPTION: Return the status of a single GPE. | |
176 | * | |
177 | ******************************************************************************/ | |
44f6c012 | 178 | |
1da177e4 | 179 | acpi_status |
f5c1e1c5 | 180 | acpi_hw_get_gpe_status(struct acpi_gpe_event_info *gpe_event_info, |
f19f1a7e | 181 | acpi_event_status *event_status) |
1da177e4 | 182 | { |
8381c54f | 183 | u64 in_byte; |
e4e9a735 | 184 | u32 register_bit; |
4be44fcd | 185 | struct acpi_gpe_register_info *gpe_register_info; |
4be44fcd | 186 | acpi_event_status local_event_status = 0; |
da503373 | 187 | acpi_status status; |
1da177e4 | 188 | |
4be44fcd | 189 | ACPI_FUNCTION_ENTRY(); |
1da177e4 LT |
190 | |
191 | if (!event_status) { | |
192 | return (AE_BAD_PARAMETER); | |
193 | } | |
194 | ||
a08f813e LZ |
195 | /* GPE currently handled? */ |
196 | ||
7c43312a | 197 | if (ACPI_GPE_DISPATCH_TYPE(gpe_event_info->flags) != |
a08f813e | 198 | ACPI_GPE_DISPATCH_NONE) { |
2f857234 | 199 | local_event_status |= ACPI_EVENT_FLAG_HAS_HANDLER; |
a08f813e LZ |
200 | } |
201 | ||
1da177e4 LT |
202 | /* Get the info block for the entire GPE register */ |
203 | ||
204 | gpe_register_info = gpe_event_info->register_info; | |
205 | ||
206 | /* Get the register bitmask for this GPE */ | |
207 | ||
1d94e1e8 | 208 | register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info); |
1da177e4 LT |
209 | |
210 | /* GPE currently enabled? (enabled for runtime?) */ | |
211 | ||
212 | if (register_bit & gpe_register_info->enable_for_run) { | |
213 | local_event_status |= ACPI_EVENT_FLAG_ENABLED; | |
214 | } | |
215 | ||
2af52c2b LZ |
216 | /* GPE currently masked? (masked for runtime?) */ |
217 | ||
218 | if (register_bit & gpe_register_info->mask_for_run) { | |
219 | local_event_status |= ACPI_EVENT_FLAG_MASKED; | |
220 | } | |
221 | ||
1da177e4 LT |
222 | /* GPE enabled for wake? */ |
223 | ||
224 | if (register_bit & gpe_register_info->enable_for_wake) { | |
225 | local_event_status |= ACPI_EVENT_FLAG_WAKE_ENABLED; | |
226 | } | |
227 | ||
09af8e82 LZ |
228 | /* GPE currently enabled (enable bit == 1)? */ |
229 | ||
230 | status = acpi_hw_read(&in_byte, &gpe_register_info->enable_address); | |
231 | if (ACPI_FAILURE(status)) { | |
232 | return (status); | |
233 | } | |
234 | ||
235 | if (register_bit & in_byte) { | |
236 | local_event_status |= ACPI_EVENT_FLAG_ENABLE_SET; | |
237 | } | |
238 | ||
1da177e4 LT |
239 | /* GPE currently active (status bit == 1)? */ |
240 | ||
c6b5774c | 241 | status = acpi_hw_read(&in_byte, &gpe_register_info->status_address); |
4be44fcd | 242 | if (ACPI_FAILURE(status)) { |
2147d3f0 | 243 | return (status); |
1da177e4 LT |
244 | } |
245 | ||
246 | if (register_bit & in_byte) { | |
09af8e82 | 247 | local_event_status |= ACPI_EVENT_FLAG_STATUS_SET; |
1da177e4 LT |
248 | } |
249 | ||
250 | /* Set return value */ | |
251 | ||
252 | (*event_status) = local_event_status; | |
2147d3f0 | 253 | return (AE_OK); |
1da177e4 | 254 | } |
1da177e4 | 255 | |
c50f13c6 RW |
256 | /****************************************************************************** |
257 | * | |
258 | * FUNCTION: acpi_hw_gpe_enable_write | |
259 | * | |
260 | * PARAMETERS: enable_mask - Bit mask to write to the GPE register | |
261 | * gpe_register_info - Gpe Register info | |
262 | * | |
263 | * RETURN: Status | |
264 | * | |
265 | * DESCRIPTION: Write the enable mask byte to the given GPE register. | |
266 | * | |
267 | ******************************************************************************/ | |
268 | ||
269 | static acpi_status | |
270 | acpi_hw_gpe_enable_write(u8 enable_mask, | |
271 | struct acpi_gpe_register_info *gpe_register_info) | |
272 | { | |
273 | acpi_status status; | |
274 | ||
0ee0d349 | 275 | gpe_register_info->enable_mask = enable_mask; |
5431b654 | 276 | |
1fad8738 | 277 | status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address); |
c50f13c6 RW |
278 | return (status); |
279 | } | |
280 | ||
1da177e4 LT |
281 | /****************************************************************************** |
282 | * | |
283 | * FUNCTION: acpi_hw_disable_gpe_block | |
284 | * | |
285 | * PARAMETERS: gpe_xrupt_info - GPE Interrupt info | |
286 | * gpe_block - Gpe Block info | |
287 | * | |
288 | * RETURN: Status | |
289 | * | |
44f6c012 | 290 | * DESCRIPTION: Disable all GPEs within a single GPE block |
1da177e4 LT |
291 | * |
292 | ******************************************************************************/ | |
293 | ||
294 | acpi_status | |
e97d6bf1 BM |
295 | acpi_hw_disable_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info, |
296 | struct acpi_gpe_block_info *gpe_block, void *context) | |
1da177e4 | 297 | { |
4be44fcd LB |
298 | u32 i; |
299 | acpi_status status; | |
1da177e4 LT |
300 | |
301 | /* Examine each GPE Register within the block */ | |
302 | ||
303 | for (i = 0; i < gpe_block->register_count; i++) { | |
52fc0b02 | 304 | |
1da177e4 LT |
305 | /* Disable all GPEs in this register */ |
306 | ||
ecfbbc7b | 307 | status = |
c50f13c6 RW |
308 | acpi_hw_gpe_enable_write(0x00, |
309 | &gpe_block->register_info[i]); | |
4be44fcd | 310 | if (ACPI_FAILURE(status)) { |
1da177e4 LT |
311 | return (status); |
312 | } | |
313 | } | |
314 | ||
315 | return (AE_OK); | |
316 | } | |
317 | ||
1da177e4 LT |
318 | /****************************************************************************** |
319 | * | |
320 | * FUNCTION: acpi_hw_clear_gpe_block | |
321 | * | |
322 | * PARAMETERS: gpe_xrupt_info - GPE Interrupt info | |
323 | * gpe_block - Gpe Block info | |
324 | * | |
325 | * RETURN: Status | |
326 | * | |
44f6c012 | 327 | * DESCRIPTION: Clear status bits for all GPEs within a single GPE block |
1da177e4 LT |
328 | * |
329 | ******************************************************************************/ | |
330 | ||
331 | acpi_status | |
e97d6bf1 BM |
332 | acpi_hw_clear_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info, |
333 | struct acpi_gpe_block_info *gpe_block, void *context) | |
1da177e4 | 334 | { |
4be44fcd LB |
335 | u32 i; |
336 | acpi_status status; | |
1da177e4 LT |
337 | |
338 | /* Examine each GPE Register within the block */ | |
339 | ||
340 | for (i = 0; i < gpe_block->register_count; i++) { | |
52fc0b02 | 341 | |
1da177e4 LT |
342 | /* Clear status on all GPEs in this register */ |
343 | ||
ecfbbc7b | 344 | status = |
c6b5774c BM |
345 | acpi_hw_write(0xFF, |
346 | &gpe_block->register_info[i].status_address); | |
4be44fcd | 347 | if (ACPI_FAILURE(status)) { |
1da177e4 LT |
348 | return (status); |
349 | } | |
350 | } | |
351 | ||
352 | return (AE_OK); | |
353 | } | |
354 | ||
1da177e4 LT |
355 | /****************************************************************************** |
356 | * | |
357 | * FUNCTION: acpi_hw_enable_runtime_gpe_block | |
358 | * | |
359 | * PARAMETERS: gpe_xrupt_info - GPE Interrupt info | |
360 | * gpe_block - Gpe Block info | |
361 | * | |
362 | * RETURN: Status | |
363 | * | |
44f6c012 RM |
364 | * DESCRIPTION: Enable all "runtime" GPEs within a single GPE block. Includes |
365 | * combination wake/run GPEs. | |
1da177e4 LT |
366 | * |
367 | ******************************************************************************/ | |
368 | ||
369 | acpi_status | |
e97d6bf1 | 370 | acpi_hw_enable_runtime_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info, |
f5c1e1c5 | 371 | struct acpi_gpe_block_info *gpe_block, |
1f86e8c1 | 372 | void *context) |
1da177e4 | 373 | { |
4be44fcd LB |
374 | u32 i; |
375 | acpi_status status; | |
c50f13c6 | 376 | struct acpi_gpe_register_info *gpe_register_info; |
2af52c2b | 377 | u8 enable_mask; |
1da177e4 LT |
378 | |
379 | /* NOTE: assumes that all GPEs are currently disabled */ | |
380 | ||
381 | /* Examine each GPE Register within the block */ | |
382 | ||
383 | for (i = 0; i < gpe_block->register_count; i++) { | |
c50f13c6 RW |
384 | gpe_register_info = &gpe_block->register_info[i]; |
385 | if (!gpe_register_info->enable_for_run) { | |
1da177e4 LT |
386 | continue; |
387 | } | |
388 | ||
389 | /* Enable all "runtime" GPEs in this register */ | |
390 | ||
2af52c2b LZ |
391 | enable_mask = gpe_register_info->enable_for_run & |
392 | ~gpe_register_info->mask_for_run; | |
c6b5774c | 393 | status = |
2af52c2b | 394 | acpi_hw_gpe_enable_write(enable_mask, gpe_register_info); |
4be44fcd | 395 | if (ACPI_FAILURE(status)) { |
1da177e4 LT |
396 | return (status); |
397 | } | |
398 | } | |
399 | ||
400 | return (AE_OK); | |
401 | } | |
402 | ||
1da177e4 LT |
403 | /****************************************************************************** |
404 | * | |
405 | * FUNCTION: acpi_hw_enable_wakeup_gpe_block | |
406 | * | |
407 | * PARAMETERS: gpe_xrupt_info - GPE Interrupt info | |
408 | * gpe_block - Gpe Block info | |
409 | * | |
410 | * RETURN: Status | |
411 | * | |
44f6c012 RM |
412 | * DESCRIPTION: Enable all "wake" GPEs within a single GPE block. Includes |
413 | * combination wake/run GPEs. | |
1da177e4 LT |
414 | * |
415 | ******************************************************************************/ | |
416 | ||
44f6c012 | 417 | static acpi_status |
4be44fcd | 418 | acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info, |
e97d6bf1 BM |
419 | struct acpi_gpe_block_info *gpe_block, |
420 | void *context) | |
1da177e4 | 421 | { |
4be44fcd LB |
422 | u32 i; |
423 | acpi_status status; | |
c50f13c6 | 424 | struct acpi_gpe_register_info *gpe_register_info; |
1da177e4 LT |
425 | |
426 | /* Examine each GPE Register within the block */ | |
427 | ||
428 | for (i = 0; i < gpe_block->register_count; i++) { | |
c50f13c6 | 429 | gpe_register_info = &gpe_block->register_info[i]; |
1da177e4 | 430 | |
5a0b8dee RW |
431 | /* |
432 | * Enable all "wake" GPEs in this register and disable the | |
433 | * remaining ones. | |
434 | */ | |
1da177e4 | 435 | |
c6b5774c | 436 | status = |
c50f13c6 RW |
437 | acpi_hw_gpe_enable_write(gpe_register_info->enable_for_wake, |
438 | gpe_register_info); | |
4be44fcd | 439 | if (ACPI_FAILURE(status)) { |
1da177e4 LT |
440 | return (status); |
441 | } | |
442 | } | |
443 | ||
444 | return (AE_OK); | |
445 | } | |
446 | ||
0ce792d6 RW |
447 | struct acpi_gpe_block_status_context { |
448 | struct acpi_gpe_register_info *gpe_skip_register_info; | |
449 | u8 gpe_skip_mask; | |
450 | u8 retval; | |
451 | }; | |
452 | ||
ea128834 RW |
453 | /****************************************************************************** |
454 | * | |
455 | * FUNCTION: acpi_hw_get_gpe_block_status | |
456 | * | |
457 | * PARAMETERS: gpe_xrupt_info - GPE Interrupt info | |
458 | * gpe_block - Gpe Block info | |
0ce792d6 | 459 | * context - GPE list walk context data |
ea128834 RW |
460 | * |
461 | * RETURN: Success | |
462 | * | |
463 | * DESCRIPTION: Produce a combined GPE status bits mask for the given block. | |
464 | * | |
465 | ******************************************************************************/ | |
466 | ||
467 | static acpi_status | |
468 | acpi_hw_get_gpe_block_status(struct acpi_gpe_xrupt_info *gpe_xrupt_info, | |
469 | struct acpi_gpe_block_info *gpe_block, | |
0ce792d6 | 470 | void *context) |
ea128834 | 471 | { |
0ce792d6 | 472 | struct acpi_gpe_block_status_context *c = context; |
ea128834 RW |
473 | struct acpi_gpe_register_info *gpe_register_info; |
474 | u64 in_enable, in_status; | |
475 | acpi_status status; | |
0ce792d6 | 476 | u8 ret_mask; |
ea128834 RW |
477 | u32 i; |
478 | ||
479 | /* Examine each GPE Register within the block */ | |
480 | ||
481 | for (i = 0; i < gpe_block->register_count; i++) { | |
482 | gpe_register_info = &gpe_block->register_info[i]; | |
483 | ||
484 | status = acpi_hw_read(&in_enable, | |
485 | &gpe_register_info->enable_address); | |
486 | if (ACPI_FAILURE(status)) { | |
487 | continue; | |
488 | } | |
489 | ||
490 | status = acpi_hw_read(&in_status, | |
491 | &gpe_register_info->status_address); | |
492 | if (ACPI_FAILURE(status)) { | |
493 | continue; | |
494 | } | |
495 | ||
0ce792d6 RW |
496 | ret_mask = in_enable & in_status; |
497 | if (ret_mask && c->gpe_skip_register_info == gpe_register_info) { | |
498 | ret_mask &= ~c->gpe_skip_mask; | |
499 | } | |
500 | c->retval |= ret_mask; | |
ea128834 RW |
501 | } |
502 | ||
503 | return (AE_OK); | |
504 | } | |
505 | ||
1da177e4 LT |
506 | /****************************************************************************** |
507 | * | |
508 | * FUNCTION: acpi_hw_disable_all_gpes | |
509 | * | |
73459f73 | 510 | * PARAMETERS: None |
1da177e4 LT |
511 | * |
512 | * RETURN: Status | |
513 | * | |
44f6c012 | 514 | * DESCRIPTION: Disable and clear all GPEs in all GPE blocks |
1da177e4 LT |
515 | * |
516 | ******************************************************************************/ | |
517 | ||
4be44fcd | 518 | acpi_status acpi_hw_disable_all_gpes(void) |
1da177e4 | 519 | { |
4be44fcd | 520 | acpi_status status; |
1da177e4 | 521 | |
b229cf92 | 522 | ACPI_FUNCTION_TRACE(hw_disable_all_gpes); |
1da177e4 | 523 | |
e97d6bf1 | 524 | status = acpi_ev_walk_gpe_list(acpi_hw_disable_gpe_block, NULL); |
4be44fcd | 525 | return_ACPI_STATUS(status); |
1da177e4 LT |
526 | } |
527 | ||
1da177e4 LT |
528 | /****************************************************************************** |
529 | * | |
530 | * FUNCTION: acpi_hw_enable_all_runtime_gpes | |
531 | * | |
73459f73 | 532 | * PARAMETERS: None |
1da177e4 LT |
533 | * |
534 | * RETURN: Status | |
535 | * | |
44f6c012 | 536 | * DESCRIPTION: Enable all "runtime" GPEs, in all GPE blocks |
1da177e4 LT |
537 | * |
538 | ******************************************************************************/ | |
539 | ||
4be44fcd | 540 | acpi_status acpi_hw_enable_all_runtime_gpes(void) |
1da177e4 | 541 | { |
4be44fcd | 542 | acpi_status status; |
1da177e4 | 543 | |
b229cf92 | 544 | ACPI_FUNCTION_TRACE(hw_enable_all_runtime_gpes); |
1da177e4 | 545 | |
e97d6bf1 | 546 | status = acpi_ev_walk_gpe_list(acpi_hw_enable_runtime_gpe_block, NULL); |
4be44fcd | 547 | return_ACPI_STATUS(status); |
1da177e4 LT |
548 | } |
549 | ||
1da177e4 LT |
550 | /****************************************************************************** |
551 | * | |
552 | * FUNCTION: acpi_hw_enable_all_wakeup_gpes | |
553 | * | |
73459f73 | 554 | * PARAMETERS: None |
1da177e4 LT |
555 | * |
556 | * RETURN: Status | |
557 | * | |
44f6c012 | 558 | * DESCRIPTION: Enable all "wakeup" GPEs, in all GPE blocks |
1da177e4 LT |
559 | * |
560 | ******************************************************************************/ | |
561 | ||
4be44fcd | 562 | acpi_status acpi_hw_enable_all_wakeup_gpes(void) |
1da177e4 | 563 | { |
4be44fcd | 564 | acpi_status status; |
1da177e4 | 565 | |
b229cf92 | 566 | ACPI_FUNCTION_TRACE(hw_enable_all_wakeup_gpes); |
1da177e4 | 567 | |
e97d6bf1 | 568 | status = acpi_ev_walk_gpe_list(acpi_hw_enable_wakeup_gpe_block, NULL); |
4be44fcd | 569 | return_ACPI_STATUS(status); |
1da177e4 | 570 | } |
33620c54 | 571 | |
ea128834 RW |
572 | /****************************************************************************** |
573 | * | |
574 | * FUNCTION: acpi_hw_check_all_gpes | |
575 | * | |
0ce792d6 RW |
576 | * PARAMETERS: gpe_skip_device - GPE devoce of the GPE to skip |
577 | * gpe_skip_number - Number of the GPE to skip | |
ea128834 RW |
578 | * |
579 | * RETURN: Combined status of all GPEs | |
580 | * | |
0ce792d6 RW |
581 | * DESCRIPTION: Check all enabled GPEs in all GPE blocks, except for the one |
582 | * represented by the "skip" arguments, and return TRUE if the | |
ea128834 RW |
583 | * status bit is set for at least one of them of FALSE otherwise. |
584 | * | |
585 | ******************************************************************************/ | |
586 | ||
0ce792d6 | 587 | u8 acpi_hw_check_all_gpes(acpi_handle gpe_skip_device, u32 gpe_skip_number) |
ea128834 | 588 | { |
0ce792d6 RW |
589 | struct acpi_gpe_block_status_context context = { |
590 | .gpe_skip_register_info = NULL, | |
591 | .retval = 0, | |
592 | }; | |
593 | struct acpi_gpe_event_info *gpe_event_info; | |
594 | acpi_cpu_flags flags; | |
ea128834 RW |
595 | |
596 | ACPI_FUNCTION_TRACE(acpi_hw_check_all_gpes); | |
597 | ||
0ce792d6 RW |
598 | flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock); |
599 | ||
600 | gpe_event_info = acpi_ev_get_gpe_event_info(gpe_skip_device, | |
601 | gpe_skip_number); | |
602 | if (gpe_event_info) { | |
603 | context.gpe_skip_register_info = gpe_event_info->register_info; | |
604 | context.gpe_skip_mask = acpi_hw_get_gpe_register_bit(gpe_event_info); | |
605 | } | |
606 | ||
607 | acpi_os_release_lock(acpi_gbl_gpe_lock, flags); | |
ea128834 | 608 | |
0ce792d6 RW |
609 | (void)acpi_ev_walk_gpe_list(acpi_hw_get_gpe_block_status, &context); |
610 | return (context.retval != 0); | |
ea128834 RW |
611 | } |
612 | ||
33620c54 | 613 | #endif /* !ACPI_REDUCED_HARDWARE */ |