Commit | Line | Data |
---|---|---|
f58b082a RW |
1 | /* |
2 | * ACPI support for Intel Lynxpoint LPSS. | |
3 | * | |
4 | * Copyright (C) 2013, Intel Corporation | |
5 | * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | |
6 | * Rafael J. Wysocki <rafael.j.wysocki@intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/acpi.h> | |
14 | #include <linux/clk.h> | |
15 | #include <linux/clkdev.h> | |
16 | #include <linux/clk-provider.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/platform_data/clk-lpss.h> | |
2e0f8822 | 21 | #include <linux/pm_runtime.h> |
f58b082a RW |
22 | |
23 | #include "internal.h" | |
24 | ||
25 | ACPI_MODULE_NAME("acpi_lpss"); | |
26 | ||
f58b082a | 27 | #define LPSS_CLK_SIZE 0x04 |
2e0f8822 RW |
28 | #define LPSS_LTR_SIZE 0x18 |
29 | ||
30 | /* Offsets relative to LPSS_PRIVATE_OFFSET */ | |
31 | #define LPSS_GENERAL 0x08 | |
32 | #define LPSS_GENERAL_LTR_MODE_SW BIT(2) | |
088f1fd2 | 33 | #define LPSS_GENERAL_UART_RTS_OVRD BIT(3) |
2e0f8822 RW |
34 | #define LPSS_SW_LTR 0x10 |
35 | #define LPSS_AUTO_LTR 0x14 | |
06d86415 HK |
36 | #define LPSS_TX_INT 0x20 |
37 | #define LPSS_TX_INT_MASK BIT(1) | |
f58b082a | 38 | |
f6272170 MW |
39 | struct lpss_shared_clock { |
40 | const char *name; | |
41 | unsigned long rate; | |
42 | struct clk *clk; | |
43 | }; | |
44 | ||
06d86415 | 45 | struct lpss_private_data; |
f58b082a RW |
46 | |
47 | struct lpss_device_desc { | |
48 | bool clk_required; | |
b59cc200 | 49 | const char *clkdev_name; |
2e0f8822 RW |
50 | bool ltr_required; |
51 | unsigned int prv_offset; | |
958c4eb2 | 52 | size_t prv_size_override; |
f6272170 MW |
53 | bool clk_gate; |
54 | struct lpss_shared_clock *shared_clock; | |
06d86415 | 55 | void (*setup)(struct lpss_private_data *pdata); |
f58b082a RW |
56 | }; |
57 | ||
b59cc200 RW |
58 | static struct lpss_device_desc lpss_dma_desc = { |
59 | .clk_required = true, | |
60 | .clkdev_name = "hclk", | |
61 | }; | |
62 | ||
f58b082a RW |
63 | struct lpss_private_data { |
64 | void __iomem *mmio_base; | |
65 | resource_size_t mmio_size; | |
66 | struct clk *clk; | |
67 | const struct lpss_device_desc *dev_desc; | |
68 | }; | |
69 | ||
06d86415 HK |
70 | static void lpss_uart_setup(struct lpss_private_data *pdata) |
71 | { | |
088f1fd2 | 72 | unsigned int offset; |
06d86415 HK |
73 | u32 reg; |
74 | ||
088f1fd2 HK |
75 | offset = pdata->dev_desc->prv_offset + LPSS_TX_INT; |
76 | reg = readl(pdata->mmio_base + offset); | |
77 | writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset); | |
78 | ||
79 | offset = pdata->dev_desc->prv_offset + LPSS_GENERAL; | |
80 | reg = readl(pdata->mmio_base + offset); | |
81 | writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset); | |
06d86415 HK |
82 | } |
83 | ||
f58b082a RW |
84 | static struct lpss_device_desc lpt_dev_desc = { |
85 | .clk_required = true, | |
2e0f8822 RW |
86 | .prv_offset = 0x800, |
87 | .ltr_required = true, | |
f6272170 | 88 | .clk_gate = true, |
2e0f8822 RW |
89 | }; |
90 | ||
06d86415 HK |
91 | static struct lpss_device_desc lpt_uart_dev_desc = { |
92 | .clk_required = true, | |
93 | .prv_offset = 0x800, | |
94 | .ltr_required = true, | |
95 | .clk_gate = true, | |
96 | .setup = lpss_uart_setup, | |
2e0f8822 RW |
97 | }; |
98 | ||
99 | static struct lpss_device_desc lpt_sdio_dev_desc = { | |
100 | .prv_offset = 0x1000, | |
958c4eb2 | 101 | .prv_size_override = 0x1018, |
2e0f8822 | 102 | .ltr_required = true, |
f58b082a RW |
103 | }; |
104 | ||
f6272170 MW |
105 | static struct lpss_shared_clock uart_clock = { |
106 | .name = "uart_clk", | |
107 | .rate = 44236800, | |
108 | }; | |
109 | ||
110 | static struct lpss_device_desc byt_uart_dev_desc = { | |
111 | .clk_required = true, | |
112 | .prv_offset = 0x800, | |
113 | .clk_gate = true, | |
114 | .shared_clock = &uart_clock, | |
06d86415 | 115 | .setup = lpss_uart_setup, |
f6272170 MW |
116 | }; |
117 | ||
118 | static struct lpss_shared_clock spi_clock = { | |
119 | .name = "spi_clk", | |
120 | .rate = 50000000, | |
121 | }; | |
122 | ||
123 | static struct lpss_device_desc byt_spi_dev_desc = { | |
124 | .clk_required = true, | |
125 | .prv_offset = 0x400, | |
126 | .clk_gate = true, | |
127 | .shared_clock = &spi_clock, | |
128 | }; | |
129 | ||
130 | static struct lpss_device_desc byt_sdio_dev_desc = { | |
131 | .clk_required = true, | |
132 | }; | |
133 | ||
134 | static struct lpss_shared_clock i2c_clock = { | |
135 | .name = "i2c_clk", | |
136 | .rate = 100000000, | |
137 | }; | |
138 | ||
139 | static struct lpss_device_desc byt_i2c_dev_desc = { | |
140 | .clk_required = true, | |
141 | .prv_offset = 0x800, | |
142 | .shared_clock = &i2c_clock, | |
143 | }; | |
144 | ||
f58b082a | 145 | static const struct acpi_device_id acpi_lpss_device_ids[] = { |
b59cc200 RW |
146 | /* Generic LPSS devices */ |
147 | { "INTL9C60", (unsigned long)&lpss_dma_desc }, | |
148 | ||
f58b082a RW |
149 | /* Lynxpoint LPSS devices */ |
150 | { "INT33C0", (unsigned long)&lpt_dev_desc }, | |
151 | { "INT33C1", (unsigned long)&lpt_dev_desc }, | |
152 | { "INT33C2", (unsigned long)&lpt_dev_desc }, | |
153 | { "INT33C3", (unsigned long)&lpt_dev_desc }, | |
06d86415 HK |
154 | { "INT33C4", (unsigned long)&lpt_uart_dev_desc }, |
155 | { "INT33C5", (unsigned long)&lpt_uart_dev_desc }, | |
2e0f8822 | 156 | { "INT33C6", (unsigned long)&lpt_sdio_dev_desc }, |
f58b082a RW |
157 | { "INT33C7", }, |
158 | ||
f6272170 MW |
159 | /* BayTrail LPSS devices */ |
160 | { "80860F0A", (unsigned long)&byt_uart_dev_desc }, | |
161 | { "80860F0E", (unsigned long)&byt_spi_dev_desc }, | |
162 | { "80860F14", (unsigned long)&byt_sdio_dev_desc }, | |
163 | { "80860F41", (unsigned long)&byt_i2c_dev_desc }, | |
164 | { "INT33B2", }, | |
165 | ||
a4d97536 MW |
166 | { "INT3430", (unsigned long)&lpt_dev_desc }, |
167 | { "INT3431", (unsigned long)&lpt_dev_desc }, | |
168 | { "INT3432", (unsigned long)&lpt_dev_desc }, | |
169 | { "INT3433", (unsigned long)&lpt_dev_desc }, | |
170 | { "INT3434", (unsigned long)&lpt_uart_dev_desc }, | |
171 | { "INT3435", (unsigned long)&lpt_uart_dev_desc }, | |
172 | { "INT3436", (unsigned long)&lpt_sdio_dev_desc }, | |
173 | { "INT3437", }, | |
174 | ||
f58b082a RW |
175 | { } |
176 | }; | |
177 | ||
178 | static int is_memory(struct acpi_resource *res, void *not_used) | |
179 | { | |
180 | struct resource r; | |
181 | return !acpi_dev_resource_memory(res, &r); | |
182 | } | |
183 | ||
184 | /* LPSS main clock device. */ | |
185 | static struct platform_device *lpss_clk_dev; | |
186 | ||
187 | static inline void lpt_register_clock_device(void) | |
188 | { | |
189 | lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0); | |
190 | } | |
191 | ||
192 | static int register_device_clock(struct acpi_device *adev, | |
193 | struct lpss_private_data *pdata) | |
194 | { | |
195 | const struct lpss_device_desc *dev_desc = pdata->dev_desc; | |
f6272170 MW |
196 | struct lpss_shared_clock *shared_clock = dev_desc->shared_clock; |
197 | struct clk *clk = ERR_PTR(-ENODEV); | |
b59cc200 | 198 | struct lpss_clk_data *clk_data; |
f6272170 | 199 | const char *parent; |
f58b082a RW |
200 | |
201 | if (!lpss_clk_dev) | |
202 | lpt_register_clock_device(); | |
203 | ||
b59cc200 RW |
204 | clk_data = platform_get_drvdata(lpss_clk_dev); |
205 | if (!clk_data) | |
206 | return -ENODEV; | |
207 | ||
208 | if (dev_desc->clkdev_name) { | |
209 | clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name, | |
210 | dev_name(&adev->dev)); | |
211 | return 0; | |
212 | } | |
213 | ||
214 | if (!pdata->mmio_base | |
2e0f8822 | 215 | || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE) |
f58b082a RW |
216 | return -ENODATA; |
217 | ||
f6272170 MW |
218 | parent = clk_data->name; |
219 | ||
220 | if (shared_clock) { | |
221 | clk = shared_clock->clk; | |
222 | if (!clk) { | |
223 | clk = clk_register_fixed_rate(NULL, shared_clock->name, | |
224 | "lpss_clk", 0, | |
225 | shared_clock->rate); | |
226 | shared_clock->clk = clk; | |
227 | } | |
228 | parent = shared_clock->name; | |
229 | } | |
230 | ||
231 | if (dev_desc->clk_gate) { | |
232 | clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0, | |
233 | pdata->mmio_base + dev_desc->prv_offset, | |
234 | 0, 0, NULL); | |
235 | pdata->clk = clk; | |
236 | } | |
f58b082a | 237 | |
f6272170 MW |
238 | if (IS_ERR(clk)) |
239 | return PTR_ERR(clk); | |
f58b082a | 240 | |
f6272170 | 241 | clk_register_clkdev(clk, NULL, dev_name(&adev->dev)); |
f58b082a RW |
242 | return 0; |
243 | } | |
244 | ||
245 | static int acpi_lpss_create_device(struct acpi_device *adev, | |
246 | const struct acpi_device_id *id) | |
247 | { | |
248 | struct lpss_device_desc *dev_desc; | |
249 | struct lpss_private_data *pdata; | |
250 | struct resource_list_entry *rentry; | |
251 | struct list_head resource_list; | |
252 | int ret; | |
253 | ||
254 | dev_desc = (struct lpss_device_desc *)id->driver_data; | |
255 | if (!dev_desc) | |
256 | return acpi_create_platform_device(adev, id); | |
257 | ||
258 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | |
259 | if (!pdata) | |
260 | return -ENOMEM; | |
261 | ||
262 | INIT_LIST_HEAD(&resource_list); | |
263 | ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); | |
264 | if (ret < 0) | |
265 | goto err_out; | |
266 | ||
267 | list_for_each_entry(rentry, &resource_list, node) | |
268 | if (resource_type(&rentry->res) == IORESOURCE_MEM) { | |
958c4eb2 MW |
269 | if (dev_desc->prv_size_override) |
270 | pdata->mmio_size = dev_desc->prv_size_override; | |
271 | else | |
272 | pdata->mmio_size = resource_size(&rentry->res); | |
f58b082a RW |
273 | pdata->mmio_base = ioremap(rentry->res.start, |
274 | pdata->mmio_size); | |
f58b082a RW |
275 | break; |
276 | } | |
277 | ||
278 | acpi_dev_free_resource_list(&resource_list); | |
279 | ||
af65cfe9 MW |
280 | pdata->dev_desc = dev_desc; |
281 | ||
f58b082a RW |
282 | if (dev_desc->clk_required) { |
283 | ret = register_device_clock(adev, pdata); | |
284 | if (ret) { | |
b9e95fc6 RW |
285 | /* Skip the device, but continue the namespace scan. */ |
286 | ret = 0; | |
287 | goto err_out; | |
f58b082a RW |
288 | } |
289 | } | |
290 | ||
b9e95fc6 RW |
291 | /* |
292 | * This works around a known issue in ACPI tables where LPSS devices | |
293 | * have _PS0 and _PS3 without _PSC (and no power resources), so | |
294 | * acpi_bus_init_power() will assume that the BIOS has put them into D0. | |
295 | */ | |
296 | ret = acpi_device_fix_up_power(adev); | |
297 | if (ret) { | |
298 | /* Skip the device, but continue the namespace scan. */ | |
299 | ret = 0; | |
300 | goto err_out; | |
301 | } | |
302 | ||
06d86415 HK |
303 | if (dev_desc->setup) |
304 | dev_desc->setup(pdata); | |
305 | ||
f58b082a RW |
306 | adev->driver_data = pdata; |
307 | ret = acpi_create_platform_device(adev, id); | |
308 | if (ret > 0) | |
309 | return ret; | |
310 | ||
311 | adev->driver_data = NULL; | |
312 | ||
313 | err_out: | |
314 | kfree(pdata); | |
315 | return ret; | |
316 | } | |
317 | ||
2e0f8822 RW |
318 | static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val) |
319 | { | |
320 | struct acpi_device *adev; | |
321 | struct lpss_private_data *pdata; | |
322 | unsigned long flags; | |
323 | int ret; | |
324 | ||
325 | ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); | |
326 | if (WARN_ON(ret)) | |
327 | return ret; | |
328 | ||
329 | spin_lock_irqsave(&dev->power.lock, flags); | |
330 | if (pm_runtime_suspended(dev)) { | |
331 | ret = -EAGAIN; | |
332 | goto out; | |
333 | } | |
334 | pdata = acpi_driver_data(adev); | |
335 | if (WARN_ON(!pdata || !pdata->mmio_base)) { | |
336 | ret = -ENODEV; | |
337 | goto out; | |
338 | } | |
339 | *val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); | |
340 | ||
341 | out: | |
342 | spin_unlock_irqrestore(&dev->power.lock, flags); | |
343 | return ret; | |
344 | } | |
345 | ||
346 | static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr, | |
347 | char *buf) | |
348 | { | |
349 | u32 ltr_value = 0; | |
350 | unsigned int reg; | |
351 | int ret; | |
352 | ||
353 | reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR; | |
354 | ret = lpss_reg_read(dev, reg, <r_value); | |
355 | if (ret) | |
356 | return ret; | |
357 | ||
358 | return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value); | |
359 | } | |
360 | ||
361 | static ssize_t lpss_ltr_mode_show(struct device *dev, | |
362 | struct device_attribute *attr, char *buf) | |
363 | { | |
364 | u32 ltr_mode = 0; | |
365 | char *outstr; | |
366 | int ret; | |
367 | ||
368 | ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode); | |
369 | if (ret) | |
370 | return ret; | |
371 | ||
372 | outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto"; | |
373 | return sprintf(buf, "%s\n", outstr); | |
374 | } | |
375 | ||
376 | static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL); | |
377 | static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL); | |
378 | static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL); | |
379 | ||
380 | static struct attribute *lpss_attrs[] = { | |
381 | &dev_attr_auto_ltr.attr, | |
382 | &dev_attr_sw_ltr.attr, | |
383 | &dev_attr_ltr_mode.attr, | |
384 | NULL, | |
385 | }; | |
386 | ||
387 | static struct attribute_group lpss_attr_group = { | |
388 | .attrs = lpss_attrs, | |
389 | .name = "lpss_ltr", | |
390 | }; | |
391 | ||
392 | static int acpi_lpss_platform_notify(struct notifier_block *nb, | |
393 | unsigned long action, void *data) | |
394 | { | |
395 | struct platform_device *pdev = to_platform_device(data); | |
396 | struct lpss_private_data *pdata; | |
397 | struct acpi_device *adev; | |
398 | const struct acpi_device_id *id; | |
399 | int ret = 0; | |
400 | ||
401 | id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev); | |
402 | if (!id || !id->driver_data) | |
403 | return 0; | |
404 | ||
405 | if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) | |
406 | return 0; | |
407 | ||
408 | pdata = acpi_driver_data(adev); | |
409 | if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required) | |
410 | return 0; | |
411 | ||
412 | if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) { | |
413 | dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n"); | |
414 | return 0; | |
415 | } | |
416 | ||
417 | if (action == BUS_NOTIFY_ADD_DEVICE) | |
418 | ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group); | |
419 | else if (action == BUS_NOTIFY_DEL_DEVICE) | |
420 | sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); | |
421 | ||
422 | return ret; | |
423 | } | |
424 | ||
425 | static struct notifier_block acpi_lpss_nb = { | |
426 | .notifier_call = acpi_lpss_platform_notify, | |
427 | }; | |
428 | ||
f58b082a RW |
429 | static struct acpi_scan_handler lpss_handler = { |
430 | .ids = acpi_lpss_device_ids, | |
431 | .attach = acpi_lpss_create_device, | |
432 | }; | |
433 | ||
434 | void __init acpi_lpss_init(void) | |
435 | { | |
2e0f8822 RW |
436 | if (!lpt_clk_init()) { |
437 | bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); | |
f58b082a | 438 | acpi_scan_add_handler(&lpss_handler); |
2e0f8822 | 439 | } |
f58b082a | 440 | } |