Commit | Line | Data |
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35b13763 JL |
1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* | |
3 | * Copyright (C) 2020-2023 Intel Corporation | |
4 | */ | |
5 | ||
6 | #ifndef __IVPU_HW_H__ | |
7 | #define __IVPU_HW_H__ | |
8 | ||
9 | #include "ivpu_drv.h" | |
10 | ||
11 | struct ivpu_hw_ops { | |
12 | int (*info_init)(struct ivpu_device *vdev); | |
13 | int (*power_up)(struct ivpu_device *vdev); | |
14 | int (*boot_fw)(struct ivpu_device *vdev); | |
15 | int (*power_down)(struct ivpu_device *vdev); | |
828d6304 | 16 | int (*reset)(struct ivpu_device *vdev); |
35b13763 | 17 | bool (*is_idle)(struct ivpu_device *vdev); |
3198a62e | 18 | int (*wait_for_idle)(struct ivpu_device *vdev); |
35b13763 JL |
19 | void (*wdt_disable)(struct ivpu_device *vdev); |
20 | void (*diagnose_failure)(struct ivpu_device *vdev); | |
bfc87f90 KP |
21 | u32 (*profiling_freq_get)(struct ivpu_device *vdev); |
22 | void (*profiling_freq_drive)(struct ivpu_device *vdev, bool enable); | |
35b13763 | 23 | u32 (*reg_pll_freq_get)(struct ivpu_device *vdev); |
c52c35e5 | 24 | u32 (*ratio_to_freq)(struct ivpu_device *vdev, u32 ratio); |
35b13763 JL |
25 | u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev); |
26 | u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev); | |
27 | u32 (*reg_telemetry_enable_get)(struct ivpu_device *vdev); | |
28 | void (*reg_db_set)(struct ivpu_device *vdev, u32 db_id); | |
29 | u32 (*reg_ipc_rx_addr_get)(struct ivpu_device *vdev); | |
30 | u32 (*reg_ipc_rx_count_get)(struct ivpu_device *vdev); | |
31 | void (*reg_ipc_tx_set)(struct ivpu_device *vdev, u32 vpu_addr); | |
32 | void (*irq_clear)(struct ivpu_device *vdev); | |
33 | void (*irq_enable)(struct ivpu_device *vdev); | |
34 | void (*irq_disable)(struct ivpu_device *vdev); | |
35 | irqreturn_t (*irq_handler)(int irq, void *ptr); | |
36 | }; | |
37 | ||
38 | struct ivpu_addr_range { | |
39 | resource_size_t start; | |
40 | resource_size_t end; | |
41 | }; | |
42 | ||
43 | struct ivpu_hw_info { | |
44 | const struct ivpu_hw_ops *ops; | |
45 | struct { | |
162f17b2 KW |
46 | struct ivpu_addr_range global; |
47 | struct ivpu_addr_range user; | |
48 | struct ivpu_addr_range shave; | |
49 | struct ivpu_addr_range dma; | |
35b13763 JL |
50 | } ranges; |
51 | struct { | |
52 | u8 min_ratio; | |
53 | u8 max_ratio; | |
54 | /* | |
55 | * Pll ratio for the efficiency frequency. The VPU has optimum | |
56 | * performance to power ratio at this frequency. | |
57 | */ | |
58 | u8 pn_ratio; | |
59 | u32 profiling_freq; | |
60 | } pll; | |
61 | u32 tile_fuse; | |
62 | u32 sku; | |
63 | u16 config; | |
a4172d6c | 64 | int dma_bits; |
3de6d959 AK |
65 | ktime_t d0i3_entry_host_ts; |
66 | u64 d0i3_entry_vpu_ts; | |
35b13763 JL |
67 | }; |
68 | ||
51d66a7b | 69 | extern const struct ivpu_hw_ops ivpu_hw_37xx_ops; |
79cdc56c | 70 | extern const struct ivpu_hw_ops ivpu_hw_40xx_ops; |
35b13763 JL |
71 | |
72 | static inline int ivpu_hw_info_init(struct ivpu_device *vdev) | |
73 | { | |
74 | return vdev->hw->ops->info_init(vdev); | |
75 | }; | |
76 | ||
77 | static inline int ivpu_hw_power_up(struct ivpu_device *vdev) | |
78 | { | |
79 | ivpu_dbg(vdev, PM, "HW power up\n"); | |
80 | ||
81 | return vdev->hw->ops->power_up(vdev); | |
82 | }; | |
83 | ||
84 | static inline int ivpu_hw_boot_fw(struct ivpu_device *vdev) | |
85 | { | |
86 | return vdev->hw->ops->boot_fw(vdev); | |
87 | }; | |
88 | ||
89 | static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev) | |
90 | { | |
91 | return vdev->hw->ops->is_idle(vdev); | |
92 | }; | |
93 | ||
3198a62e AK |
94 | static inline int ivpu_hw_wait_for_idle(struct ivpu_device *vdev) |
95 | { | |
96 | return vdev->hw->ops->wait_for_idle(vdev); | |
97 | }; | |
98 | ||
35b13763 JL |
99 | static inline int ivpu_hw_power_down(struct ivpu_device *vdev) |
100 | { | |
101 | ivpu_dbg(vdev, PM, "HW power down\n"); | |
102 | ||
103 | return vdev->hw->ops->power_down(vdev); | |
104 | }; | |
105 | ||
828d6304 JL |
106 | static inline int ivpu_hw_reset(struct ivpu_device *vdev) |
107 | { | |
108 | ivpu_dbg(vdev, PM, "HW reset\n"); | |
109 | ||
110 | return vdev->hw->ops->reset(vdev); | |
111 | }; | |
112 | ||
35b13763 JL |
113 | static inline void ivpu_hw_wdt_disable(struct ivpu_device *vdev) |
114 | { | |
115 | vdev->hw->ops->wdt_disable(vdev); | |
116 | }; | |
117 | ||
bfc87f90 KP |
118 | static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev) |
119 | { | |
120 | return vdev->hw->ops->profiling_freq_get(vdev); | |
121 | }; | |
122 | ||
123 | static inline void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable) | |
124 | { | |
125 | return vdev->hw->ops->profiling_freq_drive(vdev, enable); | |
126 | }; | |
127 | ||
35b13763 JL |
128 | /* Register indirect accesses */ |
129 | static inline u32 ivpu_hw_reg_pll_freq_get(struct ivpu_device *vdev) | |
130 | { | |
131 | return vdev->hw->ops->reg_pll_freq_get(vdev); | |
132 | }; | |
133 | ||
c52c35e5 JL |
134 | static inline u32 ivpu_hw_ratio_to_freq(struct ivpu_device *vdev, u32 ratio) |
135 | { | |
136 | return vdev->hw->ops->ratio_to_freq(vdev, ratio); | |
137 | } | |
138 | ||
35b13763 JL |
139 | static inline u32 ivpu_hw_reg_telemetry_offset_get(struct ivpu_device *vdev) |
140 | { | |
141 | return vdev->hw->ops->reg_telemetry_offset_get(vdev); | |
142 | }; | |
143 | ||
144 | static inline u32 ivpu_hw_reg_telemetry_size_get(struct ivpu_device *vdev) | |
145 | { | |
146 | return vdev->hw->ops->reg_telemetry_size_get(vdev); | |
147 | }; | |
148 | ||
149 | static inline u32 ivpu_hw_reg_telemetry_enable_get(struct ivpu_device *vdev) | |
150 | { | |
151 | return vdev->hw->ops->reg_telemetry_enable_get(vdev); | |
152 | }; | |
153 | ||
154 | static inline void ivpu_hw_reg_db_set(struct ivpu_device *vdev, u32 db_id) | |
155 | { | |
156 | vdev->hw->ops->reg_db_set(vdev, db_id); | |
157 | }; | |
158 | ||
159 | static inline u32 ivpu_hw_reg_ipc_rx_addr_get(struct ivpu_device *vdev) | |
160 | { | |
161 | return vdev->hw->ops->reg_ipc_rx_addr_get(vdev); | |
162 | }; | |
163 | ||
164 | static inline u32 ivpu_hw_reg_ipc_rx_count_get(struct ivpu_device *vdev) | |
165 | { | |
166 | return vdev->hw->ops->reg_ipc_rx_count_get(vdev); | |
167 | }; | |
168 | ||
169 | static inline void ivpu_hw_reg_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr) | |
170 | { | |
171 | vdev->hw->ops->reg_ipc_tx_set(vdev, vpu_addr); | |
172 | }; | |
173 | ||
174 | static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev) | |
175 | { | |
176 | vdev->hw->ops->irq_clear(vdev); | |
177 | }; | |
178 | ||
179 | static inline void ivpu_hw_irq_enable(struct ivpu_device *vdev) | |
180 | { | |
181 | vdev->hw->ops->irq_enable(vdev); | |
182 | }; | |
183 | ||
184 | static inline void ivpu_hw_irq_disable(struct ivpu_device *vdev) | |
185 | { | |
186 | vdev->hw->ops->irq_disable(vdev); | |
187 | }; | |
188 | ||
189 | static inline void ivpu_hw_init_range(struct ivpu_addr_range *range, u64 start, u64 size) | |
190 | { | |
191 | range->start = start; | |
192 | range->end = start + size; | |
193 | } | |
194 | ||
195 | static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range) | |
196 | { | |
197 | return range->end - range->start; | |
198 | } | |
199 | ||
200 | static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev) | |
201 | { | |
202 | vdev->hw->ops->diagnose_failure(vdev); | |
203 | } | |
204 | ||
205 | #endif /* __IVPU_HW_H__ */ |