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02d5b0aa JL |
1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* | |
3 | * Copyright (C) 2020-2023 Intel Corporation | |
4 | */ | |
5 | ||
6 | #ifndef __IVPU_FW_H__ | |
7 | #define __IVPU_FW_H__ | |
8 | ||
9 | struct ivpu_device; | |
10 | struct ivpu_bo; | |
11 | struct vpu_boot_params; | |
12 | ||
13 | struct ivpu_fw_info { | |
14 | const struct firmware *file; | |
f9d918cf | 15 | const char *name; |
02d5b0aa JL |
16 | struct ivpu_bo *mem; |
17 | struct ivpu_bo *mem_shave_nn; | |
18 | struct ivpu_bo *mem_log_crit; | |
19 | struct ivpu_bo *mem_log_verb; | |
20 | u64 runtime_addr; | |
21 | u32 runtime_size; | |
22 | u64 image_load_offset; | |
23 | u32 image_size; | |
24 | u32 shave_nn_size; | |
25 | u64 entry_point; /* Cold or warm boot entry point for next boot */ | |
26 | u64 cold_boot_entry_point; | |
d4e4257a SG |
27 | u32 trace_level; |
28 | u32 trace_destination_mask; | |
29 | u64 trace_hw_component_mask; | |
f13108fc | 30 | u32 dvfs_mode; |
02d5b0aa JL |
31 | }; |
32 | ||
33 | int ivpu_fw_init(struct ivpu_device *vdev); | |
34 | void ivpu_fw_fini(struct ivpu_device *vdev); | |
53d98420 | 35 | void ivpu_fw_load(struct ivpu_device *vdev); |
02d5b0aa JL |
36 | void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params *bp); |
37 | ||
38 | static inline bool ivpu_fw_is_cold_boot(struct ivpu_device *vdev) | |
39 | { | |
40 | return vdev->fw->entry_point == vdev->fw->cold_boot_entry_point; | |
41 | } | |
42 | ||
43 | #endif /* __IVPU_FW_H__ */ |