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9bc89cd8 DW |
1 | /* |
2 | * xor offload engine api | |
3 | * | |
4 | * Copyright © 2006, Intel Corporation. | |
5 | * | |
6 | * Dan Williams <dan.j.williams@intel.com> | |
7 | * | |
8 | * with architecture considerations by: | |
9 | * Neil Brown <neilb@suse.de> | |
10 | * Jeff Garzik <jeff@garzik.org> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms and conditions of the GNU General Public License, | |
14 | * version 2, as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along with | |
22 | * this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
24 | * | |
25 | */ | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/mm.h> | |
29 | #include <linux/dma-mapping.h> | |
30 | #include <linux/raid/xor.h> | |
31 | #include <linux/async_tx.h> | |
32 | ||
06164f31 DW |
33 | /* do_async_xor - dma map the pages and perform the xor with an engine */ |
34 | static __async_inline struct dma_async_tx_descriptor * | |
1e55db2d DW |
35 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, |
36 | unsigned int offset, int src_cnt, size_t len, | |
37 | enum async_tx_flags flags, | |
38 | struct dma_async_tx_descriptor *depend_tx, | |
39 | dma_async_tx_callback cb_fn, void *cb_param) | |
9bc89cd8 | 40 | { |
1e55db2d | 41 | struct dma_device *dma = chan->device; |
0036731c | 42 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
1e55db2d DW |
43 | struct dma_async_tx_descriptor *tx = NULL; |
44 | int src_off = 0; | |
9bc89cd8 | 45 | int i; |
1e55db2d DW |
46 | dma_async_tx_callback _cb_fn; |
47 | void *_cb_param; | |
48 | enum async_tx_flags async_flags; | |
49 | enum dma_ctrl_flags dma_flags; | |
50 | int xor_src_cnt; | |
51 | dma_addr_t dma_dest; | |
9bc89cd8 | 52 | |
a06d568f DW |
53 | /* map the dest bidrectional in case it is re-used as a source */ |
54 | dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL); | |
55 | for (i = 0; i < src_cnt; i++) { | |
56 | /* only map the dest once */ | |
57 | if (unlikely(src_list[i] == dest)) { | |
58 | dma_src[i] = dma_dest; | |
59 | continue; | |
60 | } | |
1e55db2d | 61 | dma_src[i] = dma_map_page(dma->dev, src_list[i], offset, |
0036731c | 62 | len, DMA_TO_DEVICE); |
a06d568f | 63 | } |
0036731c | 64 | |
1e55db2d DW |
65 | while (src_cnt) { |
66 | async_flags = flags; | |
67 | dma_flags = 0; | |
68 | xor_src_cnt = min(src_cnt, dma->max_xor); | |
69 | /* if we are submitting additional xors, leave the chain open, | |
70 | * clear the callback parameters, and leave the destination | |
71 | * buffer mapped | |
72 | */ | |
73 | if (src_cnt > xor_src_cnt) { | |
74 | async_flags &= ~ASYNC_TX_ACK; | |
75 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; | |
76 | _cb_fn = NULL; | |
77 | _cb_param = NULL; | |
78 | } else { | |
79 | _cb_fn = cb_fn; | |
80 | _cb_param = cb_param; | |
81 | } | |
82 | if (_cb_fn) | |
83 | dma_flags |= DMA_PREP_INTERRUPT; | |
84 | ||
85 | /* Since we have clobbered the src_list we are committed | |
86 | * to doing this asynchronously. Drivers force forward progress | |
87 | * in case they can not provide a descriptor | |
88 | */ | |
89 | tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off], | |
90 | xor_src_cnt, len, dma_flags); | |
91 | ||
669ab0b2 DW |
92 | if (unlikely(!tx)) |
93 | async_tx_quiesce(&depend_tx); | |
0036731c | 94 | |
1e55db2d | 95 | /* spin wait for the preceeding transactions to complete */ |
669ab0b2 DW |
96 | while (unlikely(!tx)) { |
97 | dma_async_issue_pending(chan); | |
1e55db2d DW |
98 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
99 | &dma_src[src_off], | |
100 | xor_src_cnt, len, | |
101 | dma_flags); | |
669ab0b2 | 102 | } |
9bc89cd8 | 103 | |
1e55db2d DW |
104 | async_tx_submit(chan, tx, async_flags, depend_tx, _cb_fn, |
105 | _cb_param); | |
106 | ||
107 | depend_tx = tx; | |
1e55db2d DW |
108 | |
109 | if (src_cnt > xor_src_cnt) { | |
110 | /* drop completed sources */ | |
111 | src_cnt -= xor_src_cnt; | |
112 | src_off += xor_src_cnt; | |
113 | ||
114 | /* use the intermediate result a source */ | |
115 | dma_src[--src_off] = dma_dest; | |
116 | src_cnt++; | |
117 | } else | |
118 | break; | |
119 | } | |
0036731c DW |
120 | |
121 | return tx; | |
9bc89cd8 DW |
122 | } |
123 | ||
124 | static void | |
125 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
1e55db2d | 126 | int src_cnt, size_t len, enum async_tx_flags flags, |
1e55db2d | 127 | dma_async_tx_callback cb_fn, void *cb_param) |
9bc89cd8 | 128 | { |
9bc89cd8 | 129 | int i; |
1e55db2d DW |
130 | int xor_src_cnt; |
131 | int src_off = 0; | |
132 | void *dest_buf; | |
133 | void **srcs = (void **) src_list; | |
9bc89cd8 DW |
134 | |
135 | /* reuse the 'src_list' array to convert to buffer pointers */ | |
136 | for (i = 0; i < src_cnt; i++) | |
1e55db2d | 137 | srcs[i] = page_address(src_list[i]) + offset; |
9bc89cd8 DW |
138 | |
139 | /* set destination address */ | |
1e55db2d | 140 | dest_buf = page_address(dest) + offset; |
9bc89cd8 DW |
141 | |
142 | if (flags & ASYNC_TX_XOR_ZERO_DST) | |
1e55db2d | 143 | memset(dest_buf, 0, len); |
9bc89cd8 | 144 | |
1e55db2d DW |
145 | while (src_cnt > 0) { |
146 | /* process up to 'MAX_XOR_BLOCKS' sources */ | |
147 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); | |
148 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); | |
149 | ||
150 | /* drop completed sources */ | |
151 | src_cnt -= xor_src_cnt; | |
152 | src_off += xor_src_cnt; | |
153 | } | |
9bc89cd8 | 154 | |
3dce0171 | 155 | async_tx_sync_epilog(cb_fn, cb_param); |
9bc89cd8 DW |
156 | } |
157 | ||
158 | /** | |
159 | * async_xor - attempt to xor a set of blocks with a dma engine. | |
160 | * xor_blocks always uses the dest as a source so the ASYNC_TX_XOR_ZERO_DST | |
161 | * flag must be set to not include dest data in the calculation. The | |
162 | * assumption with dma eninges is that they only use the destination | |
163 | * buffer as a source when it is explicity specified in the source list. | |
164 | * @dest: destination page | |
165 | * @src_list: array of source pages (if the dest is also a source it must be | |
166 | * at index zero). The contents of this array may be overwritten. | |
167 | * @offset: offset in pages to start transaction | |
168 | * @src_cnt: number of source pages | |
169 | * @len: length in bytes | |
88ba2aa5 | 170 | * @flags: ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DEST, ASYNC_TX_ACK |
9bc89cd8 DW |
171 | * @depend_tx: xor depends on the result of this transaction. |
172 | * @cb_fn: function to call when the xor completes | |
173 | * @cb_param: parameter to pass to the callback routine | |
174 | */ | |
175 | struct dma_async_tx_descriptor * | |
176 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | |
177 | int src_cnt, size_t len, enum async_tx_flags flags, | |
178 | struct dma_async_tx_descriptor *depend_tx, | |
179 | dma_async_tx_callback cb_fn, void *cb_param) | |
180 | { | |
47437b2c DW |
181 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_XOR, |
182 | &dest, 1, src_list, | |
183 | src_cnt, len); | |
9bc89cd8 DW |
184 | BUG_ON(src_cnt <= 1); |
185 | ||
1e55db2d DW |
186 | if (chan) { |
187 | /* run the xor asynchronously */ | |
188 | pr_debug("%s (async): len: %zu\n", __func__, len); | |
9bc89cd8 | 189 | |
1e55db2d DW |
190 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, |
191 | flags, depend_tx, cb_fn, cb_param); | |
192 | } else { | |
193 | /* run the xor synchronously */ | |
194 | pr_debug("%s (sync): len: %zu\n", __func__, len); | |
9bc89cd8 | 195 | |
1e55db2d DW |
196 | /* in the sync case the dest is an implied source |
197 | * (assumes the dest is the first source) | |
9bc89cd8 | 198 | */ |
1e55db2d DW |
199 | if (flags & ASYNC_TX_XOR_DROP_DST) { |
200 | src_cnt--; | |
201 | src_list++; | |
202 | } | |
9bc89cd8 | 203 | |
1e55db2d | 204 | /* wait for any prerequisite operations */ |
d2c52b79 | 205 | async_tx_quiesce(&depend_tx); |
9bc89cd8 | 206 | |
1e55db2d | 207 | do_sync_xor(dest, src_list, offset, src_cnt, len, |
3dce0171 | 208 | flags, cb_fn, cb_param); |
9bc89cd8 | 209 | |
1e55db2d | 210 | return NULL; |
9bc89cd8 | 211 | } |
9bc89cd8 DW |
212 | } |
213 | EXPORT_SYMBOL_GPL(async_xor); | |
214 | ||
215 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |
216 | { | |
217 | char *a = page_address(p) + offset; | |
218 | return ((*(u32 *) a) == 0 && | |
219 | memcmp(a, a + 4, len - 4) == 0); | |
220 | } | |
221 | ||
222 | /** | |
099f53cb | 223 | * async_xor_val - attempt a xor parity check with a dma engine. |
9bc89cd8 DW |
224 | * @dest: destination page used if the xor is performed synchronously |
225 | * @src_list: array of source pages. The dest page must be listed as a source | |
226 | * at index zero. The contents of this array may be overwritten. | |
227 | * @offset: offset in pages to start transaction | |
228 | * @src_cnt: number of source pages | |
229 | * @len: length in bytes | |
230 | * @result: 0 if sum == 0 else non-zero | |
88ba2aa5 | 231 | * @flags: ASYNC_TX_ACK |
9bc89cd8 DW |
232 | * @depend_tx: xor depends on the result of this transaction. |
233 | * @cb_fn: function to call when the xor completes | |
234 | * @cb_param: parameter to pass to the callback routine | |
235 | */ | |
236 | struct dma_async_tx_descriptor * | |
099f53cb | 237 | async_xor_val(struct page *dest, struct page **src_list, |
9bc89cd8 DW |
238 | unsigned int offset, int src_cnt, size_t len, |
239 | u32 *result, enum async_tx_flags flags, | |
240 | struct dma_async_tx_descriptor *depend_tx, | |
241 | dma_async_tx_callback cb_fn, void *cb_param) | |
242 | { | |
099f53cb | 243 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_XOR_VAL, |
47437b2c DW |
244 | &dest, 1, src_list, |
245 | src_cnt, len); | |
9bc89cd8 | 246 | struct dma_device *device = chan ? chan->device : NULL; |
0036731c | 247 | struct dma_async_tx_descriptor *tx = NULL; |
9bc89cd8 DW |
248 | |
249 | BUG_ON(src_cnt <= 1); | |
250 | ||
8d8002f6 | 251 | if (device && src_cnt <= device->max_xor) { |
0036731c | 252 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
d4c56f97 | 253 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; |
0036731c | 254 | int i; |
9bc89cd8 | 255 | |
3280ab3e | 256 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
9bc89cd8 | 257 | |
0036731c DW |
258 | for (i = 0; i < src_cnt; i++) |
259 | dma_src[i] = dma_map_page(device->dev, src_list[i], | |
260 | offset, len, DMA_TO_DEVICE); | |
261 | ||
099f53cb DW |
262 | tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt, |
263 | len, result, | |
264 | dma_prep_flags); | |
669ab0b2 DW |
265 | if (unlikely(!tx)) { |
266 | async_tx_quiesce(&depend_tx); | |
0036731c | 267 | |
e34a8ae7 | 268 | while (!tx) { |
669ab0b2 | 269 | dma_async_issue_pending(chan); |
099f53cb | 270 | tx = device->device_prep_dma_xor_val(chan, |
0036731c | 271 | dma_src, src_cnt, len, result, |
d4c56f97 | 272 | dma_prep_flags); |
e34a8ae7 | 273 | } |
9bc89cd8 DW |
274 | } |
275 | ||
276 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | |
277 | } else { | |
278 | unsigned long xor_flags = flags; | |
279 | ||
3280ab3e | 280 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
9bc89cd8 DW |
281 | |
282 | xor_flags |= ASYNC_TX_XOR_DROP_DST; | |
283 | xor_flags &= ~ASYNC_TX_ACK; | |
284 | ||
285 | tx = async_xor(dest, src_list, offset, src_cnt, len, xor_flags, | |
286 | depend_tx, NULL, NULL); | |
287 | ||
d2c52b79 | 288 | async_tx_quiesce(&tx); |
9bc89cd8 DW |
289 | |
290 | *result = page_is_zero(dest, offset, len) ? 0 : 1; | |
291 | ||
3dce0171 | 292 | async_tx_sync_epilog(cb_fn, cb_param); |
9bc89cd8 DW |
293 | } |
294 | ||
295 | return tx; | |
296 | } | |
099f53cb | 297 | EXPORT_SYMBOL_GPL(async_xor_val); |
9bc89cd8 DW |
298 | |
299 | static int __init async_xor_init(void) | |
300 | { | |
0036731c DW |
301 | #ifdef CONFIG_DMA_ENGINE |
302 | /* To conserve stack space the input src_list (array of page pointers) | |
303 | * is reused to hold the array of dma addresses passed to the driver. | |
304 | * This conversion is only possible when dma_addr_t is less than the | |
305 | * the size of a pointer. HIGHMEM64G is known to violate this | |
306 | * assumption. | |
307 | */ | |
308 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *)); | |
309 | #endif | |
310 | ||
9bc89cd8 DW |
311 | return 0; |
312 | } | |
313 | ||
314 | static void __exit async_xor_exit(void) | |
315 | { | |
316 | do { } while (0); | |
317 | } | |
318 | ||
319 | module_init(async_xor_init); | |
320 | module_exit(async_xor_exit); | |
321 | ||
322 | MODULE_AUTHOR("Intel Corporation"); | |
323 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | |
324 | MODULE_LICENSE("GPL"); |