Commit | Line | Data |
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8c16567d | 1 | // SPDX-License-Identifier: GPL-2.0 |
973c4e37 CH |
2 | /* |
3 | * Copyright (c) 2016 Christoph Hellwig. | |
973c4e37 | 4 | */ |
8ec2ef2b SR |
5 | #include <linux/kobject.h> |
6 | #include <linux/blkdev.h> | |
973c4e37 CH |
7 | #include <linux/blk-mq.h> |
8 | #include <linux/blk-mq-pci.h> | |
9 | #include <linux/pci.h> | |
10 | #include <linux/module.h> | |
11 | ||
0da73d00 MI |
12 | #include "blk-mq.h" |
13 | ||
973c4e37 CH |
14 | /** |
15 | * blk_mq_pci_map_queues - provide a default queue mapping for PCI device | |
0542cd57 | 16 | * @qmap: CPU to hardware queue map. |
973c4e37 | 17 | * @pdev: PCI device associated with @set. |
f23f5bec | 18 | * @offset: Offset to use for the pci irq vector |
973c4e37 CH |
19 | * |
20 | * This function assumes the PCI device @pdev has at least as many available | |
018c259b | 21 | * interrupt vectors as @set has queues. It will then query the vector |
973c4e37 CH |
22 | * corresponding to each queue for it's affinity mask and built queue mapping |
23 | * that maps a queue to the CPUs that have irq affinity for the corresponding | |
24 | * vector. | |
25 | */ | |
ed76e329 | 26 | int blk_mq_pci_map_queues(struct blk_mq_queue_map *qmap, struct pci_dev *pdev, |
f23f5bec | 27 | int offset) |
973c4e37 CH |
28 | { |
29 | const struct cpumask *mask; | |
30 | unsigned int queue, cpu; | |
31 | ||
ed76e329 | 32 | for (queue = 0; queue < qmap->nr_queues; queue++) { |
f23f5bec | 33 | mask = pci_irq_get_affinity(pdev, queue + offset); |
973c4e37 | 34 | if (!mask) |
c0053903 | 35 | goto fallback; |
973c4e37 CH |
36 | |
37 | for_each_cpu(cpu, mask) | |
843477d4 | 38 | qmap->mq_map[cpu] = qmap->queue_offset + queue; |
973c4e37 CH |
39 | } |
40 | ||
41 | return 0; | |
c0053903 CH |
42 | |
43 | fallback: | |
ed76e329 JA |
44 | WARN_ON_ONCE(qmap->nr_queues > 1); |
45 | blk_mq_clear_mq_map(qmap); | |
c0053903 | 46 | return 0; |
973c4e37 CH |
47 | } |
48 | EXPORT_SYMBOL_GPL(blk_mq_pci_map_queues); |