projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 0d456bad | 1 | /* |
| 4949009e MF |
2 | * Driver for the LCD display on the Tensilica XTFPGA board family. |
| 3 | * http://www.mytechcorp.com/cfdata/productFile/File1/MOC-16216B-B-A0A04.pdf | |
| 0d456bad MF |
4 | * |
| 5 | * This file is subject to the terms and conditions of the GNU General Public | |
| 6 | * License. See the file "COPYING" in the main directory of this archive | |
| 7 | * for more details. | |
| 8 | * | |
| 9 | * Copyright (C) 2001, 2006 Tensilica Inc. | |
| 4949009e | 10 | * Copyright (C) 2015 Cadence Design Systems Inc. |
| 0d456bad MF |
11 | */ |
| 12 | ||
| 4949009e | 13 | #include <linux/delay.h> |
| 0d456bad MF |
14 | #include <linux/init.h> |
| 15 | #include <linux/io.h> | |
| 16 | ||
| 17 | #include <platform/hardware.h> | |
| 18 | #include <platform/lcd.h> | |
| 0d456bad | 19 | |
| 4949009e MF |
20 | /* LCD instruction and data addresses. */ |
| 21 | #define LCD_INSTR_ADDR ((char *)IOADDR(CONFIG_XTFPGA_LCD_BASE_ADDR)) | |
| 22 | #define LCD_DATA_ADDR (LCD_INSTR_ADDR + 4) | |
| 23 | ||
| 0d456bad MF |
24 | #define LCD_CLEAR 0x1 |
| 25 | #define LCD_DISPLAY_ON 0xc | |
| 26 | ||
| 27 | /* 8bit and 2 lines display */ | |
| 28 | #define LCD_DISPLAY_MODE8BIT 0x38 | |
| 4949009e | 29 | #define LCD_DISPLAY_MODE4BIT 0x28 |
| 0d456bad MF |
30 | #define LCD_DISPLAY_POS 0x80 |
| 31 | #define LCD_SHIFT_LEFT 0x18 | |
| 32 | #define LCD_SHIFT_RIGHT 0x1c | |
| 33 | ||
| 4949009e MF |
34 | static void lcd_put_byte(u8 *addr, u8 data) |
| 35 | { | |
| 36 | #ifdef CONFIG_XTFPGA_LCD_8BIT_ACCESS | |
| 6aa7de05 | 37 | WRITE_ONCE(*addr, data); |
| 4949009e | 38 | #else |
| 6aa7de05 MR |
39 | WRITE_ONCE(*addr, data & 0xf0); |
| 40 | WRITE_ONCE(*addr, (data << 4) & 0xf0); | |
| 4949009e MF |
41 | #endif |
| 42 | } | |
| 43 | ||
| 0d456bad MF |
44 | static int __init lcd_init(void) |
| 45 | { | |
| 6aa7de05 | 46 | WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT); |
| 0d456bad | 47 | mdelay(5); |
| 6aa7de05 | 48 | WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT); |
| 0d456bad | 49 | udelay(200); |
| 6aa7de05 | 50 | WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT); |
| 4949009e MF |
51 | udelay(50); |
| 52 | #ifndef CONFIG_XTFPGA_LCD_8BIT_ACCESS | |
| 6aa7de05 | 53 | WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT); |
| 4949009e MF |
54 | udelay(50); |
| 55 | lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT); | |
| 0d456bad | 56 | udelay(50); |
| 4949009e MF |
57 | #endif |
| 58 | lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_ON); | |
| 0d456bad | 59 | udelay(50); |
| 4949009e | 60 | lcd_put_byte(LCD_INSTR_ADDR, LCD_CLEAR); |
| 0d456bad MF |
61 | mdelay(10); |
| 62 | lcd_disp_at_pos("XTENSA LINUX", 0); | |
| 63 | return 0; | |
| 64 | } | |
| 65 | ||
| 66 | void lcd_disp_at_pos(char *str, unsigned char pos) | |
| 67 | { | |
| 4949009e | 68 | lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_POS | pos); |
| 0d456bad MF |
69 | udelay(100); |
| 70 | while (*str != 0) { | |
| 4949009e | 71 | lcd_put_byte(LCD_DATA_ADDR, *str); |
| 0d456bad MF |
72 | udelay(200); |
| 73 | str++; | |
| 74 | } | |
| 75 | } | |
| 76 | ||
| 77 | void lcd_shiftleft(void) | |
| 78 | { | |
| 4949009e | 79 | lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_LEFT); |
| 0d456bad MF |
80 | udelay(50); |
| 81 | } | |
| 82 | ||
| 83 | void lcd_shiftright(void) | |
| 84 | { | |
| 4949009e | 85 | lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_RIGHT); |
| 0d456bad MF |
86 | udelay(50); |
| 87 | } | |
| 88 | ||
| 89 | arch_initcall(lcd_init); |