[linux-block.git] / arch / xtensa / kernel / vmlinux.lds.S

/*
 * arch/xtensa/kernel/vmlinux.lds.S
 *
 * Xtensa linker script
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#define RO_EXCEPTION_TABLE_ALIGN	16

#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/thread_info.h>

#include <asm/core.h>
#include <asm/vectors.h>

OUTPUT_ARCH(xtensa)
ENTRY(_start)

#ifdef __XTENSA_EB__
jiffies = jiffies_64 + 4;
#else
jiffies = jiffies_64;
#endif

/* Note: In the following macros, it would be nice to specify only the
   vector name and section kind and construct "sym" and "section" using
   CPP concatenation, but that does not work reliably.  Concatenating a
   string with "." produces an invalid token.  CPP will not print a
   warning because it thinks this is an assembly file, but it leaves
   them as multiple tokens and there may or may not be whitespace
   between them.  */

/* Macro for a relocation entry */

#define RELOCATE_ENTRY(sym, section)		\
	LONG(sym ## _start);			\
	LONG(sym ## _end);			\
	LONG(LOADADDR(section))

#if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE
#define MERGED_VECTORS 1
#else
#define MERGED_VECTORS 0
#endif

/*
 * Macro to define a section for a vector. When MERGED_VECTORS is 0
 * code for every vector is located with other init data. At startup
 * time head.S copies code for every vector to its final position according
 * to description recorded in the corresponding RELOCATE_ENTRY.
 */

#define SECTION_VECTOR4(sym, section, addr, prevsec)			    \
  section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3)      \
  {									    \
    . = ALIGN(4);							    \
    sym ## _start = ABSOLUTE(.);		 			    \
    *(section)								    \
    sym ## _end = ABSOLUTE(.);						    \
  }

#define SECTION_VECTOR2(section, addr)					    \
  . = addr;								    \
  *(section)

/*
 *  Mapping of input sections to output sections when linking.
 */

SECTIONS
{
  . = KERNELOFFSET;
  /* .text section */

  _text = .;
  _stext = .;

  .text :
  {
    /* The HEAD_TEXT section must be the first section! */
    HEAD_TEXT

#if MERGED_VECTORS
    . = ALIGN(PAGE_SIZE);
    _vecbase = .;

#ifdef SUPPORT_WINDOWED
    SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 2
    SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 3
    SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 4
    SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 5
    SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 6
    SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
#endif
    SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
    SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
    SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR)
    SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)

    *(.exception.text)
#endif

    IRQENTRY_TEXT
    SOFTIRQENTRY_TEXT
    ENTRY_TEXT
    TEXT_TEXT
    SCHED_TEXT
    CPUIDLE_TEXT
    LOCK_TEXT
    *(.fixup)
  }
  _etext = .;
  PROVIDE (etext = .);

  . = ALIGN(16);

  RO_DATA(4096)

  /* Data section */

#ifdef CONFIG_XIP_KERNEL
  INIT_TEXT_SECTION(PAGE_SIZE)
#else
  _sdata = .;
  RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  INIT_TEXT_SECTION(PAGE_SIZE)

  .init.data :
  {
    INIT_DATA
  }
#endif

  .init.rodata :
  {
    . = ALIGN(0x4);
    __tagtable_begin = .;
    *(.taglist)
    __tagtable_end = .;

    . = ALIGN(16);
    __boot_reloc_table_start = ABSOLUTE(.);

#if !MERGED_VECTORS
#ifdef SUPPORT_WINDOWED
    RELOCATE_ENTRY(_WindowVectors_text,
		   .WindowVectors.text);
#endif
#if XCHAL_EXCM_LEVEL >= 2
    RELOCATE_ENTRY(_Level2InterruptVector_text,
		   .Level2InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 3
    RELOCATE_ENTRY(_Level3InterruptVector_text,
		   .Level3InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 4
    RELOCATE_ENTRY(_Level4InterruptVector_text,
		   .Level4InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 5
    RELOCATE_ENTRY(_Level5InterruptVector_text,
		   .Level5InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 6
    RELOCATE_ENTRY(_Level6InterruptVector_text,
		   .Level6InterruptVector.text);
#endif
    RELOCATE_ENTRY(_KernelExceptionVector_text,
		   .KernelExceptionVector.text);
    RELOCATE_ENTRY(_UserExceptionVector_text,
		   .UserExceptionVector.text);
    RELOCATE_ENTRY(_DoubleExceptionVector_text,
		   .DoubleExceptionVector.text);
    RELOCATE_ENTRY(_DebugInterruptVector_text,
		   .DebugInterruptVector.text);
    RELOCATE_ENTRY(_exception_text,
		   .exception.text);
#endif
#ifdef CONFIG_XIP_KERNEL
    RELOCATE_ENTRY(_xip_data, .data);
    RELOCATE_ENTRY(_xip_init_data, .init.data);
#endif
#if defined(CONFIG_SECONDARY_RESET_VECTOR)
    RELOCATE_ENTRY(_SecondaryResetVector_text,
		   .SecondaryResetVector.text);
#endif

    __boot_reloc_table_end = ABSOLUTE(.) ;

    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
    INIT_CALLS
    CON_INITCALL
    INIT_RAM_FS
  }

  PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)

  /* We need this dummy segment here */

  . = ALIGN(4);
  .dummy : { LONG(0) }

#undef LAST
#define LAST	.dummy

#if !MERGED_VECTORS
  /* The vectors are relocated to the real position at startup time */

#ifdef SUPPORT_WINDOWED
  SECTION_VECTOR4 (_WindowVectors_text,
		  .WindowVectors.text,
		  WINDOW_VECTORS_VADDR,
		  LAST)
#undef LAST
#define LAST	.WindowVectors.text
#endif
  SECTION_VECTOR4 (_DebugInterruptVector_text,
		  .DebugInterruptVector.text,
		  DEBUG_VECTOR_VADDR,
		  LAST)
#undef LAST
#define LAST	.DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR4 (_Level2InterruptVector_text,
		  .Level2InterruptVector.text,
		  INTLEVEL2_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR4 (_Level3InterruptVector_text,
		  .Level3InterruptVector.text,
		  INTLEVEL3_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR4 (_Level4InterruptVector_text,
		  .Level4InterruptVector.text,
		  INTLEVEL4_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR4 (_Level5InterruptVector_text,
		  .Level5InterruptVector.text,
		  INTLEVEL5_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR4 (_Level6InterruptVector_text,
		  .Level6InterruptVector.text,
		  INTLEVEL6_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level6InterruptVector.text
#endif
  SECTION_VECTOR4 (_KernelExceptionVector_text,
		  .KernelExceptionVector.text,
		  KERNEL_VECTOR_VADDR,
		  LAST)
#undef LAST
  SECTION_VECTOR4 (_UserExceptionVector_text,
		  .UserExceptionVector.text,
		  USER_VECTOR_VADDR,
		  .KernelExceptionVector.text)
  SECTION_VECTOR4 (_DoubleExceptionVector_text,
		  .DoubleExceptionVector.text,
		  DOUBLEEXC_VECTOR_VADDR,
		  .UserExceptionVector.text)
#define LAST .DoubleExceptionVector.text

#endif
#if defined(CONFIG_SECONDARY_RESET_VECTOR)

  SECTION_VECTOR4 (_SecondaryResetVector_text,
		  .SecondaryResetVector.text,
		  RESET_VECTOR1_VADDR,
		  LAST)
#undef LAST
#define LAST .SecondaryResetVector.text

#endif
#if !MERGED_VECTORS
  SECTION_VECTOR4 (_exception_text,
		  .exception.text,
		  ,
		  LAST)
#undef LAST
#define LAST .exception.text

#endif
  . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3;

  .dummy1 : AT(ADDR(.dummy1)) { LONG(0) }
  . = ALIGN(PAGE_SIZE);

#ifndef CONFIG_XIP_KERNEL
  __init_end = .;

  BSS_SECTION(0, 8192, 0)
#endif

  _end = .;

#ifdef CONFIG_XIP_KERNEL
  . = CONFIG_XIP_DATA_ADDR;

  _xip_start = .;

#undef LOAD_OFFSET
#define LOAD_OFFSET \
  (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3)

  _xip_data_start = .;
  _sdata = .;
  RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;
  _xip_data_end = .;

  /* Initialization data: */

  STRUCT_ALIGN();

  _xip_init_data_start = .;
  __init_begin = .;
  .init.data :
  {
    INIT_DATA
  }
  _xip_init_data_end = .;
  __init_end = .;
  BSS_SECTION(0, 8192, 0)

  _xip_end = .;

#undef LOAD_OFFSET
#endif

  DWARF_DEBUG

  .xt.prop 0 : { KEEP(*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*)) }
  .xt.insn 0 : { KEEP(*(.xt.insn .xt.insn.* .gnu.linkonce.x*)) }
  .xt.lit  0 : { KEEP(*(.xt.lit  .xt.lit.*  .gnu.linkonce.p*)) }

  /* Sections to be discarded */
  DISCARDS
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/vmlinux.lds.S
	3	*
	4	* Xtensa linker script
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
2d1c645c	10	* Copyright (C) 2001 - 2008 Tensilica Inc.
5a0015d6 CZ	11	*
	12	* Chris Zankel <chris@zankel.net>
	13	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	14	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	15	*/
	16
94174c9b KC	17	#define RO_EXCEPTION_TABLE_ALIGN 16
94174c9b KC	18
5a0015d6	19	#include <asm-generic/vmlinux.lds.h>
cd3db323 TA	20	#include <asm/page.h>
cd3db323 TA	21	#include <asm/thread_info.h>
5a0015d6	22
8f8d5745	23	#include <asm/core.h>
e85e335f	24	#include <asm/vectors.h>
fc862ee9	25
5a0015d6 CZ	26	OUTPUT_ARCH(xtensa)
	27	ENTRY(_start)
	28
173d6681	29	#ifdef __XTENSA_EB__
5a0015d6 CZ	30	jiffies = jiffies_64 + 4;
	31	#else
	32	jiffies = jiffies_64;
	33	#endif
	34
5a0015d6 CZ	35	/* Note: In the following macros, it would be nice to specify only the
	36	vector name and section kind and construct "sym" and "section" using
	37	CPP concatenation, but that does not work reliably. Concatenating a
	38	string with "." produces an invalid token. CPP will not print a
	39	warning because it thinks this is an assembly file, but it leaves
	40	them as multiple tokens and there may or may not be whitespace
	41	between them. */
	42
	43	/* Macro for a relocation entry */
	44
	45	#define RELOCATE_ENTRY(sym, section) \
	46	LONG(sym ## _start); \
	47	LONG(sym ## _end); \
	48	LONG(LOADADDR(section))
	49
5e4417f9 MF	50	#if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE
	51	#define MERGED_VECTORS 1
	52	#else
	53	#define MERGED_VECTORS 0
	54	#endif
	55
f8f02ca7	56	/*
5e4417f9 MF	57	* Macro to define a section for a vector. When MERGED_VECTORS is 0
5e4417f9 MF	58	* code for every vector is located with other init data. At startup
f8f02ca7 MF	59	* time head.S copies code for every vector to its final position according
f8f02ca7 MF	60	* to description recorded in the corresponding RELOCATE_ENTRY.
5a0015d6 CZ	61	*/
5a0015d6 CZ	62
4f17664a	63	#define SECTION_VECTOR4(sym, section, addr, prevsec) \
f8f02ca7	64	section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
5a0015d6 CZ	65	{ \
	66	. = ALIGN(4); \
	67	sym ## _start = ABSOLUTE(.); \
	68	*(section) \
	69	sym ## _end = ABSOLUTE(.); \
	70	}
4f17664a MF	71
4f17664a MF	72	#define SECTION_VECTOR2(section, addr) \
b46dcfa3 MF	73	. = addr; \
b46dcfa3 MF	74	*(section)
5a0015d6 CZ	75
	76	/*
	77	* Mapping of input sections to output sections when linking.
	78	*/
	79
	80	SECTIONS
	81	{
173d6681	82	. = KERNELOFFSET;
5a0015d6 CZ	83	/* .text section */
	84
	85	_text = .;
	86	_stext = .;
5a0015d6 CZ	87
	88	.text :
	89	{
0ebdcb4d TA	90	/* The HEAD_TEXT section must be the first section! */
0ebdcb4d TA	91	HEAD_TEXT
b46dcfa3	92
5e4417f9	93	#if MERGED_VECTORS
4f17664a MF	94	. = ALIGN(PAGE_SIZE);
4f17664a MF	95	_vecbase = .;
b46dcfa3	96
da0a4e5c	97	#ifdef SUPPORT_WINDOWED
4f17664a	98	SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR)
da0a4e5c	99	#endif
b46dcfa3	100	#if XCHAL_EXCM_LEVEL >= 2
4f17664a	101	SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
b46dcfa3 MF	102	#endif
b46dcfa3 MF	103	#if XCHAL_EXCM_LEVEL >= 3
4f17664a	104	SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
b46dcfa3 MF	105	#endif
b46dcfa3 MF	106	#if XCHAL_EXCM_LEVEL >= 4
4f17664a	107	SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
b46dcfa3 MF	108	#endif
b46dcfa3 MF	109	#if XCHAL_EXCM_LEVEL >= 5
4f17664a	110	SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
b46dcfa3 MF	111	#endif
b46dcfa3 MF	112	#if XCHAL_EXCM_LEVEL >= 6
4f17664a	113	SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
b46dcfa3	114	#endif
4f17664a MF	115	SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
	116	SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
	117	SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR)
	118	SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
50722f0b	119
4f17664a	120	*(.exception.text)
b46dcfa3 MF	121	#endif
b46dcfa3 MF	122
f8f02ca7 MF	123	IRQENTRY_TEXT
	124	SOFTIRQENTRY_TEXT
	125	ENTRY_TEXT
78f3cdfa	126	TEXT_TEXT
f8f02ca7 MF	127	SCHED_TEXT
	128	CPUIDLE_TEXT
	129	LOCK_TEXT
f5fae679	130	*(.fixup)
5a0015d6 CZ	131	}
5a0015d6 CZ	132	_etext = .;
de4f6e5b	133	PROVIDE (etext = .);
5a0015d6 CZ	134
	135	. = ALIGN(16);
	136
c8231825	137	RO_DATA(4096)
5a0015d6	138
5a0015d6 CZ	139	/* Data section */
5a0015d6 CZ	140
7af710d9 MF	141	#ifdef CONFIG_XIP_KERNEL
	142	INIT_TEXT_SECTION(PAGE_SIZE)
	143	#else
5e7b6ed8	144	_sdata = .;
c9174047	145	RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
5a0015d6 CZ	146	_edata = .;
5a0015d6 CZ	147
5a0015d6 CZ	148	/* Initialization code and data: */
5a0015d6 CZ	149
cd3db323	150	. = ALIGN(PAGE_SIZE);
5a0015d6	151	__init_begin = .;
cd3db323	152	INIT_TEXT_SECTION(PAGE_SIZE)
5a0015d6 CZ	153
	154	.init.data :
	155	{
01ba2bdc	156	INIT_DATA
7af710d9 MF	157	}
	158	#endif
	159
	160	.init.rodata :
	161	{
5a0015d6 CZ	162	. = ALIGN(0x4);
	163	__tagtable_begin = .;
	164	*(.taglist)
	165	__tagtable_end = .;
de4f6e5b CZ	166
	167	. = ALIGN(16);
	168	__boot_reloc_table_start = ABSOLUTE(.);
	169
5e4417f9	170	#if !MERGED_VECTORS
da0a4e5c	171	#ifdef SUPPORT_WINDOWED
de4f6e5b CZ	172	RELOCATE_ENTRY(_WindowVectors_text,
de4f6e5b CZ	173	.WindowVectors.text);
da0a4e5c	174	#endif
2d1c645c MG	175	#if XCHAL_EXCM_LEVEL >= 2
	176	RELOCATE_ENTRY(_Level2InterruptVector_text,
	177	.Level2InterruptVector.text);
	178	#endif
	179	#if XCHAL_EXCM_LEVEL >= 3
	180	RELOCATE_ENTRY(_Level3InterruptVector_text,
	181	.Level3InterruptVector.text);
	182	#endif
	183	#if XCHAL_EXCM_LEVEL >= 4
	184	RELOCATE_ENTRY(_Level4InterruptVector_text,
	185	.Level4InterruptVector.text);
	186	#endif
	187	#if XCHAL_EXCM_LEVEL >= 5
	188	RELOCATE_ENTRY(_Level5InterruptVector_text,
	189	.Level5InterruptVector.text);
	190	#endif
	191	#if XCHAL_EXCM_LEVEL >= 6
	192	RELOCATE_ENTRY(_Level6InterruptVector_text,
	193	.Level6InterruptVector.text);
	194	#endif
de4f6e5b CZ	195	RELOCATE_ENTRY(_KernelExceptionVector_text,
	196	.KernelExceptionVector.text);
	197	RELOCATE_ENTRY(_UserExceptionVector_text,
	198	.UserExceptionVector.text);
de4f6e5b CZ	199	RELOCATE_ENTRY(_DoubleExceptionVector_text,
de4f6e5b CZ	200	.DoubleExceptionVector.text);
6d15d109 MG	201	RELOCATE_ENTRY(_DebugInterruptVector_text,
6d15d109 MG	202	.DebugInterruptVector.text);
50722f0b MF	203	RELOCATE_ENTRY(_exception_text,
50722f0b MF	204	.exception.text);
b46dcfa3	205	#endif
7af710d9 MF	206	#ifdef CONFIG_XIP_KERNEL
	207	RELOCATE_ENTRY(_xip_data, .data);
	208	RELOCATE_ENTRY(_xip_init_data, .init.data);
4f17664a	209	#endif
89b184f9	210	#if defined(CONFIG_SECONDARY_RESET_VECTOR)
f615136c MF	211	RELOCATE_ENTRY(_SecondaryResetVector_text,
	212	.SecondaryResetVector.text);
	213	#endif
	214
de4f6e5b	215	__boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6	216
cd3db323 TA	217	INIT_SETUP(XCHAL_ICACHE_LINESIZE)
	218	INIT_CALLS
	219	CON_INITCALL
cd3db323	220	INIT_RAM_FS
5a0015d6	221	}
de4f6e5b	222
0415b00d	223	PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
de4f6e5b	224
5a0015d6 CZ	225	/* We need this dummy segment here */
	226
	227	. = ALIGN(4);
	228	.dummy : { LONG(0) }
	229
4f17664a MF	230	#undef LAST
	231	#define LAST .dummy
	232
5e4417f9	233	#if !MERGED_VECTORS
5a0015d6 CZ	234	/* The vectors are relocated to the real position at startup time */
5a0015d6 CZ	235
da0a4e5c	236	#ifdef SUPPORT_WINDOWED
4f17664a	237	SECTION_VECTOR4 (_WindowVectors_text,
5a0015d6	238	.WindowVectors.text,
f8f02ca7	239	WINDOW_VECTORS_VADDR,
da0a4e5c MF	240	LAST)
	241	#undef LAST
	242	#define LAST .WindowVectors.text
	243	#endif
4f17664a	244	SECTION_VECTOR4 (_DebugInterruptVector_text,
5a0015d6	245	.DebugInterruptVector.text,
e85e335f	246	DEBUG_VECTOR_VADDR,
da0a4e5c	247	LAST)
2d1c645c MG	248	#undef LAST
	249	#define LAST .DebugInterruptVector.text
	250	#if XCHAL_EXCM_LEVEL >= 2
4f17664a	251	SECTION_VECTOR4 (_Level2InterruptVector_text,
2d1c645c	252	.Level2InterruptVector.text,
e85e335f	253	INTLEVEL2_VECTOR_VADDR,
f8f02ca7	254	LAST)
2d1c645c MG	255	# undef LAST
	256	# define LAST .Level2InterruptVector.text
	257	#endif
	258	#if XCHAL_EXCM_LEVEL >= 3
4f17664a	259	SECTION_VECTOR4 (_Level3InterruptVector_text,
2d1c645c	260	.Level3InterruptVector.text,
e85e335f	261	INTLEVEL3_VECTOR_VADDR,
f8f02ca7	262	LAST)
2d1c645c MG	263	# undef LAST
	264	# define LAST .Level3InterruptVector.text
	265	#endif
	266	#if XCHAL_EXCM_LEVEL >= 4
4f17664a	267	SECTION_VECTOR4 (_Level4InterruptVector_text,
2d1c645c	268	.Level4InterruptVector.text,
e85e335f	269	INTLEVEL4_VECTOR_VADDR,
f8f02ca7	270	LAST)
2d1c645c MG	271	# undef LAST
	272	# define LAST .Level4InterruptVector.text
	273	#endif
	274	#if XCHAL_EXCM_LEVEL >= 5
4f17664a	275	SECTION_VECTOR4 (_Level5InterruptVector_text,
2d1c645c	276	.Level5InterruptVector.text,
e85e335f	277	INTLEVEL5_VECTOR_VADDR,
f8f02ca7	278	LAST)
2d1c645c MG	279	# undef LAST
	280	# define LAST .Level5InterruptVector.text
	281	#endif
	282	#if XCHAL_EXCM_LEVEL >= 6
4f17664a	283	SECTION_VECTOR4 (_Level6InterruptVector_text,
2d1c645c	284	.Level6InterruptVector.text,
e85e335f	285	INTLEVEL6_VECTOR_VADDR,
f8f02ca7	286	LAST)
2d1c645c MG	287	# undef LAST
	288	# define LAST .Level6InterruptVector.text
	289	#endif
4f17664a	290	SECTION_VECTOR4 (_KernelExceptionVector_text,
5a0015d6	291	.KernelExceptionVector.text,
e85e335f	292	KERNEL_VECTOR_VADDR,
f8f02ca7 MF	293	LAST)
f8f02ca7 MF	294	#undef LAST
4f17664a	295	SECTION_VECTOR4 (_UserExceptionVector_text,
5a0015d6	296	.UserExceptionVector.text,
e85e335f	297	USER_VECTOR_VADDR,
f8f02ca7	298	.KernelExceptionVector.text)
4f17664a	299	SECTION_VECTOR4 (_DoubleExceptionVector_text,
5a0015d6	300	.DoubleExceptionVector.text,
e85e335f	301	DOUBLEEXC_VECTOR_VADDR,
f8f02ca7	302	.UserExceptionVector.text)
50722f0b	303	#define LAST .DoubleExceptionVector.text
f615136c	304
b46dcfa3	305	#endif
89b184f9	306	#if defined(CONFIG_SECONDARY_RESET_VECTOR)
f615136c	307
4f17664a	308	SECTION_VECTOR4 (_SecondaryResetVector_text,
f615136c MF	309	.SecondaryResetVector.text,
f615136c MF	310	RESET_VECTOR1_VADDR,
4f17664a	311	LAST)
50722f0b MF	312	#undef LAST
50722f0b MF	313	#define LAST .SecondaryResetVector.text
f615136c	314
50722f0b	315	#endif
5e4417f9	316	#if !MERGED_VECTORS
4f17664a	317	SECTION_VECTOR4 (_exception_text,
50722f0b MF	318	.exception.text,
	319	,
	320	LAST)
	321	#undef LAST
	322	#define LAST .exception.text
f615136c MF	323
f615136c MF	324	#endif
50722f0b	325	. = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3;
f615136c	326
5e4417f9	327	.dummy1 : AT(ADDR(.dummy1)) { LONG(0) }
cd3db323	328	. = ALIGN(PAGE_SIZE);
5a0015d6	329
7af710d9	330	#ifndef CONFIG_XIP_KERNEL
5a0015d6 CZ	331	__init_end = .;
5a0015d6 CZ	332
cd3db323	333	BSS_SECTION(0, 8192, 0)
7af710d9	334	#endif
de4f6e5b	335
5a0015d6 CZ	336	_end = .;
5a0015d6 CZ	337
7af710d9 MF	338	#ifdef CONFIG_XIP_KERNEL
	339	. = CONFIG_XIP_DATA_ADDR;
	340
	341	_xip_start = .;
	342
	343	#undef LOAD_OFFSET
	344	#define LOAD_OFFSET \
5e4417f9	345	(CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3)
7af710d9 MF	346
	347	_xip_data_start = .;
	348	_sdata = .;
4d7048f5	349	RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
7af710d9 MF	350	_edata = .;
	351	_xip_data_end = .;
	352
	353	/* Initialization data: */
	354
	355	STRUCT_ALIGN();
	356
	357	_xip_init_data_start = .;
	358	__init_begin = .;
	359	.init.data :
	360	{
	361	INIT_DATA
	362	}
	363	_xip_init_data_end = .;
	364	__init_end = .;
	365	BSS_SECTION(0, 8192, 0)
	366
	367	_xip_end = .;
	368
	369	#undef LOAD_OFFSET
	370	#endif
	371
1026ded6	372	DWARF_DEBUG
5a0015d6	373
960b82c3 MF	374	.xt.prop 0 : { KEEP((.xt.prop .xt.prop. .gnu.linkonce.prop.*)) }
	375	.xt.insn 0 : { KEEP((.xt.insn .xt.insn. .gnu.linkonce.x*)) }
	376	.xt.lit 0 : { KEEP((.xt.lit .xt.lit. .gnu.linkonce.p*)) }
023bf6f1 TH	377
	378	/* Sections to be discarded */
	379	DISCARDS
5a0015d6	380	}