[linux-block.git] / arch / xtensa / kernel / vmlinux.lds.S

/*
 * arch/xtensa/kernel/vmlinux.lds.S
 *
 * Xtensa linker script
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/thread_info.h>

#include <asm/vectors.h>
#include <variant/core.h>

OUTPUT_ARCH(xtensa)
ENTRY(_start)

#ifdef __XTENSA_EB__
jiffies = jiffies_64 + 4;
#else
jiffies = jiffies_64;
#endif

/* Note: In the following macros, it would be nice to specify only the
   vector name and section kind and construct "sym" and "section" using
   CPP concatenation, but that does not work reliably.  Concatenating a
   string with "." produces an invalid token.  CPP will not print a
   warning because it thinks this is an assembly file, but it leaves
   them as multiple tokens and there may or may not be whitespace
   between them.  */

/* Macro for a relocation entry */

#define RELOCATE_ENTRY(sym, section)		\
	LONG(sym ## _start);			\
	LONG(sym ## _end);			\
	LONG(LOADADDR(section))

/*
 * Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is
 * defined code for every vector is located with other init data. At startup
 * time head.S copies code for every vector to its final position according
 * to description recorded in the corresponding RELOCATE_ENTRY.
 */

#ifdef CONFIG_VECTORS_OFFSET
#define SECTION_VECTOR(sym, section, addr, prevsec)                         \
  section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3)      \
  {									    \
    . = ALIGN(4);							    \
    sym ## _start = ABSOLUTE(.);		 			    \
    *(section)								    \
    sym ## _end = ABSOLUTE(.);						    \
  }
#else
#define SECTION_VECTOR(section, addr)					    \
  . = addr;								    \
  *(section)
#endif

/*
 *  Mapping of input sections to output sections when linking.
 */

SECTIONS
{
  . = KERNELOFFSET;
  /* .text section */

  _text = .;
  _stext = .;

  .text :
  {
    /* The HEAD_TEXT section must be the first section! */
    HEAD_TEXT

#ifndef CONFIG_VECTORS_OFFSET
  . = ALIGN(PAGE_SIZE);
  _vecbase = .;

  SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR)
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
#endif
  SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
  SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
  SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR)
  SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
#endif

    IRQENTRY_TEXT
    SOFTIRQENTRY_TEXT
    ENTRY_TEXT
    TEXT_TEXT
    SCHED_TEXT
    CPUIDLE_TEXT
    LOCK_TEXT

  }
  _etext = .;
  PROVIDE (etext = .);

  . = ALIGN(16);

  RODATA

  /*  Relocation table */

  .fixup   : { *(.fixup) }

  EXCEPTION_TABLE(16)
  NOTES
  /* Data section */

  _sdata = .;
  RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  INIT_TEXT_SECTION(PAGE_SIZE)

  .init.data :
  {
    INIT_DATA
    . = ALIGN(0x4);
    __tagtable_begin = .;
    *(.taglist)
    __tagtable_end = .;

    . = ALIGN(16);
    __boot_reloc_table_start = ABSOLUTE(.);

#ifdef CONFIG_VECTORS_OFFSET
    RELOCATE_ENTRY(_WindowVectors_text,
		   .WindowVectors.text);
#if XCHAL_EXCM_LEVEL >= 2
    RELOCATE_ENTRY(_Level2InterruptVector_text,
		   .Level2InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 3
    RELOCATE_ENTRY(_Level3InterruptVector_text,
		   .Level3InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 4
    RELOCATE_ENTRY(_Level4InterruptVector_text,
		   .Level4InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 5
    RELOCATE_ENTRY(_Level5InterruptVector_text,
		   .Level5InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 6
    RELOCATE_ENTRY(_Level6InterruptVector_text,
		   .Level6InterruptVector.text);
#endif
    RELOCATE_ENTRY(_KernelExceptionVector_text,
		   .KernelExceptionVector.text);
    RELOCATE_ENTRY(_UserExceptionVector_text,
		   .UserExceptionVector.text);
    RELOCATE_ENTRY(_DoubleExceptionVector_text,
		   .DoubleExceptionVector.text);
    RELOCATE_ENTRY(_DebugInterruptVector_text,
		   .DebugInterruptVector.text);
#endif
#if defined(CONFIG_SMP)
    RELOCATE_ENTRY(_SecondaryResetVector_text,
		   .SecondaryResetVector.text);
#endif

  
    __boot_reloc_table_end = ABSOLUTE(.) ;

    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
    INIT_CALLS
    CON_INITCALL
    SECURITY_INITCALL
    INIT_RAM_FS
  }

  PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)

  /* We need this dummy segment here */

  . = ALIGN(4);
  .dummy : { LONG(0) }

#ifdef CONFIG_VECTORS_OFFSET
  /* The vectors are relocated to the real position at startup time */

  SECTION_VECTOR (_WindowVectors_text,
		  .WindowVectors.text,
		  WINDOW_VECTORS_VADDR,
		  .dummy)
  SECTION_VECTOR (_DebugInterruptVector_text,
		  .DebugInterruptVector.text,
		  DEBUG_VECTOR_VADDR,
		  .WindowVectors.text)
#undef LAST
#define LAST	.DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (_Level2InterruptVector_text,
		  .Level2InterruptVector.text,
		  INTLEVEL2_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (_Level3InterruptVector_text,
		  .Level3InterruptVector.text,
		  INTLEVEL3_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (_Level4InterruptVector_text,
		  .Level4InterruptVector.text,
		  INTLEVEL4_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (_Level5InterruptVector_text,
		  .Level5InterruptVector.text,
		  INTLEVEL5_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (_Level6InterruptVector_text,
		  .Level6InterruptVector.text,
		  INTLEVEL6_VECTOR_VADDR,
		  LAST)
# undef LAST
# define LAST	.Level6InterruptVector.text
#endif
  SECTION_VECTOR (_KernelExceptionVector_text,
		  .KernelExceptionVector.text,
		  KERNEL_VECTOR_VADDR,
		  LAST)
#undef LAST
  SECTION_VECTOR (_UserExceptionVector_text,
		  .UserExceptionVector.text,
		  USER_VECTOR_VADDR,
		  .KernelExceptionVector.text)
  SECTION_VECTOR (_DoubleExceptionVector_text,
		  .DoubleExceptionVector.text,
		  DOUBLEEXC_VECTOR_VADDR,
		  .UserExceptionVector.text)

  . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;

#endif
#if defined(CONFIG_SMP)

  SECTION_VECTOR (_SecondaryResetVector_text,
		  .SecondaryResetVector.text,
		  RESET_VECTOR1_VADDR,
		  .DoubleExceptionVector.text)

  . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);

#endif

  . = ALIGN(PAGE_SIZE);

  __init_end = .;

  BSS_SECTION(0, 8192, 0)

  _end = .;

  .xt.lit : { *(.xt.lit) }
  .xt.prop : { *(.xt.prop) }

  .debug  0 :  { *(.debug) }
  .line  0 :  { *(.line) }
  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
  .debug_sfnames  0 :  { *(.debug_sfnames) }
  .debug_aranges  0 :  { *(.debug_aranges) }
  .debug_pubnames  0 :  { *(.debug_pubnames) }
  .debug_info  0 :  { *(.debug_info) }
  .debug_abbrev  0 :  { *(.debug_abbrev) }
  .debug_line  0 :  { *(.debug_line) }
  .debug_frame  0 :  { *(.debug_frame) }
  .debug_str  0 :  { *(.debug_str) }
  .debug_loc  0 :  { *(.debug_loc) }
  .debug_macinfo  0 :  { *(.debug_macinfo) }
  .debug_weaknames  0 :  { *(.debug_weaknames) }
  .debug_funcnames  0 :  { *(.debug_funcnames) }
  .debug_typenames  0 :  { *(.debug_typenames) }
  .debug_varnames  0 :  { *(.debug_varnames) }

  .xt.insn 0 :
  {
    *(.xt.insn)
    *(.gnu.linkonce.x*)
  }

  .xt.lit 0 :
  {
    *(.xt.lit)
    *(.gnu.linkonce.p*)
  }

  /* Sections to be discarded */
  DISCARDS
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/vmlinux.lds.S
	3	*
	4	* Xtensa linker script
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
2d1c645c	10	* Copyright (C) 2001 - 2008 Tensilica Inc.
5a0015d6 CZ	11	*
	12	* Chris Zankel <chris@zankel.net>
	13	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	14	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	15	*/
	16
	17	#include <asm-generic/vmlinux.lds.h>
cd3db323 TA	18	#include <asm/page.h>
cd3db323 TA	19	#include <asm/thread_info.h>
5a0015d6	20
e85e335f	21	#include <asm/vectors.h>
367b8112	22	#include <variant/core.h>
fc862ee9	23
5a0015d6 CZ	24	OUTPUT_ARCH(xtensa)
	25	ENTRY(_start)
	26
173d6681	27	#ifdef __XTENSA_EB__
5a0015d6 CZ	28	jiffies = jiffies_64 + 4;
	29	#else
	30	jiffies = jiffies_64;
	31	#endif
	32
5a0015d6 CZ	33	/* Note: In the following macros, it would be nice to specify only the
	34	vector name and section kind and construct "sym" and "section" using
	35	CPP concatenation, but that does not work reliably. Concatenating a
	36	string with "." produces an invalid token. CPP will not print a
	37	warning because it thinks this is an assembly file, but it leaves
	38	them as multiple tokens and there may or may not be whitespace
	39	between them. */
	40
	41	/* Macro for a relocation entry */
	42
	43	#define RELOCATE_ENTRY(sym, section) \
	44	LONG(sym ## _start); \
	45	LONG(sym ## _end); \
	46	LONG(LOADADDR(section))
	47
f8f02ca7 MF	48	/*
	49	* Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is
	50	* defined code for every vector is located with other init data. At startup
	51	* time head.S copies code for every vector to its final position according
	52	* to description recorded in the corresponding RELOCATE_ENTRY.
5a0015d6 CZ	53	*/
5a0015d6 CZ	54
b46dcfa3	55	#ifdef CONFIG_VECTORS_OFFSET
f8f02ca7 MF	56	#define SECTION_VECTOR(sym, section, addr, prevsec) \
f8f02ca7 MF	57	section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
5a0015d6 CZ	58	{ \
	59	. = ALIGN(4); \
	60	sym ## _start = ABSOLUTE(.); \
	61	*(section) \
	62	sym ## _end = ABSOLUTE(.); \
	63	}
b46dcfa3 MF	64	#else
	65	#define SECTION_VECTOR(section, addr) \
	66	. = addr; \
	67	*(section)
	68	#endif
5a0015d6 CZ	69
	70	/*
	71	* Mapping of input sections to output sections when linking.
	72	*/
	73
	74	SECTIONS
	75	{
173d6681	76	. = KERNELOFFSET;
5a0015d6 CZ	77	/* .text section */
	78
	79	_text = .;
	80	_stext = .;
5a0015d6 CZ	81
	82	.text :
	83	{
0ebdcb4d TA	84	/* The HEAD_TEXT section must be the first section! */
0ebdcb4d TA	85	HEAD_TEXT
b46dcfa3 MF	86
	87	#ifndef CONFIG_VECTORS_OFFSET
	88	. = ALIGN(PAGE_SIZE);
	89	_vecbase = .;
	90
	91	SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR)
	92	#if XCHAL_EXCM_LEVEL >= 2
	93	SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
	94	#endif
	95	#if XCHAL_EXCM_LEVEL >= 3
	96	SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
	97	#endif
	98	#if XCHAL_EXCM_LEVEL >= 4
	99	SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
	100	#endif
	101	#if XCHAL_EXCM_LEVEL >= 5
	102	SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
	103	#endif
	104	#if XCHAL_EXCM_LEVEL >= 6
	105	SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
	106	#endif
b46dcfa3	107	SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
b46dcfa3	108	SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
b46dcfa3	109	SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR)
b46dcfa3 MF	110	SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
	111	#endif
	112
f8f02ca7 MF	113	IRQENTRY_TEXT
	114	SOFTIRQENTRY_TEXT
	115	ENTRY_TEXT
78f3cdfa	116	TEXT_TEXT
f8f02ca7 MF	117	SCHED_TEXT
	118	CPUIDLE_TEXT
	119	LOCK_TEXT
5a0015d6 CZ	120
	121	}
	122	_etext = .;
de4f6e5b	123	PROVIDE (etext = .);
5a0015d6 CZ	124
	125	. = ALIGN(16);
	126
	127	RODATA
	128
	129	/* Relocation table */
	130
5a0015d6 CZ	131	.fixup : { *(.fixup) }
5a0015d6 CZ	132
cd3db323	133	EXCEPTION_TABLE(16)
4119ba21	134	NOTES
5a0015d6 CZ	135	/* Data section */
5a0015d6 CZ	136
5e7b6ed8	137	_sdata = .;
cd3db323	138	RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
5a0015d6 CZ	139	_edata = .;
5a0015d6 CZ	140
5a0015d6 CZ	141	/* Initialization code and data: */
5a0015d6 CZ	142
cd3db323	143	. = ALIGN(PAGE_SIZE);
5a0015d6	144	__init_begin = .;
cd3db323	145	INIT_TEXT_SECTION(PAGE_SIZE)
5a0015d6 CZ	146
	147	.init.data :
	148	{
01ba2bdc	149	INIT_DATA
5a0015d6 CZ	150	. = ALIGN(0x4);
	151	__tagtable_begin = .;
	152	*(.taglist)
	153	__tagtable_end = .;
de4f6e5b CZ	154
	155	. = ALIGN(16);
	156	__boot_reloc_table_start = ABSOLUTE(.);
	157
b46dcfa3	158	#ifdef CONFIG_VECTORS_OFFSET
de4f6e5b CZ	159	RELOCATE_ENTRY(_WindowVectors_text,
de4f6e5b CZ	160	.WindowVectors.text);
2d1c645c MG	161	#if XCHAL_EXCM_LEVEL >= 2
	162	RELOCATE_ENTRY(_Level2InterruptVector_text,
	163	.Level2InterruptVector.text);
	164	#endif
	165	#if XCHAL_EXCM_LEVEL >= 3
	166	RELOCATE_ENTRY(_Level3InterruptVector_text,
	167	.Level3InterruptVector.text);
	168	#endif
	169	#if XCHAL_EXCM_LEVEL >= 4
	170	RELOCATE_ENTRY(_Level4InterruptVector_text,
	171	.Level4InterruptVector.text);
	172	#endif
	173	#if XCHAL_EXCM_LEVEL >= 5
	174	RELOCATE_ENTRY(_Level5InterruptVector_text,
	175	.Level5InterruptVector.text);
	176	#endif
	177	#if XCHAL_EXCM_LEVEL >= 6
	178	RELOCATE_ENTRY(_Level6InterruptVector_text,
	179	.Level6InterruptVector.text);
	180	#endif
de4f6e5b CZ	181	RELOCATE_ENTRY(_KernelExceptionVector_text,
	182	.KernelExceptionVector.text);
	183	RELOCATE_ENTRY(_UserExceptionVector_text,
	184	.UserExceptionVector.text);
de4f6e5b CZ	185	RELOCATE_ENTRY(_DoubleExceptionVector_text,
de4f6e5b CZ	186	.DoubleExceptionVector.text);
6d15d109 MG	187	RELOCATE_ENTRY(_DebugInterruptVector_text,
6d15d109 MG	188	.DebugInterruptVector.text);
b46dcfa3	189	#endif
f615136c	190	#if defined(CONFIG_SMP)
f615136c MF	191	RELOCATE_ENTRY(_SecondaryResetVector_text,
	192	.SecondaryResetVector.text);
	193	#endif
	194
de4f6e5b CZ	195
de4f6e5b CZ	196	__boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6	197
cd3db323 TA	198	INIT_SETUP(XCHAL_ICACHE_LINESIZE)
	199	INIT_CALLS
	200	CON_INITCALL
	201	SECURITY_INITCALL
	202	INIT_RAM_FS
5a0015d6	203	}
de4f6e5b	204
0415b00d	205	PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
de4f6e5b	206
5a0015d6 CZ	207	/* We need this dummy segment here */
	208
	209	. = ALIGN(4);
	210	.dummy : { LONG(0) }
	211
b46dcfa3	212	#ifdef CONFIG_VECTORS_OFFSET
5a0015d6 CZ	213	/* The vectors are relocated to the real position at startup time */
	214
	215	SECTION_VECTOR (_WindowVectors_text,
	216	.WindowVectors.text,
f8f02ca7	217	WINDOW_VECTORS_VADDR,
5a0015d6	218	.dummy)
5a0015d6 CZ	219	SECTION_VECTOR (_DebugInterruptVector_text,
5a0015d6 CZ	220	.DebugInterruptVector.text,
e85e335f	221	DEBUG_VECTOR_VADDR,
f8f02ca7	222	.WindowVectors.text)
2d1c645c MG	223	#undef LAST
	224	#define LAST .DebugInterruptVector.text
	225	#if XCHAL_EXCM_LEVEL >= 2
	226	SECTION_VECTOR (_Level2InterruptVector_text,
	227	.Level2InterruptVector.text,
e85e335f	228	INTLEVEL2_VECTOR_VADDR,
f8f02ca7	229	LAST)
2d1c645c MG	230	# undef LAST
	231	# define LAST .Level2InterruptVector.text
	232	#endif
	233	#if XCHAL_EXCM_LEVEL >= 3
	234	SECTION_VECTOR (_Level3InterruptVector_text,
	235	.Level3InterruptVector.text,
e85e335f	236	INTLEVEL3_VECTOR_VADDR,
f8f02ca7	237	LAST)
2d1c645c MG	238	# undef LAST
	239	# define LAST .Level3InterruptVector.text
	240	#endif
	241	#if XCHAL_EXCM_LEVEL >= 4
	242	SECTION_VECTOR (_Level4InterruptVector_text,
	243	.Level4InterruptVector.text,
e85e335f	244	INTLEVEL4_VECTOR_VADDR,
f8f02ca7	245	LAST)
2d1c645c MG	246	# undef LAST
	247	# define LAST .Level4InterruptVector.text
	248	#endif
	249	#if XCHAL_EXCM_LEVEL >= 5
	250	SECTION_VECTOR (_Level5InterruptVector_text,
	251	.Level5InterruptVector.text,
e85e335f	252	INTLEVEL5_VECTOR_VADDR,
f8f02ca7	253	LAST)
2d1c645c MG	254	# undef LAST
	255	# define LAST .Level5InterruptVector.text
	256	#endif
	257	#if XCHAL_EXCM_LEVEL >= 6
	258	SECTION_VECTOR (_Level6InterruptVector_text,
	259	.Level6InterruptVector.text,
e85e335f	260	INTLEVEL6_VECTOR_VADDR,
f8f02ca7	261	LAST)
2d1c645c MG	262	# undef LAST
	263	# define LAST .Level6InterruptVector.text
	264	#endif
5a0015d6 CZ	265	SECTION_VECTOR (_KernelExceptionVector_text,
5a0015d6 CZ	266	.KernelExceptionVector.text,
e85e335f	267	KERNEL_VECTOR_VADDR,
f8f02ca7 MF	268	LAST)
f8f02ca7 MF	269	#undef LAST
5a0015d6 CZ	270	SECTION_VECTOR (_UserExceptionVector_text,
5a0015d6 CZ	271	.UserExceptionVector.text,
e85e335f	272	USER_VECTOR_VADDR,
f8f02ca7	273	.KernelExceptionVector.text)
5a0015d6 CZ	274	SECTION_VECTOR (_DoubleExceptionVector_text,
5a0015d6 CZ	275	.DoubleExceptionVector.text,
e85e335f	276	DOUBLEEXC_VECTOR_VADDR,
f8f02ca7	277	.UserExceptionVector.text)
5a0015d6 CZ	278
5a0015d6 CZ	279	. = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
f615136c	280
b46dcfa3	281	#endif
f615136c MF	282	#if defined(CONFIG_SMP)
f615136c MF	283
f615136c MF	284	SECTION_VECTOR (_SecondaryResetVector_text,
	285	.SecondaryResetVector.text,
	286	RESET_VECTOR1_VADDR,
ab45fb14	287	.DoubleExceptionVector.text)
f615136c MF	288
	289	. = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);
	290
	291	#endif
	292
cd3db323	293	. = ALIGN(PAGE_SIZE);
5a0015d6 CZ	294
	295	__init_end = .;
	296
cd3db323	297	BSS_SECTION(0, 8192, 0)
de4f6e5b	298
5a0015d6 CZ	299	_end = .;
5a0015d6 CZ	300
de4f6e5b CZ	301	.xt.lit : { *(.xt.lit) }
de4f6e5b CZ	302	.xt.prop : { *(.xt.prop) }
5a0015d6 CZ	303
	304	.debug 0 : { *(.debug) }
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023bf6f1 TH	333
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