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5a0015d6 CZ |
1 | /* |
2 | * arch/xtensa/kernel/vmlinux.lds.S | |
3 | * | |
4 | * Xtensa linker script | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | * | |
2d1c645c | 10 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
5a0015d6 CZ |
11 | * |
12 | * Chris Zankel <chris@zankel.net> | |
13 | * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca> | |
14 | * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> | |
15 | */ | |
16 | ||
17 | #include <asm-generic/vmlinux.lds.h> | |
cd3db323 TA |
18 | #include <asm/page.h> |
19 | #include <asm/thread_info.h> | |
5a0015d6 | 20 | |
8f8d5745 | 21 | #include <asm/core.h> |
e85e335f | 22 | #include <asm/vectors.h> |
fc862ee9 | 23 | |
5a0015d6 CZ |
24 | OUTPUT_ARCH(xtensa) |
25 | ENTRY(_start) | |
26 | ||
173d6681 | 27 | #ifdef __XTENSA_EB__ |
5a0015d6 CZ |
28 | jiffies = jiffies_64 + 4; |
29 | #else | |
30 | jiffies = jiffies_64; | |
31 | #endif | |
32 | ||
5a0015d6 CZ |
33 | /* Note: In the following macros, it would be nice to specify only the |
34 | vector name and section kind and construct "sym" and "section" using | |
35 | CPP concatenation, but that does not work reliably. Concatenating a | |
36 | string with "." produces an invalid token. CPP will not print a | |
37 | warning because it thinks this is an assembly file, but it leaves | |
38 | them as multiple tokens and there may or may not be whitespace | |
39 | between them. */ | |
40 | ||
41 | /* Macro for a relocation entry */ | |
42 | ||
43 | #define RELOCATE_ENTRY(sym, section) \ | |
44 | LONG(sym ## _start); \ | |
45 | LONG(sym ## _end); \ | |
46 | LONG(LOADADDR(section)) | |
47 | ||
f8f02ca7 MF |
48 | /* |
49 | * Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is | |
50 | * defined code for every vector is located with other init data. At startup | |
51 | * time head.S copies code for every vector to its final position according | |
52 | * to description recorded in the corresponding RELOCATE_ENTRY. | |
5a0015d6 CZ |
53 | */ |
54 | ||
b46dcfa3 | 55 | #ifdef CONFIG_VECTORS_OFFSET |
f8f02ca7 MF |
56 | #define SECTION_VECTOR(sym, section, addr, prevsec) \ |
57 | section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \ | |
5a0015d6 CZ |
58 | { \ |
59 | . = ALIGN(4); \ | |
60 | sym ## _start = ABSOLUTE(.); \ | |
61 | *(section) \ | |
62 | sym ## _end = ABSOLUTE(.); \ | |
63 | } | |
b46dcfa3 MF |
64 | #else |
65 | #define SECTION_VECTOR(section, addr) \ | |
66 | . = addr; \ | |
67 | *(section) | |
68 | #endif | |
5a0015d6 CZ |
69 | |
70 | /* | |
71 | * Mapping of input sections to output sections when linking. | |
72 | */ | |
73 | ||
74 | SECTIONS | |
75 | { | |
173d6681 | 76 | . = KERNELOFFSET; |
5a0015d6 CZ |
77 | /* .text section */ |
78 | ||
79 | _text = .; | |
80 | _stext = .; | |
5a0015d6 CZ |
81 | |
82 | .text : | |
83 | { | |
0ebdcb4d TA |
84 | /* The HEAD_TEXT section must be the first section! */ |
85 | HEAD_TEXT | |
b46dcfa3 MF |
86 | |
87 | #ifndef CONFIG_VECTORS_OFFSET | |
88 | . = ALIGN(PAGE_SIZE); | |
89 | _vecbase = .; | |
90 | ||
91 | SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR) | |
92 | #if XCHAL_EXCM_LEVEL >= 2 | |
93 | SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR) | |
94 | #endif | |
95 | #if XCHAL_EXCM_LEVEL >= 3 | |
96 | SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR) | |
97 | #endif | |
98 | #if XCHAL_EXCM_LEVEL >= 4 | |
99 | SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR) | |
100 | #endif | |
101 | #if XCHAL_EXCM_LEVEL >= 5 | |
102 | SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR) | |
103 | #endif | |
104 | #if XCHAL_EXCM_LEVEL >= 6 | |
105 | SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR) | |
106 | #endif | |
b46dcfa3 | 107 | SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR) |
b46dcfa3 | 108 | SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) |
b46dcfa3 | 109 | SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR) |
b46dcfa3 MF |
110 | SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) |
111 | #endif | |
112 | ||
f8f02ca7 MF |
113 | IRQENTRY_TEXT |
114 | SOFTIRQENTRY_TEXT | |
115 | ENTRY_TEXT | |
78f3cdfa | 116 | TEXT_TEXT |
f8f02ca7 MF |
117 | SCHED_TEXT |
118 | CPUIDLE_TEXT | |
119 | LOCK_TEXT | |
5a0015d6 CZ |
120 | |
121 | } | |
122 | _etext = .; | |
de4f6e5b | 123 | PROVIDE (etext = .); |
5a0015d6 CZ |
124 | |
125 | . = ALIGN(16); | |
126 | ||
127 | RODATA | |
128 | ||
129 | /* Relocation table */ | |
130 | ||
5a0015d6 CZ |
131 | .fixup : { *(.fixup) } |
132 | ||
cd3db323 | 133 | EXCEPTION_TABLE(16) |
4119ba21 | 134 | NOTES |
5a0015d6 CZ |
135 | /* Data section */ |
136 | ||
5e7b6ed8 | 137 | _sdata = .; |
cd3db323 | 138 | RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE) |
5a0015d6 CZ |
139 | _edata = .; |
140 | ||
5a0015d6 CZ |
141 | /* Initialization code and data: */ |
142 | ||
cd3db323 | 143 | . = ALIGN(PAGE_SIZE); |
5a0015d6 | 144 | __init_begin = .; |
cd3db323 | 145 | INIT_TEXT_SECTION(PAGE_SIZE) |
5a0015d6 CZ |
146 | |
147 | .init.data : | |
148 | { | |
01ba2bdc | 149 | INIT_DATA |
5a0015d6 CZ |
150 | . = ALIGN(0x4); |
151 | __tagtable_begin = .; | |
152 | *(.taglist) | |
153 | __tagtable_end = .; | |
de4f6e5b CZ |
154 | |
155 | . = ALIGN(16); | |
156 | __boot_reloc_table_start = ABSOLUTE(.); | |
157 | ||
b46dcfa3 | 158 | #ifdef CONFIG_VECTORS_OFFSET |
de4f6e5b CZ |
159 | RELOCATE_ENTRY(_WindowVectors_text, |
160 | .WindowVectors.text); | |
2d1c645c MG |
161 | #if XCHAL_EXCM_LEVEL >= 2 |
162 | RELOCATE_ENTRY(_Level2InterruptVector_text, | |
163 | .Level2InterruptVector.text); | |
164 | #endif | |
165 | #if XCHAL_EXCM_LEVEL >= 3 | |
166 | RELOCATE_ENTRY(_Level3InterruptVector_text, | |
167 | .Level3InterruptVector.text); | |
168 | #endif | |
169 | #if XCHAL_EXCM_LEVEL >= 4 | |
170 | RELOCATE_ENTRY(_Level4InterruptVector_text, | |
171 | .Level4InterruptVector.text); | |
172 | #endif | |
173 | #if XCHAL_EXCM_LEVEL >= 5 | |
174 | RELOCATE_ENTRY(_Level5InterruptVector_text, | |
175 | .Level5InterruptVector.text); | |
176 | #endif | |
177 | #if XCHAL_EXCM_LEVEL >= 6 | |
178 | RELOCATE_ENTRY(_Level6InterruptVector_text, | |
179 | .Level6InterruptVector.text); | |
180 | #endif | |
de4f6e5b CZ |
181 | RELOCATE_ENTRY(_KernelExceptionVector_text, |
182 | .KernelExceptionVector.text); | |
183 | RELOCATE_ENTRY(_UserExceptionVector_text, | |
184 | .UserExceptionVector.text); | |
de4f6e5b CZ |
185 | RELOCATE_ENTRY(_DoubleExceptionVector_text, |
186 | .DoubleExceptionVector.text); | |
6d15d109 MG |
187 | RELOCATE_ENTRY(_DebugInterruptVector_text, |
188 | .DebugInterruptVector.text); | |
b46dcfa3 | 189 | #endif |
f615136c | 190 | #if defined(CONFIG_SMP) |
f615136c MF |
191 | RELOCATE_ENTRY(_SecondaryResetVector_text, |
192 | .SecondaryResetVector.text); | |
193 | #endif | |
194 | ||
de4f6e5b CZ |
195 | |
196 | __boot_reloc_table_end = ABSOLUTE(.) ; | |
5a0015d6 | 197 | |
cd3db323 TA |
198 | INIT_SETUP(XCHAL_ICACHE_LINESIZE) |
199 | INIT_CALLS | |
200 | CON_INITCALL | |
cd3db323 | 201 | INIT_RAM_FS |
5a0015d6 | 202 | } |
de4f6e5b | 203 | |
0415b00d | 204 | PERCPU_SECTION(XCHAL_ICACHE_LINESIZE) |
de4f6e5b | 205 | |
5a0015d6 CZ |
206 | /* We need this dummy segment here */ |
207 | ||
208 | . = ALIGN(4); | |
209 | .dummy : { LONG(0) } | |
210 | ||
b46dcfa3 | 211 | #ifdef CONFIG_VECTORS_OFFSET |
5a0015d6 CZ |
212 | /* The vectors are relocated to the real position at startup time */ |
213 | ||
214 | SECTION_VECTOR (_WindowVectors_text, | |
215 | .WindowVectors.text, | |
f8f02ca7 | 216 | WINDOW_VECTORS_VADDR, |
5a0015d6 | 217 | .dummy) |
5a0015d6 CZ |
218 | SECTION_VECTOR (_DebugInterruptVector_text, |
219 | .DebugInterruptVector.text, | |
e85e335f | 220 | DEBUG_VECTOR_VADDR, |
f8f02ca7 | 221 | .WindowVectors.text) |
2d1c645c MG |
222 | #undef LAST |
223 | #define LAST .DebugInterruptVector.text | |
224 | #if XCHAL_EXCM_LEVEL >= 2 | |
225 | SECTION_VECTOR (_Level2InterruptVector_text, | |
226 | .Level2InterruptVector.text, | |
e85e335f | 227 | INTLEVEL2_VECTOR_VADDR, |
f8f02ca7 | 228 | LAST) |
2d1c645c MG |
229 | # undef LAST |
230 | # define LAST .Level2InterruptVector.text | |
231 | #endif | |
232 | #if XCHAL_EXCM_LEVEL >= 3 | |
233 | SECTION_VECTOR (_Level3InterruptVector_text, | |
234 | .Level3InterruptVector.text, | |
e85e335f | 235 | INTLEVEL3_VECTOR_VADDR, |
f8f02ca7 | 236 | LAST) |
2d1c645c MG |
237 | # undef LAST |
238 | # define LAST .Level3InterruptVector.text | |
239 | #endif | |
240 | #if XCHAL_EXCM_LEVEL >= 4 | |
241 | SECTION_VECTOR (_Level4InterruptVector_text, | |
242 | .Level4InterruptVector.text, | |
e85e335f | 243 | INTLEVEL4_VECTOR_VADDR, |
f8f02ca7 | 244 | LAST) |
2d1c645c MG |
245 | # undef LAST |
246 | # define LAST .Level4InterruptVector.text | |
247 | #endif | |
248 | #if XCHAL_EXCM_LEVEL >= 5 | |
249 | SECTION_VECTOR (_Level5InterruptVector_text, | |
250 | .Level5InterruptVector.text, | |
e85e335f | 251 | INTLEVEL5_VECTOR_VADDR, |
f8f02ca7 | 252 | LAST) |
2d1c645c MG |
253 | # undef LAST |
254 | # define LAST .Level5InterruptVector.text | |
255 | #endif | |
256 | #if XCHAL_EXCM_LEVEL >= 6 | |
257 | SECTION_VECTOR (_Level6InterruptVector_text, | |
258 | .Level6InterruptVector.text, | |
e85e335f | 259 | INTLEVEL6_VECTOR_VADDR, |
f8f02ca7 | 260 | LAST) |
2d1c645c MG |
261 | # undef LAST |
262 | # define LAST .Level6InterruptVector.text | |
263 | #endif | |
5a0015d6 CZ |
264 | SECTION_VECTOR (_KernelExceptionVector_text, |
265 | .KernelExceptionVector.text, | |
e85e335f | 266 | KERNEL_VECTOR_VADDR, |
f8f02ca7 MF |
267 | LAST) |
268 | #undef LAST | |
5a0015d6 CZ |
269 | SECTION_VECTOR (_UserExceptionVector_text, |
270 | .UserExceptionVector.text, | |
e85e335f | 271 | USER_VECTOR_VADDR, |
f8f02ca7 | 272 | .KernelExceptionVector.text) |
5a0015d6 CZ |
273 | SECTION_VECTOR (_DoubleExceptionVector_text, |
274 | .DoubleExceptionVector.text, | |
e85e335f | 275 | DOUBLEEXC_VECTOR_VADDR, |
f8f02ca7 | 276 | .UserExceptionVector.text) |
5a0015d6 CZ |
277 | |
278 | . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; | |
f615136c | 279 | |
b46dcfa3 | 280 | #endif |
f615136c MF |
281 | #if defined(CONFIG_SMP) |
282 | ||
f615136c MF |
283 | SECTION_VECTOR (_SecondaryResetVector_text, |
284 | .SecondaryResetVector.text, | |
285 | RESET_VECTOR1_VADDR, | |
ab45fb14 | 286 | .DoubleExceptionVector.text) |
f615136c MF |
287 | |
288 | . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text); | |
289 | ||
290 | #endif | |
291 | ||
cd3db323 | 292 | . = ALIGN(PAGE_SIZE); |
5a0015d6 CZ |
293 | |
294 | __init_end = .; | |
295 | ||
cd3db323 | 296 | BSS_SECTION(0, 8192, 0) |
de4f6e5b | 297 | |
5a0015d6 CZ |
298 | _end = .; |
299 | ||
1026ded6 | 300 | DWARF_DEBUG |
5a0015d6 | 301 | |
960b82c3 MF |
302 | .xt.prop 0 : { KEEP(*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*)) } |
303 | .xt.insn 0 : { KEEP(*(.xt.insn .xt.insn.* .gnu.linkonce.x*)) } | |
304 | .xt.lit 0 : { KEEP(*(.xt.lit .xt.lit.* .gnu.linkonce.p*)) } | |
023bf6f1 TH |
305 | |
306 | /* Sections to be discarded */ | |
307 | DISCARDS | |
5a0015d6 | 308 | } |