Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
[linux-block.git] / arch / xtensa / kernel / vmlinux.lds.S
CommitLineData
5a0015d6
CZ
1/*
2 * arch/xtensa/kernel/vmlinux.lds.S
3 *
4 * Xtensa linker script
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 *
12 * Chris Zankel <chris@zankel.net>
13 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
14 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
15 */
16
17#include <asm-generic/vmlinux.lds.h>
18
367b8112 19#include <variant/core.h>
6770fa02 20#include <platform/hardware.h>
5a0015d6
CZ
21OUTPUT_ARCH(xtensa)
22ENTRY(_start)
23
173d6681 24#ifdef __XTENSA_EB__
5a0015d6
CZ
25jiffies = jiffies_64 + 4;
26#else
27jiffies = jiffies_64;
28#endif
29
6770fa02 30#ifndef KERNELOFFSET
173d6681 31#define KERNELOFFSET 0xd0001000
6770fa02 32#endif
5a0015d6
CZ
33
34/* Note: In the following macros, it would be nice to specify only the
35 vector name and section kind and construct "sym" and "section" using
36 CPP concatenation, but that does not work reliably. Concatenating a
37 string with "." produces an invalid token. CPP will not print a
38 warning because it thinks this is an assembly file, but it leaves
39 them as multiple tokens and there may or may not be whitespace
40 between them. */
41
42/* Macro for a relocation entry */
43
44#define RELOCATE_ENTRY(sym, section) \
45 LONG(sym ## _start); \
46 LONG(sym ## _end); \
47 LONG(LOADADDR(section))
48
49/* Macro to define a section for a vector.
50 *
51 * Use of the MIN function catches the types of errors illustrated in
52 * the following example:
53 *
54 * Assume the section .DoubleExceptionVector.literal is completely
55 * full. Then a programmer adds code to .DoubleExceptionVector.text
56 * that produces another literal. The final literal position will
57 * overlay onto the first word of the adjacent code section
58 * .DoubleExceptionVector.text. (In practice, the literals will
59 * overwrite the code, and the first few instructions will be
60 * garbage.)
61 */
62
63#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec) \
64 section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size, \
65 LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
66 { \
67 . = ALIGN(4); \
68 sym ## _start = ABSOLUTE(.); \
69 *(section) \
70 sym ## _end = ABSOLUTE(.); \
71 }
72
73/*
74 * Mapping of input sections to output sections when linking.
75 */
76
77SECTIONS
78{
173d6681 79 . = KERNELOFFSET;
5a0015d6
CZ
80 /* .text section */
81
82 _text = .;
83 _stext = .;
84 _ftext = .;
85
86 .text :
87 {
0ebdcb4d
TA
88 /* The HEAD_TEXT section must be the first section! */
89 HEAD_TEXT
78f3cdfa 90 TEXT_TEXT
5a0015d6 91 VMLINUX_SYMBOL(__sched_text_start) = .;
813e6783 92 *(.sched.literal .sched.text)
5a0015d6
CZ
93 VMLINUX_SYMBOL(__sched_text_end) = .;
94 VMLINUX_SYMBOL(__lock_text_start) = .;
813e6783 95 *(.spinlock.literal .spinlock.text)
5a0015d6
CZ
96 VMLINUX_SYMBOL(__lock_text_end) = .;
97
98 }
99 _etext = .;
de4f6e5b 100 PROVIDE (etext = .);
5a0015d6
CZ
101
102 . = ALIGN(16);
103
104 RODATA
105
106 /* Relocation table */
107
5a0015d6
CZ
108 .fixup : { *(.fixup) }
109
110 . = ALIGN(16);
111
112 __ex_table : {
113 __start___ex_table = .;
114 *(__ex_table)
115 __stop___ex_table = .;
116 }
117
118 /* Data section */
119
120 . = ALIGN(XCHAL_ICACHE_LINESIZE);
121 _fdata = .;
122 .data :
123 {
b8243254
MD
124 DATA_DATA
125 CONSTRUCTORS
5a0015d6
CZ
126 . = ALIGN(XCHAL_ICACHE_LINESIZE);
127 *(.data.cacheline_aligned)
128 }
129
130 _edata = .;
131
132 /* The initial task */
133 . = ALIGN(8192);
134 .data.init_task : { *(.data.init_task) }
135
136 /* Initialization code and data: */
137
173d6681 138 . = ALIGN(1 << 12);
5a0015d6
CZ
139 __init_begin = .;
140 .init.text : {
141 _sinittext = .;
4f8d98ff 142 INIT_TEXT
5a0015d6
CZ
143 _einittext = .;
144 }
145
146 .init.data :
147 {
01ba2bdc 148 INIT_DATA
5a0015d6
CZ
149 . = ALIGN(0x4);
150 __tagtable_begin = .;
151 *(.taglist)
152 __tagtable_end = .;
de4f6e5b
CZ
153
154 . = ALIGN(16);
155 __boot_reloc_table_start = ABSOLUTE(.);
156
157 RELOCATE_ENTRY(_WindowVectors_text,
158 .WindowVectors.text);
159 RELOCATE_ENTRY(_KernelExceptionVector_text,
160 .KernelExceptionVector.text);
161 RELOCATE_ENTRY(_UserExceptionVector_text,
162 .UserExceptionVector.text);
163 RELOCATE_ENTRY(_DoubleExceptionVector_literal,
164 .DoubleExceptionVector.literal);
165 RELOCATE_ENTRY(_DoubleExceptionVector_text,
166 .DoubleExceptionVector.text);
6d15d109
MG
167 RELOCATE_ENTRY(_DebugInterruptVector_text,
168 .DebugInterruptVector.text);
de4f6e5b
CZ
169
170 __boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6
CZ
171 }
172
173 . = ALIGN(XCHAL_ICACHE_LINESIZE);
174
175 __setup_start = .;
176 .init.setup : { *(.init.setup) }
177 __setup_end = .;
178
179 __initcall_start = .;
180 .initcall.init : {
61ce1efe 181 INITCALLS
5a0015d6
CZ
182 }
183 __initcall_end = .;
184
185 __con_initcall_start = .;
186 .con_initcall.init : { *(.con_initcall.init) }
187 __con_initcall_end = .;
188
189 SECURITY_INIT
190
5a0015d6 191
67d38229 192#ifdef CONFIG_BLK_DEV_INITRD
5a0015d6
CZ
193 . = ALIGN(4096);
194 __initramfs_start =.;
195 .init.ramfs : { *(.init.ramfs) }
196 __initramfs_end = .;
67d38229 197#endif
5a0015d6 198
5fb7dc37 199 PERCPU(4096)
de4f6e5b
CZ
200
201
5a0015d6
CZ
202 /* We need this dummy segment here */
203
204 . = ALIGN(4);
205 .dummy : { LONG(0) }
206
207 /* The vectors are relocated to the real position at startup time */
208
209 SECTION_VECTOR (_WindowVectors_text,
210 .WindowVectors.text,
211 XCHAL_WINDOW_VECTORS_VADDR, 4,
212 .dummy)
213 SECTION_VECTOR (_DebugInterruptVector_literal,
214 .DebugInterruptVector.literal,
173d6681 215 XCHAL_DEBUG_VECTOR_VADDR - 4,
5a0015d6
CZ
216 SIZEOF(.WindowVectors.text),
217 .WindowVectors.text)
218 SECTION_VECTOR (_DebugInterruptVector_text,
219 .DebugInterruptVector.text,
173d6681 220 XCHAL_DEBUG_VECTOR_VADDR,
5a0015d6
CZ
221 4,
222 .DebugInterruptVector.literal)
223 SECTION_VECTOR (_KernelExceptionVector_literal,
224 .KernelExceptionVector.literal,
173d6681 225 XCHAL_KERNEL_VECTOR_VADDR - 4,
5a0015d6
CZ
226 SIZEOF(.DebugInterruptVector.text),
227 .DebugInterruptVector.text)
228 SECTION_VECTOR (_KernelExceptionVector_text,
229 .KernelExceptionVector.text,
173d6681 230 XCHAL_KERNEL_VECTOR_VADDR,
5a0015d6
CZ
231 4,
232 .KernelExceptionVector.literal)
233 SECTION_VECTOR (_UserExceptionVector_literal,
234 .UserExceptionVector.literal,
173d6681 235 XCHAL_USER_VECTOR_VADDR - 4,
5a0015d6
CZ
236 SIZEOF(.KernelExceptionVector.text),
237 .KernelExceptionVector.text)
238 SECTION_VECTOR (_UserExceptionVector_text,
239 .UserExceptionVector.text,
173d6681 240 XCHAL_USER_VECTOR_VADDR,
5a0015d6
CZ
241 4,
242 .UserExceptionVector.literal)
243 SECTION_VECTOR (_DoubleExceptionVector_literal,
244 .DoubleExceptionVector.literal,
245 XCHAL_DOUBLEEXC_VECTOR_VADDR - 16,
246 SIZEOF(.UserExceptionVector.text),
247 .UserExceptionVector.text)
248 SECTION_VECTOR (_DoubleExceptionVector_text,
249 .DoubleExceptionVector.text,
250 XCHAL_DOUBLEEXC_VECTOR_VADDR,
251 32,
252 .DoubleExceptionVector.literal)
253
254 . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
173d6681 255 . = ALIGN(1 << 12);
5a0015d6
CZ
256
257 __init_end = .;
258
259 . = ALIGN(8192);
260
261 /* BSS section */
262 _bss_start = .;
de4f6e5b 263 .bss : { *(.bss.page_aligned) *(.bss) }
5a0015d6 264 _bss_end = .;
de4f6e5b 265
5a0015d6
CZ
266 _end = .;
267
268 /* only used by the boot loader */
269
270 . = ALIGN(0x10);
271 .bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
272
273 . = ALIGN(0x1000);
274 __initrd_start = .;
275 .initrd : { *(.initrd) }
276 __initrd_end = .;
277
278 .ResetVector.text XCHAL_RESET_VECTOR_VADDR :
279 {
280 *(.ResetVector.text)
281 }
282
de4f6e5b
CZ
283 .xt.lit : { *(.xt.lit) }
284 .xt.prop : { *(.xt.prop) }
5a0015d6
CZ
285
286 .debug 0 : { *(.debug) }
287 .line 0 : { *(.line) }
288 .debug_srcinfo 0 : { *(.debug_srcinfo) }
289 .debug_sfnames 0 : { *(.debug_sfnames) }
290 .debug_aranges 0 : { *(.debug_aranges) }
291 .debug_pubnames 0 : { *(.debug_pubnames) }
292 .debug_info 0 : { *(.debug_info) }
293 .debug_abbrev 0 : { *(.debug_abbrev) }
294 .debug_line 0 : { *(.debug_line) }
295 .debug_frame 0 : { *(.debug_frame) }
296 .debug_str 0 : { *(.debug_str) }
297 .debug_loc 0 : { *(.debug_loc) }
298 .debug_macinfo 0 : { *(.debug_macinfo) }
299 .debug_weaknames 0 : { *(.debug_weaknames) }
300 .debug_funcnames 0 : { *(.debug_funcnames) }
301 .debug_typenames 0 : { *(.debug_typenames) }
302 .debug_varnames 0 : { *(.debug_varnames) }
303
304 .xt.insn 0 :
305 {
306 *(.xt.insn)
307 *(.gnu.linkonce.x*)
308 }
309
310 .xt.lit 0 :
311 {
312 *(.xt.lit)
313 *(.gnu.linkonce.p*)
314 }
023bf6f1
TH
315
316 /* Sections to be discarded */
317 DISCARDS
318 /DISCARD/ : { *(.exit.literal) }
5a0015d6 319}