Merge branches 'acpi-bus' and 'acpi-video'
[linux-block.git] / arch / xtensa / kernel / traps.c
CommitLineData
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1/*
2 * arch/xtensa/kernel/traps.c
3 *
4 * Exception handling.
5 *
6 * Derived from code with the following copyrights:
7 * Copyright (C) 1994 - 1999 by Ralf Baechle
8 * Modified for R3000 by Paul M. Antoine, 1995, 1996
9 * Complete output from die() by Ulf Carlsson, 1998
10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 *
12 * Essentially rewritten for the Xtensa architecture port.
13 *
3e4196a5 14 * Copyright (C) 2001 - 2013 Tensilica Inc.
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15 *
16 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
17 * Chris Zankel <chris@zankel.net>
18 * Marc Gauthier<marc@tensilica.com, marc@alumni.uwaterloo.ca>
19 * Kevin Chea
20 *
21 * This file is subject to the terms and conditions of the GNU General Public
22 * License. See the file "COPYING" in the main directory of this archive
23 * for more details.
24 */
25
26#include <linux/kernel.h>
3f07c014 27#include <linux/sched/signal.h>
b17b0153 28#include <linux/sched/debug.h>
3f8c2452 29#include <linux/sched/task_stack.h>
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30#include <linux/init.h>
31#include <linux/module.h>
32#include <linux/stringify.h>
33#include <linux/kallsyms.h>
5c888d53 34#include <linux/delay.h>
5a891ed5 35#include <linux/hardirq.h>
c130d3be 36#include <linux/ratelimit.h>
65fddcfc 37#include <linux/pgtable.h>
5a0015d6 38
3e4196a5 39#include <asm/stacktrace.h>
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40#include <asm/ptrace.h>
41#include <asm/timex.h>
7c0f6ba6 42#include <linux/uaccess.h>
5a0015d6 43#include <asm/processor.h>
2d6f82fe 44#include <asm/traps.h>
c91e02bd 45#include <asm/hw_breakpoint.h>
5a0015d6 46
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47/*
48 * Machine specific interrupt handlers
49 */
50
db0d07fa 51static void do_illegal_instruction(struct pt_regs *regs);
408b1d3c 52static void do_div0(struct pt_regs *regs);
db0d07fa
MF
53static void do_interrupt(struct pt_regs *regs);
54#if XTENSA_FAKE_NMI
55static void do_nmi(struct pt_regs *regs);
56#endif
f29cf776
MF
57#ifdef CONFIG_XTENSA_LOAD_STORE
58static void do_load_store(struct pt_regs *regs);
59#endif
db0d07fa 60static void do_unaligned_user(struct pt_regs *regs);
db0d07fa 61static void do_multihit(struct pt_regs *regs);
11e969bc
MF
62#if XTENSA_HAVE_COPROCESSORS
63static void do_coprocessor(struct pt_regs *regs);
64#endif
db0d07fa 65static void do_debug(struct pt_regs *regs);
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66
67/*
68 * The vector table must be preceded by a save area (which
69 * implies it must be in RAM, unless one places RAM immediately
70 * before a ROM and puts the vector at the start of the ROM (!))
71 */
72
73#define KRNL 0x01
74#define USER 0x02
75
76#define COPROCESSOR(x) \
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77{ EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER|KRNL, fast_coprocessor },\
78{ EXCCAUSE_COPROCESSOR ## x ## _DISABLED, 0, do_coprocessor }
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79
80typedef struct {
81 int cause;
82 int fast;
83 void* handler;
84} dispatch_init_table_t;
85
b91dc336 86static dispatch_init_table_t __initdata dispatch_init_table[] = {
5a0015d6 87
09f8a6db
MF
88#ifdef CONFIG_USER_ABI_CALL0_PROBE
89{ EXCCAUSE_ILLEGAL_INSTRUCTION, USER, fast_illegal_instruction_user },
90#endif
173d6681 91{ EXCCAUSE_ILLEGAL_INSTRUCTION, 0, do_illegal_instruction},
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92{ EXCCAUSE_SYSTEM_CALL, USER, fast_syscall_user },
93{ EXCCAUSE_SYSTEM_CALL, 0, system_call },
94/* EXCCAUSE_INSTRUCTION_FETCH unhandled */
f29cf776
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95#ifdef CONFIG_XTENSA_LOAD_STORE
96{ EXCCAUSE_LOAD_STORE_ERROR, USER|KRNL, fast_load_store },
97{ EXCCAUSE_LOAD_STORE_ERROR, 0, do_load_store },
98#endif
173d6681 99{ EXCCAUSE_LEVEL1_INTERRUPT, 0, do_interrupt },
da0a4e5c 100#ifdef SUPPORT_WINDOWED
173d6681 101{ EXCCAUSE_ALLOCA, USER|KRNL, fast_alloca },
da0a4e5c 102#endif
408b1d3c 103{ EXCCAUSE_INTEGER_DIVIDE_BY_ZERO, 0, do_div0 },
173d6681 104/* EXCCAUSE_PRIVILEGED unhandled */
a160e941
MF
105#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION || \
106 IS_ENABLED(CONFIG_XTENSA_LOAD_STORE)
4ded6282 107#ifdef CONFIG_XTENSA_UNALIGNED_USER
173d6681 108{ EXCCAUSE_UNALIGNED, USER, fast_unaligned },
5a0015d6 109#endif
173d6681 110{ EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
5a0015d6 111#endif
3522bcfe 112{ EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
e5083a63 113#ifdef CONFIG_MMU
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MF
114{ EXCCAUSE_ITLB_MISS, 0, do_page_fault },
115{ EXCCAUSE_ITLB_MISS, USER|KRNL, fast_second_level_miss},
116{ EXCCAUSE_DTLB_MISS, USER|KRNL, fast_second_level_miss},
117{ EXCCAUSE_DTLB_MISS, 0, do_page_fault },
118{ EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER|KRNL, fast_store_prohibited },
119#endif /* CONFIG_MMU */
120#ifdef CONFIG_PFAULT
173d6681 121{ EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit },
a8f0c31f 122{ EXCCAUSE_ITLB_PRIVILEGE, 0, do_page_fault },
173d6681 123{ EXCCAUSE_FETCH_CACHE_ATTRIBUTE, 0, do_page_fault },
173d6681 124{ EXCCAUSE_DTLB_MULTIHIT, 0, do_multihit },
a8f0c31f 125{ EXCCAUSE_DTLB_PRIVILEGE, 0, do_page_fault },
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126{ EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault },
127{ EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault },
a8f0c31f 128#endif
5a0015d6 129/* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */
c658eac6 130#if XTENSA_HAVE_COPROCESSOR(0)
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131COPROCESSOR(0),
132#endif
c658eac6 133#if XTENSA_HAVE_COPROCESSOR(1)
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134COPROCESSOR(1),
135#endif
c658eac6 136#if XTENSA_HAVE_COPROCESSOR(2)
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137COPROCESSOR(2),
138#endif
c658eac6 139#if XTENSA_HAVE_COPROCESSOR(3)
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140COPROCESSOR(3),
141#endif
c658eac6 142#if XTENSA_HAVE_COPROCESSOR(4)
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143COPROCESSOR(4),
144#endif
c658eac6 145#if XTENSA_HAVE_COPROCESSOR(5)
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146COPROCESSOR(5),
147#endif
c658eac6 148#if XTENSA_HAVE_COPROCESSOR(6)
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149COPROCESSOR(6),
150#endif
c658eac6 151#if XTENSA_HAVE_COPROCESSOR(7)
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152COPROCESSOR(7),
153#endif
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154#if XTENSA_FAKE_NMI
155{ EXCCAUSE_MAPPED_NMI, 0, do_nmi },
156#endif
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157{ EXCCAUSE_MAPPED_DEBUG, 0, do_debug },
158{ -1, -1, 0 }
159
160};
161
162/* The exception table <exc_table> serves two functions:
163 * 1. it contains three dispatch tables (fast_user, fast_kernel, default-c)
164 * 2. it is a temporary memory buffer for the exception handlers.
165 */
166
f21a79ca 167DEFINE_PER_CPU(struct exc_table, exc_table);
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168DEFINE_PER_CPU(struct debug_table, debug_table);
169
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170void die(const char*, struct pt_regs*, long);
171
172static inline void
173__die_if_kernel(const char *str, struct pt_regs *regs, long err)
174{
175 if (!user_mode(regs))
176 die(str, regs, err);
177}
178
f7667ca1
MF
179#ifdef CONFIG_PRINT_USER_CODE_ON_UNHANDLED_EXCEPTION
180static inline void dump_user_code(struct pt_regs *regs)
181{
182 char buf[32];
183
184 if (copy_from_user(buf, (void __user *)(regs->pc & -16), sizeof(buf)) == 0) {
185 print_hex_dump(KERN_INFO, " ", DUMP_PREFIX_NONE,
186 32, 1, buf, sizeof(buf), false);
187
188 }
189}
190#else
191static inline void dump_user_code(struct pt_regs *regs)
192{
193}
194#endif
195
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196/*
197 * Unhandled Exceptions. Kill user task or panic if in kernel space.
198 */
199
fc55402b 200void do_unhandled(struct pt_regs *regs)
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201{
202 __die_if_kernel("Caught unhandled exception - should not happen",
c130d3be 203 regs, SIGKILL);
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204
205 /* If in user mode, send SIGILL signal to current process */
c130d3be
MF
206 pr_info_ratelimited("Caught unhandled exception in '%s' "
207 "(pid = %d, pc = %#010lx) - should not happen\n"
208 "\tEXCCAUSE is %ld\n",
209 current->comm, task_pid_nr(current), regs->pc,
fc55402b 210 regs->exccause);
f7667ca1 211 dump_user_code(regs);
3cf5d076 212 force_sig(SIGILL);
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213}
214
215/*
216 * Multi-hit exception. This if fatal!
217 */
218
db0d07fa 219static void do_multihit(struct pt_regs *regs)
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220{
221 die("Caught multihit exception", regs, SIGKILL);
222}
223
224/*
2d1c645c 225 * IRQ handler.
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226 */
227
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228#if XTENSA_FAKE_NMI
229
e4629194
MF
230#define IS_POW2(v) (((v) & ((v) - 1)) == 0)
231
232#if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
233 IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
234#warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
235#warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."
236
237static inline void check_valid_nmi(void)
238{
cad6fade
MF
239 unsigned intread = xtensa_get_sr(interrupt);
240 unsigned intenable = xtensa_get_sr(intenable);
e4629194
MF
241
242 BUG_ON(intread & intenable &
243 ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
244 XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
245 BIT(XCHAL_PROFILING_INTERRUPT)));
246}
247
248#else
249
250static inline void check_valid_nmi(void)
251{
252}
253
254#endif
255
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MF
256irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);
257
258DEFINE_PER_CPU(unsigned long, nmi_count);
259
db0d07fa 260static void do_nmi(struct pt_regs *regs)
38fef73c 261{
de4415d0 262 struct pt_regs *old_regs = set_irq_regs(regs);
38fef73c 263
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MF
264 nmi_enter();
265 ++*this_cpu_ptr(&nmi_count);
e4629194 266 check_valid_nmi();
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MF
267 xtensa_pmu_irq_handler(0, NULL);
268 nmi_exit();
269 set_irq_regs(old_regs);
270}
271#endif
272
db0d07fa 273static void do_interrupt(struct pt_regs *regs)
5a0015d6 274{
2d1c645c
MG
275 static const unsigned int_level_mask[] = {
276 0,
277 XCHAL_INTLEVEL1_MASK,
278 XCHAL_INTLEVEL2_MASK,
279 XCHAL_INTLEVEL3_MASK,
280 XCHAL_INTLEVEL4_MASK,
281 XCHAL_INTLEVEL5_MASK,
282 XCHAL_INTLEVEL6_MASK,
283 XCHAL_INTLEVEL7_MASK,
284 };
de4415d0 285 struct pt_regs *old_regs = set_irq_regs(regs);
43ba2237 286 unsigned unhandled = ~0u;
99623239
MF
287
288 irq_enter();
5a0015d6 289
2d1c645c 290 for (;;) {
cad6fade
MF
291 unsigned intread = xtensa_get_sr(interrupt);
292 unsigned intenable = xtensa_get_sr(intenable);
895666a9
MF
293 unsigned int_at_level = intread & intenable;
294 unsigned level;
295
296 for (level = LOCKLEVEL; level > 0; --level) {
297 if (int_at_level & int_level_mask[level]) {
298 int_at_level &= int_level_mask[level];
43ba2237
MF
299 if (int_at_level & unhandled)
300 int_at_level &= unhandled;
301 else
302 unhandled |= int_level_mask[level];
895666a9
MF
303 break;
304 }
305 }
2d1c645c 306
895666a9 307 if (level == 0)
99623239
MF
308 break;
309
43ba2237
MF
310 /* clear lowest pending irq in the unhandled mask */
311 unhandled ^= (int_at_level & -int_at_level);
99623239 312 do_IRQ(__ffs(int_at_level), regs);
5a0015d6 313 }
99623239
MF
314
315 irq_exit();
316 set_irq_regs(old_regs);
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317}
318
d7486200
MF
319static bool check_div0(struct pt_regs *regs)
320{
321 static const u8 pattern[] = {'D', 'I', 'V', '0'};
322 const u8 *p;
323 u8 buf[5];
324
325 if (user_mode(regs)) {
326 if (copy_from_user(buf, (void __user *)regs->pc + 2, 5))
dc60001e 327 return false;
d7486200
MF
328 p = buf;
329 } else {
330 p = (const u8 *)regs->pc + 2;
331 }
332
333 return memcmp(p, pattern, sizeof(pattern)) == 0 ||
334 memcmp(p + 1, pattern, sizeof(pattern)) == 0;
335}
336
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337/*
338 * Illegal instruction. Fatal if in kernel space.
339 */
340
db0d07fa 341static void do_illegal_instruction(struct pt_regs *regs)
5a0015d6 342{
5cc5f19f
MF
343#ifdef CONFIG_USER_ABI_CALL0_PROBE
344 /*
345 * When call0 application encounters an illegal instruction fast
346 * exception handler will attempt to set PS.WOE and retry failing
347 * instruction.
348 * If we get here we know that that instruction is also illegal
349 * with PS.WOE set, so it's not related to the windowed option
350 * hence PS.WOE may be cleared.
351 */
352 if (regs->pc == current_thread_info()->ps_woe_fix_addr)
353 regs->ps &= ~PS_WOE_MASK;
354#endif
d7486200
MF
355 if (check_div0(regs)) {
356 do_div0(regs);
357 return;
358 }
359
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360 __die_if_kernel("Illegal instruction in kernel", regs, SIGKILL);
361
362 /* If in user mode, send SIGILL signal to current process. */
363
c130d3be
MF
364 pr_info_ratelimited("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n",
365 current->comm, task_pid_nr(current), regs->pc);
3cf5d076 366 force_sig(SIGILL);
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367}
368
408b1d3c
MF
369static void do_div0(struct pt_regs *regs)
370{
371 __die_if_kernel("Unhandled division by 0 in kernel", regs, SIGKILL);
372 force_sig_fault(SIGFPE, FPE_INTDIV, (void __user *)regs->pc);
373}
5a0015d6 374
f29cf776
MF
375#ifdef CONFIG_XTENSA_LOAD_STORE
376static void do_load_store(struct pt_regs *regs)
377{
378 __die_if_kernel("Unhandled load/store exception in kernel",
379 regs, SIGKILL);
380
381 pr_info_ratelimited("Load/store error to %08lx in '%s' (pid = %d, pc = %#010lx)\n",
382 regs->excvaddr, current->comm,
383 task_pid_nr(current), regs->pc);
384 force_sig_fault(SIGBUS, BUS_ADRERR, (void *)regs->excvaddr);
385}
386#endif
387
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388/*
389 * Handle unaligned memory accesses from user space. Kill task.
390 *
391 * If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory
392 * accesses causes from user space.
393 */
394
db0d07fa 395static void do_unaligned_user(struct pt_regs *regs)
5a0015d6 396{
5a0015d6 397 __die_if_kernel("Unhandled unaligned exception in kernel",
c130d3be 398 regs, SIGKILL);
5a0015d6 399
c130d3be
MF
400 pr_info_ratelimited("Unaligned memory access to %08lx in '%s' "
401 "(pid = %d, pc = %#010lx)\n",
402 regs->excvaddr, current->comm,
403 task_pid_nr(current), regs->pc);
2e1661d2 404 force_sig_fault(SIGBUS, BUS_ADRALN, (void *) regs->excvaddr);
5a0015d6 405}
5a0015d6 406
11e969bc
MF
407#if XTENSA_HAVE_COPROCESSORS
408static void do_coprocessor(struct pt_regs *regs)
409{
410 coprocessor_flush_release_all(current_thread_info());
411}
412#endif
413
c91e02bd
MF
414/* Handle debug events.
415 * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
416 * preemption disabled to avoid rescheduling and keep mapping of hardware
417 * breakpoint structures to debug registers intact, so that
418 * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
419 */
db0d07fa 420static void do_debug(struct pt_regs *regs)
5a0015d6 421{
c91e02bd
MF
422#ifdef CONFIG_HAVE_HW_BREAKPOINT
423 int ret = check_hw_breakpoint(regs);
424
425 preempt_enable();
426 if (ret == 0)
427 return;
428#endif
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429 __die_if_kernel("Breakpoint in kernel", regs, SIGKILL);
430
431 /* If in user mode, send SIGTRAP signal to current process */
432
3cf5d076 433 force_sig(SIGTRAP);
5a0015d6
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434}
435
436
f21a79ca
MF
437#define set_handler(type, cause, handler) \
438 do { \
439 unsigned int cpu; \
440 \
441 for_each_possible_cpu(cpu) \
442 per_cpu(exc_table, cpu).type[cause] = (handler);\
443 } while (0)
f615136c 444
28570e8d
MF
445/* Set exception C handler - for temporary use when probing exceptions */
446
fc55402b
MF
447xtensa_exception_handler *
448__init trap_set_handler(int cause, xtensa_exception_handler *handler)
28570e8d 449{
f21a79ca
MF
450 void *previous = per_cpu(exc_table, 0).default_handler[cause];
451
452 set_handler(default_handler, cause, handler);
28570e8d
MF
453 return previous;
454}
455
456
49b424fe 457static void trap_init_excsave(void)
f615136c 458{
9fa8c59f 459 xtensa_set_sr(this_cpu_ptr(&exc_table), excsave1);
f615136c
MF
460}
461
6ec7026a
MF
462static void trap_init_debug(void)
463{
464 unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);
465
466 this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
467 __asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
468 :: "a"(debugsave));
469}
470
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471/*
472 * Initialize dispatch tables.
473 *
474 * The exception vectors are stored compressed the __init section in the
475 * dispatch_init_table. This function initializes the following three tables
476 * from that compressed table:
477 * - fast user first dispatch table for user exceptions
478 * - fast kernel first dispatch table for kernel exceptions
479 * - default C-handler C-handler called by the default fast handler.
480 *
481 * See vectors.S for more details.
482 */
483
b91dc336 484void __init trap_init(void)
5a0015d6
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485{
486 int i;
487
488 /* Setup default vectors. */
489
f21a79ca
MF
490 for (i = 0; i < EXCCAUSE_N; i++) {
491 set_handler(fast_user_handler, i, user_exception);
492 set_handler(fast_kernel_handler, i, kernel_exception);
493 set_handler(default_handler, i, do_unhandled);
5a0015d6
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494 }
495
496 /* Setup specific handlers. */
497
498 for(i = 0; dispatch_init_table[i].cause >= 0; i++) {
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499 int fast = dispatch_init_table[i].fast;
500 int cause = dispatch_init_table[i].cause;
501 void *handler = dispatch_init_table[i].handler;
502
503 if (fast == 0)
f21a79ca 504 set_handler(default_handler, cause, handler);
60deebe6 505 if ((fast & USER) != 0)
f21a79ca 506 set_handler(fast_user_handler, cause, handler);
60deebe6 507 if ((fast & KRNL) != 0)
f21a79ca 508 set_handler(fast_kernel_handler, cause, handler);
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509 }
510
511 /* Initialize EXCSAVE_1 to hold the address of the exception table. */
f615136c 512 trap_init_excsave();
6ec7026a 513 trap_init_debug();
f615136c 514}
5a0015d6 515
f615136c 516#ifdef CONFIG_SMP
49b424fe 517void secondary_trap_init(void)
f615136c
MF
518{
519 trap_init_excsave();
6ec7026a 520 trap_init_debug();
5a0015d6 521}
f615136c 522#endif
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523
524/*
525 * This function dumps the current valid window frame and other base registers.
526 */
527
528void show_regs(struct pt_regs * regs)
529{
431d1a34 530 int i;
5a0015d6 531
a43cb95d
TH
532 show_regs_print_info(KERN_DEFAULT);
533
8d7e8240 534 for (i = 0; i < 16; i++) {
5a0015d6 535 if ((i % 8) == 0)
d4eccafc
MF
536 pr_info("a%02d:", i);
537 pr_cont(" %08lx", regs->areg[i]);
5a0015d6 538 }
d4eccafc
MF
539 pr_cont("\n");
540 pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
541 regs->pc, regs->ps, regs->depc, regs->excvaddr);
542 pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
543 regs->lbeg, regs->lend, regs->lcount, regs->sar);
5a0015d6 544 if (user_mode(regs))
d4eccafc
MF
545 pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
546 regs->windowbase, regs->windowstart, regs->wmask,
547 regs->syscall);
5a0015d6
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548}
549
3e4196a5 550static int show_trace_cb(struct stackframe *frame, void *data)
586411dc 551{
47fb7029
DS
552 const char *loglvl = data;
553
e640cc30 554 if (kernel_text_address(frame->pc))
47fb7029
DS
555 printk("%s [<%08lx>] %pB\n",
556 loglvl, frame->pc, (void *)frame->pc);
3e4196a5 557 return 0;
586411dc
JW
558}
559
47fb7029
DS
560static void show_trace(struct task_struct *task, unsigned long *sp,
561 const char *loglvl)
5a0015d6 562{
3e4196a5
MF
563 if (!sp)
564 sp = stack_pointer(task);
5a0015d6 565
47fb7029
DS
566 printk("%sCall Trace:\n", loglvl);
567 walk_stackframe(sp, show_trace_cb, (void *)loglvl);
5a0015d6
CZ
568}
569
c5fccebc 570#define STACK_DUMP_ENTRY_SIZE 4
cc34f290 571#define STACK_DUMP_LINE_SIZE 16
8951eb15 572static size_t kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
5a0015d6 573
cc34f290 574struct stack_fragment
5a0015d6 575{
cc34f290
MF
576 size_t len;
577 size_t off;
578 u8 *sp;
579 const char *loglvl;
580};
5a0015d6 581
cc34f290
MF
582static int show_stack_fragment_cb(struct stackframe *frame, void *data)
583{
584 struct stack_fragment *sf = data;
5a0015d6 585
cc34f290 586 while (sf->off < sf->len) {
1d3b7a78 587 u8 line[STACK_DUMP_LINE_SIZE];
cc34f290
MF
588 size_t line_len = sf->len - sf->off > STACK_DUMP_LINE_SIZE ?
589 STACK_DUMP_LINE_SIZE : sf->len - sf->off;
590 bool arrow = sf->off == 0;
1d3b7a78 591
cc34f290
MF
592 if (frame && frame->sp == (unsigned long)(sf->sp + sf->off))
593 arrow = true;
594
595 __memcpy(line, sf->sp + sf->off, line_len);
596 print_hex_dump(sf->loglvl, arrow ? "> " : " ", DUMP_PREFIX_NONE,
1d3b7a78
MF
597 STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
598 line, line_len, false);
cc34f290
MF
599 sf->off += STACK_DUMP_LINE_SIZE;
600 if (arrow)
601 return 0;
1d3b7a78 602 }
cc34f290
MF
603 return 1;
604}
605
606void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
607{
608 struct stack_fragment sf;
609
610 if (!sp)
611 sp = stack_pointer(task);
612
613 sf.len = min((-(size_t)sp) & (THREAD_SIZE - STACK_DUMP_ENTRY_SIZE),
614 kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);
615 sf.off = 0;
616 sf.sp = (u8 *)sp;
617 sf.loglvl = loglvl;
618
619 printk("%sStack:\n", loglvl);
620 walk_stackframe(sp, show_stack_fragment_cb, &sf);
621 while (sf.off < sf.len)
622 show_stack_fragment_cb(NULL, &sf);
20da1e8b
DS
623 show_trace(task, sp, loglvl);
624}
625
34af946a 626DEFINE_SPINLOCK(die_lock);
5a0015d6 627
9fd5a04d 628void __noreturn die(const char * str, struct pt_regs * regs, long err)
5a0015d6
CZ
629{
630 static int die_counter;
6c5260d7
TG
631 const char *pr = "";
632
633 if (IS_ENABLED(CONFIG_PREEMPTION))
634 pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";
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CZ
635
636 console_verbose();
637 spin_lock_irq(&die_lock);
638
6c5260d7 639 pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, pr);
5a0015d6
CZ
640 show_regs(regs);
641 if (!user_mode(regs))
9cb8f069 642 show_stack(NULL, (unsigned long *)regs->areg[1], KERN_INFO);
5a0015d6 643
373d4d09 644 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
5a0015d6
CZ
645 spin_unlock_irq(&die_lock);
646
647 if (in_interrupt())
648 panic("Fatal exception in interrupt");
649
cea6a4ba 650 if (panic_on_oops)
012c437d 651 panic("Fatal exception");
cea6a4ba 652
0e25498f 653 make_task_dead(err);
5a0015d6 654}