Commit | Line | Data |
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9a8fd558 | 1 | /* |
9a8fd558 CZ |
2 | * Switch an MMU context. |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
f615136c | 8 | * Copyright (C) 2001 - 2013 Tensilica Inc. |
9a8fd558 CZ |
9 | */ |
10 | ||
11 | #ifndef _XTENSA_MMU_CONTEXT_H | |
12 | #define _XTENSA_MMU_CONTEXT_H | |
13 | ||
e5083a63 JW |
14 | #ifndef CONFIG_MMU |
15 | #include <asm/nommu_context.h> | |
16 | #else | |
17 | ||
9a8fd558 | 18 | #include <linux/stringify.h> |
de4f6e5b | 19 | #include <linux/sched.h> |
589ee628 | 20 | #include <linux/mm_types.h> |
9a8fd558 | 21 | |
f615136c | 22 | #include <asm/vectors.h> |
4f682fbb | 23 | |
9a8fd558 | 24 | #include <asm/pgtable.h> |
9a8fd558 CZ |
25 | #include <asm/cacheflush.h> |
26 | #include <asm/tlbflush.h> | |
d6dd61c8 | 27 | #include <asm-generic/mm_hooks.h> |
f615136c | 28 | #include <asm-generic/percpu.h> |
9a8fd558 | 29 | |
9a8fd558 CZ |
30 | #if (XCHAL_HAVE_TLBS != 1) |
31 | # error "Linux must have an MMU!" | |
32 | #endif | |
33 | ||
f615136c MF |
34 | DECLARE_PER_CPU(unsigned long, asid_cache); |
35 | #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu) | |
9a8fd558 CZ |
36 | |
37 | /* | |
38 | * NO_CONTEXT is the invalid ASID value that we don't ever assign to | |
f615136c MF |
39 | * any user or kernel context. We use the reserved values in the |
40 | * ASID_INSERT macro below. | |
173d6681 CZ |
41 | * |
42 | * 0 invalid | |
43 | * 1 kernel | |
44 | * 2 reserved | |
45 | * 3 reserved | |
46 | * 4...255 available | |
9a8fd558 CZ |
47 | */ |
48 | ||
173d6681 CZ |
49 | #define NO_CONTEXT 0 |
50 | #define ASID_USER_FIRST 4 | |
51 | #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) | |
52 | #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8)) | |
9a8fd558 | 53 | |
c8f3a7dc | 54 | void init_mmu(void); |
c8f3a7dc | 55 | |
d99cf715 | 56 | static inline void set_rasid_register (unsigned long val) |
9a8fd558 | 57 | { |
bc5378fc | 58 | __asm__ __volatile__ (" wsr %0, rasid\n\t" |
9a8fd558 CZ |
59 | " isync\n" : : "a" (val)); |
60 | } | |
61 | ||
d99cf715 | 62 | static inline unsigned long get_rasid_register (void) |
9a8fd558 CZ |
63 | { |
64 | unsigned long tmp; | |
bc5378fc | 65 | __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp)); |
9a8fd558 CZ |
66 | return tmp; |
67 | } | |
68 | ||
f615136c MF |
69 | static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu) |
70 | { | |
71 | unsigned long asid = cpu_asid_cache(cpu); | |
72 | if ((++asid & ASID_MASK) == 0) { | |
73 | /* | |
74 | * Start new asid cycle; continue counting with next | |
75 | * incarnation bits; skipping over 0, 1, 2, 3. | |
76 | */ | |
77 | local_flush_tlb_all(); | |
78 | asid += ASID_USER_FIRST; | |
79 | } | |
80 | cpu_asid_cache(cpu) = asid; | |
81 | mm->context.asid[cpu] = asid; | |
82 | mm->context.cpu = cpu; | |
83 | } | |
84 | ||
85 | static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) | |
9a8fd558 | 86 | { |
f615136c MF |
87 | /* |
88 | * Check if our ASID is of an older version and thus invalid. | |
89 | */ | |
90 | ||
91 | if (mm) { | |
92 | unsigned long asid = mm->context.asid[cpu]; | |
93 | ||
94 | if (asid == NO_CONTEXT || | |
95 | ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK)) | |
96 | get_new_mmu_context(mm, cpu); | |
9a8fd558 | 97 | } |
9a8fd558 CZ |
98 | } |
99 | ||
f615136c | 100 | static inline void activate_context(struct mm_struct *mm, unsigned int cpu) |
9a8fd558 | 101 | { |
f615136c MF |
102 | get_mmu_context(mm, cpu); |
103 | set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); | |
173d6681 | 104 | invalidate_page_directory(); |
9a8fd558 CZ |
105 | } |
106 | ||
9a8fd558 CZ |
107 | /* |
108 | * Initialize the context related info for a new mm_struct | |
f615136c MF |
109 | * instance. Valid cpu values are 0..(NR_CPUS-1), so initializing |
110 | * to -1 says the process has never run on any core. | |
9a8fd558 CZ |
111 | */ |
112 | ||
f615136c MF |
113 | static inline int init_new_context(struct task_struct *tsk, |
114 | struct mm_struct *mm) | |
9a8fd558 | 115 | { |
f615136c MF |
116 | int cpu; |
117 | for_each_possible_cpu(cpu) { | |
118 | mm->context.asid[cpu] = NO_CONTEXT; | |
119 | } | |
120 | mm->context.cpu = -1; | |
9a8fd558 CZ |
121 | return 0; |
122 | } | |
123 | ||
d99cf715 | 124 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
c4c4594b | 125 | struct task_struct *tsk) |
9a8fd558 | 126 | { |
f615136c MF |
127 | unsigned int cpu = smp_processor_id(); |
128 | int migrated = next->context.cpu != cpu; | |
129 | /* Flush the icache if we migrated to a new core. */ | |
130 | if (migrated) { | |
131 | __invalidate_icache_all(); | |
132 | next->context.cpu = cpu; | |
133 | } | |
134 | if (migrated || prev != next) | |
135 | activate_context(next, cpu); | |
9a8fd558 CZ |
136 | } |
137 | ||
f615136c MF |
138 | #define activate_mm(prev, next) switch_mm((prev), (next), NULL) |
139 | #define deactivate_mm(tsk, mm) do { } while (0) | |
9a8fd558 CZ |
140 | |
141 | /* | |
142 | * Destroy context related info for an mm_struct that is about | |
143 | * to be put to rest. | |
144 | */ | |
d99cf715 | 145 | static inline void destroy_context(struct mm_struct *mm) |
9a8fd558 | 146 | { |
9a8fd558 CZ |
147 | invalidate_page_directory(); |
148 | } | |
149 | ||
150 | ||
151 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | |
152 | { | |
153 | /* Nothing to do. */ | |
154 | ||
155 | } | |
156 | ||
e5083a63 | 157 | #endif /* CONFIG_MMU */ |
9a8fd558 | 158 | #endif /* _XTENSA_MMU_CONTEXT_H */ |