Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
8e1a6dd2 | 2 | config XTENSA |
35f9cd08 | 3 | def_bool y |
942fa985 | 4 | select ARCH_32BIT_OFF_T |
aef0f78e | 5 | select ARCH_HAS_BINFMT_FLAT if !MMU |
0f665b9e CH |
6 | select ARCH_HAS_DMA_PREP_COHERENT if MMU |
7 | select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU | |
8 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU | |
9 | select ARCH_HAS_UNCACHED_SEGMENT if MMU | |
579afe86 MF |
10 | select ARCH_USE_QUEUED_RWLOCKS |
11 | select ARCH_USE_QUEUED_SPINLOCKS | |
8f371c75 | 12 | select ARCH_WANT_FRAME_POINTERS |
e969161b | 13 | select ARCH_WANT_IPC_PARSE_VERSION |
25df8198 | 14 | select BUILDTIME_EXTABLE_SORT |
3e41f9ba | 15 | select CLONE_BACKWARDS |
920f8a39 | 16 | select COMMON_CLK |
f0edfea8 | 17 | select DMA_REMAP if MMU |
920f8a39 MF |
18 | select GENERIC_ATOMIC64 |
19 | select GENERIC_CLOCKEVENTS | |
20 | select GENERIC_IRQ_SHOW | |
21 | select GENERIC_PCI_IOMAP | |
22 | select GENERIC_SCHED_CLOCK | |
57358ba9 | 23 | select GENERIC_STRNCPY_FROM_USER if KASAN |
7af710d9 MF |
24 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL |
25 | select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL | |
9f24f3c1 | 26 | select HAVE_ARCH_TRACEHOOK |
c346b94f | 27 | select HAVE_COPY_THREAD_TLS |
0e46c111 | 28 | select HAVE_DEBUG_KMEMLEAK |
9d2ffe5c | 29 | select HAVE_DMA_CONTIGUOUS |
5f56a5df | 30 | select HAVE_EXIT_THREAD |
478ba61a | 31 | select HAVE_FUNCTION_TRACER |
d951ba21 | 32 | select HAVE_FUTEX_CMPXCHG if !MMU |
c91e02bd | 33 | select HAVE_HW_BREAKPOINT if PERF_EVENTS |
496543c4 | 34 | select HAVE_IRQ_TIME_ACCOUNTING |
920f8a39 | 35 | select HAVE_OPROFILE |
eb01d42a | 36 | select HAVE_PCI |
a6f3eefa | 37 | select HAVE_PERF_EVENTS |
d148eac0 | 38 | select HAVE_STACKPROTECTOR |
af5395c2 | 39 | select HAVE_SYSCALL_TRACEPOINTS |
920f8a39 MF |
40 | select IRQ_DOMAIN |
41 | select MODULES_USE_ELF_RELA | |
db8165f5 | 42 | select PERF_USE_VMALLOC |
920f8a39 | 43 | select VIRT_TO_BUS |
8e1a6dd2 CZ |
44 | help |
45 | Xtensa processors are 32-bit RISC machines designed by Tensilica | |
46 | primarily for embedded systems. These processors are both | |
47 | configurable and extensible. The Linux port to the Xtensa | |
48 | architecture supports all processor configurations and extensions, | |
49 | with reasonable minimum requirements. The Xtensa Linux project has | |
0ada4490 | 50 | a home page at <http://www.linux-xtensa.org/>. |
8e1a6dd2 | 51 | |
d4337aa5 | 52 | config GENERIC_HWEIGHT |
35f9cd08 | 53 | def_bool y |
d4337aa5 | 54 | |
f0d1b0b3 | 55 | config ARCH_HAS_ILOG2_U32 |
35f9cd08 | 56 | def_bool n |
f0d1b0b3 DH |
57 | |
58 | config ARCH_HAS_ILOG2_U64 | |
35f9cd08 | 59 | def_bool n |
f0d1b0b3 | 60 | |
ce816fa8 | 61 | config NO_IOPORT_MAP |
d046f77e | 62 | def_bool n |
5ea81769 | 63 | |
bdc80787 PA |
64 | config HZ |
65 | int | |
66 | default 100 | |
67 | ||
8f371c75 MF |
68 | config LOCKDEP_SUPPORT |
69 | def_bool y | |
70 | ||
3e4196a5 MF |
71 | config STACKTRACE_SUPPORT |
72 | def_bool y | |
73 | ||
c92931b2 MF |
74 | config TRACE_IRQFLAGS_SUPPORT |
75 | def_bool y | |
76 | ||
35f9cd08 | 77 | config MMU |
de7c1c78 | 78 | def_bool n |
35f9cd08 | 79 | |
a1a2bdec BS |
80 | config HAVE_XTENSA_GPIO32 |
81 | def_bool n | |
82 | ||
c633544a MF |
83 | config KASAN_SHADOW_OFFSET |
84 | hex | |
85 | default 0x6e400000 | |
86 | ||
8e1a6dd2 CZ |
87 | menu "Processor type and features" |
88 | ||
89 | choice | |
90 | prompt "Xtensa Processor Configuration" | |
173d6681 | 91 | default XTENSA_VARIANT_FSF |
8e1a6dd2 | 92 | |
173d6681 | 93 | config XTENSA_VARIANT_FSF |
0025427e | 94 | bool "fsf - default (not generic) configuration" |
35f9cd08 | 95 | select MMU |
0025427e CZ |
96 | |
97 | config XTENSA_VARIANT_DC232B | |
98 | bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" | |
35f9cd08 | 99 | select MMU |
a1a2bdec | 100 | select HAVE_XTENSA_GPIO32 |
0025427e | 101 | help |
35f9cd08 | 102 | This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). |
000af2c5 | 103 | |
d0b73b48 PD |
104 | config XTENSA_VARIANT_DC233C |
105 | bool "dc233c - Diamond 233L Standard Core Rev.C (LE)" | |
106 | select MMU | |
a1a2bdec | 107 | select HAVE_XTENSA_GPIO32 |
d0b73b48 PD |
108 | help |
109 | This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE). | |
110 | ||
420ae951 MF |
111 | config XTENSA_VARIANT_CUSTOM |
112 | bool "Custom Xtensa processor configuration" | |
420ae951 MF |
113 | select HAVE_XTENSA_GPIO32 |
114 | help | |
115 | Select this variant to use a custom Xtensa processor configuration. | |
116 | You will be prompted for a processor variant CORENAME. | |
8e1a6dd2 CZ |
117 | endchoice |
118 | ||
420ae951 MF |
119 | config XTENSA_VARIANT_CUSTOM_NAME |
120 | string "Xtensa Processor Custom Core Variant Name" | |
121 | depends on XTENSA_VARIANT_CUSTOM | |
122 | help | |
123 | Provide the name of a custom Xtensa processor variant. | |
124 | This CORENAME selects arch/xtensa/variant/CORENAME. | |
125 | Dont forget you have to select MMU if you have one. | |
126 | ||
127 | config XTENSA_VARIANT_NAME | |
128 | string | |
129 | default "dc232b" if XTENSA_VARIANT_DC232B | |
130 | default "dc233c" if XTENSA_VARIANT_DC233C | |
131 | default "fsf" if XTENSA_VARIANT_FSF | |
420ae951 MF |
132 | default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM |
133 | ||
134 | config XTENSA_VARIANT_MMU | |
135 | bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)" | |
136 | depends on XTENSA_VARIANT_CUSTOM | |
137 | default y | |
de7c1c78 | 138 | select MMU |
420ae951 MF |
139 | help |
140 | Build a Conventional Kernel with full MMU support, | |
141 | ie: it supports a TLB with auto-loading, page protection. | |
142 | ||
9bd46da4 MF |
143 | config XTENSA_VARIANT_HAVE_PERF_EVENTS |
144 | bool "Core variant has Performance Monitor Module" | |
145 | depends on XTENSA_VARIANT_CUSTOM | |
146 | default n | |
147 | help | |
148 | Enable if core variant has Performance Monitor Module with | |
149 | External Registers Interface. | |
150 | ||
151 | If unsure, say N. | |
152 | ||
e4629194 MF |
153 | config XTENSA_FAKE_NMI |
154 | bool "Treat PMM IRQ as NMI" | |
155 | depends on XTENSA_VARIANT_HAVE_PERF_EVENTS | |
156 | default n | |
157 | help | |
158 | If PMM IRQ is the only IRQ at EXCM level it is safe to | |
159 | treat it as NMI, which improves accuracy of profiling. | |
160 | ||
161 | If there are other interrupts at or above PMM IRQ priority level | |
162 | but not above the EXCM level, PMM IRQ still may be treated as NMI, | |
163 | but only if these IRQs are not used. There will be a build warning | |
164 | saying that this is not safe, and a bugcheck if one of these IRQs | |
165 | actually fire. | |
166 | ||
167 | If unsure, say N. | |
168 | ||
8e1a6dd2 | 169 | config XTENSA_UNALIGNED_USER |
ad33cc80 | 170 | bool "Unaligned memory access in user space" |
35f9cd08 JW |
171 | help |
172 | The Xtensa architecture currently does not handle unaligned | |
173 | memory accesses in hardware but through an exception handler. | |
174 | Per default, unaligned memory accesses are disabled in user space. | |
8e1a6dd2 | 175 | |
35f9cd08 | 176 | Say Y here to enable unaligned memory access in user space. |
8e1a6dd2 | 177 | |
f615136c MF |
178 | config HAVE_SMP |
179 | bool "System Supports SMP (MX)" | |
de7c1c78 | 180 | depends on XTENSA_VARIANT_CUSTOM |
f615136c MF |
181 | select XTENSA_MX |
182 | help | |
183 | This option is use to indicate that the system-on-a-chip (SOC) | |
184 | supports Multiprocessing. Multiprocessor support implemented above | |
185 | the CPU core definition and currently needs to be selected manually. | |
186 | ||
187 | Multiprocessor support in implemented with external cache and | |
769a12a9 | 188 | interrupt controllers. |
f615136c MF |
189 | |
190 | The MX interrupt distributer adds Interprocessor Interrupts | |
191 | and causes the IRQ numbers to be increased by 4 for devices | |
192 | like the open cores ethernet driver and the serial interface. | |
193 | ||
194 | You still have to select "Enable SMP" to enable SMP on this SOC. | |
195 | ||
196 | config SMP | |
197 | bool "Enable Symmetric multi-processing support" | |
198 | depends on HAVE_SMP | |
f615136c MF |
199 | select GENERIC_SMP_IDLE_THREAD |
200 | help | |
201 | Enabled SMP Software; allows more than one CPU/CORE | |
202 | to be activated during startup. | |
203 | ||
204 | config NR_CPUS | |
205 | depends on SMP | |
206 | int "Maximum number of CPUs (2-32)" | |
207 | range 2 32 | |
208 | default "4" | |
209 | ||
49b424fe MF |
210 | config HOTPLUG_CPU |
211 | bool "Enable CPU hotplug support" | |
212 | depends on SMP | |
213 | help | |
214 | Say Y here to allow turning CPUs off and on. CPUs can be | |
215 | controlled through /sys/devices/system/cpu. | |
216 | ||
217 | Say N if you want to disable CPU hotplug. | |
218 | ||
9184289c MF |
219 | config FAST_SYSCALL_XTENSA |
220 | bool "Enable fast atomic syscalls" | |
221 | default n | |
222 | help | |
223 | fast_syscall_xtensa is a syscall that can make atomic operations | |
224 | on UP kernel when processor has no s32c1i support. | |
225 | ||
226 | This syscall is deprecated. It may have issues when called with | |
227 | invalid arguments. It is provided only for backwards compatibility. | |
228 | Only enable it if your userspace software requires it. | |
229 | ||
230 | If unsure, say N. | |
231 | ||
232 | config FAST_SYSCALL_SPILL_REGISTERS | |
233 | bool "Enable spill registers syscall" | |
234 | default n | |
235 | help | |
236 | fast_syscall_spill_registers is a syscall that spills all active | |
237 | register windows of a calling userspace task onto its stack. | |
238 | ||
239 | This syscall is deprecated. It may have issues when called with | |
240 | invalid arguments. It is provided only for backwards compatibility. | |
241 | Only enable it if your userspace software requires it. | |
242 | ||
243 | If unsure, say N. | |
244 | ||
09f8a6db MF |
245 | config USER_ABI_CALL0 |
246 | bool | |
247 | ||
248 | choice | |
249 | prompt "Userspace ABI" | |
250 | default USER_ABI_DEFAULT | |
251 | help | |
252 | Select supported userspace ABI. | |
253 | ||
254 | If unsure, choose the default ABI. | |
255 | ||
256 | config USER_ABI_DEFAULT | |
257 | bool "Default ABI only" | |
258 | help | |
259 | Assume default userspace ABI. For XEA2 cores it is windowed ABI. | |
260 | call0 ABI binaries may be run on such kernel, but signal delivery | |
261 | will not work correctly for them. | |
262 | ||
263 | config USER_ABI_CALL0_ONLY | |
264 | bool "Call0 ABI only" | |
265 | select USER_ABI_CALL0 | |
266 | help | |
267 | Select this option to support only call0 ABI in userspace. | |
268 | Windowed ABI binaries will crash with a segfault caused by | |
269 | an illegal instruction exception on the first 'entry' opcode. | |
270 | ||
271 | Choose this option if you're planning to run only user code | |
272 | built with call0 ABI. | |
273 | ||
274 | config USER_ABI_CALL0_PROBE | |
275 | bool "Support both windowed and call0 ABI by probing" | |
276 | select USER_ABI_CALL0 | |
277 | help | |
278 | Select this option to support both windowed and call0 userspace | |
279 | ABIs. When enabled all processes are started with PS.WOE disabled | |
280 | and a fast user exception handler for an illegal instruction is | |
281 | used to turn on PS.WOE bit on the first 'entry' opcode executed by | |
282 | the userspace. | |
283 | ||
284 | This option should be enabled for the kernel that must support | |
285 | both call0 and windowed ABIs in userspace at the same time. | |
286 | ||
287 | Note that Xtensa ISA does not guarantee that entry opcode will | |
288 | raise an illegal instruction exception on cores with XEA2 when | |
289 | PS.WOE is disabled, check whether the target core supports it. | |
290 | ||
291 | endchoice | |
292 | ||
8e1a6dd2 CZ |
293 | endmenu |
294 | ||
35f9cd08 JW |
295 | config XTENSA_CALIBRATE_CCOUNT |
296 | def_bool n | |
297 | help | |
298 | On some platforms (XT2000, for example), the CPU clock rate can | |
299 | vary. The frequency can be determined, however, by measuring | |
300 | against a well known, fixed frequency, such as an UART oscillator. | |
301 | ||
302 | config SERIAL_CONSOLE | |
303 | def_bool n | |
304 | ||
7af710d9 MF |
305 | config PLATFORM_HAVE_XIP |
306 | def_bool n | |
307 | ||
8e1a6dd2 CZ |
308 | menu "Platform options" |
309 | ||
310 | choice | |
311 | prompt "Xtensa System Type" | |
312 | default XTENSA_PLATFORM_ISS | |
313 | ||
314 | config XTENSA_PLATFORM_ISS | |
315 | bool "ISS" | |
35f9cd08 JW |
316 | select XTENSA_CALIBRATE_CCOUNT |
317 | select SERIAL_CONSOLE | |
8e1a6dd2 CZ |
318 | help |
319 | ISS is an acronym for Tensilica's Instruction Set Simulator. | |
320 | ||
321 | config XTENSA_PLATFORM_XT2000 | |
322 | bool "XT2000" | |
4964527d | 323 | select HAVE_IDE |
8e1a6dd2 CZ |
324 | help |
325 | XT2000 is the name of Tensilica's feature-rich emulation platform. | |
326 | This hardware is capable of running a full Linux distribution. | |
327 | ||
0d456bad MF |
328 | config XTENSA_PLATFORM_XTFPGA |
329 | bool "XTFPGA" | |
61e47e9b | 330 | select ETHOC if ETHERNET |
3de00482 | 331 | select PLATFORM_WANT_DEFAULT_MEM if !MMU |
0d456bad | 332 | select SERIAL_CONSOLE |
0d456bad | 333 | select XTENSA_CALIBRATE_CCOUNT |
7af710d9 | 334 | select PLATFORM_HAVE_XIP |
0d456bad MF |
335 | help |
336 | XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605). | |
337 | This hardware is capable of running a full Linux distribution. | |
338 | ||
8e1a6dd2 CZ |
339 | endchoice |
340 | ||
994fa1c8 MF |
341 | config PLATFORM_NR_IRQS |
342 | int | |
343 | default 3 if XTENSA_PLATFORM_XT2000 | |
344 | default 0 | |
8e1a6dd2 | 345 | |
8e1a6dd2 CZ |
346 | config XTENSA_CPU_CLOCK |
347 | int "CPU clock rate [MHz]" | |
348 | depends on !XTENSA_CALIBRATE_CCOUNT | |
35f9cd08 | 349 | default 16 |
8e1a6dd2 CZ |
350 | |
351 | config GENERIC_CALIBRATE_DELAY | |
352 | bool "Auto calibration of the BogoMIPS value" | |
35f9cd08 | 353 | help |
82300bf4 | 354 | The BogoMIPS value can easily be derived from the CPU frequency. |
8e1a6dd2 CZ |
355 | |
356 | config CMDLINE_BOOL | |
357 | bool "Default bootloader kernel arguments" | |
358 | ||
359 | config CMDLINE | |
360 | string "Initial kernel command string" | |
361 | depends on CMDLINE_BOOL | |
362 | default "console=ttyS0,38400 root=/dev/ram" | |
363 | help | |
364 | On some architectures (EBSA110 and CATS), there is currently no way | |
365 | for the boot loader to pass arguments to the kernel. For these | |
366 | architectures, you should supply some command-line options at build | |
367 | time by entering them here. As a minimum, you should specify the | |
368 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
369 | ||
da844a81 MF |
370 | config USE_OF |
371 | bool "Flattened Device Tree support" | |
372 | select OF | |
373 | select OF_EARLY_FLATTREE | |
374 | help | |
375 | Include support for flattened device tree machine descriptions. | |
376 | ||
687cffd3 | 377 | config BUILTIN_DTB_SOURCE |
da844a81 MF |
378 | string "DTB to build into the kernel image" |
379 | depends on OF | |
380 | ||
baac1d36 MF |
381 | config PARSE_BOOTPARAM |
382 | bool "Parse bootparam block" | |
383 | default y | |
384 | help | |
385 | Parse parameters passed to the kernel from the bootloader. It may | |
386 | be disabled if the kernel is known to run without the bootloader. | |
387 | ||
388 | If unsure, say Y. | |
389 | ||
b6c7e873 VP |
390 | config BLK_DEV_SIMDISK |
391 | tristate "Host file-based simulated block device support" | |
392 | default n | |
7a0684cd | 393 | depends on XTENSA_PLATFORM_ISS && BLOCK |
b6c7e873 VP |
394 | help |
395 | Create block devices that map to files in the host file system. | |
396 | Device binding to host file may be changed at runtime via proc | |
397 | interface provided the device is not in use. | |
398 | ||
399 | config BLK_DEV_SIMDISK_COUNT | |
400 | int "Number of host file-based simulated block devices" | |
401 | range 1 10 | |
402 | depends on BLK_DEV_SIMDISK | |
403 | default 2 | |
404 | help | |
405 | This is the default minimal number of created block devices. | |
406 | Kernel/module parameter 'simdisk_count' may be used to change this | |
407 | value at runtime. More file names (but no more than 10) may be | |
408 | specified as parameters, simdisk_count grows accordingly. | |
409 | ||
410 | config SIMDISK0_FILENAME | |
411 | string "Host filename for the first simulated device" | |
412 | depends on BLK_DEV_SIMDISK = y | |
413 | default "" | |
414 | help | |
415 | Attach a first simdisk to a host file. Conventionally, this file | |
416 | contains a root file system. | |
417 | ||
418 | config SIMDISK1_FILENAME | |
419 | string "Host filename for the second simulated device" | |
420 | depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1 | |
421 | default "" | |
422 | help | |
423 | Another simulated disk in a host file for a buildroot-independent | |
424 | storage. | |
425 | ||
4949009e MF |
426 | config XTFPGA_LCD |
427 | bool "Enable XTFPGA LCD driver" | |
428 | depends on XTENSA_PLATFORM_XTFPGA | |
429 | default n | |
430 | help | |
431 | There's a 2x16 LCD on most of XTFPGA boards, kernel may output | |
432 | progress messages there during bootup/shutdown. It may be useful | |
433 | during board bringup. | |
434 | ||
435 | If unsure, say N. | |
436 | ||
437 | config XTFPGA_LCD_BASE_ADDR | |
438 | hex "XTFPGA LCD base address" | |
439 | depends on XTFPGA_LCD | |
440 | default "0x0d0c0000" | |
441 | help | |
442 | Base address of the LCD controller inside KIO region. | |
443 | Different boards from XTFPGA family have LCD controller at different | |
444 | addresses. Please consult prototyping user guide for your board for | |
445 | the correct address. Wrong address here may lead to hardware lockup. | |
446 | ||
447 | config XTFPGA_LCD_8BIT_ACCESS | |
448 | bool "Use 8-bit access to XTFPGA LCD" | |
449 | depends on XTFPGA_LCD | |
450 | default n | |
451 | help | |
452 | LCD may be connected with 4- or 8-bit interface, 8-bit access may | |
453 | only be used with 8-bit interface. Please consult prototyping user | |
454 | guide for your board for the correct interface width. | |
455 | ||
76743c0e MF |
456 | comment "Kernel memory layout" |
457 | ||
458 | config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | |
459 | bool "Initialize Xtensa MMU inside the Linux kernel code" | |
460 | depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B | |
461 | default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM | |
462 | help | |
463 | Earlier version initialized the MMU in the exception vector | |
464 | before jumping to _startup in head.S and had an advantage that | |
465 | it was possible to place a software breakpoint at 'reset' and | |
466 | then enter your normal kernel breakpoints once the MMU was mapped | |
467 | to the kernel mappings (0XC0000000). | |
468 | ||
469 | This unfortunately won't work for U-Boot and likely also wont | |
470 | work for using KEXEC to have a hot kernel ready for doing a | |
471 | KDUMP. | |
472 | ||
473 | So now the MMU is initialized in head.S but it's necessary to | |
474 | use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. | |
475 | xt-gdb can't place a Software Breakpoint in the 0XD region prior | |
476 | to mapping the MMU and after mapping even if the area of low memory | |
477 | was mapped gdb wouldn't remove the breakpoint on hitting it as the | |
478 | PC wouldn't match. Since Hardware Breakpoints are recommended for | |
479 | Linux configurations it seems reasonable to just assume they exist | |
480 | and leave this older mechanism for unfortunate souls that choose | |
481 | not to follow Tensilica's recommendation. | |
482 | ||
483 | Selecting this will cause U-Boot to set the KERNEL Load and Entry | |
484 | address at 0x00003000 instead of the mapped std of 0xD0003000. | |
485 | ||
486 | If in doubt, say Y. | |
487 | ||
7af710d9 MF |
488 | config XIP_KERNEL |
489 | bool "Kernel Execute-In-Place from ROM" | |
490 | depends on PLATFORM_HAVE_XIP | |
491 | help | |
492 | Execute-In-Place allows the kernel to run from non-volatile storage | |
493 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
494 | space since the text section of the kernel is not loaded from flash | |
495 | to RAM. Read-write sections, such as the data section and stack, | |
496 | are still copied to RAM. The XIP kernel is not compressed since | |
497 | it has to run directly from flash, so it will take more space to | |
498 | store it. The flash address used to link the kernel object files, | |
499 | and for storing it, is configuration dependent. Therefore, if you | |
500 | say Y here, you must know the proper physical address where to | |
501 | store the kernel image depending on your own flash memory usage. | |
502 | ||
503 | Also note that the make target becomes "make xipImage" rather than | |
504 | "make Image" or "make uImage". The final kernel binary to put in | |
505 | ROM memory will be arch/xtensa/boot/xipImage. | |
506 | ||
507 | If unsure, say N. | |
508 | ||
76743c0e MF |
509 | config MEMMAP_CACHEATTR |
510 | hex "Cache attributes for the memory address space" | |
511 | depends on !MMU | |
512 | default 0x22222222 | |
513 | help | |
514 | These cache attributes are set up for noMMU systems. Each hex digit | |
515 | specifies cache attributes for the corresponding 512MB memory | |
516 | region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, | |
517 | bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. | |
518 | ||
519 | Cache attribute values are specific for the MMU type. | |
520 | For region protection MMUs: | |
521 | 1: WT cached, | |
522 | 2: cache bypass, | |
523 | 4: WB cached, | |
524 | f: illegal. | |
525 | For ful MMU: | |
526 | bit 0: executable, | |
527 | bit 1: writable, | |
528 | bits 2..3: | |
529 | 0: cache bypass, | |
530 | 1: WB cache, | |
531 | 2: WT cache, | |
532 | 3: special (c and e are illegal, f is reserved). | |
533 | For MPU: | |
534 | 0: illegal, | |
535 | 1: WB cache, | |
536 | 2: WB, no-write-allocate cache, | |
537 | 3: WT cache, | |
538 | 4: cache bypass. | |
539 | ||
540 | config KSEG_PADDR | |
541 | hex "Physical address of the KSEG mapping" | |
542 | depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU | |
543 | default 0x00000000 | |
544 | help | |
545 | This is the physical address where KSEG is mapped. Please refer to | |
546 | the chosen KSEG layout help for the required address alignment. | |
547 | Unpacked kernel image (including vectors) must be located completely | |
548 | within KSEG. | |
549 | Physical memory below this address is not available to linux. | |
550 | ||
551 | If unsure, leave the default value here. | |
552 | ||
7af710d9 MF |
553 | config KERNEL_VIRTUAL_ADDRESS |
554 | hex "Kernel virtual address" | |
555 | depends on MMU && XIP_KERNEL | |
556 | default 0xd0003000 | |
557 | help | |
558 | This is the virtual address where the XIP kernel is mapped. | |
559 | XIP kernel may be mapped into KSEG or KIO region, virtual address | |
560 | provided here must match kernel load address provided in | |
561 | KERNEL_LOAD_ADDRESS. | |
562 | ||
76743c0e MF |
563 | config KERNEL_LOAD_ADDRESS |
564 | hex "Kernel load address" | |
565 | default 0x60003000 if !MMU | |
566 | default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | |
567 | default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | |
568 | help | |
569 | This is the address where the kernel is loaded. | |
570 | It is virtual address for MMUv2 configurations and physical address | |
571 | for all other configurations. | |
572 | ||
573 | If unsure, leave the default value here. | |
574 | ||
575 | config VECTORS_OFFSET | |
576 | hex "Kernel vectors offset" | |
577 | default 0x00003000 | |
7af710d9 | 578 | depends on !XIP_KERNEL |
76743c0e MF |
579 | help |
580 | This is the offset of the kernel image from the relocatable vectors | |
581 | base. | |
582 | ||
583 | If unsure, leave the default value here. | |
584 | ||
7af710d9 MF |
585 | config XIP_DATA_ADDR |
586 | hex "XIP kernel data virtual address" | |
587 | depends on XIP_KERNEL | |
588 | default 0x00000000 | |
589 | help | |
590 | This is the virtual address where XIP kernel data is copied. | |
591 | It must be within KSEG if MMU is used. | |
592 | ||
76743c0e MF |
593 | config PLATFORM_WANT_DEFAULT_MEM |
594 | def_bool n | |
595 | ||
596 | config DEFAULT_MEM_START | |
597 | hex | |
598 | prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM | |
599 | default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM | |
600 | default 0x00000000 | |
601 | help | |
602 | This is the base address used for both PAGE_OFFSET and PHYS_OFFSET | |
603 | in noMMU configurations. | |
604 | ||
605 | If unsure, leave the default value here. | |
606 | ||
607 | choice | |
608 | prompt "KSEG layout" | |
609 | depends on MMU | |
610 | default XTENSA_KSEG_MMU_V2 | |
611 | ||
612 | config XTENSA_KSEG_MMU_V2 | |
613 | bool "MMUv2: 128MB cached + 128MB uncached" | |
614 | help | |
615 | MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting | |
616 | at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 | |
617 | without cache. | |
618 | KSEG_PADDR must be aligned to 128MB. | |
619 | ||
620 | config XTENSA_KSEG_256M | |
621 | bool "256MB cached + 256MB uncached" | |
622 | depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | |
623 | help | |
624 | TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 | |
625 | with cache and to 0xc0000000 without cache. | |
626 | KSEG_PADDR must be aligned to 256MB. | |
627 | ||
628 | config XTENSA_KSEG_512M | |
629 | bool "512MB cached + 512MB uncached" | |
630 | depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX | |
631 | help | |
632 | TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 | |
633 | with cache and to 0xc0000000 without cache. | |
634 | KSEG_PADDR must be aligned to 256MB. | |
635 | ||
636 | endchoice | |
637 | ||
638 | config HIGHMEM | |
639 | bool "High Memory Support" | |
640 | depends on MMU | |
641 | help | |
642 | Linux can use the full amount of RAM in the system by | |
643 | default. However, the default MMUv2 setup only maps the | |
644 | lowermost 128 MB of memory linearly to the areas starting | |
645 | at 0xd0000000 (cached) and 0xd8000000 (uncached). | |
646 | When there are more than 128 MB memory in the system not | |
647 | all of it can be "permanently mapped" by the kernel. | |
648 | The physical memory that's not permanently mapped is called | |
649 | "high memory". | |
650 | ||
651 | If you are compiling a kernel which will never run on a | |
652 | machine with more than 128 MB total physical RAM, answer | |
653 | N here. | |
654 | ||
655 | If unsure, say Y. | |
656 | ||
657 | config FORCE_MAX_ZONEORDER | |
658 | int "Maximum zone order" | |
659 | default "11" | |
660 | help | |
661 | The kernel memory allocator divides physically contiguous memory | |
662 | blocks into "zones", where each zone is a power of two number of | |
663 | pages. This option selects the largest power of two that the kernel | |
664 | keeps in the memory allocator. If you need to allocate very large | |
665 | blocks of physically contiguous memory, then you may need to | |
666 | increase this value. | |
667 | ||
668 | This config option is actually maximum order plus one. For example, | |
669 | a value of 11 means that the largest free memory block is 2^10 pages. | |
670 | ||
8e1a6dd2 CZ |
671 | endmenu |
672 | ||
e00d8b2f MF |
673 | menu "Power management options" |
674 | ||
675 | source "kernel/power/Kconfig" | |
676 | ||
677 | endmenu |