Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86-64/kernel/time.c | |
3 | * | |
4 | * "High Precision Event Timer" based timekeeping. | |
5 | * | |
6 | * Copyright (c) 1991,1992,1995 Linus Torvalds | |
7 | * Copyright (c) 1994 Alan Modra | |
8 | * Copyright (c) 1995 Markus Kuhn | |
9 | * Copyright (c) 1996 Ingo Molnar | |
10 | * Copyright (c) 1998 Andrea Arcangeli | |
2f82bde4 | 11 | * Copyright (c) 2002,2006 Vojtech Pavlik |
1da177e4 LT |
12 | * Copyright (c) 2003 Andi Kleen |
13 | * RTC support code taken from arch/i386/kernel/timers/time_hpet.c | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/mc146818rtc.h> | |
1da177e4 LT |
21 | #include <linux/time.h> |
22 | #include <linux/ioport.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/sysdev.h> | |
26 | #include <linux/bcd.h> | |
a670fad0 VP |
27 | #include <linux/notifier.h> |
28 | #include <linux/cpu.h> | |
1da177e4 | 29 | #include <linux/kallsyms.h> |
312df5f1 | 30 | #include <linux/acpi.h> |
8d916406 | 31 | #ifdef CONFIG_ACPI |
312df5f1 | 32 | #include <acpi/achware.h> /* for PM timer frequency */ |
0e5f61b0 | 33 | #include <acpi/acpi_bus.h> |
8d916406 | 34 | #endif |
1da177e4 LT |
35 | #include <asm/8253pit.h> |
36 | #include <asm/pgtable.h> | |
37 | #include <asm/vsyscall.h> | |
38 | #include <asm/timex.h> | |
39 | #include <asm/proto.h> | |
40 | #include <asm/hpet.h> | |
41 | #include <asm/sections.h> | |
42 | #include <linux/cpufreq.h> | |
43 | #include <linux/hpet.h> | |
1da177e4 | 44 | #include <asm/apic.h> |
c37e7bb5 | 45 | #include <asm/hpet.h> |
1da177e4 | 46 | |
1da177e4 LT |
47 | extern void i8254_timer_resume(void); |
48 | extern int using_apic_timer; | |
49 | ||
a670fad0 | 50 | static char *timename = NULL; |
e8b91777 | 51 | |
1da177e4 | 52 | DEFINE_SPINLOCK(rtc_lock); |
2ee60e17 | 53 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 LT |
54 | DEFINE_SPINLOCK(i8253_lock); |
55 | ||
1da177e4 | 56 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; |
1da177e4 | 57 | |
1da177e4 LT |
58 | unsigned long profile_pc(struct pt_regs *regs) |
59 | { | |
60 | unsigned long pc = instruction_pointer(regs); | |
61 | ||
31679f38 AK |
62 | /* Assume the lock function has either no stack frame or a copy |
63 | of eflags from PUSHF | |
64 | Eflags always has bits 22 and up cleared unlike kernel addresses. */ | |
d5a26017 | 65 | if (!user_mode(regs) && in_lock_functions(pc)) { |
31679f38 AK |
66 | unsigned long *sp = (unsigned long *)regs->rsp; |
67 | if (sp[0] >> 22) | |
68 | return sp[0]; | |
69 | if (sp[1] >> 22) | |
70 | return sp[1]; | |
1da177e4 LT |
71 | } |
72 | return pc; | |
73 | } | |
74 | EXPORT_SYMBOL(profile_pc); | |
75 | ||
76 | /* | |
77 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500 | |
78 | * ms after the second nowtime has started, because when nowtime is written | |
79 | * into the registers of the CMOS clock, it will jump to the next second | |
80 | * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data | |
81 | * sheet for details. | |
82 | */ | |
83 | ||
84 | static void set_rtc_mmss(unsigned long nowtime) | |
85 | { | |
86 | int real_seconds, real_minutes, cmos_minutes; | |
87 | unsigned char control, freq_select; | |
88 | ||
89 | /* | |
90 | * IRQs are disabled when we're called from the timer interrupt, | |
91 | * no need for spin_lock_irqsave() | |
92 | */ | |
93 | ||
94 | spin_lock(&rtc_lock); | |
95 | ||
96 | /* | |
97 | * Tell the clock it's being set and stop it. | |
98 | */ | |
99 | ||
100 | control = CMOS_READ(RTC_CONTROL); | |
101 | CMOS_WRITE(control | RTC_SET, RTC_CONTROL); | |
102 | ||
103 | freq_select = CMOS_READ(RTC_FREQ_SELECT); | |
104 | CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT); | |
105 | ||
106 | cmos_minutes = CMOS_READ(RTC_MINUTES); | |
107 | BCD_TO_BIN(cmos_minutes); | |
108 | ||
109 | /* | |
110 | * since we're only adjusting minutes and seconds, don't interfere with hour | |
111 | * overflow. This avoids messing with unknown time zones but requires your RTC | |
112 | * not to be off by more than 15 minutes. Since we're calling it only when | |
113 | * our clock is externally synchronized using NTP, this shouldn't be a problem. | |
114 | */ | |
115 | ||
116 | real_seconds = nowtime % 60; | |
117 | real_minutes = nowtime / 60; | |
118 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) | |
119 | real_minutes += 30; /* correct for half hour time zone */ | |
120 | real_minutes %= 60; | |
121 | ||
1da177e4 LT |
122 | if (abs(real_minutes - cmos_minutes) >= 30) { |
123 | printk(KERN_WARNING "time.c: can't update CMOS clock " | |
124 | "from %d to %d\n", cmos_minutes, real_minutes); | |
28456ede | 125 | } else { |
0b91317e AK |
126 | BIN_TO_BCD(real_seconds); |
127 | BIN_TO_BCD(real_minutes); | |
1da177e4 LT |
128 | CMOS_WRITE(real_seconds, RTC_SECONDS); |
129 | CMOS_WRITE(real_minutes, RTC_MINUTES); | |
130 | } | |
131 | ||
132 | /* | |
133 | * The following flags have to be released exactly in this order, otherwise the | |
134 | * DS12887 (popular MC146818A clone with integrated battery and quartz) will | |
135 | * not reset the oscillator and will not update precisely 500 ms later. You | |
136 | * won't find this mentioned in the Dallas Semiconductor data sheets, but who | |
137 | * believes data sheets anyway ... -- Markus Kuhn | |
138 | */ | |
139 | ||
140 | CMOS_WRITE(control, RTC_CONTROL); | |
141 | CMOS_WRITE(freq_select, RTC_FREQ_SELECT); | |
142 | ||
143 | spin_unlock(&rtc_lock); | |
144 | } | |
145 | ||
146 | ||
7d12e780 | 147 | void main_timer_handler(void) |
1da177e4 LT |
148 | { |
149 | static unsigned long rtc_update = 0; | |
1da177e4 LT |
150 | /* |
151 | * Here we are in the timer irq handler. We have irqs locally disabled (so we | |
152 | * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running | |
153 | * on the other CPU, so we need a lock. We also need to lock the vsyscall | |
154 | * variables, because both do_timer() and us change them -arca+vojtech | |
155 | */ | |
156 | ||
157 | write_seqlock(&xtime_lock); | |
158 | ||
1da177e4 LT |
159 | /* |
160 | * Do the timer stuff. | |
161 | */ | |
162 | ||
1489939f | 163 | do_timer(1); |
1da177e4 | 164 | #ifndef CONFIG_SMP |
7d12e780 | 165 | update_process_times(user_mode(get_irq_regs())); |
1da177e4 LT |
166 | #endif |
167 | ||
168 | /* | |
169 | * In the SMP case we use the local APIC timer interrupt to do the profiling, | |
170 | * except when we simulate SMP mode on a uniprocessor system, in that case we | |
171 | * have to call the local interrupt handler. | |
172 | */ | |
173 | ||
1da177e4 | 174 | if (!using_apic_timer) |
7d12e780 | 175 | smp_local_timer_interrupt(); |
1da177e4 LT |
176 | |
177 | /* | |
178 | * If we have an externally synchronized Linux clock, then update CMOS clock | |
179 | * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy | |
180 | * closest to exactly 500 ms before the next second. If the update fails, we | |
181 | * don't care, as it'll be updated on the next turn, and the problem (time way | |
182 | * off) isn't likely to go away much sooner anyway. | |
183 | */ | |
184 | ||
b149ee22 | 185 | if (ntp_synced() && xtime.tv_sec > rtc_update && |
1da177e4 LT |
186 | abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) { |
187 | set_rtc_mmss(xtime.tv_sec); | |
188 | rtc_update = xtime.tv_sec + 660; | |
189 | } | |
190 | ||
191 | write_sequnlock(&xtime_lock); | |
73dea47f | 192 | } |
1da177e4 | 193 | |
7d12e780 | 194 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
73dea47f AK |
195 | { |
196 | if (apic_runs_main_timer > 1) | |
197 | return IRQ_HANDLED; | |
7d12e780 | 198 | main_timer_handler(); |
d25bf7e5 VP |
199 | if (using_apic_timer) |
200 | smp_send_timer_broadcast_ipi(); | |
1da177e4 LT |
201 | return IRQ_HANDLED; |
202 | } | |
203 | ||
bdf2b1c9 | 204 | static unsigned long get_cmos_time(void) |
1da177e4 | 205 | { |
641f71f5 | 206 | unsigned int year, mon, day, hour, min, sec; |
1da177e4 | 207 | unsigned long flags; |
ad71860a | 208 | unsigned century = 0; |
1da177e4 | 209 | |
1da177e4 LT |
210 | spin_lock_irqsave(&rtc_lock, flags); |
211 | ||
641f71f5 MM |
212 | do { |
213 | sec = CMOS_READ(RTC_SECONDS); | |
214 | min = CMOS_READ(RTC_MINUTES); | |
215 | hour = CMOS_READ(RTC_HOURS); | |
216 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
217 | mon = CMOS_READ(RTC_MONTH); | |
218 | year = CMOS_READ(RTC_YEAR); | |
6954bee8 | 219 | #ifdef CONFIG_ACPI |
ad71860a AS |
220 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
221 | acpi_gbl_FADT.century) | |
222 | century = CMOS_READ(acpi_gbl_FADT.century); | |
6954bee8 | 223 | #endif |
641f71f5 | 224 | } while (sec != CMOS_READ(RTC_SECONDS)); |
6954bee8 | 225 | |
1da177e4 LT |
226 | spin_unlock_irqrestore(&rtc_lock, flags); |
227 | ||
0b91317e AK |
228 | /* |
229 | * We know that x86-64 always uses BCD format, no need to check the | |
230 | * config register. | |
7351c0bf | 231 | */ |
1da177e4 | 232 | |
0b91317e AK |
233 | BCD_TO_BIN(sec); |
234 | BCD_TO_BIN(min); | |
235 | BCD_TO_BIN(hour); | |
236 | BCD_TO_BIN(day); | |
237 | BCD_TO_BIN(mon); | |
238 | BCD_TO_BIN(year); | |
1da177e4 | 239 | |
ad71860a AS |
240 | if (century) { |
241 | BCD_TO_BIN(century); | |
242 | year += century * 100; | |
243 | printk(KERN_INFO "Extended CMOS year: %d\n", century * 100); | |
6954bee8 AK |
244 | } else { |
245 | /* | |
246 | * x86-64 systems only exists since 2002. | |
247 | * This will work up to Dec 31, 2100 | |
248 | */ | |
249 | year += 2000; | |
250 | } | |
1da177e4 LT |
251 | |
252 | return mktime(year, mon, day, hour, min, sec); | |
253 | } | |
254 | ||
1da177e4 LT |
255 | |
256 | /* | |
257 | * pit_calibrate_tsc() uses the speaker output (channel 2) of | |
258 | * the PIT. This is better than using the timer interrupt output, | |
259 | * because we can read the value of the speaker with just one inb(), | |
260 | * where we need three i/o operations for the interrupt channel. | |
261 | * We count how many ticks the TSC does in 50 ms. | |
262 | */ | |
263 | ||
264 | static unsigned int __init pit_calibrate_tsc(void) | |
265 | { | |
266 | unsigned long start, end; | |
267 | unsigned long flags; | |
268 | ||
269 | spin_lock_irqsave(&i8253_lock, flags); | |
270 | ||
271 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | |
272 | ||
273 | outb(0xb0, 0x43); | |
274 | outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42); | |
275 | outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42); | |
c818a181 | 276 | start = get_cycles_sync(); |
1da177e4 | 277 | while ((inb(0x61) & 0x20) == 0); |
c818a181 | 278 | end = get_cycles_sync(); |
1da177e4 LT |
279 | |
280 | spin_unlock_irqrestore(&i8253_lock, flags); | |
281 | ||
282 | return (end - start) / 50; | |
283 | } | |
284 | ||
73dea47f AK |
285 | #define PIT_MODE 0x43 |
286 | #define PIT_CH0 0x40 | |
287 | ||
288 | static void __init __pit_init(int val, u8 mode) | |
1da177e4 LT |
289 | { |
290 | unsigned long flags; | |
291 | ||
292 | spin_lock_irqsave(&i8253_lock, flags); | |
73dea47f AK |
293 | outb_p(mode, PIT_MODE); |
294 | outb_p(val & 0xff, PIT_CH0); /* LSB */ | |
295 | outb_p(val >> 8, PIT_CH0); /* MSB */ | |
1da177e4 LT |
296 | spin_unlock_irqrestore(&i8253_lock, flags); |
297 | } | |
298 | ||
73dea47f AK |
299 | void __init pit_init(void) |
300 | { | |
301 | __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */ | |
302 | } | |
303 | ||
304 | void __init pit_stop_interrupt(void) | |
305 | { | |
306 | __pit_init(0, 0x30); /* mode 0 */ | |
307 | } | |
308 | ||
309 | void __init stop_timer_interrupt(void) | |
310 | { | |
311 | char *name; | |
2d0c87c3 | 312 | if (hpet_address) { |
73dea47f AK |
313 | name = "HPET"; |
314 | hpet_timer_stop_set_go(0); | |
315 | } else { | |
316 | name = "PIT"; | |
317 | pit_stop_interrupt(); | |
318 | } | |
319 | printk(KERN_INFO "timer: %s interrupt stopped.\n", name); | |
320 | } | |
321 | ||
1da177e4 | 322 | static struct irqaction irq0 = { |
b1e05aa2 | 323 | timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL |
1da177e4 LT |
324 | }; |
325 | ||
a670fad0 VP |
326 | void __init time_init(void) |
327 | { | |
1da177e4 | 328 | if (nohpet) |
2d0c87c3 | 329 | hpet_address = 0; |
1da177e4 LT |
330 | xtime.tv_sec = get_cmos_time(); |
331 | xtime.tv_nsec = 0; | |
332 | ||
333 | set_normalized_timespec(&wall_to_monotonic, | |
334 | -xtime.tv_sec, -xtime.tv_nsec); | |
335 | ||
1489939f | 336 | if (hpet_arch_init()) |
2d0c87c3 | 337 | hpet_address = 0; |
a3a00751 | 338 | |
339 | if (hpet_use_timer) { | |
b20367a6 JH |
340 | /* set tick_nsec to use the proper rate for HPET */ |
341 | tick_nsec = TICK_NSEC_HPET; | |
1da177e4 LT |
342 | cpu_khz = hpet_calibrate_tsc(); |
343 | timename = "HPET"; | |
344 | } else { | |
345 | pit_init(); | |
346 | cpu_khz = pit_calibrate_tsc(); | |
347 | timename = "PIT"; | |
348 | } | |
349 | ||
312df5f1 | 350 | if (unsynchronized_tsc()) |
1489939f | 351 | mark_tsc_unstable(); |
a670fad0 | 352 | |
2d0c87c3 | 353 | if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP)) |
c08c8205 VP |
354 | vgetcpu_mode = VGETCPU_RDTSCP; |
355 | else | |
356 | vgetcpu_mode = VGETCPU_LSL; | |
357 | ||
1489939f | 358 | set_cyc2ns_scale(cpu_khz); |
a670fad0 VP |
359 | printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n", |
360 | cpu_khz / 1000, cpu_khz % 1000); | |
6bb74df4 | 361 | init_tsc_clocksource(); |
362 | ||
1489939f | 363 | setup_irq(0, &irq0); |
1da177e4 LT |
364 | } |
365 | ||
1da177e4 LT |
366 | |
367 | static long clock_cmos_diff; | |
368 | static unsigned long sleep_start; | |
369 | ||
0b91317e AK |
370 | /* |
371 | * sysfs support for the timer. | |
372 | */ | |
373 | ||
0b9c33a7 | 374 | static int timer_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 LT |
375 | { |
376 | /* | |
377 | * Estimate time zone so that set_time can update the clock | |
378 | */ | |
379 | long cmos_time = get_cmos_time(); | |
380 | ||
381 | clock_cmos_diff = -cmos_time; | |
382 | clock_cmos_diff += get_seconds(); | |
383 | sleep_start = cmos_time; | |
384 | return 0; | |
385 | } | |
386 | ||
387 | static int timer_resume(struct sys_device *dev) | |
388 | { | |
389 | unsigned long flags; | |
390 | unsigned long sec; | |
391 | unsigned long ctime = get_cmos_time(); | |
34464a5b | 392 | long sleep_length = (ctime - sleep_start) * HZ; |
1da177e4 | 393 | |
34464a5b RW |
394 | if (sleep_length < 0) { |
395 | printk(KERN_WARNING "Time skew detected in timer resume!\n"); | |
396 | /* The time after the resume must not be earlier than the time | |
397 | * before the suspend or some nasty things will happen | |
398 | */ | |
399 | sleep_length = 0; | |
400 | ctime = sleep_start; | |
401 | } | |
2d0c87c3 | 402 | if (hpet_address) |
1da177e4 LT |
403 | hpet_reenable(); |
404 | else | |
405 | i8254_timer_resume(); | |
406 | ||
407 | sec = ctime + clock_cmos_diff; | |
408 | write_seqlock_irqsave(&xtime_lock,flags); | |
409 | xtime.tv_sec = sec; | |
410 | xtime.tv_nsec = 0; | |
1da177e4 | 411 | jiffies += sleep_length; |
1489939f | 412 | write_sequnlock_irqrestore(&xtime_lock,flags); |
8446f1d3 | 413 | touch_softlockup_watchdog(); |
1da177e4 LT |
414 | return 0; |
415 | } | |
416 | ||
417 | static struct sysdev_class timer_sysclass = { | |
418 | .resume = timer_resume, | |
419 | .suspend = timer_suspend, | |
420 | set_kset_name("timer"), | |
421 | }; | |
422 | ||
405ae7d3 | 423 | /* XXX this sysfs stuff should probably go elsewhere later -john */ |
1da177e4 LT |
424 | static struct sys_device device_timer = { |
425 | .id = 0, | |
426 | .cls = &timer_sysclass, | |
427 | }; | |
428 | ||
429 | static int time_init_device(void) | |
430 | { | |
431 | int error = sysdev_class_register(&timer_sysclass); | |
432 | if (!error) | |
433 | error = sysdev_register(&device_timer); | |
434 | return error; | |
435 | } | |
436 | ||
437 | device_initcall(time_init_device); |