mm/pgtable: drop pgtable_t variable from pte_fn_t functions
[linux-block.git] / arch / x86 / xen / mmu_pv.c
CommitLineData
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1// SPDX-License-Identifier: GPL-2.0
2
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3/*
4 * Xen mmu operations
5 *
6 * This file contains the various mmu fetch and update operations.
7 * The most important job they must perform is the mapping between the
8 * domain's pfn and the overall machine mfns.
9 *
10 * Xen allows guests to directly update the pagetable, in a controlled
11 * fashion. In other words, the guest modifies the same pagetable
12 * that the CPU actually uses, which eliminates the overhead of having
13 * a separate shadow pagetable.
14 *
15 * In order to allow this, it falls on the guest domain to map its
16 * notion of a "physical" pfn - which is just a domain-local linear
17 * address - into a real "machine address" which the CPU's MMU can
18 * use.
19 *
20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
21 * inserted directly into the pagetable. When creating a new
22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
23 * when reading the content back with __(pgd|pmd|pte)_val, it converts
24 * the mfn back into a pfn.
25 *
26 * The other constraint is that all pages which make up a pagetable
27 * must be mapped read-only in the guest. This prevents uncontrolled
28 * guest updates to the pagetable. Xen strictly enforces this, and
29 * will disallow any pagetable update which will end up mapping a
30 * pagetable page RW, and will disallow using any writable page as a
31 * pagetable.
32 *
33 * Naively, when loading %cr3 with the base of a new pagetable, Xen
34 * would need to validate the whole pagetable before going on.
35 * Naturally, this is quite slow. The solution is to "pin" a
36 * pagetable, which enforces all the constraints on the pagetable even
37 * when it is not actively in use. This menas that Xen can be assured
38 * that it is still valid when you do load it into %cr3, and doesn't
39 * need to revalidate it.
40 *
41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
42 */
43#include <linux/sched/mm.h>
44#include <linux/highmem.h>
45#include <linux/debugfs.h>
46#include <linux/bug.h>
47#include <linux/vmalloc.h>
48#include <linux/export.h>
49#include <linux/init.h>
50#include <linux/gfp.h>
51#include <linux/memblock.h>
52#include <linux/seq_file.h>
53#include <linux/crash_dump.h>
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54#ifdef CONFIG_KEXEC_CORE
55#include <linux/kexec.h>
56#endif
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57
58#include <trace/events/xen.h>
59
60#include <asm/pgtable.h>
61#include <asm/tlbflush.h>
62#include <asm/fixmap.h>
63#include <asm/mmu_context.h>
64#include <asm/setup.h>
65#include <asm/paravirt.h>
66#include <asm/e820/api.h>
67#include <asm/linkage.h>
68#include <asm/page.h>
69#include <asm/init.h>
70#include <asm/pat.h>
71#include <asm/smp.h>
48a8b97c 72#include <asm/tlb.h>
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73
74#include <asm/xen/hypercall.h>
75#include <asm/xen/hypervisor.h>
76
77#include <xen/xen.h>
78#include <xen/page.h>
79#include <xen/interface/xen.h>
80#include <xen/interface/hvm/hvm_op.h>
81#include <xen/interface/version.h>
82#include <xen/interface/memory.h>
83#include <xen/hvc-console.h>
84
85#include "multicalls.h"
86#include "mmu.h"
87#include "debugfs.h"
88
89#ifdef CONFIG_X86_32
90/*
91 * Identity map, in addition to plain kernel map. This needs to be
92 * large enough to allocate page table pages to allocate the rest.
93 * Each page can map 2MB.
94 */
95#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
96static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
97#endif
98#ifdef CONFIG_X86_64
99/* l3 pud for userspace vsyscall mapping */
100static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
101#endif /* CONFIG_X86_64 */
102
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103/*
104 * Protects atomic reservation decrease/increase against concurrent increases.
105 * Also protects non-atomic updates of current_pages and balloon lists.
106 */
4f2d7af7 107static DEFINE_SPINLOCK(xen_reservation_lock);
f030aade 108
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109/*
110 * Note about cr3 (pagetable base) values:
111 *
112 * xen_cr3 contains the current logical cr3 value; it contains the
113 * last set cr3. This may not be the current effective cr3, because
114 * its update may be being lazily deferred. However, a vcpu looking
115 * at its own cr3 can use this value knowing that it everything will
116 * be self-consistent.
117 *
118 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
119 * hypercall to set the vcpu cr3 is complete (so it may be a little
120 * out of date, but it will never be set early). If one vcpu is
121 * looking at another vcpu's cr3 value, it should use this variable.
122 */
123DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
124DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
125
126static phys_addr_t xen_pt_base, xen_pt_size __initdata;
127
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128static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
129
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130/*
131 * Just beyond the highest usermode address. STACK_TOP_MAX has a
132 * redzone above it, so round it up to a PGD boundary.
133 */
134#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
135
136void make_lowmem_page_readonly(void *vaddr)
137{
138 pte_t *pte, ptev;
139 unsigned long address = (unsigned long)vaddr;
140 unsigned int level;
141
142 pte = lookup_address(address, &level);
143 if (pte == NULL)
144 return; /* vaddr missing */
145
146 ptev = pte_wrprotect(*pte);
147
148 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
149 BUG();
150}
151
152void make_lowmem_page_readwrite(void *vaddr)
153{
154 pte_t *pte, ptev;
155 unsigned long address = (unsigned long)vaddr;
156 unsigned int level;
157
158 pte = lookup_address(address, &level);
159 if (pte == NULL)
160 return; /* vaddr missing */
161
162 ptev = pte_mkwrite(*pte);
163
164 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
165 BUG();
166}
167
168
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169/*
170 * During early boot all page table pages are pinned, but we do not have struct
171 * pages, so return true until struct pages are ready.
172 */
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173static bool xen_page_pinned(void *ptr)
174{
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175 if (static_branch_likely(&xen_struct_pages_ready)) {
176 struct page *page = virt_to_page(ptr);
7e0563de 177
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178 return PagePinned(page);
179 }
180 return true;
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181}
182
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183static void xen_extend_mmu_update(const struct mmu_update *update)
184{
185 struct multicall_space mcs;
186 struct mmu_update *u;
187
188 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
189
190 if (mcs.mc != NULL) {
191 mcs.mc->args[1]++;
192 } else {
193 mcs = __xen_mc_entry(sizeof(*u));
194 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
195 }
196
197 u = mcs.args;
198 *u = *update;
199}
200
201static void xen_extend_mmuext_op(const struct mmuext_op *op)
202{
203 struct multicall_space mcs;
204 struct mmuext_op *u;
205
206 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
207
208 if (mcs.mc != NULL) {
209 mcs.mc->args[1]++;
210 } else {
211 mcs = __xen_mc_entry(sizeof(*u));
212 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
213 }
214
215 u = mcs.args;
216 *u = *op;
217}
218
219static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
220{
221 struct mmu_update u;
222
223 preempt_disable();
224
225 xen_mc_batch();
226
227 /* ptr may be ioremapped for 64-bit pagetable setup */
228 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
229 u.val = pmd_val_ma(val);
230 xen_extend_mmu_update(&u);
231
232 xen_mc_issue(PARAVIRT_LAZY_MMU);
233
234 preempt_enable();
235}
236
237static void xen_set_pmd(pmd_t *ptr, pmd_t val)
238{
239 trace_xen_mmu_set_pmd(ptr, val);
240
241 /* If page is not pinned, we can just update the entry
242 directly */
243 if (!xen_page_pinned(ptr)) {
244 *ptr = val;
245 return;
246 }
247
248 xen_set_pmd_hyper(ptr, val);
249}
250
251/*
252 * Associate a virtual page frame with a given physical page frame
253 * and protection flags for that frame.
254 */
255void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
256{
257 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
258}
259
260static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
261{
262 struct mmu_update u;
263
264 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
265 return false;
266
267 xen_mc_batch();
268
269 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
270 u.val = pte_val_ma(pteval);
271 xen_extend_mmu_update(&u);
272
273 xen_mc_issue(PARAVIRT_LAZY_MMU);
274
275 return true;
276}
277
278static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
279{
280 if (!xen_batched_set_pte(ptep, pteval)) {
281 /*
282 * Could call native_set_pte() here and trap and
283 * emulate the PTE write but with 32-bit guests this
284 * needs two traps (one for each of the two 32-bit
285 * words in the PTE) so do one hypercall directly
286 * instead.
287 */
288 struct mmu_update u;
289
290 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
291 u.val = pte_val_ma(pteval);
292 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
293 }
294}
295
296static void xen_set_pte(pte_t *ptep, pte_t pteval)
297{
298 trace_xen_mmu_set_pte(ptep, pteval);
299 __xen_set_pte(ptep, pteval);
300}
301
302static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
303 pte_t *ptep, pte_t pteval)
304{
305 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
306 __xen_set_pte(ptep, pteval);
307}
308
0cbe3e26 309pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
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310 unsigned long addr, pte_t *ptep)
311{
312 /* Just return the pte as-is. We preserve the bits on commit */
0cbe3e26 313 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
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314 return *ptep;
315}
316
0cbe3e26 317void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
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318 pte_t *ptep, pte_t pte)
319{
320 struct mmu_update u;
321
0cbe3e26 322 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
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323 xen_mc_batch();
324
325 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
326 u.val = pte_val_ma(pte);
327 xen_extend_mmu_update(&u);
328
329 xen_mc_issue(PARAVIRT_LAZY_MMU);
330}
331
332/* Assume pteval_t is equivalent to all the other *val_t types. */
333static pteval_t pte_mfn_to_pfn(pteval_t val)
334{
335 if (val & _PAGE_PRESENT) {
6f0e8bf1 336 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
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337 unsigned long pfn = mfn_to_pfn(mfn);
338
339 pteval_t flags = val & PTE_FLAGS_MASK;
340 if (unlikely(pfn == ~0))
341 val = flags & ~_PAGE_PRESENT;
342 else
343 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
344 }
345
346 return val;
347}
348
349static pteval_t pte_pfn_to_mfn(pteval_t val)
350{
351 if (val & _PAGE_PRESENT) {
352 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
353 pteval_t flags = val & PTE_FLAGS_MASK;
354 unsigned long mfn;
355
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356 mfn = __pfn_to_mfn(pfn);
357
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358 /*
359 * If there's no mfn for the pfn, then just create an
360 * empty non-present pte. Unfortunately this loses
361 * information about the original pfn, so
362 * pte_mfn_to_pfn is asymmetric.
363 */
364 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
365 mfn = 0;
366 flags = 0;
367 } else
368 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
369 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
370 }
371
372 return val;
373}
374
375__visible pteval_t xen_pte_val(pte_t pte)
376{
377 pteval_t pteval = pte.pte;
378
379 return pte_mfn_to_pfn(pteval);
380}
381PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
382
383__visible pgdval_t xen_pgd_val(pgd_t pgd)
384{
385 return pte_mfn_to_pfn(pgd.pgd);
386}
387PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
388
389__visible pte_t xen_make_pte(pteval_t pte)
390{
391 pte = pte_pfn_to_mfn(pte);
392
393 return native_make_pte(pte);
394}
395PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
396
397__visible pgd_t xen_make_pgd(pgdval_t pgd)
398{
399 pgd = pte_pfn_to_mfn(pgd);
400 return native_make_pgd(pgd);
401}
402PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
403
404__visible pmdval_t xen_pmd_val(pmd_t pmd)
405{
406 return pte_mfn_to_pfn(pmd.pmd);
407}
408PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
409
410static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
411{
412 struct mmu_update u;
413
414 preempt_disable();
415
416 xen_mc_batch();
417
418 /* ptr may be ioremapped for 64-bit pagetable setup */
419 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
420 u.val = pud_val_ma(val);
421 xen_extend_mmu_update(&u);
422
423 xen_mc_issue(PARAVIRT_LAZY_MMU);
424
425 preempt_enable();
426}
427
428static void xen_set_pud(pud_t *ptr, pud_t val)
429{
430 trace_xen_mmu_set_pud(ptr, val);
431
432 /* If page is not pinned, we can just update the entry
433 directly */
434 if (!xen_page_pinned(ptr)) {
435 *ptr = val;
436 return;
437 }
438
439 xen_set_pud_hyper(ptr, val);
440}
441
442#ifdef CONFIG_X86_PAE
443static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
444{
445 trace_xen_mmu_set_pte_atomic(ptep, pte);
f7c90c2a 446 __xen_set_pte(ptep, pte);
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447}
448
449static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
450{
451 trace_xen_mmu_pte_clear(mm, addr, ptep);
f7c90c2a 452 __xen_set_pte(ptep, native_make_pte(0));
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453}
454
455static void xen_pmd_clear(pmd_t *pmdp)
456{
457 trace_xen_mmu_pmd_clear(pmdp);
458 set_pmd(pmdp, __pmd(0));
459}
460#endif /* CONFIG_X86_PAE */
461
462__visible pmd_t xen_make_pmd(pmdval_t pmd)
463{
464 pmd = pte_pfn_to_mfn(pmd);
465 return native_make_pmd(pmd);
466}
467PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
468
773dd2fc 469#ifdef CONFIG_X86_64
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470__visible pudval_t xen_pud_val(pud_t pud)
471{
472 return pte_mfn_to_pfn(pud.pud);
473}
474PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
475
476__visible pud_t xen_make_pud(pudval_t pud)
477{
478 pud = pte_pfn_to_mfn(pud);
479
480 return native_make_pud(pud);
481}
482PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
483
484static pgd_t *xen_get_user_pgd(pgd_t *pgd)
485{
486 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
487 unsigned offset = pgd - pgd_page;
488 pgd_t *user_ptr = NULL;
489
490 if (offset < pgd_index(USER_LIMIT)) {
491 struct page *page = virt_to_page(pgd_page);
492 user_ptr = (pgd_t *)page->private;
493 if (user_ptr)
494 user_ptr += offset;
495 }
496
497 return user_ptr;
498}
499
500static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
501{
502 struct mmu_update u;
503
504 u.ptr = virt_to_machine(ptr).maddr;
505 u.val = p4d_val_ma(val);
506 xen_extend_mmu_update(&u);
507}
508
509/*
510 * Raw hypercall-based set_p4d, intended for in early boot before
511 * there's a page structure. This implies:
512 * 1. The only existing pagetable is the kernel's
513 * 2. It is always pinned
514 * 3. It has no user pagetable attached to it
515 */
516static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
517{
518 preempt_disable();
519
520 xen_mc_batch();
521
522 __xen_set_p4d_hyper(ptr, val);
523
524 xen_mc_issue(PARAVIRT_LAZY_MMU);
525
526 preempt_enable();
527}
528
529static void xen_set_p4d(p4d_t *ptr, p4d_t val)
530{
531 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
532 pgd_t pgd_val;
533
534 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
535
536 /* If page is not pinned, we can just update the entry
537 directly */
538 if (!xen_page_pinned(ptr)) {
539 *ptr = val;
540 if (user_ptr) {
541 WARN_ON(xen_page_pinned(user_ptr));
542 pgd_val.pgd = p4d_val_ma(val);
543 *user_ptr = pgd_val;
544 }
545 return;
546 }
547
548 /* If it's pinned, then we can at least batch the kernel and
549 user updates together. */
550 xen_mc_batch();
551
552 __xen_set_p4d_hyper(ptr, val);
553 if (user_ptr)
554 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
555
556 xen_mc_issue(PARAVIRT_LAZY_MMU);
557}
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558
559#if CONFIG_PGTABLE_LEVELS >= 5
560__visible p4dval_t xen_p4d_val(p4d_t p4d)
561{
562 return pte_mfn_to_pfn(p4d.p4d);
563}
564PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
565
566__visible p4d_t xen_make_p4d(p4dval_t p4d)
567{
568 p4d = pte_pfn_to_mfn(p4d);
569
570 return native_make_p4d(p4d);
571}
572PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
573#endif /* CONFIG_PGTABLE_LEVELS >= 5 */
773dd2fc 574#endif /* CONFIG_X86_64 */
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575
576static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
577 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
578 bool last, unsigned long limit)
579{
580 int i, nr, flush = 0;
581
582 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
583 for (i = 0; i < nr; i++) {
584 if (!pmd_none(pmd[i]))
585 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
586 }
587 return flush;
588}
589
590static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
591 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
592 bool last, unsigned long limit)
593{
594 int i, nr, flush = 0;
595
596 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
597 for (i = 0; i < nr; i++) {
598 pmd_t *pmd;
599
600 if (pud_none(pud[i]))
601 continue;
602
603 pmd = pmd_offset(&pud[i], 0);
604 if (PTRS_PER_PMD > 1)
605 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
606 flush |= xen_pmd_walk(mm, pmd, func,
607 last && i == nr - 1, limit);
608 }
609 return flush;
610}
611
612static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
613 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
614 bool last, unsigned long limit)
615{
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616 int flush = 0;
617 pud_t *pud;
7e0563de 618
7e0563de 619
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620 if (p4d_none(*p4d))
621 return flush;
7e0563de 622
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623 pud = pud_offset(p4d, 0);
624 if (PTRS_PER_PUD > 1)
625 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
626 flush |= xen_pud_walk(mm, pud, func, last, limit);
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627 return flush;
628}
629
630/*
631 * (Yet another) pagetable walker. This one is intended for pinning a
632 * pagetable. This means that it walks a pagetable and calls the
633 * callback function on each page it finds making up the page table,
634 * at every level. It walks the entire pagetable, but it only bothers
635 * pinning pte pages which are below limit. In the normal case this
636 * will be STACK_TOP_MAX, but at boot we need to pin up to
637 * FIXADDR_TOP.
638 *
639 * For 32-bit the important bit is that we don't pin beyond there,
640 * because then we start getting into Xen's ptes.
641 *
642 * For 64-bit, we must skip the Xen hole in the middle of the address
643 * space, just after the big x86-64 virtual hole.
644 */
645static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
646 int (*func)(struct mm_struct *mm, struct page *,
647 enum pt_level),
648 unsigned long limit)
649{
650 int i, nr, flush = 0;
16877a55 651 unsigned hole_low = 0, hole_high = 0;
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652
653 /* The limit is the last byte to be touched */
654 limit--;
655 BUG_ON(limit >= FIXADDR_TOP);
656
16877a55 657#ifdef CONFIG_X86_64
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658 /*
659 * 64-bit has a great big hole in the middle of the address
16877a55 660 * space, which contains the Xen mappings.
7e0563de 661 */
16877a55
KS
662 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
663 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
664#endif
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665
666 nr = pgd_index(limit) + 1;
667 for (i = 0; i < nr; i++) {
668 p4d_t *p4d;
669
670 if (i >= hole_low && i < hole_high)
671 continue;
672
673 if (pgd_none(pgd[i]))
674 continue;
675
676 p4d = p4d_offset(&pgd[i], 0);
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677 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
678 }
679
680 /* Do the top level last, so that the callbacks can use it as
681 a cue to do final things like tlb flushes. */
682 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
683
684 return flush;
685}
686
687static int xen_pgd_walk(struct mm_struct *mm,
688 int (*func)(struct mm_struct *mm, struct page *,
689 enum pt_level),
690 unsigned long limit)
691{
692 return __xen_pgd_walk(mm, mm->pgd, func, limit);
693}
694
695/* If we're using split pte locks, then take the page's lock and
696 return a pointer to it. Otherwise return NULL. */
697static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
698{
699 spinlock_t *ptl = NULL;
700
701#if USE_SPLIT_PTE_PTLOCKS
702 ptl = ptlock_ptr(page);
703 spin_lock_nest_lock(ptl, &mm->page_table_lock);
704#endif
705
706 return ptl;
707}
708
709static void xen_pte_unlock(void *v)
710{
711 spinlock_t *ptl = v;
712 spin_unlock(ptl);
713}
714
715static void xen_do_pin(unsigned level, unsigned long pfn)
716{
717 struct mmuext_op op;
718
719 op.cmd = level;
720 op.arg1.mfn = pfn_to_mfn(pfn);
721
722 xen_extend_mmuext_op(&op);
723}
724
725static int xen_pin_page(struct mm_struct *mm, struct page *page,
726 enum pt_level level)
727{
728 unsigned pgfl = TestSetPagePinned(page);
729 int flush;
730
731 if (pgfl)
732 flush = 0; /* already pinned */
733 else if (PageHighMem(page))
734 /* kmaps need flushing if we found an unpinned
735 highpage */
736 flush = 1;
737 else {
738 void *pt = lowmem_page_address(page);
739 unsigned long pfn = page_to_pfn(page);
740 struct multicall_space mcs = __xen_mc_entry(0);
741 spinlock_t *ptl;
742
743 flush = 0;
744
745 /*
746 * We need to hold the pagetable lock between the time
747 * we make the pagetable RO and when we actually pin
748 * it. If we don't, then other users may come in and
749 * attempt to update the pagetable by writing it,
750 * which will fail because the memory is RO but not
751 * pinned, so Xen won't do the trap'n'emulate.
752 *
753 * If we're using split pte locks, we can't hold the
754 * entire pagetable's worth of locks during the
755 * traverse, because we may wrap the preempt count (8
756 * bits). The solution is to mark RO and pin each PTE
757 * page while holding the lock. This means the number
758 * of locks we end up holding is never more than a
759 * batch size (~32 entries, at present).
760 *
761 * If we're not using split pte locks, we needn't pin
762 * the PTE pages independently, because we're
763 * protected by the overall pagetable lock.
764 */
765 ptl = NULL;
766 if (level == PT_PTE)
767 ptl = xen_pte_lock(page, mm);
768
769 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
770 pfn_pte(pfn, PAGE_KERNEL_RO),
771 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
772
773 if (ptl) {
774 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
775
776 /* Queue a deferred unlock for when this batch
777 is completed. */
778 xen_mc_callback(xen_pte_unlock, ptl);
779 }
780 }
781
782 return flush;
783}
784
785/* This is called just after a mm has been created, but it has not
786 been used yet. We need to make sure that its pagetable is all
787 read-only, and can be pinned. */
788static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
789{
790 trace_xen_mmu_pgd_pin(mm, pgd);
791
792 xen_mc_batch();
793
794 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
795 /* re-enable interrupts for flushing */
796 xen_mc_issue(0);
797
798 kmap_flush_unused();
799
800 xen_mc_batch();
801 }
802
803#ifdef CONFIG_X86_64
804 {
805 pgd_t *user_pgd = xen_get_user_pgd(pgd);
806
807 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
808
809 if (user_pgd) {
810 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
811 xen_do_pin(MMUEXT_PIN_L4_TABLE,
812 PFN_DOWN(__pa(user_pgd)));
813 }
814 }
815#else /* CONFIG_X86_32 */
816#ifdef CONFIG_X86_PAE
817 /* Need to make sure unshared kernel PMD is pinnable */
818 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
819 PT_PMD);
820#endif
821 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
822#endif /* CONFIG_X86_64 */
823 xen_mc_issue(0);
824}
825
826static void xen_pgd_pin(struct mm_struct *mm)
827{
828 __xen_pgd_pin(mm, mm->pgd);
829}
830
831/*
832 * On save, we need to pin all pagetables to make sure they get their
833 * mfns turned into pfns. Search the list for any unpinned pgds and pin
834 * them (unpinned pgds are not currently in use, probably because the
835 * process is under construction or destruction).
836 *
837 * Expected to be called in stop_machine() ("equivalent to taking
838 * every spinlock in the system"), so the locking doesn't really
839 * matter all that much.
840 */
841void xen_mm_pin_all(void)
842{
843 struct page *page;
844
845 spin_lock(&pgd_lock);
846
847 list_for_each_entry(page, &pgd_list, lru) {
848 if (!PagePinned(page)) {
849 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
850 SetPageSavePinned(page);
851 }
852 }
853
854 spin_unlock(&pgd_lock);
855}
856
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857static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
858 enum pt_level level)
859{
860 SetPagePinned(page);
861 return 0;
862}
863
6f84f8d1
PT
864/*
865 * The init_mm pagetable is really pinned as soon as its created, but
866 * that's before we have page structures to store the bits. So do all
867 * the book-keeping now once struct pages for allocated pages are
c6ffc5ca 868 * initialized. This happens only after memblock_free_all() is called.
6f84f8d1
PT
869 */
870static void __init xen_after_bootmem(void)
7e0563de 871{
6f84f8d1
PT
872 static_branch_enable(&xen_struct_pages_ready);
873#ifdef CONFIG_X86_64
874 SetPagePinned(virt_to_page(level3_user_vsyscall));
875#endif
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876 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
877}
878
879static int xen_unpin_page(struct mm_struct *mm, struct page *page,
880 enum pt_level level)
881{
882 unsigned pgfl = TestClearPagePinned(page);
883
884 if (pgfl && !PageHighMem(page)) {
885 void *pt = lowmem_page_address(page);
886 unsigned long pfn = page_to_pfn(page);
887 spinlock_t *ptl = NULL;
888 struct multicall_space mcs;
889
890 /*
891 * Do the converse to pin_page. If we're using split
892 * pte locks, we must be holding the lock for while
893 * the pte page is unpinned but still RO to prevent
894 * concurrent updates from seeing it in this
895 * partially-pinned state.
896 */
897 if (level == PT_PTE) {
898 ptl = xen_pte_lock(page, mm);
899
900 if (ptl)
901 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
902 }
903
904 mcs = __xen_mc_entry(0);
905
906 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
907 pfn_pte(pfn, PAGE_KERNEL),
908 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
909
910 if (ptl) {
911 /* unlock when batch completed */
912 xen_mc_callback(xen_pte_unlock, ptl);
913 }
914 }
915
916 return 0; /* never need to flush on unpin */
917}
918
919/* Release a pagetables pages back as normal RW */
920static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
921{
922 trace_xen_mmu_pgd_unpin(mm, pgd);
923
924 xen_mc_batch();
925
926 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
927
928#ifdef CONFIG_X86_64
929 {
930 pgd_t *user_pgd = xen_get_user_pgd(pgd);
931
932 if (user_pgd) {
933 xen_do_pin(MMUEXT_UNPIN_TABLE,
934 PFN_DOWN(__pa(user_pgd)));
935 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
936 }
937 }
938#endif
939
940#ifdef CONFIG_X86_PAE
941 /* Need to make sure unshared kernel PMD is unpinned */
942 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
943 PT_PMD);
944#endif
945
946 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
947
948 xen_mc_issue(0);
949}
950
951static void xen_pgd_unpin(struct mm_struct *mm)
952{
953 __xen_pgd_unpin(mm, mm->pgd);
954}
955
956/*
957 * On resume, undo any pinning done at save, so that the rest of the
958 * kernel doesn't see any unexpected pinned pagetables.
959 */
960void xen_mm_unpin_all(void)
961{
962 struct page *page;
963
964 spin_lock(&pgd_lock);
965
966 list_for_each_entry(page, &pgd_list, lru) {
967 if (PageSavePinned(page)) {
968 BUG_ON(!PagePinned(page));
969 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
970 ClearPageSavePinned(page);
971 }
972 }
973
974 spin_unlock(&pgd_lock);
975}
976
977static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
978{
979 spin_lock(&next->page_table_lock);
980 xen_pgd_pin(next);
981 spin_unlock(&next->page_table_lock);
982}
983
984static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
985{
986 spin_lock(&mm->page_table_lock);
987 xen_pgd_pin(mm);
988 spin_unlock(&mm->page_table_lock);
989}
990
3d28ebce 991static void drop_mm_ref_this_cpu(void *info)
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992{
993 struct mm_struct *mm = info;
7e0563de 994
3d28ebce 995 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
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996 leave_mm(smp_processor_id());
997
3d28ebce
AL
998 /*
999 * If this cpu still has a stale cr3 reference, then make sure
1000 * it has been flushed.
1001 */
7e0563de 1002 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
3d28ebce 1003 xen_mc_flush();
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1004}
1005
3d28ebce
AL
1006#ifdef CONFIG_SMP
1007/*
1008 * Another cpu may still have their %cr3 pointing at the pagetable, so
1009 * we need to repoint it somewhere else before we can unpin it.
1010 */
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1011static void xen_drop_mm_ref(struct mm_struct *mm)
1012{
1013 cpumask_var_t mask;
1014 unsigned cpu;
1015
3d28ebce 1016 drop_mm_ref_this_cpu(mm);
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1017
1018 /* Get the "official" set of cpus referring to our pagetable. */
1019 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1020 for_each_online_cpu(cpu) {
94b1b03b 1021 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
7e0563de 1022 continue;
3d28ebce 1023 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
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1024 }
1025 return;
1026 }
7e0563de 1027
3d28ebce
AL
1028 /*
1029 * It's possible that a vcpu may have a stale reference to our
1030 * cr3, because its in lazy mode, and it hasn't yet flushed
1031 * its set of pending hypercalls yet. In this case, we can
1032 * look at its actual current cr3 value, and force it to flush
1033 * if needed.
1034 */
94b1b03b 1035 cpumask_clear(mask);
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1036 for_each_online_cpu(cpu) {
1037 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1038 cpumask_set_cpu(cpu, mask);
1039 }
1040
3d28ebce 1041 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
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1042 free_cpumask_var(mask);
1043}
1044#else
1045static void xen_drop_mm_ref(struct mm_struct *mm)
1046{
3d28ebce 1047 drop_mm_ref_this_cpu(mm);
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1048}
1049#endif
1050
1051/*
1052 * While a process runs, Xen pins its pagetables, which means that the
1053 * hypervisor forces it to be read-only, and it controls all updates
1054 * to it. This means that all pagetable updates have to go via the
1055 * hypervisor, which is moderately expensive.
1056 *
1057 * Since we're pulling the pagetable down, we switch to use init_mm,
1058 * unpin old process pagetable and mark it all read-write, which
1059 * allows further operations on it to be simple memory accesses.
1060 *
1061 * The only subtle point is that another CPU may be still using the
1062 * pagetable because of lazy tlb flushing. This means we need need to
1063 * switch all CPUs off this pagetable before we can unpin it.
1064 */
1065static void xen_exit_mmap(struct mm_struct *mm)
1066{
1067 get_cpu(); /* make sure we don't move around */
1068 xen_drop_mm_ref(mm);
1069 put_cpu();
1070
1071 spin_lock(&mm->page_table_lock);
1072
1073 /* pgd may not be pinned in the error exit path of execve */
1074 if (xen_page_pinned(mm->pgd))
1075 xen_pgd_unpin(mm);
1076
1077 spin_unlock(&mm->page_table_lock);
1078}
1079
1080static void xen_post_allocator_init(void);
1081
1082static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1083{
1084 struct mmuext_op op;
1085
1086 op.cmd = cmd;
1087 op.arg1.mfn = pfn_to_mfn(pfn);
1088 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1089 BUG();
1090}
1091
1092#ifdef CONFIG_X86_64
1093static void __init xen_cleanhighmap(unsigned long vaddr,
1094 unsigned long vaddr_end)
1095{
1096 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1097 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1098
1099 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1100 * We include the PMD passed in on _both_ boundaries. */
1101 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1102 pmd++, vaddr += PMD_SIZE) {
1103 if (pmd_none(*pmd))
1104 continue;
1105 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1106 set_pmd(pmd, __pmd(0));
1107 }
1108 /* In case we did something silly, we should crash in this function
1109 * instead of somewhere later and be confusing. */
1110 xen_mc_flush();
1111}
1112
1113/*
1114 * Make a page range writeable and free it.
1115 */
1116static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1117{
1118 void *vaddr = __va(paddr);
1119 void *vaddr_end = vaddr + size;
1120
1121 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1122 make_lowmem_page_readwrite(vaddr);
1123
1124 memblock_free(paddr, size);
1125}
1126
1127static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1128{
1129 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1130
1131 if (unpin)
1132 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1133 ClearPagePinned(virt_to_page(__va(pa)));
1134 xen_free_ro_pages(pa, PAGE_SIZE);
1135}
1136
1137static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1138{
1139 unsigned long pa;
1140 pte_t *pte_tbl;
1141 int i;
1142
1143 if (pmd_large(*pmd)) {
1144 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1145 xen_free_ro_pages(pa, PMD_SIZE);
1146 return;
1147 }
1148
1149 pte_tbl = pte_offset_kernel(pmd, 0);
1150 for (i = 0; i < PTRS_PER_PTE; i++) {
1151 if (pte_none(pte_tbl[i]))
1152 continue;
1153 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1154 xen_free_ro_pages(pa, PAGE_SIZE);
1155 }
1156 set_pmd(pmd, __pmd(0));
1157 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1158}
1159
1160static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1161{
1162 unsigned long pa;
1163 pmd_t *pmd_tbl;
1164 int i;
1165
1166 if (pud_large(*pud)) {
1167 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1168 xen_free_ro_pages(pa, PUD_SIZE);
1169 return;
1170 }
1171
1172 pmd_tbl = pmd_offset(pud, 0);
1173 for (i = 0; i < PTRS_PER_PMD; i++) {
1174 if (pmd_none(pmd_tbl[i]))
1175 continue;
1176 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1177 }
1178 set_pud(pud, __pud(0));
1179 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1180}
1181
1182static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1183{
1184 unsigned long pa;
1185 pud_t *pud_tbl;
1186 int i;
1187
1188 if (p4d_large(*p4d)) {
1189 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1190 xen_free_ro_pages(pa, P4D_SIZE);
1191 return;
1192 }
1193
1194 pud_tbl = pud_offset(p4d, 0);
1195 for (i = 0; i < PTRS_PER_PUD; i++) {
1196 if (pud_none(pud_tbl[i]))
1197 continue;
1198 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1199 }
1200 set_p4d(p4d, __p4d(0));
1201 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1202}
1203
1204/*
1205 * Since it is well isolated we can (and since it is perhaps large we should)
1206 * also free the page tables mapping the initial P->M table.
1207 */
1208static void __init xen_cleanmfnmap(unsigned long vaddr)
1209{
1210 pgd_t *pgd;
1211 p4d_t *p4d;
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1212 bool unpin;
1213
1214 unpin = (vaddr == 2 * PGDIR_SIZE);
1215 vaddr &= PMD_MASK;
1216 pgd = pgd_offset_k(vaddr);
1217 p4d = p4d_offset(pgd, 0);
773dd2fc
KS
1218 if (!p4d_none(*p4d))
1219 xen_cleanmfnmap_p4d(p4d, unpin);
7e0563de
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1220}
1221
1222static void __init xen_pagetable_p2m_free(void)
1223{
1224 unsigned long size;
1225 unsigned long addr;
1226
1227 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1228
1229 /* No memory or already called. */
1230 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1231 return;
1232
1233 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1234 memset((void *)xen_start_info->mfn_list, 0xff, size);
1235
1236 addr = xen_start_info->mfn_list;
1237 /*
1238 * We could be in __ka space.
1239 * We roundup to the PMD, which means that if anybody at this stage is
1240 * using the __ka address of xen_start_info or
1241 * xen_start_info->shared_info they are in going to crash. Fortunatly
7b25b9cb 1242 * we have already revectored in xen_setup_kernel_pagetable.
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1243 */
1244 size = roundup(size, PMD_SIZE);
1245
1246 if (addr >= __START_KERNEL_map) {
1247 xen_cleanhighmap(addr, addr + size);
1248 size = PAGE_ALIGN(xen_start_info->nr_pages *
1249 sizeof(unsigned long));
1250 memblock_free(__pa(addr), size);
1251 } else {
1252 xen_cleanmfnmap(addr);
1253 }
1254}
1255
1256static void __init xen_pagetable_cleanhighmap(void)
1257{
1258 unsigned long size;
1259 unsigned long addr;
1260
1261 /* At this stage, cleanup_highmap has already cleaned __ka space
1262 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1263 * the ramdisk). We continue on, erasing PMD entries that point to page
1264 * tables - do note that they are accessible at this stage via __va.
0d805ee7
ZD
1265 * As Xen is aligning the memory end to a 4MB boundary, for good
1266 * measure we also round up to PMD_SIZE * 2 - which means that if
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1267 * anybody is using __ka address to the initial boot-stack - and try
1268 * to use it - they are going to crash. The xen_start_info has been
1269 * taken care of already in xen_setup_kernel_pagetable. */
1270 addr = xen_start_info->pt_base;
0d805ee7 1271 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
7e0563de 1272
0d805ee7 1273 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
7e0563de 1274 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
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1275}
1276#endif
1277
1278static void __init xen_pagetable_p2m_setup(void)
1279{
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1280 xen_vmalloc_p2m_tree();
1281
1282#ifdef CONFIG_X86_64
1283 xen_pagetable_p2m_free();
1284
1285 xen_pagetable_cleanhighmap();
1286#endif
1287 /* And revector! Bye bye old array */
1288 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1289}
1290
1291static void __init xen_pagetable_init(void)
1292{
1293 paging_init();
1294 xen_post_allocator_init();
1295
1296 xen_pagetable_p2m_setup();
1297
1298 /* Allocate and initialize top and mid mfn levels for p2m structure */
1299 xen_build_mfn_list_list();
1300
1301 /* Remap memory freed due to conflicts with E820 map */
989513a7 1302 xen_remap_memory();
7b25b9cb 1303 xen_setup_mfn_list_list();
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1304}
1305static void xen_write_cr2(unsigned long cr2)
1306{
1307 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1308}
1309
1310static unsigned long xen_read_cr2(void)
1311{
1312 return this_cpu_read(xen_vcpu)->arch.cr2;
1313}
1314
1315unsigned long xen_read_cr2_direct(void)
1316{
1317 return this_cpu_read(xen_vcpu_info.arch.cr2);
1318}
1319
45dd9b06 1320static noinline void xen_flush_tlb(void)
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1321{
1322 struct mmuext_op *op;
1323 struct multicall_space mcs;
1324
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1325 preempt_disable();
1326
1327 mcs = xen_mc_entry(sizeof(*op));
1328
1329 op = mcs.args;
1330 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1331 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1332
1333 xen_mc_issue(PARAVIRT_LAZY_MMU);
1334
1335 preempt_enable();
1336}
1337
1299ef1d 1338static void xen_flush_tlb_one_user(unsigned long addr)
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1339{
1340 struct mmuext_op *op;
1341 struct multicall_space mcs;
1342
1299ef1d 1343 trace_xen_mmu_flush_tlb_one_user(addr);
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1344
1345 preempt_disable();
1346
1347 mcs = xen_mc_entry(sizeof(*op));
1348 op = mcs.args;
1349 op->cmd = MMUEXT_INVLPG_LOCAL;
1350 op->arg1.linear_addr = addr & PAGE_MASK;
1351 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1352
1353 xen_mc_issue(PARAVIRT_LAZY_MMU);
1354
1355 preempt_enable();
1356}
1357
1358static void xen_flush_tlb_others(const struct cpumask *cpus,
a2055abe 1359 const struct flush_tlb_info *info)
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1360{
1361 struct {
1362 struct mmuext_op op;
7e0563de 1363 DECLARE_BITMAP(mask, NR_CPUS);
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1364 } *args;
1365 struct multicall_space mcs;
66a640e7
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1366 const size_t mc_entry_size = sizeof(args->op) +
1367 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
7e0563de 1368
a2055abe 1369 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
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1370
1371 if (cpumask_empty(cpus))
1372 return; /* nothing to do */
1373
66a640e7 1374 mcs = xen_mc_entry(mc_entry_size);
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1375 args = mcs.args;
1376 args->op.arg2.vcpumask = to_cpumask(args->mask);
1377
1378 /* Remove us, and any offline CPUS. */
1379 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1380 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1381
1382 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
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AL
1383 if (info->end != TLB_FLUSH_ALL &&
1384 (info->end - info->start) <= PAGE_SIZE) {
7e0563de 1385 args->op.cmd = MMUEXT_INVLPG_MULTI;
a2055abe 1386 args->op.arg1.linear_addr = info->start;
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1387 }
1388
1389 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1390
1391 xen_mc_issue(PARAVIRT_LAZY_MMU);
1392}
1393
1394static unsigned long xen_read_cr3(void)
1395{
1396 return this_cpu_read(xen_cr3);
1397}
1398
1399static void set_current_cr3(void *v)
1400{
1401 this_cpu_write(xen_current_cr3, (unsigned long)v);
1402}
1403
1404static void __xen_write_cr3(bool kernel, unsigned long cr3)
1405{
1406 struct mmuext_op op;
1407 unsigned long mfn;
1408
1409 trace_xen_mmu_write_cr3(kernel, cr3);
1410
1411 if (cr3)
1412 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1413 else
1414 mfn = 0;
1415
1416 WARN_ON(mfn == 0 && kernel);
1417
1418 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1419 op.arg1.mfn = mfn;
1420
1421 xen_extend_mmuext_op(&op);
1422
1423 if (kernel) {
1424 this_cpu_write(xen_cr3, cr3);
1425
1426 /* Update xen_current_cr3 once the batch has actually
1427 been submitted. */
1428 xen_mc_callback(set_current_cr3, (void *)cr3);
1429 }
1430}
1431static void xen_write_cr3(unsigned long cr3)
1432{
1433 BUG_ON(preemptible());
1434
1435 xen_mc_batch(); /* disables interrupts */
1436
1437 /* Update while interrupts are disabled, so its atomic with
1438 respect to ipis */
1439 this_cpu_write(xen_cr3, cr3);
1440
1441 __xen_write_cr3(true, cr3);
1442
1443#ifdef CONFIG_X86_64
1444 {
1445 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1446 if (user_pgd)
1447 __xen_write_cr3(false, __pa(user_pgd));
1448 else
1449 __xen_write_cr3(false, 0);
1450 }
1451#endif
1452
1453 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1454}
1455
1456#ifdef CONFIG_X86_64
1457/*
1458 * At the start of the day - when Xen launches a guest, it has already
1459 * built pagetables for the guest. We diligently look over them
1460 * in xen_setup_kernel_pagetable and graft as appropriate them in the
65ade2f8
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1461 * init_top_pgt and its friends. Then when we are happy we load
1462 * the new init_top_pgt - and continue on.
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1463 *
1464 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1465 * up the rest of the pagetables. When it has completed it loads the cr3.
1466 * N.B. that baremetal would start at 'start_kernel' (and the early
1467 * #PF handler would create bootstrap pagetables) - so we are running
1468 * with the same assumptions as what to do when write_cr3 is executed
1469 * at this point.
1470 *
1471 * Since there are no user-page tables at all, we have two variants
1472 * of xen_write_cr3 - the early bootup (this one), and the late one
1473 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1474 * the Linux kernel and user-space are both in ring 3 while the
1475 * hypervisor is in ring 0.
1476 */
1477static void __init xen_write_cr3_init(unsigned long cr3)
1478{
1479 BUG_ON(preemptible());
1480
1481 xen_mc_batch(); /* disables interrupts */
1482
1483 /* Update while interrupts are disabled, so its atomic with
1484 respect to ipis */
1485 this_cpu_write(xen_cr3, cr3);
1486
1487 __xen_write_cr3(true, cr3);
1488
1489 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1490}
1491#endif
1492
1493static int xen_pgd_alloc(struct mm_struct *mm)
1494{
1495 pgd_t *pgd = mm->pgd;
1496 int ret = 0;
1497
1498 BUG_ON(PagePinned(virt_to_page(pgd)));
1499
1500#ifdef CONFIG_X86_64
1501 {
1502 struct page *page = virt_to_page(pgd);
1503 pgd_t *user_pgd;
1504
1505 BUG_ON(page->private != 0);
1506
1507 ret = -ENOMEM;
1508
1509 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1510 page->private = (unsigned long)user_pgd;
1511
1512 if (user_pgd != NULL) {
1513#ifdef CONFIG_X86_VSYSCALL_EMULATION
1514 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1515 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1516#endif
1517 ret = 0;
1518 }
1519
1520 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1521 }
1522#endif
1523 return ret;
1524}
1525
1526static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1527{
1528#ifdef CONFIG_X86_64
1529 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1530
1531 if (user_pgd)
1532 free_page((unsigned long)user_pgd);
1533#endif
1534}
1535
1536/*
1537 * Init-time set_pte while constructing initial pagetables, which
1538 * doesn't allow RO page table pages to be remapped RW.
1539 *
1540 * If there is no MFN for this PFN then this page is initially
1541 * ballooned out so clear the PTE (as in decrease_reservation() in
1542 * drivers/xen/balloon.c).
1543 *
1544 * Many of these PTE updates are done on unpinned and writable pages
1545 * and doing a hypercall for these is unnecessary and expensive. At
1546 * this point it is not possible to tell if a page is pinned or not,
1547 * so always write the PTE directly and rely on Xen trapping and
1548 * emulating any updates as necessary.
1549 */
1550__visible pte_t xen_make_pte_init(pteval_t pte)
1551{
1552#ifdef CONFIG_X86_64
1553 unsigned long pfn;
1554
1555 /*
1556 * Pages belonging to the initial p2m list mapped outside the default
1557 * address range must be mapped read-only. This region contains the
1558 * page tables for mapping the p2m list, too, and page tables MUST be
1559 * mapped read-only.
1560 */
1561 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1562 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1563 pfn >= xen_start_info->first_p2m_pfn &&
1564 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1565 pte &= ~_PAGE_RW;
1566#endif
1567 pte = pte_pfn_to_mfn(pte);
1568 return native_make_pte(pte);
1569}
1570PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1571
1572static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1573{
1574#ifdef CONFIG_X86_32
1575 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1576 if (pte_mfn(pte) != INVALID_P2M_ENTRY
1577 && pte_val_ma(*ptep) & _PAGE_PRESENT)
1578 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1579 pte_val_ma(pte));
1580#endif
f7c90c2a 1581 __xen_set_pte(ptep, pte);
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1582}
1583
1584/* Early in boot, while setting up the initial pagetable, assume
1585 everything is pinned. */
1586static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1587{
1588#ifdef CONFIG_FLATMEM
1589 BUG_ON(mem_map); /* should only be used early */
1590#endif
1591 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1592 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1593}
1594
1595/* Used for pmd and pud */
1596static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1597{
1598#ifdef CONFIG_FLATMEM
1599 BUG_ON(mem_map); /* should only be used early */
1600#endif
1601 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1602}
1603
1604/* Early release_pte assumes that all pts are pinned, since there's
1605 only init_mm and anything attached to that is pinned. */
1606static void __init xen_release_pte_init(unsigned long pfn)
1607{
1608 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1609 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1610}
1611
1612static void __init xen_release_pmd_init(unsigned long pfn)
1613{
1614 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1615}
1616
1617static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1618{
1619 struct multicall_space mcs;
1620 struct mmuext_op *op;
1621
1622 mcs = __xen_mc_entry(sizeof(*op));
1623 op = mcs.args;
1624 op->cmd = cmd;
1625 op->arg1.mfn = pfn_to_mfn(pfn);
1626
1627 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1628}
1629
1630static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1631{
1632 struct multicall_space mcs;
1633 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1634
1635 mcs = __xen_mc_entry(0);
1636 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1637 pfn_pte(pfn, prot), 0);
1638}
1639
1640/* This needs to make sure the new pte page is pinned iff its being
1641 attached to a pinned pagetable. */
1642static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1643 unsigned level)
1644{
6f84f8d1 1645 bool pinned = xen_page_pinned(mm->pgd);
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1646
1647 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1648
1649 if (pinned) {
1650 struct page *page = pfn_to_page(pfn);
1651
6f84f8d1
PT
1652 if (static_branch_likely(&xen_struct_pages_ready))
1653 SetPagePinned(page);
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1654
1655 if (!PageHighMem(page)) {
1656 xen_mc_batch();
1657
1658 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1659
1660 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1661 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1662
1663 xen_mc_issue(PARAVIRT_LAZY_MMU);
1664 } else {
1665 /* make sure there are no stray mappings of
1666 this page */
1667 kmap_flush_unused();
1668 }
1669 }
1670}
1671
1672static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1673{
1674 xen_alloc_ptpage(mm, pfn, PT_PTE);
1675}
1676
1677static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1678{
1679 xen_alloc_ptpage(mm, pfn, PT_PMD);
1680}
1681
1682/* This should never happen until we're OK to use struct page */
1683static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1684{
1685 struct page *page = pfn_to_page(pfn);
1686 bool pinned = PagePinned(page);
1687
1688 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1689
1690 if (pinned) {
1691 if (!PageHighMem(page)) {
1692 xen_mc_batch();
1693
1694 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1695 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1696
1697 __set_pfn_prot(pfn, PAGE_KERNEL);
1698
1699 xen_mc_issue(PARAVIRT_LAZY_MMU);
1700 }
1701 ClearPagePinned(page);
1702 }
1703}
1704
1705static void xen_release_pte(unsigned long pfn)
1706{
1707 xen_release_ptpage(pfn, PT_PTE);
1708}
1709
1710static void xen_release_pmd(unsigned long pfn)
1711{
1712 xen_release_ptpage(pfn, PT_PMD);
1713}
1714
773dd2fc 1715#ifdef CONFIG_X86_64
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1716static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1717{
1718 xen_alloc_ptpage(mm, pfn, PT_PUD);
1719}
1720
1721static void xen_release_pud(unsigned long pfn)
1722{
1723 xen_release_ptpage(pfn, PT_PUD);
1724}
1725#endif
1726
1727void __init xen_reserve_top(void)
1728{
1729#ifdef CONFIG_X86_32
1730 unsigned long top = HYPERVISOR_VIRT_START;
1731 struct xen_platform_parameters pp;
1732
1733 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1734 top = pp.virt_start;
1735
1736 reserve_top_address(-top);
1737#endif /* CONFIG_X86_32 */
1738}
1739
1740/*
1741 * Like __va(), but returns address in the kernel mapping (which is
1742 * all we have until the physical memory mapping has been set up.
1743 */
1744static void * __init __ka(phys_addr_t paddr)
1745{
1746#ifdef CONFIG_X86_64
1747 return (void *)(paddr + __START_KERNEL_map);
1748#else
1749 return __va(paddr);
1750#endif
1751}
1752
1753/* Convert a machine address to physical address */
1754static unsigned long __init m2p(phys_addr_t maddr)
1755{
1756 phys_addr_t paddr;
1757
6f0e8bf1 1758 maddr &= XEN_PTE_MFN_MASK;
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1759 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1760
1761 return paddr;
1762}
1763
1764/* Convert a machine address to kernel virtual */
1765static void * __init m2v(phys_addr_t maddr)
1766{
1767 return __ka(m2p(maddr));
1768}
1769
1770/* Set the page permissions on an identity-mapped pages */
1771static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1772 unsigned long flags)
1773{
1774 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1775 pte_t pte = pfn_pte(pfn, prot);
1776
1777 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1778 BUG();
1779}
1780static void __init set_page_prot(void *addr, pgprot_t prot)
1781{
1782 return set_page_prot_flags(addr, prot, UVMF_NONE);
1783}
1784#ifdef CONFIG_X86_32
1785static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1786{
1787 unsigned pmdidx, pteidx;
1788 unsigned ident_pte;
1789 unsigned long pfn;
1790
1791 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1792 PAGE_SIZE);
1793
1794 ident_pte = 0;
1795 pfn = 0;
1796 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1797 pte_t *pte_page;
1798
1799 /* Reuse or allocate a page of ptes */
1800 if (pmd_present(pmd[pmdidx]))
1801 pte_page = m2v(pmd[pmdidx].pmd);
1802 else {
1803 /* Check for free pte pages */
1804 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1805 break;
1806
1807 pte_page = &level1_ident_pgt[ident_pte];
1808 ident_pte += PTRS_PER_PTE;
1809
1810 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1811 }
1812
1813 /* Install mappings */
1814 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1815 pte_t pte;
1816
1817 if (pfn > max_pfn_mapped)
1818 max_pfn_mapped = pfn;
1819
1820 if (!pte_none(pte_page[pteidx]))
1821 continue;
1822
1823 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1824 pte_page[pteidx] = pte;
1825 }
1826 }
1827
1828 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1829 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1830
1831 set_page_prot(pmd, PAGE_KERNEL_RO);
1832}
1833#endif
1834void __init xen_setup_machphys_mapping(void)
1835{
1836 struct xen_machphys_mapping mapping;
1837
1838 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1839 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1840 machine_to_phys_nr = mapping.max_mfn + 1;
1841 } else {
1842 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1843 }
1844#ifdef CONFIG_X86_32
1845 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1846 < machine_to_phys_mapping);
1847#endif
1848}
1849
1850#ifdef CONFIG_X86_64
1851static void __init convert_pfn_mfn(void *v)
1852{
1853 pte_t *pte = v;
1854 int i;
1855
1856 /* All levels are converted the same way, so just treat them
1857 as ptes. */
1858 for (i = 0; i < PTRS_PER_PTE; i++)
1859 pte[i] = xen_make_pte(pte[i].pte);
1860}
1861static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1862 unsigned long addr)
1863{
1864 if (*pt_base == PFN_DOWN(__pa(addr))) {
1865 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1866 clear_page((void *)addr);
1867 (*pt_base)++;
1868 }
1869 if (*pt_end == PFN_DOWN(__pa(addr))) {
1870 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1871 clear_page((void *)addr);
1872 (*pt_end)--;
1873 }
1874}
1875/*
1876 * Set up the initial kernel pagetable.
1877 *
1878 * We can construct this by grafting the Xen provided pagetable into
1879 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1880 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1881 * kernel has a physical mapping to start with - but that's enough to
1882 * get __va working. We need to fill in the rest of the physical
1883 * mapping once some sort of allocator has been set up.
1884 */
1885void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1886{
1887 pud_t *l3;
1888 pmd_t *l2;
1889 unsigned long addr[3];
1890 unsigned long pt_base, pt_end;
1891 unsigned i;
1892
1893 /* max_pfn_mapped is the last pfn mapped in the initial memory
1894 * mappings. Considering that on Xen after the kernel mappings we
1895 * have the mappings of some pages that don't exist in pfn space, we
1896 * set max_pfn_mapped to the last real pfn mapped. */
1897 if (xen_start_info->mfn_list < __START_KERNEL_map)
1898 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1899 else
1900 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1901
1902 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1903 pt_end = pt_base + xen_start_info->nr_pt_frames;
1904
1905 /* Zap identity mapping */
65ade2f8 1906 init_top_pgt[0] = __pgd(0);
7e0563de 1907
989513a7 1908 /* Pre-constructed entries are in pfn, so convert to mfn */
d52888aa 1909 /* L4[273] -> level3_ident_pgt */
989513a7 1910 /* L4[511] -> level3_kernel_pgt */
65ade2f8 1911 convert_pfn_mfn(init_top_pgt);
7e0563de 1912
989513a7
JG
1913 /* L3_i[0] -> level2_ident_pgt */
1914 convert_pfn_mfn(level3_ident_pgt);
1915 /* L3_k[510] -> level2_kernel_pgt */
1916 /* L3_k[511] -> level2_fixmap_pgt */
1917 convert_pfn_mfn(level3_kernel_pgt);
1918
05ab1d8a 1919 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
989513a7 1920 convert_pfn_mfn(level2_fixmap_pgt);
7e0563de 1921
7e0563de
VK
1922 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1923 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1924 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1925
1926 addr[0] = (unsigned long)pgd;
1927 addr[1] = (unsigned long)l3;
1928 addr[2] = (unsigned long)l2;
d52888aa
KS
1929 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1930 * Both L4[273][0] and L4[511][510] have entries that point to the same
7e0563de
VK
1931 * L2 (PMD) tables. Meaning that if you modify it in __va space
1932 * it will be also modified in the __ka space! (But if you just
1933 * modify the PMD table to point to other PTE's or none, then you
1934 * are OK - which is what cleanup_highmap does) */
1935 copy_page(level2_ident_pgt, l2);
1936 /* Graft it onto L4[511][510] */
1937 copy_page(level2_kernel_pgt, l2);
1938
2cc42bac
JB
1939 /*
1940 * Zap execute permission from the ident map. Due to the sharing of
1941 * L1 entries we need to do this in the L2.
1942 */
1943 if (__supported_pte_mask & _PAGE_NX) {
1944 for (i = 0; i < PTRS_PER_PMD; ++i) {
1945 if (pmd_none(level2_ident_pgt[i]))
1946 continue;
1947 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1948 }
1949 }
1950
7e0563de
VK
1951 /* Copy the initial P->M table mappings if necessary. */
1952 i = pgd_index(xen_start_info->mfn_list);
1953 if (i && i < pgd_index(__START_KERNEL_map))
65ade2f8 1954 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
7e0563de 1955
989513a7 1956 /* Make pagetable pieces RO */
65ade2f8 1957 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
989513a7
JG
1958 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1959 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1960 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1961 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1962 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1963 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
05ab1d8a
FT
1964
1965 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1966 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1967 PAGE_KERNEL_RO);
1968 }
989513a7
JG
1969
1970 /* Pin down new L4 */
1971 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
65ade2f8 1972 PFN_DOWN(__pa_symbol(init_top_pgt)));
989513a7
JG
1973
1974 /* Unpin Xen-provided one */
1975 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
7e0563de 1976
989513a7
JG
1977 /*
1978 * At this stage there can be no user pgd, and no page structure to
1979 * attach it to, so make sure we just set kernel pgd.
1980 */
1981 xen_mc_batch();
65ade2f8 1982 __xen_write_cr3(true, __pa(init_top_pgt));
989513a7 1983 xen_mc_issue(PARAVIRT_LAZY_CPU);
7e0563de
VK
1984
1985 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1986 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1987 * the initial domain. For guests using the toolstack, they are in:
1988 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1989 * rip out the [L4] (pgd), but for guests we shave off three pages.
1990 */
1991 for (i = 0; i < ARRAY_SIZE(addr); i++)
1992 check_pt_base(&pt_base, &pt_end, addr[i]);
1993
1994 /* Our (by three pages) smaller Xen pagetable that we are using */
1995 xen_pt_base = PFN_PHYS(pt_base);
1996 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1997 memblock_reserve(xen_pt_base, xen_pt_size);
1998
1999 /* Revector the xen_start_info */
2000 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
2001}
2002
2003/*
2004 * Read a value from a physical address.
2005 */
2006static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
2007{
2008 unsigned long *vaddr;
2009 unsigned long val;
2010
2011 vaddr = early_memremap_ro(addr, sizeof(val));
2012 val = *vaddr;
2013 early_memunmap(vaddr, sizeof(val));
2014 return val;
2015}
2016
2017/*
2018 * Translate a virtual address to a physical one without relying on mapped
69861e0a
JG
2019 * page tables. Don't rely on big pages being aligned in (guest) physical
2020 * space!
7e0563de
VK
2021 */
2022static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
2023{
2024 phys_addr_t pa;
2025 pgd_t pgd;
2026 pud_t pud;
2027 pmd_t pmd;
2028 pte_t pte;
2029
6c690ee1 2030 pa = read_cr3_pa();
7e0563de
VK
2031 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
2032 sizeof(pgd)));
2033 if (!pgd_present(pgd))
2034 return 0;
2035
2036 pa = pgd_val(pgd) & PTE_PFN_MASK;
2037 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
2038 sizeof(pud)));
2039 if (!pud_present(pud))
2040 return 0;
69861e0a 2041 pa = pud_val(pud) & PTE_PFN_MASK;
7e0563de
VK
2042 if (pud_large(pud))
2043 return pa + (vaddr & ~PUD_MASK);
2044
2045 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
2046 sizeof(pmd)));
2047 if (!pmd_present(pmd))
2048 return 0;
69861e0a 2049 pa = pmd_val(pmd) & PTE_PFN_MASK;
7e0563de
VK
2050 if (pmd_large(pmd))
2051 return pa + (vaddr & ~PMD_MASK);
2052
2053 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
2054 sizeof(pte)));
2055 if (!pte_present(pte))
2056 return 0;
2057 pa = pte_pfn(pte) << PAGE_SHIFT;
2058
2059 return pa | (vaddr & ~PAGE_MASK);
2060}
2061
2062/*
2063 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
2064 * this area.
2065 */
2066void __init xen_relocate_p2m(void)
2067{
773dd2fc 2068 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
7e0563de 2069 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
773dd2fc 2070 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
7e0563de
VK
2071 pte_t *pt;
2072 pmd_t *pmd;
2073 pud_t *pud;
7e0563de
VK
2074 pgd_t *pgd;
2075 unsigned long *new_p2m;
7e0563de
VK
2076
2077 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
2078 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
2079 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
2080 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
2081 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
773dd2fc 2082 n_frames = n_pte + n_pt + n_pmd + n_pud;
7e0563de
VK
2083
2084 new_area = xen_find_free_area(PFN_PHYS(n_frames));
2085 if (!new_area) {
2086 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
2087 BUG();
2088 }
2089
2090 /*
2091 * Setup the page tables for addressing the new p2m list.
2092 * We have asked the hypervisor to map the p2m list at the user address
2093 * PUD_SIZE. It may have done so, or it may have used a kernel space
2094 * address depending on the Xen version.
2095 * To avoid any possible virtual address collision, just use
2096 * 2 * PUD_SIZE for the new area.
2097 */
773dd2fc 2098 pud_phys = new_area;
7e0563de
VK
2099 pmd_phys = pud_phys + PFN_PHYS(n_pud);
2100 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
2101 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
2102
6c690ee1 2103 pgd = __va(read_cr3_pa());
7e0563de 2104 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
773dd2fc
KS
2105 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2106 pud = early_memremap(pud_phys, PAGE_SIZE);
2107 clear_page(pud);
2108 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2109 idx_pmd++) {
2110 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2111 clear_page(pmd);
2112 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2113 idx_pt++) {
2114 pt = early_memremap(pt_phys, PAGE_SIZE);
2115 clear_page(pt);
2116 for (idx_pte = 0;
01bd2ac2
JG
2117 idx_pte < min(n_pte, PTRS_PER_PTE);
2118 idx_pte++) {
2119 pt[idx_pte] = pfn_pte(p2m_pfn,
2120 PAGE_KERNEL);
773dd2fc 2121 p2m_pfn++;
7e0563de 2122 }
773dd2fc
KS
2123 n_pte -= PTRS_PER_PTE;
2124 early_memunmap(pt, PAGE_SIZE);
2125 make_lowmem_page_readonly(__va(pt_phys));
2126 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2127 PFN_DOWN(pt_phys));
01bd2ac2 2128 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
773dd2fc 2129 pt_phys += PAGE_SIZE;
7e0563de 2130 }
773dd2fc
KS
2131 n_pt -= PTRS_PER_PMD;
2132 early_memunmap(pmd, PAGE_SIZE);
2133 make_lowmem_page_readonly(__va(pmd_phys));
2134 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2135 PFN_DOWN(pmd_phys));
01bd2ac2 2136 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
773dd2fc 2137 pmd_phys += PAGE_SIZE;
7e0563de 2138 }
773dd2fc
KS
2139 n_pmd -= PTRS_PER_PUD;
2140 early_memunmap(pud, PAGE_SIZE);
2141 make_lowmem_page_readonly(__va(pud_phys));
2142 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2143 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2144 pud_phys += PAGE_SIZE;
2145 }
7e0563de
VK
2146
2147 /* Now copy the old p2m info to the new area. */
2148 memcpy(new_p2m, xen_p2m_addr, size);
2149 xen_p2m_addr = new_p2m;
2150
2151 /* Release the old p2m list and set new list info. */
2152 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2153 BUG_ON(!p2m_pfn);
2154 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2155
2156 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2157 pfn = xen_start_info->first_p2m_pfn;
2158 pfn_end = xen_start_info->first_p2m_pfn +
2159 xen_start_info->nr_p2m_frames;
2160 set_pgd(pgd + 1, __pgd(0));
2161 } else {
2162 pfn = p2m_pfn;
2163 pfn_end = p2m_pfn_end;
2164 }
2165
2166 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2167 while (pfn < pfn_end) {
2168 if (pfn == p2m_pfn) {
2169 pfn = p2m_pfn_end;
2170 continue;
2171 }
2172 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2173 pfn++;
2174 }
2175
2176 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2177 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2178 xen_start_info->nr_p2m_frames = n_frames;
2179}
2180
2181#else /* !CONFIG_X86_64 */
2182static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
2183static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
75f2d3a0
JG
2184RESERVE_BRK(fixup_kernel_pmd, PAGE_SIZE);
2185RESERVE_BRK(fixup_kernel_pte, PAGE_SIZE);
7e0563de
VK
2186
2187static void __init xen_write_cr3_init(unsigned long cr3)
2188{
2189 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
2190
6c690ee1 2191 BUG_ON(read_cr3_pa() != __pa(initial_page_table));
7e0563de
VK
2192 BUG_ON(cr3 != __pa(swapper_pg_dir));
2193
2194 /*
2195 * We are switching to swapper_pg_dir for the first time (from
2196 * initial_page_table) and therefore need to mark that page
2197 * read-only and then pin it.
2198 *
2199 * Xen disallows sharing of kernel PMDs for PAE
2200 * guests. Therefore we must copy the kernel PMD from
2201 * initial_page_table into a new kernel PMD to be used in
2202 * swapper_pg_dir.
2203 */
2204 swapper_kernel_pmd =
2205 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2206 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
2207 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
2208 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
2209 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
2210
2211 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
2212 xen_write_cr3(cr3);
2213 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
2214
2215 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
2216 PFN_DOWN(__pa(initial_page_table)));
2217 set_page_prot(initial_page_table, PAGE_KERNEL);
2218 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
2219
5c83511b 2220 pv_ops.mmu.write_cr3 = &xen_write_cr3;
7e0563de
VK
2221}
2222
2223/*
2224 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
2225 * not the first page table in the page table pool.
2226 * Iterate through the initial page tables to find the real page table base.
2227 */
51ae2538 2228static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
7e0563de
VK
2229{
2230 phys_addr_t pt_base, paddr;
2231 unsigned pmdidx;
2232
2233 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
2234
2235 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
2236 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
2237 paddr = m2p(pmd[pmdidx].pmd);
2238 pt_base = min(pt_base, paddr);
2239 }
2240
2241 return pt_base;
2242}
2243
2244void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
2245{
2246 pmd_t *kernel_pmd;
2247
2248 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
2249
2250 xen_pt_base = xen_find_pt_base(kernel_pmd);
2251 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
2252
2253 initial_kernel_pmd =
2254 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2255
2256 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
2257
2258 copy_page(initial_kernel_pmd, kernel_pmd);
2259
2260 xen_map_identity_early(initial_kernel_pmd, max_pfn);
2261
2262 copy_page(initial_page_table, pgd);
2263 initial_page_table[KERNEL_PGD_BOUNDARY] =
2264 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
2265
2266 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
2267 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
2268 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
2269
2270 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
2271
2272 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
2273 PFN_DOWN(__pa(initial_page_table)));
2274 xen_write_cr3(__pa(initial_page_table));
2275
2276 memblock_reserve(xen_pt_base, xen_pt_size);
2277}
2278#endif /* CONFIG_X86_64 */
2279
2280void __init xen_reserve_special_pages(void)
2281{
2282 phys_addr_t paddr;
2283
2284 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2285 if (xen_start_info->store_mfn) {
2286 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2287 memblock_reserve(paddr, PAGE_SIZE);
2288 }
2289 if (!xen_initial_domain()) {
2290 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2291 memblock_reserve(paddr, PAGE_SIZE);
2292 }
2293}
2294
2295void __init xen_pt_check_e820(void)
2296{
2297 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
2298 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
2299 BUG();
2300 }
2301}
2302
2303static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2304
2305static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2306{
2307 pte_t pte;
2308
2309 phys >>= PAGE_SHIFT;
2310
2311 switch (idx) {
2312 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
7e0563de
VK
2313#ifdef CONFIG_X86_32
2314 case FIX_WP_TEST:
2315# ifdef CONFIG_HIGHMEM
2316 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
2317# endif
2318#elif defined(CONFIG_X86_VSYSCALL_EMULATION)
2319 case VSYSCALL_PAGE:
2320#endif
7e0563de
VK
2321 /* All local page mappings */
2322 pte = pfn_pte(phys, prot);
2323 break;
2324
2325#ifdef CONFIG_X86_LOCAL_APIC
2326 case FIX_APIC_BASE: /* maps dummy local APIC */
2327 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2328 break;
2329#endif
2330
2331#ifdef CONFIG_X86_IO_APIC
2332 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2333 /*
2334 * We just don't map the IO APIC - all access is via
2335 * hypercalls. Keep the address in the pte for reference.
2336 */
2337 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2338 break;
2339#endif
2340
2341 case FIX_PARAVIRT_BOOTMAP:
2342 /* This is an MFN, but it isn't an IO mapping from the
2343 IO domain */
2344 pte = mfn_pte(phys, prot);
2345 break;
2346
2347 default:
2348 /* By default, set_fixmap is used for hardware mappings */
2349 pte = mfn_pte(phys, prot);
2350 break;
2351 }
2352
2353 __native_set_fixmap(idx, pte);
2354
2355#ifdef CONFIG_X86_VSYSCALL_EMULATION
2356 /* Replicate changes to map the vsyscall page into the user
2357 pagetable vsyscall mapping. */
2358 if (idx == VSYSCALL_PAGE) {
2359 unsigned long vaddr = __fix_to_virt(idx);
2360 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2361 }
2362#endif
2363}
2364
2365static void __init xen_post_allocator_init(void)
2366{
5c83511b
JG
2367 pv_ops.mmu.set_pte = xen_set_pte;
2368 pv_ops.mmu.set_pmd = xen_set_pmd;
2369 pv_ops.mmu.set_pud = xen_set_pud;
773dd2fc 2370#ifdef CONFIG_X86_64
5c83511b 2371 pv_ops.mmu.set_p4d = xen_set_p4d;
7e0563de
VK
2372#endif
2373
2374 /* This will work as long as patching hasn't happened yet
2375 (which it hasn't) */
5c83511b
JG
2376 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2377 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2378 pv_ops.mmu.release_pte = xen_release_pte;
2379 pv_ops.mmu.release_pmd = xen_release_pmd;
773dd2fc 2380#ifdef CONFIG_X86_64
5c83511b
JG
2381 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2382 pv_ops.mmu.release_pud = xen_release_pud;
7e0563de 2383#endif
5c83511b 2384 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
7e0563de
VK
2385
2386#ifdef CONFIG_X86_64
5c83511b 2387 pv_ops.mmu.write_cr3 = &xen_write_cr3;
7e0563de 2388#endif
7e0563de
VK
2389}
2390
2391static void xen_leave_lazy_mmu(void)
2392{
2393 preempt_disable();
2394 xen_mc_flush();
2395 paravirt_leave_lazy_mmu();
2396 preempt_enable();
2397}
2398
2399static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2400 .read_cr2 = xen_read_cr2,
2401 .write_cr2 = xen_write_cr2,
2402
2403 .read_cr3 = xen_read_cr3,
2404 .write_cr3 = xen_write_cr3_init,
2405
2406 .flush_tlb_user = xen_flush_tlb,
2407 .flush_tlb_kernel = xen_flush_tlb,
1299ef1d 2408 .flush_tlb_one_user = xen_flush_tlb_one_user,
7e0563de 2409 .flush_tlb_others = xen_flush_tlb_others,
48a8b97c 2410 .tlb_remove_table = tlb_remove_table,
7e0563de 2411
7e0563de
VK
2412 .pgd_alloc = xen_pgd_alloc,
2413 .pgd_free = xen_pgd_free,
2414
2415 .alloc_pte = xen_alloc_pte_init,
2416 .release_pte = xen_release_pte_init,
2417 .alloc_pmd = xen_alloc_pmd_init,
2418 .release_pmd = xen_release_pmd_init,
2419
2420 .set_pte = xen_set_pte_init,
2421 .set_pte_at = xen_set_pte_at,
2422 .set_pmd = xen_set_pmd_hyper,
2423
2424 .ptep_modify_prot_start = __ptep_modify_prot_start,
2425 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2426
2427 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2428 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2429
2430 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2431 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2432
2433#ifdef CONFIG_X86_PAE
2434 .set_pte_atomic = xen_set_pte_atomic,
2435 .pte_clear = xen_pte_clear,
2436 .pmd_clear = xen_pmd_clear,
2437#endif /* CONFIG_X86_PAE */
2438 .set_pud = xen_set_pud_hyper,
2439
2440 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2441 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2442
773dd2fc 2443#ifdef CONFIG_X86_64
7e0563de
VK
2444 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2445 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2446 .set_p4d = xen_set_p4d_hyper,
2447
2448 .alloc_pud = xen_alloc_pmd_init,
2449 .release_pud = xen_release_pmd_init,
b9952ec7
KS
2450
2451#if CONFIG_PGTABLE_LEVELS >= 5
2452 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2453 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2454#endif
773dd2fc 2455#endif /* CONFIG_X86_64 */
7e0563de
VK
2456
2457 .activate_mm = xen_activate_mm,
2458 .dup_mmap = xen_dup_mmap,
2459 .exit_mmap = xen_exit_mmap,
2460
2461 .lazy_mode = {
2462 .enter = paravirt_enter_lazy_mmu,
2463 .leave = xen_leave_lazy_mmu,
2464 .flush = paravirt_flush_lazy_mmu,
2465 },
2466
2467 .set_fixmap = xen_set_fixmap,
2468};
2469
2470void __init xen_init_mmu_ops(void)
2471{
2472 x86_init.paging.pagetable_init = xen_pagetable_init;
6f84f8d1 2473 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
7e0563de 2474
5c83511b 2475 pv_ops.mmu = xen_mmu_ops;
7e0563de
VK
2476
2477 memset(dummy_mapping, 0xff, PAGE_SIZE);
2478}
2479
2480/* Protected by xen_reservation_lock. */
2481#define MAX_CONTIG_ORDER 9 /* 2MB */
2482static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2483
2484#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2485static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2486 unsigned long *in_frames,
2487 unsigned long *out_frames)
2488{
2489 int i;
2490 struct multicall_space mcs;
2491
2492 xen_mc_batch();
2493 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2494 mcs = __xen_mc_entry(0);
2495
2496 if (in_frames)
2497 in_frames[i] = virt_to_mfn(vaddr);
2498
2499 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2500 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2501
2502 if (out_frames)
2503 out_frames[i] = virt_to_pfn(vaddr);
2504 }
2505 xen_mc_issue(0);
2506}
2507
2508/*
2509 * Update the pfn-to-mfn mappings for a virtual address range, either to
2510 * point to an array of mfns, or contiguously from a single starting
2511 * mfn.
2512 */
2513static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2514 unsigned long *mfns,
2515 unsigned long first_mfn)
2516{
2517 unsigned i, limit;
2518 unsigned long mfn;
2519
2520 xen_mc_batch();
2521
2522 limit = 1u << order;
2523 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2524 struct multicall_space mcs;
2525 unsigned flags;
2526
2527 mcs = __xen_mc_entry(0);
2528 if (mfns)
2529 mfn = mfns[i];
2530 else
2531 mfn = first_mfn + i;
2532
2533 if (i < (limit - 1))
2534 flags = 0;
2535 else {
2536 if (order == 0)
2537 flags = UVMF_INVLPG | UVMF_ALL;
2538 else
2539 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2540 }
2541
2542 MULTI_update_va_mapping(mcs.mc, vaddr,
2543 mfn_pte(mfn, PAGE_KERNEL), flags);
2544
2545 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2546 }
2547
2548 xen_mc_issue(0);
2549}
2550
2551/*
2552 * Perform the hypercall to exchange a region of our pfns to point to
2553 * memory with the required contiguous alignment. Takes the pfns as
2554 * input, and populates mfns as output.
2555 *
2556 * Returns a success code indicating whether the hypervisor was able to
2557 * satisfy the request or not.
2558 */
2559static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2560 unsigned long *pfns_in,
2561 unsigned long extents_out,
2562 unsigned int order_out,
2563 unsigned long *mfns_out,
2564 unsigned int address_bits)
2565{
2566 long rc;
2567 int success;
2568
2569 struct xen_memory_exchange exchange = {
2570 .in = {
2571 .nr_extents = extents_in,
2572 .extent_order = order_in,
2573 .extent_start = pfns_in,
2574 .domid = DOMID_SELF
2575 },
2576 .out = {
2577 .nr_extents = extents_out,
2578 .extent_order = order_out,
2579 .extent_start = mfns_out,
2580 .address_bits = address_bits,
2581 .domid = DOMID_SELF
2582 }
2583 };
2584
2585 BUG_ON(extents_in << order_in != extents_out << order_out);
2586
2587 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2588 success = (exchange.nr_exchanged == extents_in);
2589
2590 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2591 BUG_ON(success && (rc != 0));
2592
2593 return success;
2594}
2595
2596int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2597 unsigned int address_bits,
2598 dma_addr_t *dma_handle)
2599{
2600 unsigned long *in_frames = discontig_frames, out_frame;
2601 unsigned long flags;
2602 int success;
2603 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2604
2605 /*
2606 * Currently an auto-translated guest will not perform I/O, nor will
2607 * it require PAE page directories below 4GB. Therefore any calls to
2608 * this function are redundant and can be ignored.
2609 */
2610
7e0563de
VK
2611 if (unlikely(order > MAX_CONTIG_ORDER))
2612 return -ENOMEM;
2613
2614 memset((void *) vstart, 0, PAGE_SIZE << order);
2615
2616 spin_lock_irqsave(&xen_reservation_lock, flags);
2617
2618 /* 1. Zap current PTEs, remembering MFNs. */
2619 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2620
2621 /* 2. Get a new contiguous memory extent. */
2622 out_frame = virt_to_pfn(vstart);
2623 success = xen_exchange_memory(1UL << order, 0, in_frames,
2624 1, order, &out_frame,
2625 address_bits);
2626
2627 /* 3. Map the new extent in place of old pages. */
2628 if (success)
2629 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2630 else
2631 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2632
2633 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2634
2635 *dma_handle = virt_to_machine(vstart).maddr;
2636 return success ? 0 : -ENOMEM;
2637}
2638EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2639
2640void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2641{
2642 unsigned long *out_frames = discontig_frames, in_frame;
2643 unsigned long flags;
2644 int success;
2645 unsigned long vstart;
2646
7e0563de
VK
2647 if (unlikely(order > MAX_CONTIG_ORDER))
2648 return;
2649
2650 vstart = (unsigned long)phys_to_virt(pstart);
2651 memset((void *) vstart, 0, PAGE_SIZE << order);
2652
2653 spin_lock_irqsave(&xen_reservation_lock, flags);
2654
2655 /* 1. Find start MFN of contiguous extent. */
2656 in_frame = virt_to_mfn(vstart);
2657
2658 /* 2. Zap current PTEs. */
2659 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2660
2661 /* 3. Do the exchange for non-contiguous MFNs. */
2662 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2663 0, out_frames, 0);
2664
2665 /* 4. Map new pages in place of old pages. */
2666 if (success)
2667 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2668 else
2669 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2670
2671 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2672}
2673EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
29985b09 2674
f030aade
JG
2675static noinline void xen_flush_tlb_all(void)
2676{
2677 struct mmuext_op *op;
2678 struct multicall_space mcs;
2679
2680 preempt_disable();
2681
2682 mcs = xen_mc_entry(sizeof(*op));
2683
2684 op = mcs.args;
2685 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2686 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2687
2688 xen_mc_issue(PARAVIRT_LAZY_MMU);
2689
2690 preempt_enable();
2691}
2692
2693#define REMAP_BATCH_SIZE 16
2694
2695struct remap_data {
2696 xen_pfn_t *pfn;
2697 bool contiguous;
2698 bool no_translate;
2699 pgprot_t prot;
2700 struct mmu_update *mmu_update;
2701};
2702
8b1e0f81 2703static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data)
f030aade
JG
2704{
2705 struct remap_data *rmd = data;
2706 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2707
2708 /*
2709 * If we have a contiguous range, just update the pfn itself,
2710 * else update pointer to be "next pfn".
2711 */
2712 if (rmd->contiguous)
2713 (*rmd->pfn)++;
2714 else
2715 rmd->pfn++;
2716
2717 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2718 rmd->mmu_update->ptr |= rmd->no_translate ?
2719 MMU_PT_UPDATE_NO_TRANSLATE :
2720 MMU_NORMAL_PT_UPDATE;
2721 rmd->mmu_update->val = pte_val_ma(pte);
2722 rmd->mmu_update++;
2723
2724 return 0;
2725}
2726
2727int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2728 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2729 unsigned int domid, bool no_translate, struct page **pages)
2730{
2731 int err = 0;
2732 struct remap_data rmd;
2733 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2734 unsigned long range;
2735 int mapped = 0;
2736
2737 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2738
2739 rmd.pfn = pfn;
2740 rmd.prot = prot;
2741 /*
2742 * We use the err_ptr to indicate if there we are doing a contiguous
2743 * mapping or a discontigious mapping.
2744 */
2745 rmd.contiguous = !err_ptr;
2746 rmd.no_translate = no_translate;
2747
2748 while (nr) {
2749 int index = 0;
2750 int done = 0;
2751 int batch = min(REMAP_BATCH_SIZE, nr);
2752 int batch_left = batch;
2753
2754 range = (unsigned long)batch << PAGE_SHIFT;
2755
2756 rmd.mmu_update = mmu_update;
2757 err = apply_to_page_range(vma->vm_mm, addr, range,
2758 remap_area_pfn_pte_fn, &rmd);
2759 if (err)
2760 goto out;
2761
2762 /*
2763 * We record the error for each page that gives an error, but
2764 * continue mapping until the whole set is done
2765 */
2766 do {
2767 int i;
2768
2769 err = HYPERVISOR_mmu_update(&mmu_update[index],
2770 batch_left, &done, domid);
2771
2772 /*
2773 * @err_ptr may be the same buffer as @gfn, so
2774 * only clear it after each chunk of @gfn is
2775 * used.
2776 */
2777 if (err_ptr) {
2778 for (i = index; i < index + done; i++)
2779 err_ptr[i] = 0;
2780 }
2781 if (err < 0) {
2782 if (!err_ptr)
2783 goto out;
2784 err_ptr[i] = err;
2785 done++; /* Skip failed frame. */
2786 } else
2787 mapped += done;
2788 batch_left -= done;
2789 index += done;
2790 } while (batch_left);
2791
2792 nr -= batch;
2793 addr += range;
2794 if (err_ptr)
2795 err_ptr += batch;
2796 cond_resched();
2797 }
2798out:
2799
2800 xen_flush_tlb_all();
2801
2802 return err < 0 ? err : mapped;
2803}
2804EXPORT_SYMBOL_GPL(xen_remap_pfn);
2805
29985b09
JG
2806#ifdef CONFIG_KEXEC_CORE
2807phys_addr_t paddr_vmcoreinfo_note(void)
2808{
2809 if (xen_pv_domain())
203e9e41 2810 return virt_to_machine(vmcoreinfo_note).maddr;
29985b09 2811 else
203e9e41 2812 return __pa(vmcoreinfo_note);
29985b09
JG
2813}
2814#endif /* CONFIG_KEXEC_CORE */