Commit | Line | Data |
---|---|---|
3b827c1b JF |
1 | /* |
2 | * Xen mmu operations | |
3 | * | |
4 | * This file contains the various mmu fetch and update operations. | |
5 | * The most important job they must perform is the mapping between the | |
6 | * domain's pfn and the overall machine mfns. | |
7 | * | |
8 | * Xen allows guests to directly update the pagetable, in a controlled | |
9 | * fashion. In other words, the guest modifies the same pagetable | |
10 | * that the CPU actually uses, which eliminates the overhead of having | |
11 | * a separate shadow pagetable. | |
12 | * | |
13 | * In order to allow this, it falls on the guest domain to map its | |
14 | * notion of a "physical" pfn - which is just a domain-local linear | |
15 | * address - into a real "machine address" which the CPU's MMU can | |
16 | * use. | |
17 | * | |
18 | * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be | |
19 | * inserted directly into the pagetable. When creating a new | |
20 | * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, | |
21 | * when reading the content back with __(pgd|pmd|pte)_val, it converts | |
22 | * the mfn back into a pfn. | |
23 | * | |
24 | * The other constraint is that all pages which make up a pagetable | |
25 | * must be mapped read-only in the guest. This prevents uncontrolled | |
26 | * guest updates to the pagetable. Xen strictly enforces this, and | |
27 | * will disallow any pagetable update which will end up mapping a | |
28 | * pagetable page RW, and will disallow using any writable page as a | |
29 | * pagetable. | |
30 | * | |
31 | * Naively, when loading %cr3 with the base of a new pagetable, Xen | |
32 | * would need to validate the whole pagetable before going on. | |
33 | * Naturally, this is quite slow. The solution is to "pin" a | |
34 | * pagetable, which enforces all the constraints on the pagetable even | |
35 | * when it is not actively in use. This menas that Xen can be assured | |
36 | * that it is still valid when you do load it into %cr3, and doesn't | |
37 | * need to revalidate it. | |
38 | * | |
39 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
40 | */ | |
f120f13e | 41 | #include <linux/sched.h> |
f4f97b3e | 42 | #include <linux/highmem.h> |
994025ca | 43 | #include <linux/debugfs.h> |
3b827c1b | 44 | #include <linux/bug.h> |
d2cb2145 | 45 | #include <linux/vmalloc.h> |
44408ad7 | 46 | #include <linux/module.h> |
5a0e3ad6 | 47 | #include <linux/gfp.h> |
a9ce6bc1 | 48 | #include <linux/memblock.h> |
2222e71b | 49 | #include <linux/seq_file.h> |
3b827c1b JF |
50 | |
51 | #include <asm/pgtable.h> | |
52 | #include <asm/tlbflush.h> | |
5deb30d1 | 53 | #include <asm/fixmap.h> |
3b827c1b | 54 | #include <asm/mmu_context.h> |
319f3ba5 | 55 | #include <asm/setup.h> |
f4f97b3e | 56 | #include <asm/paravirt.h> |
7347b408 | 57 | #include <asm/e820.h> |
cbcd79c2 | 58 | #include <asm/linkage.h> |
08bbc9da | 59 | #include <asm/page.h> |
fef5ba79 | 60 | #include <asm/init.h> |
41f2e477 | 61 | #include <asm/pat.h> |
3b827c1b JF |
62 | |
63 | #include <asm/xen/hypercall.h> | |
f4f97b3e | 64 | #include <asm/xen/hypervisor.h> |
3b827c1b | 65 | |
c0011dbf | 66 | #include <xen/xen.h> |
3b827c1b JF |
67 | #include <xen/page.h> |
68 | #include <xen/interface/xen.h> | |
59151001 | 69 | #include <xen/interface/hvm/hvm_op.h> |
319f3ba5 | 70 | #include <xen/interface/version.h> |
c0011dbf | 71 | #include <xen/interface/memory.h> |
319f3ba5 | 72 | #include <xen/hvc-console.h> |
3b827c1b | 73 | |
f4f97b3e | 74 | #include "multicalls.h" |
3b827c1b | 75 | #include "mmu.h" |
994025ca JF |
76 | #include "debugfs.h" |
77 | ||
78 | #define MMU_UPDATE_HISTO 30 | |
79 | ||
19001c8c AN |
80 | /* |
81 | * Protects atomic reservation decrease/increase against concurrent increases. | |
82 | * Also protects non-atomic updates of current_pages and driver_pages, and | |
83 | * balloon lists. | |
84 | */ | |
85 | DEFINE_SPINLOCK(xen_reservation_lock); | |
86 | ||
994025ca JF |
87 | #ifdef CONFIG_XEN_DEBUG_FS |
88 | ||
89 | static struct { | |
90 | u32 pgd_update; | |
91 | u32 pgd_update_pinned; | |
92 | u32 pgd_update_batched; | |
93 | ||
94 | u32 pud_update; | |
95 | u32 pud_update_pinned; | |
96 | u32 pud_update_batched; | |
97 | ||
98 | u32 pmd_update; | |
99 | u32 pmd_update_pinned; | |
100 | u32 pmd_update_batched; | |
101 | ||
102 | u32 pte_update; | |
103 | u32 pte_update_pinned; | |
104 | u32 pte_update_batched; | |
105 | ||
106 | u32 mmu_update; | |
107 | u32 mmu_update_extended; | |
108 | u32 mmu_update_histo[MMU_UPDATE_HISTO]; | |
109 | ||
110 | u32 prot_commit; | |
111 | u32 prot_commit_batched; | |
112 | ||
113 | u32 set_pte_at; | |
114 | u32 set_pte_at_batched; | |
115 | u32 set_pte_at_pinned; | |
116 | u32 set_pte_at_current; | |
117 | u32 set_pte_at_kernel; | |
118 | } mmu_stats; | |
119 | ||
120 | static u8 zero_stats; | |
121 | ||
122 | static inline void check_zero(void) | |
123 | { | |
124 | if (unlikely(zero_stats)) { | |
125 | memset(&mmu_stats, 0, sizeof(mmu_stats)); | |
126 | zero_stats = 0; | |
127 | } | |
128 | } | |
129 | ||
130 | #define ADD_STATS(elem, val) \ | |
131 | do { check_zero(); mmu_stats.elem += (val); } while(0) | |
132 | ||
133 | #else /* !CONFIG_XEN_DEBUG_FS */ | |
134 | ||
135 | #define ADD_STATS(elem, val) do { (void)(val); } while(0) | |
136 | ||
137 | #endif /* CONFIG_XEN_DEBUG_FS */ | |
3b827c1b | 138 | |
319f3ba5 JF |
139 | |
140 | /* | |
141 | * Identity map, in addition to plain kernel map. This needs to be | |
142 | * large enough to allocate page table pages to allocate the rest. | |
143 | * Each page can map 2MB. | |
144 | */ | |
764f0138 JF |
145 | #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4) |
146 | static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES); | |
319f3ba5 JF |
147 | |
148 | #ifdef CONFIG_X86_64 | |
149 | /* l3 pud for userspace vsyscall mapping */ | |
150 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | |
151 | #endif /* CONFIG_X86_64 */ | |
152 | ||
153 | /* | |
154 | * Note about cr3 (pagetable base) values: | |
155 | * | |
156 | * xen_cr3 contains the current logical cr3 value; it contains the | |
157 | * last set cr3. This may not be the current effective cr3, because | |
158 | * its update may be being lazily deferred. However, a vcpu looking | |
159 | * at its own cr3 can use this value knowing that it everything will | |
160 | * be self-consistent. | |
161 | * | |
162 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
163 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
164 | * out of date, but it will never be set early). If one vcpu is | |
165 | * looking at another vcpu's cr3 value, it should use this variable. | |
166 | */ | |
167 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
168 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
169 | ||
170 | ||
d6182fbf JF |
171 | /* |
172 | * Just beyond the highest usermode address. STACK_TOP_MAX has a | |
173 | * redzone above it, so round it up to a PGD boundary. | |
174 | */ | |
175 | #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) | |
176 | ||
9976b39b JF |
177 | unsigned long arbitrary_virt_to_mfn(void *vaddr) |
178 | { | |
179 | xmaddr_t maddr = arbitrary_virt_to_machine(vaddr); | |
180 | ||
181 | return PFN_DOWN(maddr.maddr); | |
182 | } | |
183 | ||
ce803e70 | 184 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) |
3b827c1b | 185 | { |
ce803e70 | 186 | unsigned long address = (unsigned long)vaddr; |
da7bfc50 | 187 | unsigned int level; |
9f32d21c CL |
188 | pte_t *pte; |
189 | unsigned offset; | |
3b827c1b | 190 | |
9f32d21c CL |
191 | /* |
192 | * if the PFN is in the linear mapped vaddr range, we can just use | |
193 | * the (quick) virt_to_machine() p2m lookup | |
194 | */ | |
195 | if (virt_addr_valid(vaddr)) | |
196 | return virt_to_machine(vaddr); | |
197 | ||
198 | /* otherwise we have to do a (slower) full page-table walk */ | |
3b827c1b | 199 | |
9f32d21c CL |
200 | pte = lookup_address(address, &level); |
201 | BUG_ON(pte == NULL); | |
202 | offset = address & ~PAGE_MASK; | |
ebd879e3 | 203 | return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); |
3b827c1b | 204 | } |
de23be5f | 205 | EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine); |
3b827c1b JF |
206 | |
207 | void make_lowmem_page_readonly(void *vaddr) | |
208 | { | |
209 | pte_t *pte, ptev; | |
210 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 211 | unsigned int level; |
3b827c1b | 212 | |
f0646e43 | 213 | pte = lookup_address(address, &level); |
fef5ba79 JF |
214 | if (pte == NULL) |
215 | return; /* vaddr missing */ | |
3b827c1b JF |
216 | |
217 | ptev = pte_wrprotect(*pte); | |
218 | ||
219 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
220 | BUG(); | |
221 | } | |
222 | ||
223 | void make_lowmem_page_readwrite(void *vaddr) | |
224 | { | |
225 | pte_t *pte, ptev; | |
226 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 227 | unsigned int level; |
3b827c1b | 228 | |
f0646e43 | 229 | pte = lookup_address(address, &level); |
fef5ba79 JF |
230 | if (pte == NULL) |
231 | return; /* vaddr missing */ | |
3b827c1b JF |
232 | |
233 | ptev = pte_mkwrite(*pte); | |
234 | ||
235 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
236 | BUG(); | |
237 | } | |
238 | ||
239 | ||
7708ad64 | 240 | static bool xen_page_pinned(void *ptr) |
e2426cf8 JF |
241 | { |
242 | struct page *page = virt_to_page(ptr); | |
243 | ||
244 | return PagePinned(page); | |
245 | } | |
246 | ||
c0011dbf JF |
247 | static bool xen_iomap_pte(pte_t pte) |
248 | { | |
7347b408 | 249 | return pte_flags(pte) & _PAGE_IOMAP; |
c0011dbf JF |
250 | } |
251 | ||
eba3ff8b | 252 | void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) |
c0011dbf JF |
253 | { |
254 | struct multicall_space mcs; | |
255 | struct mmu_update *u; | |
256 | ||
257 | mcs = xen_mc_entry(sizeof(*u)); | |
258 | u = mcs.args; | |
259 | ||
260 | /* ptep might be kmapped when using 32-bit HIGHPTE */ | |
261 | u->ptr = arbitrary_virt_to_machine(ptep).maddr; | |
262 | u->val = pte_val_ma(pteval); | |
263 | ||
eba3ff8b | 264 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid); |
c0011dbf JF |
265 | |
266 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
267 | } | |
eba3ff8b JF |
268 | EXPORT_SYMBOL_GPL(xen_set_domain_pte); |
269 | ||
270 | static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval) | |
271 | { | |
272 | xen_set_domain_pte(ptep, pteval, DOMID_IO); | |
273 | } | |
c0011dbf | 274 | |
7708ad64 | 275 | static void xen_extend_mmu_update(const struct mmu_update *update) |
3b827c1b | 276 | { |
d66bf8fc JF |
277 | struct multicall_space mcs; |
278 | struct mmu_update *u; | |
3b827c1b | 279 | |
400d3494 JF |
280 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); |
281 | ||
994025ca JF |
282 | if (mcs.mc != NULL) { |
283 | ADD_STATS(mmu_update_extended, 1); | |
284 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1); | |
285 | ||
400d3494 | 286 | mcs.mc->args[1]++; |
994025ca JF |
287 | |
288 | if (mcs.mc->args[1] < MMU_UPDATE_HISTO) | |
289 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1); | |
290 | else | |
291 | ADD_STATS(mmu_update_histo[0], 1); | |
292 | } else { | |
293 | ADD_STATS(mmu_update, 1); | |
400d3494 JF |
294 | mcs = __xen_mc_entry(sizeof(*u)); |
295 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); | |
994025ca | 296 | ADD_STATS(mmu_update_histo[1], 1); |
400d3494 | 297 | } |
d66bf8fc | 298 | |
d66bf8fc | 299 | u = mcs.args; |
400d3494 JF |
300 | *u = *update; |
301 | } | |
302 | ||
303 | void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) | |
304 | { | |
305 | struct mmu_update u; | |
306 | ||
307 | preempt_disable(); | |
308 | ||
309 | xen_mc_batch(); | |
310 | ||
ce803e70 JF |
311 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
312 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 313 | u.val = pmd_val_ma(val); |
7708ad64 | 314 | xen_extend_mmu_update(&u); |
d66bf8fc | 315 | |
994025ca JF |
316 | ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
317 | ||
d66bf8fc JF |
318 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
319 | ||
320 | preempt_enable(); | |
3b827c1b JF |
321 | } |
322 | ||
e2426cf8 JF |
323 | void xen_set_pmd(pmd_t *ptr, pmd_t val) |
324 | { | |
994025ca JF |
325 | ADD_STATS(pmd_update, 1); |
326 | ||
e2426cf8 JF |
327 | /* If page is not pinned, we can just update the entry |
328 | directly */ | |
7708ad64 | 329 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
330 | *ptr = val; |
331 | return; | |
332 | } | |
333 | ||
994025ca JF |
334 | ADD_STATS(pmd_update_pinned, 1); |
335 | ||
e2426cf8 JF |
336 | xen_set_pmd_hyper(ptr, val); |
337 | } | |
338 | ||
3b827c1b JF |
339 | /* |
340 | * Associate a virtual page frame with a given physical page frame | |
341 | * and protection flags for that frame. | |
342 | */ | |
343 | void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |
344 | { | |
836fe2f2 | 345 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); |
3b827c1b JF |
346 | } |
347 | ||
348 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | |
349 | pte_t *ptep, pte_t pteval) | |
350 | { | |
c0011dbf JF |
351 | if (xen_iomap_pte(pteval)) { |
352 | xen_set_iomap_pte(ptep, pteval); | |
353 | goto out; | |
354 | } | |
355 | ||
994025ca JF |
356 | ADD_STATS(set_pte_at, 1); |
357 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); | |
358 | ADD_STATS(set_pte_at_current, mm == current->mm); | |
359 | ADD_STATS(set_pte_at_kernel, mm == &init_mm); | |
360 | ||
d66bf8fc | 361 | if (mm == current->mm || mm == &init_mm) { |
8965c1c0 | 362 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { |
d66bf8fc JF |
363 | struct multicall_space mcs; |
364 | mcs = xen_mc_entry(0); | |
365 | ||
366 | MULTI_update_va_mapping(mcs.mc, addr, pteval, 0); | |
994025ca | 367 | ADD_STATS(set_pte_at_batched, 1); |
d66bf8fc | 368 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
2bd50036 | 369 | goto out; |
d66bf8fc JF |
370 | } else |
371 | if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0) | |
2bd50036 | 372 | goto out; |
d66bf8fc JF |
373 | } |
374 | xen_set_pte(ptep, pteval); | |
2bd50036 | 375 | |
2829b449 | 376 | out: return; |
3b827c1b JF |
377 | } |
378 | ||
f63c2f24 T |
379 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, |
380 | unsigned long addr, pte_t *ptep) | |
947a69c9 | 381 | { |
e57778a1 JF |
382 | /* Just return the pte as-is. We preserve the bits on commit */ |
383 | return *ptep; | |
384 | } | |
385 | ||
386 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |
387 | pte_t *ptep, pte_t pte) | |
388 | { | |
400d3494 | 389 | struct mmu_update u; |
e57778a1 | 390 | |
400d3494 | 391 | xen_mc_batch(); |
947a69c9 | 392 | |
9f32d21c | 393 | u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; |
400d3494 | 394 | u.val = pte_val_ma(pte); |
7708ad64 | 395 | xen_extend_mmu_update(&u); |
947a69c9 | 396 | |
994025ca JF |
397 | ADD_STATS(prot_commit, 1); |
398 | ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
399 | ||
e57778a1 | 400 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
947a69c9 JF |
401 | } |
402 | ||
ebb9cfe2 JF |
403 | /* Assume pteval_t is equivalent to all the other *val_t types. */ |
404 | static pteval_t pte_mfn_to_pfn(pteval_t val) | |
947a69c9 | 405 | { |
ebb9cfe2 | 406 | if (val & _PAGE_PRESENT) { |
59438c9f | 407 | unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 408 | pteval_t flags = val & PTE_FLAGS_MASK; |
d8355aca | 409 | val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; |
ebb9cfe2 | 410 | } |
947a69c9 | 411 | |
ebb9cfe2 | 412 | return val; |
947a69c9 JF |
413 | } |
414 | ||
ebb9cfe2 | 415 | static pteval_t pte_pfn_to_mfn(pteval_t val) |
947a69c9 | 416 | { |
ebb9cfe2 | 417 | if (val & _PAGE_PRESENT) { |
59438c9f | 418 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 419 | pteval_t flags = val & PTE_FLAGS_MASK; |
fb38923e | 420 | unsigned long mfn; |
cfd8951e | 421 | |
fb38923e KRW |
422 | if (!xen_feature(XENFEAT_auto_translated_physmap)) |
423 | mfn = get_phys_to_machine(pfn); | |
424 | else | |
425 | mfn = pfn; | |
cfd8951e JF |
426 | /* |
427 | * If there's no mfn for the pfn, then just create an | |
428 | * empty non-present pte. Unfortunately this loses | |
429 | * information about the original pfn, so | |
430 | * pte_mfn_to_pfn is asymmetric. | |
431 | */ | |
432 | if (unlikely(mfn == INVALID_P2M_ENTRY)) { | |
433 | mfn = 0; | |
434 | flags = 0; | |
fb38923e KRW |
435 | } else { |
436 | /* | |
437 | * Paramount to do this test _after_ the | |
438 | * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY & | |
439 | * IDENTITY_FRAME_BIT resolves to true. | |
440 | */ | |
441 | mfn &= ~FOREIGN_FRAME_BIT; | |
442 | if (mfn & IDENTITY_FRAME_BIT) { | |
443 | mfn &= ~IDENTITY_FRAME_BIT; | |
444 | flags |= _PAGE_IOMAP; | |
445 | } | |
cfd8951e | 446 | } |
cfd8951e | 447 | val = ((pteval_t)mfn << PAGE_SHIFT) | flags; |
947a69c9 JF |
448 | } |
449 | ||
ebb9cfe2 | 450 | return val; |
947a69c9 JF |
451 | } |
452 | ||
c0011dbf JF |
453 | static pteval_t iomap_pte(pteval_t val) |
454 | { | |
455 | if (val & _PAGE_PRESENT) { | |
456 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; | |
457 | pteval_t flags = val & PTE_FLAGS_MASK; | |
458 | ||
459 | /* We assume the pte frame number is a MFN, so | |
460 | just use it as-is. */ | |
461 | val = ((pteval_t)pfn << PAGE_SHIFT) | flags; | |
462 | } | |
463 | ||
464 | return val; | |
465 | } | |
466 | ||
ebb9cfe2 | 467 | pteval_t xen_pte_val(pte_t pte) |
947a69c9 | 468 | { |
41f2e477 | 469 | pteval_t pteval = pte.pte; |
c0011dbf | 470 | |
41f2e477 JF |
471 | /* If this is a WC pte, convert back from Xen WC to Linux WC */ |
472 | if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) { | |
473 | WARN_ON(!pat_enabled); | |
474 | pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT; | |
475 | } | |
c0011dbf | 476 | |
41f2e477 JF |
477 | if (xen_initial_domain() && (pteval & _PAGE_IOMAP)) |
478 | return pteval; | |
479 | ||
480 | return pte_mfn_to_pfn(pteval); | |
947a69c9 | 481 | } |
da5de7c2 | 482 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); |
947a69c9 | 483 | |
947a69c9 JF |
484 | pgdval_t xen_pgd_val(pgd_t pgd) |
485 | { | |
ebb9cfe2 | 486 | return pte_mfn_to_pfn(pgd.pgd); |
947a69c9 | 487 | } |
da5de7c2 | 488 | PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); |
947a69c9 | 489 | |
41f2e477 JF |
490 | /* |
491 | * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7 | |
492 | * are reserved for now, to correspond to the Intel-reserved PAT | |
493 | * types. | |
494 | * | |
495 | * We expect Linux's PAT set as follows: | |
496 | * | |
497 | * Idx PTE flags Linux Xen Default | |
498 | * 0 WB WB WB | |
499 | * 1 PWT WC WT WT | |
500 | * 2 PCD UC- UC- UC- | |
501 | * 3 PCD PWT UC UC UC | |
502 | * 4 PAT WB WC WB | |
503 | * 5 PAT PWT WC WP WT | |
504 | * 6 PAT PCD UC- UC UC- | |
505 | * 7 PAT PCD PWT UC UC UC | |
506 | */ | |
507 | ||
508 | void xen_set_pat(u64 pat) | |
509 | { | |
510 | /* We expect Linux to use a PAT setting of | |
511 | * UC UC- WC WB (ignoring the PAT flag) */ | |
512 | WARN_ON(pat != 0x0007010600070106ull); | |
513 | } | |
514 | ||
947a69c9 JF |
515 | pte_t xen_make_pte(pteval_t pte) |
516 | { | |
7347b408 AN |
517 | phys_addr_t addr = (pte & PTE_PFN_MASK); |
518 | ||
41f2e477 JF |
519 | /* If Linux is trying to set a WC pte, then map to the Xen WC. |
520 | * If _PAGE_PAT is set, then it probably means it is really | |
521 | * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope | |
522 | * things work out OK... | |
523 | * | |
524 | * (We should never see kernel mappings with _PAGE_PSE set, | |
525 | * but we could see hugetlbfs mappings, I think.). | |
526 | */ | |
527 | if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) { | |
528 | if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT) | |
529 | pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT; | |
530 | } | |
531 | ||
7347b408 AN |
532 | /* |
533 | * Unprivileged domains are allowed to do IOMAPpings for | |
534 | * PCI passthrough, but not map ISA space. The ISA | |
535 | * mappings are just dummy local mappings to keep other | |
536 | * parts of the kernel happy. | |
537 | */ | |
538 | if (unlikely(pte & _PAGE_IOMAP) && | |
539 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | |
c0011dbf | 540 | pte = iomap_pte(pte); |
7347b408 AN |
541 | } else { |
542 | pte &= ~_PAGE_IOMAP; | |
c0011dbf | 543 | pte = pte_pfn_to_mfn(pte); |
7347b408 | 544 | } |
c0011dbf | 545 | |
ebb9cfe2 | 546 | return native_make_pte(pte); |
947a69c9 | 547 | } |
da5de7c2 | 548 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); |
947a69c9 | 549 | |
fc25151d KRW |
550 | #ifdef CONFIG_XEN_DEBUG |
551 | pte_t xen_make_pte_debug(pteval_t pte) | |
552 | { | |
553 | phys_addr_t addr = (pte & PTE_PFN_MASK); | |
554 | phys_addr_t other_addr; | |
555 | bool io_page = false; | |
556 | pte_t _pte; | |
557 | ||
558 | if (pte & _PAGE_IOMAP) | |
559 | io_page = true; | |
560 | ||
561 | _pte = xen_make_pte(pte); | |
562 | ||
563 | if (!addr) | |
564 | return _pte; | |
565 | ||
566 | if (io_page && | |
567 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | |
568 | other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT; | |
569 | WARN(addr != other_addr, | |
570 | "0x%lx is using VM_IO, but it is 0x%lx!\n", | |
571 | (unsigned long)addr, (unsigned long)other_addr); | |
572 | } else { | |
573 | pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP; | |
574 | other_addr = (_pte.pte & PTE_PFN_MASK); | |
575 | WARN((addr == other_addr) && (!io_page) && (!iomap_set), | |
576 | "0x%lx is missing VM_IO (and wasn't fixed)!\n", | |
577 | (unsigned long)addr); | |
578 | } | |
579 | ||
580 | return _pte; | |
581 | } | |
582 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug); | |
583 | #endif | |
584 | ||
947a69c9 JF |
585 | pgd_t xen_make_pgd(pgdval_t pgd) |
586 | { | |
ebb9cfe2 JF |
587 | pgd = pte_pfn_to_mfn(pgd); |
588 | return native_make_pgd(pgd); | |
947a69c9 | 589 | } |
da5de7c2 | 590 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); |
947a69c9 JF |
591 | |
592 | pmdval_t xen_pmd_val(pmd_t pmd) | |
593 | { | |
ebb9cfe2 | 594 | return pte_mfn_to_pfn(pmd.pmd); |
947a69c9 | 595 | } |
da5de7c2 | 596 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); |
28499143 | 597 | |
e2426cf8 | 598 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
f4f97b3e | 599 | { |
400d3494 | 600 | struct mmu_update u; |
f4f97b3e | 601 | |
d66bf8fc JF |
602 | preempt_disable(); |
603 | ||
400d3494 JF |
604 | xen_mc_batch(); |
605 | ||
ce803e70 JF |
606 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
607 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 608 | u.val = pud_val_ma(val); |
7708ad64 | 609 | xen_extend_mmu_update(&u); |
d66bf8fc | 610 | |
994025ca JF |
611 | ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
612 | ||
d66bf8fc JF |
613 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
614 | ||
615 | preempt_enable(); | |
f4f97b3e JF |
616 | } |
617 | ||
e2426cf8 JF |
618 | void xen_set_pud(pud_t *ptr, pud_t val) |
619 | { | |
994025ca JF |
620 | ADD_STATS(pud_update, 1); |
621 | ||
e2426cf8 JF |
622 | /* If page is not pinned, we can just update the entry |
623 | directly */ | |
7708ad64 | 624 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
625 | *ptr = val; |
626 | return; | |
627 | } | |
628 | ||
994025ca JF |
629 | ADD_STATS(pud_update_pinned, 1); |
630 | ||
e2426cf8 JF |
631 | xen_set_pud_hyper(ptr, val); |
632 | } | |
633 | ||
f4f97b3e JF |
634 | void xen_set_pte(pte_t *ptep, pte_t pte) |
635 | { | |
c0011dbf JF |
636 | if (xen_iomap_pte(pte)) { |
637 | xen_set_iomap_pte(ptep, pte); | |
638 | return; | |
639 | } | |
640 | ||
994025ca JF |
641 | ADD_STATS(pte_update, 1); |
642 | // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep)); | |
643 | ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
644 | ||
f6e58732 | 645 | #ifdef CONFIG_X86_PAE |
f4f97b3e JF |
646 | ptep->pte_high = pte.pte_high; |
647 | smp_wmb(); | |
648 | ptep->pte_low = pte.pte_low; | |
f6e58732 JF |
649 | #else |
650 | *ptep = pte; | |
651 | #endif | |
f4f97b3e JF |
652 | } |
653 | ||
f6e58732 | 654 | #ifdef CONFIG_X86_PAE |
3b827c1b JF |
655 | void xen_set_pte_atomic(pte_t *ptep, pte_t pte) |
656 | { | |
c0011dbf JF |
657 | if (xen_iomap_pte(pte)) { |
658 | xen_set_iomap_pte(ptep, pte); | |
659 | return; | |
660 | } | |
661 | ||
f6e58732 | 662 | set_64bit((u64 *)ptep, native_pte_val(pte)); |
3b827c1b JF |
663 | } |
664 | ||
665 | void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
666 | { | |
667 | ptep->pte_low = 0; | |
668 | smp_wmb(); /* make sure low gets written first */ | |
669 | ptep->pte_high = 0; | |
670 | } | |
671 | ||
672 | void xen_pmd_clear(pmd_t *pmdp) | |
673 | { | |
e2426cf8 | 674 | set_pmd(pmdp, __pmd(0)); |
3b827c1b | 675 | } |
f6e58732 | 676 | #endif /* CONFIG_X86_PAE */ |
3b827c1b | 677 | |
abf33038 | 678 | pmd_t xen_make_pmd(pmdval_t pmd) |
3b827c1b | 679 | { |
ebb9cfe2 | 680 | pmd = pte_pfn_to_mfn(pmd); |
947a69c9 | 681 | return native_make_pmd(pmd); |
3b827c1b | 682 | } |
da5de7c2 | 683 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); |
3b827c1b | 684 | |
f6e58732 JF |
685 | #if PAGETABLE_LEVELS == 4 |
686 | pudval_t xen_pud_val(pud_t pud) | |
687 | { | |
688 | return pte_mfn_to_pfn(pud.pud); | |
689 | } | |
da5de7c2 | 690 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); |
f6e58732 JF |
691 | |
692 | pud_t xen_make_pud(pudval_t pud) | |
693 | { | |
694 | pud = pte_pfn_to_mfn(pud); | |
695 | ||
696 | return native_make_pud(pud); | |
697 | } | |
da5de7c2 | 698 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); |
f6e58732 | 699 | |
d6182fbf | 700 | pgd_t *xen_get_user_pgd(pgd_t *pgd) |
f6e58732 | 701 | { |
d6182fbf JF |
702 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); |
703 | unsigned offset = pgd - pgd_page; | |
704 | pgd_t *user_ptr = NULL; | |
f6e58732 | 705 | |
d6182fbf JF |
706 | if (offset < pgd_index(USER_LIMIT)) { |
707 | struct page *page = virt_to_page(pgd_page); | |
708 | user_ptr = (pgd_t *)page->private; | |
709 | if (user_ptr) | |
710 | user_ptr += offset; | |
711 | } | |
f6e58732 | 712 | |
d6182fbf JF |
713 | return user_ptr; |
714 | } | |
715 | ||
716 | static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
717 | { | |
718 | struct mmu_update u; | |
f6e58732 JF |
719 | |
720 | u.ptr = virt_to_machine(ptr).maddr; | |
721 | u.val = pgd_val_ma(val); | |
7708ad64 | 722 | xen_extend_mmu_update(&u); |
d6182fbf JF |
723 | } |
724 | ||
725 | /* | |
726 | * Raw hypercall-based set_pgd, intended for in early boot before | |
727 | * there's a page structure. This implies: | |
728 | * 1. The only existing pagetable is the kernel's | |
729 | * 2. It is always pinned | |
730 | * 3. It has no user pagetable attached to it | |
731 | */ | |
732 | void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
733 | { | |
734 | preempt_disable(); | |
735 | ||
736 | xen_mc_batch(); | |
737 | ||
738 | __xen_set_pgd_hyper(ptr, val); | |
f6e58732 JF |
739 | |
740 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
741 | ||
742 | preempt_enable(); | |
743 | } | |
744 | ||
745 | void xen_set_pgd(pgd_t *ptr, pgd_t val) | |
746 | { | |
d6182fbf JF |
747 | pgd_t *user_ptr = xen_get_user_pgd(ptr); |
748 | ||
994025ca JF |
749 | ADD_STATS(pgd_update, 1); |
750 | ||
f6e58732 JF |
751 | /* If page is not pinned, we can just update the entry |
752 | directly */ | |
7708ad64 | 753 | if (!xen_page_pinned(ptr)) { |
f6e58732 | 754 | *ptr = val; |
d6182fbf | 755 | if (user_ptr) { |
7708ad64 | 756 | WARN_ON(xen_page_pinned(user_ptr)); |
d6182fbf JF |
757 | *user_ptr = val; |
758 | } | |
f6e58732 JF |
759 | return; |
760 | } | |
761 | ||
994025ca JF |
762 | ADD_STATS(pgd_update_pinned, 1); |
763 | ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
764 | ||
d6182fbf JF |
765 | /* If it's pinned, then we can at least batch the kernel and |
766 | user updates together. */ | |
767 | xen_mc_batch(); | |
768 | ||
769 | __xen_set_pgd_hyper(ptr, val); | |
770 | if (user_ptr) | |
771 | __xen_set_pgd_hyper(user_ptr, val); | |
772 | ||
773 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f6e58732 JF |
774 | } |
775 | #endif /* PAGETABLE_LEVELS == 4 */ | |
776 | ||
f4f97b3e | 777 | /* |
5deb30d1 JF |
778 | * (Yet another) pagetable walker. This one is intended for pinning a |
779 | * pagetable. This means that it walks a pagetable and calls the | |
780 | * callback function on each page it finds making up the page table, | |
781 | * at every level. It walks the entire pagetable, but it only bothers | |
782 | * pinning pte pages which are below limit. In the normal case this | |
783 | * will be STACK_TOP_MAX, but at boot we need to pin up to | |
784 | * FIXADDR_TOP. | |
785 | * | |
786 | * For 32-bit the important bit is that we don't pin beyond there, | |
787 | * because then we start getting into Xen's ptes. | |
788 | * | |
789 | * For 64-bit, we must skip the Xen hole in the middle of the address | |
790 | * space, just after the big x86-64 virtual hole. | |
791 | */ | |
86bbc2c2 IC |
792 | static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, |
793 | int (*func)(struct mm_struct *mm, struct page *, | |
794 | enum pt_level), | |
795 | unsigned long limit) | |
3b827c1b | 796 | { |
f4f97b3e | 797 | int flush = 0; |
5deb30d1 JF |
798 | unsigned hole_low, hole_high; |
799 | unsigned pgdidx_limit, pudidx_limit, pmdidx_limit; | |
800 | unsigned pgdidx, pudidx, pmdidx; | |
f4f97b3e | 801 | |
5deb30d1 JF |
802 | /* The limit is the last byte to be touched */ |
803 | limit--; | |
804 | BUG_ON(limit >= FIXADDR_TOP); | |
3b827c1b JF |
805 | |
806 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
f4f97b3e JF |
807 | return 0; |
808 | ||
5deb30d1 JF |
809 | /* |
810 | * 64-bit has a great big hole in the middle of the address | |
811 | * space, which contains the Xen mappings. On 32-bit these | |
812 | * will end up making a zero-sized hole and so is a no-op. | |
813 | */ | |
d6182fbf | 814 | hole_low = pgd_index(USER_LIMIT); |
5deb30d1 JF |
815 | hole_high = pgd_index(PAGE_OFFSET); |
816 | ||
817 | pgdidx_limit = pgd_index(limit); | |
818 | #if PTRS_PER_PUD > 1 | |
819 | pudidx_limit = pud_index(limit); | |
820 | #else | |
821 | pudidx_limit = 0; | |
822 | #endif | |
823 | #if PTRS_PER_PMD > 1 | |
824 | pmdidx_limit = pmd_index(limit); | |
825 | #else | |
826 | pmdidx_limit = 0; | |
827 | #endif | |
828 | ||
5deb30d1 | 829 | for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) { |
f4f97b3e | 830 | pud_t *pud; |
3b827c1b | 831 | |
5deb30d1 JF |
832 | if (pgdidx >= hole_low && pgdidx < hole_high) |
833 | continue; | |
f4f97b3e | 834 | |
5deb30d1 | 835 | if (!pgd_val(pgd[pgdidx])) |
3b827c1b | 836 | continue; |
f4f97b3e | 837 | |
5deb30d1 | 838 | pud = pud_offset(&pgd[pgdidx], 0); |
3b827c1b JF |
839 | |
840 | if (PTRS_PER_PUD > 1) /* not folded */ | |
eefb47f6 | 841 | flush |= (*func)(mm, virt_to_page(pud), PT_PUD); |
f4f97b3e | 842 | |
5deb30d1 | 843 | for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) { |
f4f97b3e | 844 | pmd_t *pmd; |
f4f97b3e | 845 | |
5deb30d1 JF |
846 | if (pgdidx == pgdidx_limit && |
847 | pudidx > pudidx_limit) | |
848 | goto out; | |
3b827c1b | 849 | |
5deb30d1 | 850 | if (pud_none(pud[pudidx])) |
3b827c1b | 851 | continue; |
f4f97b3e | 852 | |
5deb30d1 | 853 | pmd = pmd_offset(&pud[pudidx], 0); |
3b827c1b JF |
854 | |
855 | if (PTRS_PER_PMD > 1) /* not folded */ | |
eefb47f6 | 856 | flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); |
f4f97b3e | 857 | |
5deb30d1 JF |
858 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) { |
859 | struct page *pte; | |
860 | ||
861 | if (pgdidx == pgdidx_limit && | |
862 | pudidx == pudidx_limit && | |
863 | pmdidx > pmdidx_limit) | |
864 | goto out; | |
3b827c1b | 865 | |
5deb30d1 | 866 | if (pmd_none(pmd[pmdidx])) |
3b827c1b JF |
867 | continue; |
868 | ||
5deb30d1 | 869 | pte = pmd_page(pmd[pmdidx]); |
eefb47f6 | 870 | flush |= (*func)(mm, pte, PT_PTE); |
3b827c1b JF |
871 | } |
872 | } | |
873 | } | |
11ad93e5 | 874 | |
5deb30d1 | 875 | out: |
11ad93e5 JF |
876 | /* Do the top level last, so that the callbacks can use it as |
877 | a cue to do final things like tlb flushes. */ | |
eefb47f6 | 878 | flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); |
f4f97b3e JF |
879 | |
880 | return flush; | |
3b827c1b JF |
881 | } |
882 | ||
86bbc2c2 IC |
883 | static int xen_pgd_walk(struct mm_struct *mm, |
884 | int (*func)(struct mm_struct *mm, struct page *, | |
885 | enum pt_level), | |
886 | unsigned long limit) | |
887 | { | |
888 | return __xen_pgd_walk(mm, mm->pgd, func, limit); | |
889 | } | |
890 | ||
7708ad64 JF |
891 | /* If we're using split pte locks, then take the page's lock and |
892 | return a pointer to it. Otherwise return NULL. */ | |
eefb47f6 | 893 | static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) |
74260714 JF |
894 | { |
895 | spinlock_t *ptl = NULL; | |
896 | ||
f7d0b926 | 897 | #if USE_SPLIT_PTLOCKS |
74260714 | 898 | ptl = __pte_lockptr(page); |
eefb47f6 | 899 | spin_lock_nest_lock(ptl, &mm->page_table_lock); |
74260714 JF |
900 | #endif |
901 | ||
902 | return ptl; | |
903 | } | |
904 | ||
7708ad64 | 905 | static void xen_pte_unlock(void *v) |
74260714 JF |
906 | { |
907 | spinlock_t *ptl = v; | |
908 | spin_unlock(ptl); | |
909 | } | |
910 | ||
911 | static void xen_do_pin(unsigned level, unsigned long pfn) | |
912 | { | |
913 | struct mmuext_op *op; | |
914 | struct multicall_space mcs; | |
915 | ||
916 | mcs = __xen_mc_entry(sizeof(*op)); | |
917 | op = mcs.args; | |
918 | op->cmd = level; | |
919 | op->arg1.mfn = pfn_to_mfn(pfn); | |
920 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
921 | } | |
922 | ||
eefb47f6 JF |
923 | static int xen_pin_page(struct mm_struct *mm, struct page *page, |
924 | enum pt_level level) | |
f4f97b3e | 925 | { |
d60cd46b | 926 | unsigned pgfl = TestSetPagePinned(page); |
f4f97b3e JF |
927 | int flush; |
928 | ||
929 | if (pgfl) | |
930 | flush = 0; /* already pinned */ | |
931 | else if (PageHighMem(page)) | |
932 | /* kmaps need flushing if we found an unpinned | |
933 | highpage */ | |
934 | flush = 1; | |
935 | else { | |
936 | void *pt = lowmem_page_address(page); | |
937 | unsigned long pfn = page_to_pfn(page); | |
938 | struct multicall_space mcs = __xen_mc_entry(0); | |
74260714 | 939 | spinlock_t *ptl; |
f4f97b3e JF |
940 | |
941 | flush = 0; | |
942 | ||
11ad93e5 JF |
943 | /* |
944 | * We need to hold the pagetable lock between the time | |
945 | * we make the pagetable RO and when we actually pin | |
946 | * it. If we don't, then other users may come in and | |
947 | * attempt to update the pagetable by writing it, | |
948 | * which will fail because the memory is RO but not | |
949 | * pinned, so Xen won't do the trap'n'emulate. | |
950 | * | |
951 | * If we're using split pte locks, we can't hold the | |
952 | * entire pagetable's worth of locks during the | |
953 | * traverse, because we may wrap the preempt count (8 | |
954 | * bits). The solution is to mark RO and pin each PTE | |
955 | * page while holding the lock. This means the number | |
956 | * of locks we end up holding is never more than a | |
957 | * batch size (~32 entries, at present). | |
958 | * | |
959 | * If we're not using split pte locks, we needn't pin | |
960 | * the PTE pages independently, because we're | |
961 | * protected by the overall pagetable lock. | |
962 | */ | |
74260714 JF |
963 | ptl = NULL; |
964 | if (level == PT_PTE) | |
eefb47f6 | 965 | ptl = xen_pte_lock(page, mm); |
74260714 | 966 | |
f4f97b3e JF |
967 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, |
968 | pfn_pte(pfn, PAGE_KERNEL_RO), | |
74260714 JF |
969 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
970 | ||
11ad93e5 | 971 | if (ptl) { |
74260714 JF |
972 | xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); |
973 | ||
74260714 JF |
974 | /* Queue a deferred unlock for when this batch |
975 | is completed. */ | |
7708ad64 | 976 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 977 | } |
f4f97b3e JF |
978 | } |
979 | ||
980 | return flush; | |
981 | } | |
3b827c1b | 982 | |
f4f97b3e JF |
983 | /* This is called just after a mm has been created, but it has not |
984 | been used yet. We need to make sure that its pagetable is all | |
985 | read-only, and can be pinned. */ | |
eefb47f6 | 986 | static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) |
3b827c1b | 987 | { |
f4f97b3e | 988 | xen_mc_batch(); |
3b827c1b | 989 | |
86bbc2c2 | 990 | if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) { |
d05fdf31 | 991 | /* re-enable interrupts for flushing */ |
f87e4cac | 992 | xen_mc_issue(0); |
d05fdf31 | 993 | |
f4f97b3e | 994 | kmap_flush_unused(); |
d05fdf31 | 995 | |
f87e4cac JF |
996 | xen_mc_batch(); |
997 | } | |
f4f97b3e | 998 | |
d6182fbf JF |
999 | #ifdef CONFIG_X86_64 |
1000 | { | |
1001 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1002 | ||
1003 | xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); | |
1004 | ||
1005 | if (user_pgd) { | |
eefb47f6 | 1006 | xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); |
f63c2f24 T |
1007 | xen_do_pin(MMUEXT_PIN_L4_TABLE, |
1008 | PFN_DOWN(__pa(user_pgd))); | |
d6182fbf JF |
1009 | } |
1010 | } | |
1011 | #else /* CONFIG_X86_32 */ | |
5deb30d1 JF |
1012 | #ifdef CONFIG_X86_PAE |
1013 | /* Need to make sure unshared kernel PMD is pinnable */ | |
47cb2ed9 | 1014 | xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 1015 | PT_PMD); |
5deb30d1 | 1016 | #endif |
28499143 | 1017 | xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); |
d6182fbf | 1018 | #endif /* CONFIG_X86_64 */ |
f4f97b3e | 1019 | xen_mc_issue(0); |
3b827c1b JF |
1020 | } |
1021 | ||
eefb47f6 JF |
1022 | static void xen_pgd_pin(struct mm_struct *mm) |
1023 | { | |
1024 | __xen_pgd_pin(mm, mm->pgd); | |
1025 | } | |
1026 | ||
0e91398f JF |
1027 | /* |
1028 | * On save, we need to pin all pagetables to make sure they get their | |
1029 | * mfns turned into pfns. Search the list for any unpinned pgds and pin | |
1030 | * them (unpinned pgds are not currently in use, probably because the | |
1031 | * process is under construction or destruction). | |
eefb47f6 JF |
1032 | * |
1033 | * Expected to be called in stop_machine() ("equivalent to taking | |
1034 | * every spinlock in the system"), so the locking doesn't really | |
1035 | * matter all that much. | |
0e91398f JF |
1036 | */ |
1037 | void xen_mm_pin_all(void) | |
1038 | { | |
1039 | unsigned long flags; | |
1040 | struct page *page; | |
74260714 | 1041 | |
0e91398f | 1042 | spin_lock_irqsave(&pgd_lock, flags); |
f4f97b3e | 1043 | |
0e91398f JF |
1044 | list_for_each_entry(page, &pgd_list, lru) { |
1045 | if (!PagePinned(page)) { | |
eefb47f6 | 1046 | __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
1047 | SetPageSavePinned(page); |
1048 | } | |
1049 | } | |
1050 | ||
1051 | spin_unlock_irqrestore(&pgd_lock, flags); | |
3b827c1b JF |
1052 | } |
1053 | ||
c1f2f09e EH |
1054 | /* |
1055 | * The init_mm pagetable is really pinned as soon as its created, but | |
1056 | * that's before we have page structures to store the bits. So do all | |
1057 | * the book-keeping now. | |
1058 | */ | |
eefb47f6 JF |
1059 | static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page, |
1060 | enum pt_level level) | |
3b827c1b | 1061 | { |
f4f97b3e JF |
1062 | SetPagePinned(page); |
1063 | return 0; | |
1064 | } | |
3b827c1b | 1065 | |
b96229b5 | 1066 | static void __init xen_mark_init_mm_pinned(void) |
f4f97b3e | 1067 | { |
eefb47f6 | 1068 | xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); |
f4f97b3e | 1069 | } |
3b827c1b | 1070 | |
eefb47f6 JF |
1071 | static int xen_unpin_page(struct mm_struct *mm, struct page *page, |
1072 | enum pt_level level) | |
f4f97b3e | 1073 | { |
d60cd46b | 1074 | unsigned pgfl = TestClearPagePinned(page); |
3b827c1b | 1075 | |
f4f97b3e JF |
1076 | if (pgfl && !PageHighMem(page)) { |
1077 | void *pt = lowmem_page_address(page); | |
1078 | unsigned long pfn = page_to_pfn(page); | |
74260714 JF |
1079 | spinlock_t *ptl = NULL; |
1080 | struct multicall_space mcs; | |
1081 | ||
11ad93e5 JF |
1082 | /* |
1083 | * Do the converse to pin_page. If we're using split | |
1084 | * pte locks, we must be holding the lock for while | |
1085 | * the pte page is unpinned but still RO to prevent | |
1086 | * concurrent updates from seeing it in this | |
1087 | * partially-pinned state. | |
1088 | */ | |
74260714 | 1089 | if (level == PT_PTE) { |
eefb47f6 | 1090 | ptl = xen_pte_lock(page, mm); |
74260714 | 1091 | |
11ad93e5 JF |
1092 | if (ptl) |
1093 | xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); | |
74260714 JF |
1094 | } |
1095 | ||
1096 | mcs = __xen_mc_entry(0); | |
f4f97b3e JF |
1097 | |
1098 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, | |
1099 | pfn_pte(pfn, PAGE_KERNEL), | |
74260714 JF |
1100 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
1101 | ||
1102 | if (ptl) { | |
1103 | /* unlock when batch completed */ | |
7708ad64 | 1104 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 1105 | } |
f4f97b3e JF |
1106 | } |
1107 | ||
1108 | return 0; /* never need to flush on unpin */ | |
3b827c1b JF |
1109 | } |
1110 | ||
f4f97b3e | 1111 | /* Release a pagetables pages back as normal RW */ |
eefb47f6 | 1112 | static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) |
f4f97b3e | 1113 | { |
f4f97b3e JF |
1114 | xen_mc_batch(); |
1115 | ||
74260714 | 1116 | xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); |
f4f97b3e | 1117 | |
d6182fbf JF |
1118 | #ifdef CONFIG_X86_64 |
1119 | { | |
1120 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1121 | ||
1122 | if (user_pgd) { | |
f63c2f24 T |
1123 | xen_do_pin(MMUEXT_UNPIN_TABLE, |
1124 | PFN_DOWN(__pa(user_pgd))); | |
eefb47f6 | 1125 | xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); |
d6182fbf JF |
1126 | } |
1127 | } | |
1128 | #endif | |
1129 | ||
5deb30d1 JF |
1130 | #ifdef CONFIG_X86_PAE |
1131 | /* Need to make sure unshared kernel PMD is unpinned */ | |
47cb2ed9 | 1132 | xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 1133 | PT_PMD); |
5deb30d1 | 1134 | #endif |
d6182fbf | 1135 | |
86bbc2c2 | 1136 | __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); |
f4f97b3e JF |
1137 | |
1138 | xen_mc_issue(0); | |
1139 | } | |
3b827c1b | 1140 | |
eefb47f6 JF |
1141 | static void xen_pgd_unpin(struct mm_struct *mm) |
1142 | { | |
1143 | __xen_pgd_unpin(mm, mm->pgd); | |
1144 | } | |
1145 | ||
0e91398f JF |
1146 | /* |
1147 | * On resume, undo any pinning done at save, so that the rest of the | |
1148 | * kernel doesn't see any unexpected pinned pagetables. | |
1149 | */ | |
1150 | void xen_mm_unpin_all(void) | |
1151 | { | |
1152 | unsigned long flags; | |
1153 | struct page *page; | |
1154 | ||
1155 | spin_lock_irqsave(&pgd_lock, flags); | |
1156 | ||
1157 | list_for_each_entry(page, &pgd_list, lru) { | |
1158 | if (PageSavePinned(page)) { | |
1159 | BUG_ON(!PagePinned(page)); | |
eefb47f6 | 1160 | __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
1161 | ClearPageSavePinned(page); |
1162 | } | |
1163 | } | |
1164 | ||
1165 | spin_unlock_irqrestore(&pgd_lock, flags); | |
1166 | } | |
1167 | ||
3b827c1b JF |
1168 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
1169 | { | |
f4f97b3e | 1170 | spin_lock(&next->page_table_lock); |
eefb47f6 | 1171 | xen_pgd_pin(next); |
f4f97b3e | 1172 | spin_unlock(&next->page_table_lock); |
3b827c1b JF |
1173 | } |
1174 | ||
1175 | void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) | |
1176 | { | |
f4f97b3e | 1177 | spin_lock(&mm->page_table_lock); |
eefb47f6 | 1178 | xen_pgd_pin(mm); |
f4f97b3e | 1179 | spin_unlock(&mm->page_table_lock); |
3b827c1b JF |
1180 | } |
1181 | ||
3b827c1b | 1182 | |
f87e4cac JF |
1183 | #ifdef CONFIG_SMP |
1184 | /* Another cpu may still have their %cr3 pointing at the pagetable, so | |
1185 | we need to repoint it somewhere else before we can unpin it. */ | |
1186 | static void drop_other_mm_ref(void *info) | |
1187 | { | |
1188 | struct mm_struct *mm = info; | |
ce87b3d3 | 1189 | struct mm_struct *active_mm; |
3b827c1b | 1190 | |
9eb912d1 | 1191 | active_mm = percpu_read(cpu_tlbstate.active_mm); |
ce87b3d3 JF |
1192 | |
1193 | if (active_mm == mm) | |
f87e4cac | 1194 | leave_mm(smp_processor_id()); |
9f79991d JF |
1195 | |
1196 | /* If this cpu still has a stale cr3 reference, then make sure | |
1197 | it has been flushed. */ | |
7fd7d83d | 1198 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) |
9f79991d | 1199 | load_cr3(swapper_pg_dir); |
f87e4cac | 1200 | } |
3b827c1b | 1201 | |
7708ad64 | 1202 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac | 1203 | { |
e4d98207 | 1204 | cpumask_var_t mask; |
9f79991d JF |
1205 | unsigned cpu; |
1206 | ||
f87e4cac JF |
1207 | if (current->active_mm == mm) { |
1208 | if (current->mm == mm) | |
1209 | load_cr3(swapper_pg_dir); | |
1210 | else | |
1211 | leave_mm(smp_processor_id()); | |
9f79991d JF |
1212 | } |
1213 | ||
1214 | /* Get the "official" set of cpus referring to our pagetable. */ | |
e4d98207 MT |
1215 | if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { |
1216 | for_each_online_cpu(cpu) { | |
78f1c4d6 | 1217 | if (!cpumask_test_cpu(cpu, mm_cpumask(mm)) |
e4d98207 MT |
1218 | && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) |
1219 | continue; | |
1220 | smp_call_function_single(cpu, drop_other_mm_ref, mm, 1); | |
1221 | } | |
1222 | return; | |
1223 | } | |
78f1c4d6 | 1224 | cpumask_copy(mask, mm_cpumask(mm)); |
9f79991d JF |
1225 | |
1226 | /* It's possible that a vcpu may have a stale reference to our | |
1227 | cr3, because its in lazy mode, and it hasn't yet flushed | |
1228 | its set of pending hypercalls yet. In this case, we can | |
1229 | look at its actual current cr3 value, and force it to flush | |
1230 | if needed. */ | |
1231 | for_each_online_cpu(cpu) { | |
1232 | if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) | |
e4d98207 | 1233 | cpumask_set_cpu(cpu, mask); |
3b827c1b JF |
1234 | } |
1235 | ||
e4d98207 MT |
1236 | if (!cpumask_empty(mask)) |
1237 | smp_call_function_many(mask, drop_other_mm_ref, mm, 1); | |
1238 | free_cpumask_var(mask); | |
f87e4cac JF |
1239 | } |
1240 | #else | |
7708ad64 | 1241 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac JF |
1242 | { |
1243 | if (current->active_mm == mm) | |
1244 | load_cr3(swapper_pg_dir); | |
1245 | } | |
1246 | #endif | |
1247 | ||
1248 | /* | |
1249 | * While a process runs, Xen pins its pagetables, which means that the | |
1250 | * hypervisor forces it to be read-only, and it controls all updates | |
1251 | * to it. This means that all pagetable updates have to go via the | |
1252 | * hypervisor, which is moderately expensive. | |
1253 | * | |
1254 | * Since we're pulling the pagetable down, we switch to use init_mm, | |
1255 | * unpin old process pagetable and mark it all read-write, which | |
1256 | * allows further operations on it to be simple memory accesses. | |
1257 | * | |
1258 | * The only subtle point is that another CPU may be still using the | |
1259 | * pagetable because of lazy tlb flushing. This means we need need to | |
1260 | * switch all CPUs off this pagetable before we can unpin it. | |
1261 | */ | |
1262 | void xen_exit_mmap(struct mm_struct *mm) | |
1263 | { | |
1264 | get_cpu(); /* make sure we don't move around */ | |
7708ad64 | 1265 | xen_drop_mm_ref(mm); |
f87e4cac | 1266 | put_cpu(); |
3b827c1b | 1267 | |
f120f13e | 1268 | spin_lock(&mm->page_table_lock); |
df912ea4 JF |
1269 | |
1270 | /* pgd may not be pinned in the error exit path of execve */ | |
7708ad64 | 1271 | if (xen_page_pinned(mm->pgd)) |
eefb47f6 | 1272 | xen_pgd_unpin(mm); |
74260714 | 1273 | |
f120f13e | 1274 | spin_unlock(&mm->page_table_lock); |
3b827c1b | 1275 | } |
994025ca | 1276 | |
319f3ba5 JF |
1277 | static __init void xen_pagetable_setup_start(pgd_t *base) |
1278 | { | |
1279 | } | |
1280 | ||
f1d7062a TG |
1281 | static void xen_post_allocator_init(void); |
1282 | ||
319f3ba5 JF |
1283 | static __init void xen_pagetable_setup_done(pgd_t *base) |
1284 | { | |
1285 | xen_setup_shared_info(); | |
f1d7062a | 1286 | xen_post_allocator_init(); |
319f3ba5 JF |
1287 | } |
1288 | ||
1289 | static void xen_write_cr2(unsigned long cr2) | |
1290 | { | |
1291 | percpu_read(xen_vcpu)->arch.cr2 = cr2; | |
1292 | } | |
1293 | ||
1294 | static unsigned long xen_read_cr2(void) | |
1295 | { | |
1296 | return percpu_read(xen_vcpu)->arch.cr2; | |
1297 | } | |
1298 | ||
1299 | unsigned long xen_read_cr2_direct(void) | |
1300 | { | |
1301 | return percpu_read(xen_vcpu_info.arch.cr2); | |
1302 | } | |
1303 | ||
1304 | static void xen_flush_tlb(void) | |
1305 | { | |
1306 | struct mmuext_op *op; | |
1307 | struct multicall_space mcs; | |
1308 | ||
1309 | preempt_disable(); | |
1310 | ||
1311 | mcs = xen_mc_entry(sizeof(*op)); | |
1312 | ||
1313 | op = mcs.args; | |
1314 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
1315 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1316 | ||
1317 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1318 | ||
1319 | preempt_enable(); | |
1320 | } | |
1321 | ||
1322 | static void xen_flush_tlb_single(unsigned long addr) | |
1323 | { | |
1324 | struct mmuext_op *op; | |
1325 | struct multicall_space mcs; | |
1326 | ||
1327 | preempt_disable(); | |
1328 | ||
1329 | mcs = xen_mc_entry(sizeof(*op)); | |
1330 | op = mcs.args; | |
1331 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
1332 | op->arg1.linear_addr = addr & PAGE_MASK; | |
1333 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1334 | ||
1335 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1336 | ||
1337 | preempt_enable(); | |
1338 | } | |
1339 | ||
1340 | static void xen_flush_tlb_others(const struct cpumask *cpus, | |
1341 | struct mm_struct *mm, unsigned long va) | |
1342 | { | |
1343 | struct { | |
1344 | struct mmuext_op op; | |
1345 | DECLARE_BITMAP(mask, NR_CPUS); | |
1346 | } *args; | |
1347 | struct multicall_space mcs; | |
1348 | ||
e3f8a74e JF |
1349 | if (cpumask_empty(cpus)) |
1350 | return; /* nothing to do */ | |
319f3ba5 JF |
1351 | |
1352 | mcs = xen_mc_entry(sizeof(*args)); | |
1353 | args = mcs.args; | |
1354 | args->op.arg2.vcpumask = to_cpumask(args->mask); | |
1355 | ||
1356 | /* Remove us, and any offline CPUS. */ | |
1357 | cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); | |
1358 | cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); | |
319f3ba5 JF |
1359 | |
1360 | if (va == TLB_FLUSH_ALL) { | |
1361 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; | |
1362 | } else { | |
1363 | args->op.cmd = MMUEXT_INVLPG_MULTI; | |
1364 | args->op.arg1.linear_addr = va; | |
1365 | } | |
1366 | ||
1367 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); | |
1368 | ||
319f3ba5 JF |
1369 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
1370 | } | |
1371 | ||
1372 | static unsigned long xen_read_cr3(void) | |
1373 | { | |
1374 | return percpu_read(xen_cr3); | |
1375 | } | |
1376 | ||
1377 | static void set_current_cr3(void *v) | |
1378 | { | |
1379 | percpu_write(xen_current_cr3, (unsigned long)v); | |
1380 | } | |
1381 | ||
1382 | static void __xen_write_cr3(bool kernel, unsigned long cr3) | |
1383 | { | |
1384 | struct mmuext_op *op; | |
1385 | struct multicall_space mcs; | |
1386 | unsigned long mfn; | |
1387 | ||
1388 | if (cr3) | |
1389 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
1390 | else | |
1391 | mfn = 0; | |
1392 | ||
1393 | WARN_ON(mfn == 0 && kernel); | |
1394 | ||
1395 | mcs = __xen_mc_entry(sizeof(*op)); | |
1396 | ||
1397 | op = mcs.args; | |
1398 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; | |
1399 | op->arg1.mfn = mfn; | |
1400 | ||
1401 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1402 | ||
1403 | if (kernel) { | |
1404 | percpu_write(xen_cr3, cr3); | |
1405 | ||
1406 | /* Update xen_current_cr3 once the batch has actually | |
1407 | been submitted. */ | |
1408 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
1409 | } | |
1410 | } | |
1411 | ||
1412 | static void xen_write_cr3(unsigned long cr3) | |
1413 | { | |
1414 | BUG_ON(preemptible()); | |
1415 | ||
1416 | xen_mc_batch(); /* disables interrupts */ | |
1417 | ||
1418 | /* Update while interrupts are disabled, so its atomic with | |
1419 | respect to ipis */ | |
1420 | percpu_write(xen_cr3, cr3); | |
1421 | ||
1422 | __xen_write_cr3(true, cr3); | |
1423 | ||
1424 | #ifdef CONFIG_X86_64 | |
1425 | { | |
1426 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | |
1427 | if (user_pgd) | |
1428 | __xen_write_cr3(false, __pa(user_pgd)); | |
1429 | else | |
1430 | __xen_write_cr3(false, 0); | |
1431 | } | |
1432 | #endif | |
1433 | ||
1434 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ | |
1435 | } | |
1436 | ||
1437 | static int xen_pgd_alloc(struct mm_struct *mm) | |
1438 | { | |
1439 | pgd_t *pgd = mm->pgd; | |
1440 | int ret = 0; | |
1441 | ||
1442 | BUG_ON(PagePinned(virt_to_page(pgd))); | |
1443 | ||
1444 | #ifdef CONFIG_X86_64 | |
1445 | { | |
1446 | struct page *page = virt_to_page(pgd); | |
1447 | pgd_t *user_pgd; | |
1448 | ||
1449 | BUG_ON(page->private != 0); | |
1450 | ||
1451 | ret = -ENOMEM; | |
1452 | ||
1453 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | |
1454 | page->private = (unsigned long)user_pgd; | |
1455 | ||
1456 | if (user_pgd != NULL) { | |
1457 | user_pgd[pgd_index(VSYSCALL_START)] = | |
1458 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | |
1459 | ret = 0; | |
1460 | } | |
1461 | ||
1462 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | |
1463 | } | |
1464 | #endif | |
1465 | ||
1466 | return ret; | |
1467 | } | |
1468 | ||
1469 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
1470 | { | |
1471 | #ifdef CONFIG_X86_64 | |
1472 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1473 | ||
1474 | if (user_pgd) | |
1475 | free_page((unsigned long)user_pgd); | |
1476 | #endif | |
1477 | } | |
1478 | ||
1f4f9315 JF |
1479 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) |
1480 | { | |
fef5ba79 JF |
1481 | unsigned long pfn = pte_pfn(pte); |
1482 | ||
1483 | #ifdef CONFIG_X86_32 | |
1f4f9315 JF |
1484 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ |
1485 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
1486 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
1487 | pte_val_ma(pte)); | |
fef5ba79 JF |
1488 | #endif |
1489 | ||
1490 | /* | |
1491 | * If the new pfn is within the range of the newly allocated | |
1492 | * kernel pagetable, and it isn't being mapped into an | |
1493 | * early_ioremap fixmap slot, make sure it is RO. | |
1494 | */ | |
1495 | if (!is_early_ioremap_ptep(ptep) && | |
1496 | pfn >= e820_table_start && pfn < e820_table_end) | |
1497 | pte = pte_wrprotect(pte); | |
1f4f9315 JF |
1498 | |
1499 | return pte; | |
1500 | } | |
1501 | ||
1502 | /* Init-time set_pte while constructing initial pagetables, which | |
1503 | doesn't allow RO pagetable pages to be remapped RW */ | |
1504 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | |
1505 | { | |
1506 | pte = mask_rw_pte(ptep, pte); | |
1507 | ||
1508 | xen_set_pte(ptep, pte); | |
1509 | } | |
319f3ba5 | 1510 | |
b96229b5 JF |
1511 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
1512 | { | |
1513 | struct mmuext_op op; | |
1514 | op.cmd = cmd; | |
1515 | op.arg1.mfn = pfn_to_mfn(pfn); | |
1516 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
1517 | BUG(); | |
1518 | } | |
1519 | ||
319f3ba5 JF |
1520 | /* Early in boot, while setting up the initial pagetable, assume |
1521 | everything is pinned. */ | |
1522 | static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) | |
1523 | { | |
b96229b5 JF |
1524 | #ifdef CONFIG_FLATMEM |
1525 | BUG_ON(mem_map); /* should only be used early */ | |
1526 | #endif | |
1527 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1528 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1529 | } | |
1530 | ||
1531 | /* Used for pmd and pud */ | |
1532 | static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) | |
1533 | { | |
319f3ba5 JF |
1534 | #ifdef CONFIG_FLATMEM |
1535 | BUG_ON(mem_map); /* should only be used early */ | |
1536 | #endif | |
1537 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1538 | } | |
1539 | ||
1540 | /* Early release_pte assumes that all pts are pinned, since there's | |
1541 | only init_mm and anything attached to that is pinned. */ | |
b96229b5 | 1542 | static __init void xen_release_pte_init(unsigned long pfn) |
319f3ba5 | 1543 | { |
b96229b5 | 1544 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); |
319f3ba5 JF |
1545 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
1546 | } | |
1547 | ||
b96229b5 | 1548 | static __init void xen_release_pmd_init(unsigned long pfn) |
319f3ba5 | 1549 | { |
b96229b5 | 1550 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
319f3ba5 JF |
1551 | } |
1552 | ||
1553 | /* This needs to make sure the new pte page is pinned iff its being | |
1554 | attached to a pinned pagetable. */ | |
1555 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) | |
1556 | { | |
1557 | struct page *page = pfn_to_page(pfn); | |
1558 | ||
1559 | if (PagePinned(virt_to_page(mm->pgd))) { | |
1560 | SetPagePinned(page); | |
1561 | ||
319f3ba5 JF |
1562 | if (!PageHighMem(page)) { |
1563 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); | |
1564 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1565 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1566 | } else { | |
1567 | /* make sure there are no stray mappings of | |
1568 | this page */ | |
1569 | kmap_flush_unused(); | |
1570 | } | |
1571 | } | |
1572 | } | |
1573 | ||
1574 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) | |
1575 | { | |
1576 | xen_alloc_ptpage(mm, pfn, PT_PTE); | |
1577 | } | |
1578 | ||
1579 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) | |
1580 | { | |
1581 | xen_alloc_ptpage(mm, pfn, PT_PMD); | |
1582 | } | |
1583 | ||
1584 | /* This should never happen until we're OK to use struct page */ | |
1585 | static void xen_release_ptpage(unsigned long pfn, unsigned level) | |
1586 | { | |
1587 | struct page *page = pfn_to_page(pfn); | |
1588 | ||
1589 | if (PagePinned(page)) { | |
1590 | if (!PageHighMem(page)) { | |
1591 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1592 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | |
1593 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
1594 | } | |
1595 | ClearPagePinned(page); | |
1596 | } | |
1597 | } | |
1598 | ||
1599 | static void xen_release_pte(unsigned long pfn) | |
1600 | { | |
1601 | xen_release_ptpage(pfn, PT_PTE); | |
1602 | } | |
1603 | ||
1604 | static void xen_release_pmd(unsigned long pfn) | |
1605 | { | |
1606 | xen_release_ptpage(pfn, PT_PMD); | |
1607 | } | |
1608 | ||
1609 | #if PAGETABLE_LEVELS == 4 | |
1610 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) | |
1611 | { | |
1612 | xen_alloc_ptpage(mm, pfn, PT_PUD); | |
1613 | } | |
1614 | ||
1615 | static void xen_release_pud(unsigned long pfn) | |
1616 | { | |
1617 | xen_release_ptpage(pfn, PT_PUD); | |
1618 | } | |
1619 | #endif | |
1620 | ||
1621 | void __init xen_reserve_top(void) | |
1622 | { | |
1623 | #ifdef CONFIG_X86_32 | |
1624 | unsigned long top = HYPERVISOR_VIRT_START; | |
1625 | struct xen_platform_parameters pp; | |
1626 | ||
1627 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1628 | top = pp.virt_start; | |
1629 | ||
1630 | reserve_top_address(-top); | |
1631 | #endif /* CONFIG_X86_32 */ | |
1632 | } | |
1633 | ||
1634 | /* | |
1635 | * Like __va(), but returns address in the kernel mapping (which is | |
1636 | * all we have until the physical memory mapping has been set up. | |
1637 | */ | |
1638 | static void *__ka(phys_addr_t paddr) | |
1639 | { | |
1640 | #ifdef CONFIG_X86_64 | |
1641 | return (void *)(paddr + __START_KERNEL_map); | |
1642 | #else | |
1643 | return __va(paddr); | |
1644 | #endif | |
1645 | } | |
1646 | ||
1647 | /* Convert a machine address to physical address */ | |
1648 | static unsigned long m2p(phys_addr_t maddr) | |
1649 | { | |
1650 | phys_addr_t paddr; | |
1651 | ||
1652 | maddr &= PTE_PFN_MASK; | |
1653 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; | |
1654 | ||
1655 | return paddr; | |
1656 | } | |
1657 | ||
1658 | /* Convert a machine address to kernel virtual */ | |
1659 | static void *m2v(phys_addr_t maddr) | |
1660 | { | |
1661 | return __ka(m2p(maddr)); | |
1662 | } | |
1663 | ||
4ec5387c | 1664 | /* Set the page permissions on an identity-mapped pages */ |
319f3ba5 JF |
1665 | static void set_page_prot(void *addr, pgprot_t prot) |
1666 | { | |
1667 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | |
1668 | pte_t pte = pfn_pte(pfn, prot); | |
1669 | ||
1670 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) | |
1671 | BUG(); | |
1672 | } | |
1673 | ||
1674 | static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) | |
1675 | { | |
1676 | unsigned pmdidx, pteidx; | |
1677 | unsigned ident_pte; | |
1678 | unsigned long pfn; | |
1679 | ||
764f0138 JF |
1680 | level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES, |
1681 | PAGE_SIZE); | |
1682 | ||
319f3ba5 JF |
1683 | ident_pte = 0; |
1684 | pfn = 0; | |
1685 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { | |
1686 | pte_t *pte_page; | |
1687 | ||
1688 | /* Reuse or allocate a page of ptes */ | |
1689 | if (pmd_present(pmd[pmdidx])) | |
1690 | pte_page = m2v(pmd[pmdidx].pmd); | |
1691 | else { | |
1692 | /* Check for free pte pages */ | |
764f0138 | 1693 | if (ident_pte == LEVEL1_IDENT_ENTRIES) |
319f3ba5 JF |
1694 | break; |
1695 | ||
1696 | pte_page = &level1_ident_pgt[ident_pte]; | |
1697 | ident_pte += PTRS_PER_PTE; | |
1698 | ||
1699 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); | |
1700 | } | |
1701 | ||
1702 | /* Install mappings */ | |
1703 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { | |
1704 | pte_t pte; | |
1705 | ||
1706 | if (pfn > max_pfn_mapped) | |
1707 | max_pfn_mapped = pfn; | |
1708 | ||
1709 | if (!pte_none(pte_page[pteidx])) | |
1710 | continue; | |
1711 | ||
1712 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | |
1713 | pte_page[pteidx] = pte; | |
1714 | } | |
1715 | } | |
1716 | ||
1717 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) | |
1718 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); | |
1719 | ||
1720 | set_page_prot(pmd, PAGE_KERNEL_RO); | |
1721 | } | |
1722 | ||
7e77506a IC |
1723 | void __init xen_setup_machphys_mapping(void) |
1724 | { | |
1725 | struct xen_machphys_mapping mapping; | |
1726 | unsigned long machine_to_phys_nr_ents; | |
1727 | ||
1728 | if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { | |
1729 | machine_to_phys_mapping = (unsigned long *)mapping.v_start; | |
1730 | machine_to_phys_nr_ents = mapping.max_mfn + 1; | |
1731 | } else { | |
1732 | machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES; | |
1733 | } | |
1734 | machine_to_phys_order = fls(machine_to_phys_nr_ents - 1); | |
1735 | } | |
1736 | ||
319f3ba5 JF |
1737 | #ifdef CONFIG_X86_64 |
1738 | static void convert_pfn_mfn(void *v) | |
1739 | { | |
1740 | pte_t *pte = v; | |
1741 | int i; | |
1742 | ||
1743 | /* All levels are converted the same way, so just treat them | |
1744 | as ptes. */ | |
1745 | for (i = 0; i < PTRS_PER_PTE; i++) | |
1746 | pte[i] = xen_make_pte(pte[i].pte); | |
1747 | } | |
1748 | ||
1749 | /* | |
1750 | * Set up the inital kernel pagetable. | |
1751 | * | |
1752 | * We can construct this by grafting the Xen provided pagetable into | |
1753 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | |
1754 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | |
1755 | * means that only the kernel has a physical mapping to start with - | |
1756 | * but that's enough to get __va working. We need to fill in the rest | |
1757 | * of the physical mapping once some sort of allocator has been set | |
1758 | * up. | |
1759 | */ | |
1760 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | |
1761 | unsigned long max_pfn) | |
1762 | { | |
1763 | pud_t *l3; | |
1764 | pmd_t *l2; | |
1765 | ||
1766 | /* Zap identity mapping */ | |
1767 | init_level4_pgt[0] = __pgd(0); | |
1768 | ||
1769 | /* Pre-constructed entries are in pfn, so convert to mfn */ | |
1770 | convert_pfn_mfn(init_level4_pgt); | |
1771 | convert_pfn_mfn(level3_ident_pgt); | |
1772 | convert_pfn_mfn(level3_kernel_pgt); | |
1773 | ||
1774 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | |
1775 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | |
1776 | ||
1777 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1778 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1779 | ||
1780 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | |
1781 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | |
1782 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1783 | ||
1784 | /* Set up identity map */ | |
1785 | xen_map_identity_early(level2_ident_pgt, max_pfn); | |
1786 | ||
1787 | /* Make pagetable pieces RO */ | |
1788 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | |
1789 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | |
1790 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | |
1791 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); | |
1792 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | |
1793 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | |
1794 | ||
1795 | /* Pin down new L4 */ | |
1796 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, | |
1797 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | |
1798 | ||
1799 | /* Unpin Xen-provided one */ | |
1800 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1801 | ||
1802 | /* Switch over */ | |
1803 | pgd = init_level4_pgt; | |
1804 | ||
1805 | /* | |
1806 | * At this stage there can be no user pgd, and no page | |
1807 | * structure to attach it to, so make sure we just set kernel | |
1808 | * pgd. | |
1809 | */ | |
1810 | xen_mc_batch(); | |
1811 | __xen_write_cr3(true, __pa(pgd)); | |
1812 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1813 | ||
a9ce6bc1 | 1814 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), |
319f3ba5 JF |
1815 | __pa(xen_start_info->pt_base + |
1816 | xen_start_info->nr_pt_frames * PAGE_SIZE), | |
1817 | "XEN PAGETABLES"); | |
1818 | ||
1819 | return pgd; | |
1820 | } | |
1821 | #else /* !CONFIG_X86_64 */ | |
5b5c1af1 IC |
1822 | static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); |
1823 | static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); | |
1824 | ||
1825 | static __init void xen_write_cr3_init(unsigned long cr3) | |
1826 | { | |
1827 | unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); | |
1828 | ||
1829 | BUG_ON(read_cr3() != __pa(initial_page_table)); | |
1830 | BUG_ON(cr3 != __pa(swapper_pg_dir)); | |
1831 | ||
1832 | /* | |
1833 | * We are switching to swapper_pg_dir for the first time (from | |
1834 | * initial_page_table) and therefore need to mark that page | |
1835 | * read-only and then pin it. | |
1836 | * | |
1837 | * Xen disallows sharing of kernel PMDs for PAE | |
1838 | * guests. Therefore we must copy the kernel PMD from | |
1839 | * initial_page_table into a new kernel PMD to be used in | |
1840 | * swapper_pg_dir. | |
1841 | */ | |
1842 | swapper_kernel_pmd = | |
1843 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
1844 | memcpy(swapper_kernel_pmd, initial_kernel_pmd, | |
1845 | sizeof(pmd_t) * PTRS_PER_PMD); | |
1846 | swapper_pg_dir[KERNEL_PGD_BOUNDARY] = | |
1847 | __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); | |
1848 | set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); | |
1849 | ||
1850 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | |
1851 | xen_write_cr3(cr3); | |
1852 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); | |
1853 | ||
1854 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | |
1855 | PFN_DOWN(__pa(initial_page_table))); | |
1856 | set_page_prot(initial_page_table, PAGE_KERNEL); | |
1857 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL); | |
1858 | ||
1859 | pv_mmu_ops.write_cr3 = &xen_write_cr3; | |
1860 | } | |
319f3ba5 JF |
1861 | |
1862 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | |
1863 | unsigned long max_pfn) | |
1864 | { | |
1865 | pmd_t *kernel_pmd; | |
1866 | ||
5b5c1af1 IC |
1867 | initial_kernel_pmd = |
1868 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
f0991802 | 1869 | |
93dbda7c JF |
1870 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + |
1871 | xen_start_info->nr_pt_frames * PAGE_SIZE + | |
1872 | 512*1024); | |
319f3ba5 JF |
1873 | |
1874 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | |
5b5c1af1 | 1875 | memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); |
319f3ba5 | 1876 | |
5b5c1af1 | 1877 | xen_map_identity_early(initial_kernel_pmd, max_pfn); |
319f3ba5 | 1878 | |
5b5c1af1 IC |
1879 | memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD); |
1880 | initial_page_table[KERNEL_PGD_BOUNDARY] = | |
1881 | __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); | |
319f3ba5 | 1882 | |
5b5c1af1 IC |
1883 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); |
1884 | set_page_prot(initial_page_table, PAGE_KERNEL_RO); | |
319f3ba5 JF |
1885 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); |
1886 | ||
1887 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1888 | ||
5b5c1af1 IC |
1889 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, |
1890 | PFN_DOWN(__pa(initial_page_table))); | |
1891 | xen_write_cr3(__pa(initial_page_table)); | |
319f3ba5 | 1892 | |
a9ce6bc1 | 1893 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), |
33df4db0 JF |
1894 | __pa(xen_start_info->pt_base + |
1895 | xen_start_info->nr_pt_frames * PAGE_SIZE), | |
1896 | "XEN PAGETABLES"); | |
1897 | ||
5b5c1af1 | 1898 | return initial_page_table; |
319f3ba5 JF |
1899 | } |
1900 | #endif /* CONFIG_X86_64 */ | |
1901 | ||
98511f35 JF |
1902 | static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; |
1903 | ||
3b3809ac | 1904 | static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) |
319f3ba5 JF |
1905 | { |
1906 | pte_t pte; | |
1907 | ||
1908 | phys >>= PAGE_SHIFT; | |
1909 | ||
1910 | switch (idx) { | |
1911 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | |
1912 | #ifdef CONFIG_X86_F00F_BUG | |
1913 | case FIX_F00F_IDT: | |
1914 | #endif | |
1915 | #ifdef CONFIG_X86_32 | |
1916 | case FIX_WP_TEST: | |
1917 | case FIX_VDSO: | |
1918 | # ifdef CONFIG_HIGHMEM | |
1919 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: | |
1920 | # endif | |
1921 | #else | |
1922 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | |
319f3ba5 | 1923 | #endif |
3ecb1b7d JF |
1924 | case FIX_TEXT_POKE0: |
1925 | case FIX_TEXT_POKE1: | |
1926 | /* All local page mappings */ | |
319f3ba5 JF |
1927 | pte = pfn_pte(phys, prot); |
1928 | break; | |
1929 | ||
98511f35 JF |
1930 | #ifdef CONFIG_X86_LOCAL_APIC |
1931 | case FIX_APIC_BASE: /* maps dummy local APIC */ | |
1932 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1933 | break; | |
1934 | #endif | |
1935 | ||
1936 | #ifdef CONFIG_X86_IO_APIC | |
1937 | case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: | |
1938 | /* | |
1939 | * We just don't map the IO APIC - all access is via | |
1940 | * hypercalls. Keep the address in the pte for reference. | |
1941 | */ | |
1942 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1943 | break; | |
1944 | #endif | |
1945 | ||
c0011dbf JF |
1946 | case FIX_PARAVIRT_BOOTMAP: |
1947 | /* This is an MFN, but it isn't an IO mapping from the | |
1948 | IO domain */ | |
319f3ba5 JF |
1949 | pte = mfn_pte(phys, prot); |
1950 | break; | |
c0011dbf JF |
1951 | |
1952 | default: | |
1953 | /* By default, set_fixmap is used for hardware mappings */ | |
1954 | pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP)); | |
1955 | break; | |
319f3ba5 JF |
1956 | } |
1957 | ||
1958 | __native_set_fixmap(idx, pte); | |
1959 | ||
1960 | #ifdef CONFIG_X86_64 | |
1961 | /* Replicate changes to map the vsyscall page into the user | |
1962 | pagetable vsyscall mapping. */ | |
1963 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | |
1964 | unsigned long vaddr = __fix_to_virt(idx); | |
1965 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | |
1966 | } | |
1967 | #endif | |
1968 | } | |
1969 | ||
4ec5387c JQ |
1970 | __init void xen_ident_map_ISA(void) |
1971 | { | |
1972 | unsigned long pa; | |
1973 | ||
1974 | /* | |
1975 | * If we're dom0, then linear map the ISA machine addresses into | |
1976 | * the kernel's address space. | |
1977 | */ | |
1978 | if (!xen_initial_domain()) | |
1979 | return; | |
1980 | ||
1981 | xen_raw_printk("Xen: setup ISA identity maps\n"); | |
1982 | ||
1983 | for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) { | |
1984 | pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO); | |
1985 | ||
1986 | if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0)) | |
1987 | BUG(); | |
1988 | } | |
1989 | ||
1990 | xen_flush_tlb(); | |
1991 | } | |
1992 | ||
f1d7062a | 1993 | static __init void xen_post_allocator_init(void) |
319f3ba5 | 1994 | { |
fc25151d KRW |
1995 | #ifdef CONFIG_XEN_DEBUG |
1996 | pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug); | |
1997 | #endif | |
319f3ba5 JF |
1998 | pv_mmu_ops.set_pte = xen_set_pte; |
1999 | pv_mmu_ops.set_pmd = xen_set_pmd; | |
2000 | pv_mmu_ops.set_pud = xen_set_pud; | |
2001 | #if PAGETABLE_LEVELS == 4 | |
2002 | pv_mmu_ops.set_pgd = xen_set_pgd; | |
2003 | #endif | |
2004 | ||
2005 | /* This will work as long as patching hasn't happened yet | |
2006 | (which it hasn't) */ | |
2007 | pv_mmu_ops.alloc_pte = xen_alloc_pte; | |
2008 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
2009 | pv_mmu_ops.release_pte = xen_release_pte; | |
2010 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
2011 | #if PAGETABLE_LEVELS == 4 | |
2012 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | |
2013 | pv_mmu_ops.release_pud = xen_release_pud; | |
2014 | #endif | |
2015 | ||
2016 | #ifdef CONFIG_X86_64 | |
2017 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | |
2018 | #endif | |
2019 | xen_mark_init_mm_pinned(); | |
2020 | } | |
2021 | ||
b407fc57 JF |
2022 | static void xen_leave_lazy_mmu(void) |
2023 | { | |
5caecb94 | 2024 | preempt_disable(); |
b407fc57 JF |
2025 | xen_mc_flush(); |
2026 | paravirt_leave_lazy_mmu(); | |
5caecb94 | 2027 | preempt_enable(); |
b407fc57 | 2028 | } |
319f3ba5 | 2029 | |
030cb6c0 | 2030 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { |
319f3ba5 JF |
2031 | .read_cr2 = xen_read_cr2, |
2032 | .write_cr2 = xen_write_cr2, | |
2033 | ||
2034 | .read_cr3 = xen_read_cr3, | |
5b5c1af1 IC |
2035 | #ifdef CONFIG_X86_32 |
2036 | .write_cr3 = xen_write_cr3_init, | |
2037 | #else | |
319f3ba5 | 2038 | .write_cr3 = xen_write_cr3, |
5b5c1af1 | 2039 | #endif |
319f3ba5 JF |
2040 | |
2041 | .flush_tlb_user = xen_flush_tlb, | |
2042 | .flush_tlb_kernel = xen_flush_tlb, | |
2043 | .flush_tlb_single = xen_flush_tlb_single, | |
2044 | .flush_tlb_others = xen_flush_tlb_others, | |
2045 | ||
2046 | .pte_update = paravirt_nop, | |
2047 | .pte_update_defer = paravirt_nop, | |
2048 | ||
2049 | .pgd_alloc = xen_pgd_alloc, | |
2050 | .pgd_free = xen_pgd_free, | |
2051 | ||
2052 | .alloc_pte = xen_alloc_pte_init, | |
2053 | .release_pte = xen_release_pte_init, | |
b96229b5 | 2054 | .alloc_pmd = xen_alloc_pmd_init, |
b96229b5 | 2055 | .release_pmd = xen_release_pmd_init, |
319f3ba5 | 2056 | |
319f3ba5 | 2057 | .set_pte = xen_set_pte_init, |
319f3ba5 JF |
2058 | .set_pte_at = xen_set_pte_at, |
2059 | .set_pmd = xen_set_pmd_hyper, | |
2060 | ||
2061 | .ptep_modify_prot_start = __ptep_modify_prot_start, | |
2062 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
2063 | ||
da5de7c2 JF |
2064 | .pte_val = PV_CALLEE_SAVE(xen_pte_val), |
2065 | .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), | |
319f3ba5 | 2066 | |
da5de7c2 JF |
2067 | .make_pte = PV_CALLEE_SAVE(xen_make_pte), |
2068 | .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), | |
319f3ba5 JF |
2069 | |
2070 | #ifdef CONFIG_X86_PAE | |
2071 | .set_pte_atomic = xen_set_pte_atomic, | |
319f3ba5 JF |
2072 | .pte_clear = xen_pte_clear, |
2073 | .pmd_clear = xen_pmd_clear, | |
2074 | #endif /* CONFIG_X86_PAE */ | |
2075 | .set_pud = xen_set_pud_hyper, | |
2076 | ||
da5de7c2 JF |
2077 | .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), |
2078 | .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), | |
319f3ba5 JF |
2079 | |
2080 | #if PAGETABLE_LEVELS == 4 | |
da5de7c2 JF |
2081 | .pud_val = PV_CALLEE_SAVE(xen_pud_val), |
2082 | .make_pud = PV_CALLEE_SAVE(xen_make_pud), | |
319f3ba5 JF |
2083 | .set_pgd = xen_set_pgd_hyper, |
2084 | ||
b96229b5 JF |
2085 | .alloc_pud = xen_alloc_pmd_init, |
2086 | .release_pud = xen_release_pmd_init, | |
319f3ba5 JF |
2087 | #endif /* PAGETABLE_LEVELS == 4 */ |
2088 | ||
2089 | .activate_mm = xen_activate_mm, | |
2090 | .dup_mmap = xen_dup_mmap, | |
2091 | .exit_mmap = xen_exit_mmap, | |
2092 | ||
2093 | .lazy_mode = { | |
2094 | .enter = paravirt_enter_lazy_mmu, | |
b407fc57 | 2095 | .leave = xen_leave_lazy_mmu, |
319f3ba5 JF |
2096 | }, |
2097 | ||
2098 | .set_fixmap = xen_set_fixmap, | |
2099 | }; | |
2100 | ||
030cb6c0 TG |
2101 | void __init xen_init_mmu_ops(void) |
2102 | { | |
2103 | x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start; | |
2104 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; | |
2105 | pv_mmu_ops = xen_mmu_ops; | |
d2cb2145 | 2106 | |
98511f35 | 2107 | memset(dummy_mapping, 0xff, PAGE_SIZE); |
030cb6c0 | 2108 | } |
319f3ba5 | 2109 | |
08bbc9da AN |
2110 | /* Protected by xen_reservation_lock. */ |
2111 | #define MAX_CONTIG_ORDER 9 /* 2MB */ | |
2112 | static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; | |
2113 | ||
2114 | #define VOID_PTE (mfn_pte(0, __pgprot(0))) | |
2115 | static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, | |
2116 | unsigned long *in_frames, | |
2117 | unsigned long *out_frames) | |
2118 | { | |
2119 | int i; | |
2120 | struct multicall_space mcs; | |
2121 | ||
2122 | xen_mc_batch(); | |
2123 | for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { | |
2124 | mcs = __xen_mc_entry(0); | |
2125 | ||
2126 | if (in_frames) | |
2127 | in_frames[i] = virt_to_mfn(vaddr); | |
2128 | ||
2129 | MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); | |
6eaa412f | 2130 | __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); |
08bbc9da AN |
2131 | |
2132 | if (out_frames) | |
2133 | out_frames[i] = virt_to_pfn(vaddr); | |
2134 | } | |
2135 | xen_mc_issue(0); | |
2136 | } | |
2137 | ||
2138 | /* | |
2139 | * Update the pfn-to-mfn mappings for a virtual address range, either to | |
2140 | * point to an array of mfns, or contiguously from a single starting | |
2141 | * mfn. | |
2142 | */ | |
2143 | static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, | |
2144 | unsigned long *mfns, | |
2145 | unsigned long first_mfn) | |
2146 | { | |
2147 | unsigned i, limit; | |
2148 | unsigned long mfn; | |
2149 | ||
2150 | xen_mc_batch(); | |
2151 | ||
2152 | limit = 1u << order; | |
2153 | for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { | |
2154 | struct multicall_space mcs; | |
2155 | unsigned flags; | |
2156 | ||
2157 | mcs = __xen_mc_entry(0); | |
2158 | if (mfns) | |
2159 | mfn = mfns[i]; | |
2160 | else | |
2161 | mfn = first_mfn + i; | |
2162 | ||
2163 | if (i < (limit - 1)) | |
2164 | flags = 0; | |
2165 | else { | |
2166 | if (order == 0) | |
2167 | flags = UVMF_INVLPG | UVMF_ALL; | |
2168 | else | |
2169 | flags = UVMF_TLB_FLUSH | UVMF_ALL; | |
2170 | } | |
2171 | ||
2172 | MULTI_update_va_mapping(mcs.mc, vaddr, | |
2173 | mfn_pte(mfn, PAGE_KERNEL), flags); | |
2174 | ||
2175 | set_phys_to_machine(virt_to_pfn(vaddr), mfn); | |
2176 | } | |
2177 | ||
2178 | xen_mc_issue(0); | |
2179 | } | |
2180 | ||
2181 | /* | |
2182 | * Perform the hypercall to exchange a region of our pfns to point to | |
2183 | * memory with the required contiguous alignment. Takes the pfns as | |
2184 | * input, and populates mfns as output. | |
2185 | * | |
2186 | * Returns a success code indicating whether the hypervisor was able to | |
2187 | * satisfy the request or not. | |
2188 | */ | |
2189 | static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, | |
2190 | unsigned long *pfns_in, | |
2191 | unsigned long extents_out, | |
2192 | unsigned int order_out, | |
2193 | unsigned long *mfns_out, | |
2194 | unsigned int address_bits) | |
2195 | { | |
2196 | long rc; | |
2197 | int success; | |
2198 | ||
2199 | struct xen_memory_exchange exchange = { | |
2200 | .in = { | |
2201 | .nr_extents = extents_in, | |
2202 | .extent_order = order_in, | |
2203 | .extent_start = pfns_in, | |
2204 | .domid = DOMID_SELF | |
2205 | }, | |
2206 | .out = { | |
2207 | .nr_extents = extents_out, | |
2208 | .extent_order = order_out, | |
2209 | .extent_start = mfns_out, | |
2210 | .address_bits = address_bits, | |
2211 | .domid = DOMID_SELF | |
2212 | } | |
2213 | }; | |
2214 | ||
2215 | BUG_ON(extents_in << order_in != extents_out << order_out); | |
2216 | ||
2217 | rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); | |
2218 | success = (exchange.nr_exchanged == extents_in); | |
2219 | ||
2220 | BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); | |
2221 | BUG_ON(success && (rc != 0)); | |
2222 | ||
2223 | return success; | |
2224 | } | |
2225 | ||
2226 | int xen_create_contiguous_region(unsigned long vstart, unsigned int order, | |
2227 | unsigned int address_bits) | |
2228 | { | |
2229 | unsigned long *in_frames = discontig_frames, out_frame; | |
2230 | unsigned long flags; | |
2231 | int success; | |
2232 | ||
2233 | /* | |
2234 | * Currently an auto-translated guest will not perform I/O, nor will | |
2235 | * it require PAE page directories below 4GB. Therefore any calls to | |
2236 | * this function are redundant and can be ignored. | |
2237 | */ | |
2238 | ||
2239 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2240 | return 0; | |
2241 | ||
2242 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2243 | return -ENOMEM; | |
2244 | ||
2245 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2246 | ||
08bbc9da AN |
2247 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2248 | ||
2249 | /* 1. Zap current PTEs, remembering MFNs. */ | |
2250 | xen_zap_pfn_range(vstart, order, in_frames, NULL); | |
2251 | ||
2252 | /* 2. Get a new contiguous memory extent. */ | |
2253 | out_frame = virt_to_pfn(vstart); | |
2254 | success = xen_exchange_memory(1UL << order, 0, in_frames, | |
2255 | 1, order, &out_frame, | |
2256 | address_bits); | |
2257 | ||
2258 | /* 3. Map the new extent in place of old pages. */ | |
2259 | if (success) | |
2260 | xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); | |
2261 | else | |
2262 | xen_remap_exchanged_ptes(vstart, order, in_frames, 0); | |
2263 | ||
2264 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
2265 | ||
2266 | return success ? 0 : -ENOMEM; | |
2267 | } | |
2268 | EXPORT_SYMBOL_GPL(xen_create_contiguous_region); | |
2269 | ||
2270 | void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order) | |
2271 | { | |
2272 | unsigned long *out_frames = discontig_frames, in_frame; | |
2273 | unsigned long flags; | |
2274 | int success; | |
2275 | ||
2276 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2277 | return; | |
2278 | ||
2279 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2280 | return; | |
2281 | ||
2282 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2283 | ||
08bbc9da AN |
2284 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2285 | ||
2286 | /* 1. Find start MFN of contiguous extent. */ | |
2287 | in_frame = virt_to_mfn(vstart); | |
2288 | ||
2289 | /* 2. Zap current PTEs. */ | |
2290 | xen_zap_pfn_range(vstart, order, NULL, out_frames); | |
2291 | ||
2292 | /* 3. Do the exchange for non-contiguous MFNs. */ | |
2293 | success = xen_exchange_memory(1, order, &in_frame, 1UL << order, | |
2294 | 0, out_frames, 0); | |
2295 | ||
2296 | /* 4. Map new pages in place of old pages. */ | |
2297 | if (success) | |
2298 | xen_remap_exchanged_ptes(vstart, order, out_frames, 0); | |
2299 | else | |
2300 | xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); | |
2301 | ||
2302 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
030cb6c0 | 2303 | } |
08bbc9da | 2304 | EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region); |
319f3ba5 | 2305 | |
ca65f9fc | 2306 | #ifdef CONFIG_XEN_PVHVM |
59151001 SS |
2307 | static void xen_hvm_exit_mmap(struct mm_struct *mm) |
2308 | { | |
2309 | struct xen_hvm_pagetable_dying a; | |
2310 | int rc; | |
2311 | ||
2312 | a.domid = DOMID_SELF; | |
2313 | a.gpa = __pa(mm->pgd); | |
2314 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2315 | WARN_ON_ONCE(rc < 0); | |
2316 | } | |
2317 | ||
2318 | static int is_pagetable_dying_supported(void) | |
2319 | { | |
2320 | struct xen_hvm_pagetable_dying a; | |
2321 | int rc = 0; | |
2322 | ||
2323 | a.domid = DOMID_SELF; | |
2324 | a.gpa = 0x00; | |
2325 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2326 | if (rc < 0) { | |
2327 | printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n"); | |
2328 | return 0; | |
2329 | } | |
2330 | return 1; | |
2331 | } | |
2332 | ||
2333 | void __init xen_hvm_init_mmu_ops(void) | |
2334 | { | |
2335 | if (is_pagetable_dying_supported()) | |
2336 | pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap; | |
2337 | } | |
ca65f9fc | 2338 | #endif |
59151001 | 2339 | |
de1ef206 IC |
2340 | #define REMAP_BATCH_SIZE 16 |
2341 | ||
2342 | struct remap_data { | |
2343 | unsigned long mfn; | |
2344 | pgprot_t prot; | |
2345 | struct mmu_update *mmu_update; | |
2346 | }; | |
2347 | ||
2348 | static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token, | |
2349 | unsigned long addr, void *data) | |
2350 | { | |
2351 | struct remap_data *rmd = data; | |
2352 | pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot)); | |
2353 | ||
2354 | rmd->mmu_update->ptr = arbitrary_virt_to_machine(ptep).maddr; | |
2355 | rmd->mmu_update->val = pte_val_ma(pte); | |
2356 | rmd->mmu_update++; | |
2357 | ||
2358 | return 0; | |
2359 | } | |
2360 | ||
2361 | int xen_remap_domain_mfn_range(struct vm_area_struct *vma, | |
2362 | unsigned long addr, | |
2363 | unsigned long mfn, int nr, | |
2364 | pgprot_t prot, unsigned domid) | |
2365 | { | |
2366 | struct remap_data rmd; | |
2367 | struct mmu_update mmu_update[REMAP_BATCH_SIZE]; | |
2368 | int batch; | |
2369 | unsigned long range; | |
2370 | int err = 0; | |
2371 | ||
2372 | prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP); | |
2373 | ||
e060e7af SS |
2374 | BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) == |
2375 | (VM_PFNMAP | VM_RESERVED | VM_IO))); | |
de1ef206 IC |
2376 | |
2377 | rmd.mfn = mfn; | |
2378 | rmd.prot = prot; | |
2379 | ||
2380 | while (nr) { | |
2381 | batch = min(REMAP_BATCH_SIZE, nr); | |
2382 | range = (unsigned long)batch << PAGE_SHIFT; | |
2383 | ||
2384 | rmd.mmu_update = mmu_update; | |
2385 | err = apply_to_page_range(vma->vm_mm, addr, range, | |
2386 | remap_area_mfn_pte_fn, &rmd); | |
2387 | if (err) | |
2388 | goto out; | |
2389 | ||
2390 | err = -EFAULT; | |
2391 | if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0) | |
2392 | goto out; | |
2393 | ||
2394 | nr -= batch; | |
2395 | addr += range; | |
2396 | } | |
2397 | ||
2398 | err = 0; | |
2399 | out: | |
2400 | ||
2401 | flush_tlb_all(); | |
2402 | ||
2403 | return err; | |
2404 | } | |
2405 | EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); | |
2406 | ||
994025ca JF |
2407 | #ifdef CONFIG_XEN_DEBUG_FS |
2408 | ||
2222e71b KRW |
2409 | static int p2m_dump_open(struct inode *inode, struct file *filp) |
2410 | { | |
2411 | return single_open(filp, p2m_dump_show, NULL); | |
2412 | } | |
2413 | ||
2414 | static const struct file_operations p2m_dump_fops = { | |
2415 | .open = p2m_dump_open, | |
2416 | .read = seq_read, | |
2417 | .llseek = seq_lseek, | |
2418 | .release = single_release, | |
2419 | }; | |
2420 | ||
994025ca JF |
2421 | static struct dentry *d_mmu_debug; |
2422 | ||
2423 | static int __init xen_mmu_debugfs(void) | |
2424 | { | |
2425 | struct dentry *d_xen = xen_init_debugfs(); | |
2426 | ||
2427 | if (d_xen == NULL) | |
2428 | return -ENOMEM; | |
2429 | ||
2430 | d_mmu_debug = debugfs_create_dir("mmu", d_xen); | |
2431 | ||
2432 | debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats); | |
2433 | ||
2434 | debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update); | |
2435 | debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug, | |
2436 | &mmu_stats.pgd_update_pinned); | |
2437 | debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug, | |
2438 | &mmu_stats.pgd_update_pinned); | |
2439 | ||
2440 | debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update); | |
2441 | debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug, | |
2442 | &mmu_stats.pud_update_pinned); | |
2443 | debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug, | |
2444 | &mmu_stats.pud_update_pinned); | |
2445 | ||
2446 | debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update); | |
2447 | debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug, | |
2448 | &mmu_stats.pmd_update_pinned); | |
2449 | debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug, | |
2450 | &mmu_stats.pmd_update_pinned); | |
2451 | ||
2452 | debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update); | |
2453 | // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug, | |
2454 | // &mmu_stats.pte_update_pinned); | |
2455 | debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug, | |
2456 | &mmu_stats.pte_update_pinned); | |
2457 | ||
2458 | debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update); | |
2459 | debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug, | |
2460 | &mmu_stats.mmu_update_extended); | |
2461 | xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug, | |
2462 | mmu_stats.mmu_update_histo, 20); | |
2463 | ||
2464 | debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at); | |
2465 | debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug, | |
2466 | &mmu_stats.set_pte_at_batched); | |
2467 | debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug, | |
2468 | &mmu_stats.set_pte_at_current); | |
2469 | debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug, | |
2470 | &mmu_stats.set_pte_at_kernel); | |
2471 | ||
2472 | debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit); | |
2473 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, | |
2474 | &mmu_stats.prot_commit_batched); | |
2475 | ||
2222e71b | 2476 | debugfs_create_file("p2m", 0600, d_mmu_debug, NULL, &p2m_dump_fops); |
994025ca JF |
2477 | return 0; |
2478 | } | |
2479 | fs_initcall(xen_mmu_debugfs); | |
2480 | ||
2481 | #endif /* CONFIG_XEN_DEBUG_FS */ |