Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ryusuke...
[linux-2.6-block.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
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1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
44408ad7 45#include <linux/module.h>
3b827c1b
JF
46
47#include <asm/pgtable.h>
48#include <asm/tlbflush.h>
5deb30d1 49#include <asm/fixmap.h>
3b827c1b 50#include <asm/mmu_context.h>
319f3ba5 51#include <asm/setup.h>
f4f97b3e 52#include <asm/paravirt.h>
cbcd79c2 53#include <asm/linkage.h>
3b827c1b
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54
55#include <asm/xen/hypercall.h>
f4f97b3e 56#include <asm/xen/hypervisor.h>
3b827c1b
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57
58#include <xen/page.h>
59#include <xen/interface/xen.h>
319f3ba5
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60#include <xen/interface/version.h>
61#include <xen/hvc-console.h>
3b827c1b 62
f4f97b3e 63#include "multicalls.h"
3b827c1b 64#include "mmu.h"
994025ca
JF
65#include "debugfs.h"
66
67#define MMU_UPDATE_HISTO 30
68
69#ifdef CONFIG_XEN_DEBUG_FS
70
71static struct {
72 u32 pgd_update;
73 u32 pgd_update_pinned;
74 u32 pgd_update_batched;
75
76 u32 pud_update;
77 u32 pud_update_pinned;
78 u32 pud_update_batched;
79
80 u32 pmd_update;
81 u32 pmd_update_pinned;
82 u32 pmd_update_batched;
83
84 u32 pte_update;
85 u32 pte_update_pinned;
86 u32 pte_update_batched;
87
88 u32 mmu_update;
89 u32 mmu_update_extended;
90 u32 mmu_update_histo[MMU_UPDATE_HISTO];
91
92 u32 prot_commit;
93 u32 prot_commit_batched;
94
95 u32 set_pte_at;
96 u32 set_pte_at_batched;
97 u32 set_pte_at_pinned;
98 u32 set_pte_at_current;
99 u32 set_pte_at_kernel;
100} mmu_stats;
101
102static u8 zero_stats;
103
104static inline void check_zero(void)
105{
106 if (unlikely(zero_stats)) {
107 memset(&mmu_stats, 0, sizeof(mmu_stats));
108 zero_stats = 0;
109 }
110}
111
112#define ADD_STATS(elem, val) \
113 do { check_zero(); mmu_stats.elem += (val); } while(0)
114
115#else /* !CONFIG_XEN_DEBUG_FS */
116
117#define ADD_STATS(elem, val) do { (void)(val); } while(0)
118
119#endif /* CONFIG_XEN_DEBUG_FS */
3b827c1b 120
319f3ba5
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121
122/*
123 * Identity map, in addition to plain kernel map. This needs to be
124 * large enough to allocate page table pages to allocate the rest.
125 * Each page can map 2MB.
126 */
127static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
128
129#ifdef CONFIG_X86_64
130/* l3 pud for userspace vsyscall mapping */
131static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
132#endif /* CONFIG_X86_64 */
133
134/*
135 * Note about cr3 (pagetable base) values:
136 *
137 * xen_cr3 contains the current logical cr3 value; it contains the
138 * last set cr3. This may not be the current effective cr3, because
139 * its update may be being lazily deferred. However, a vcpu looking
140 * at its own cr3 can use this value knowing that it everything will
141 * be self-consistent.
142 *
143 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
144 * hypercall to set the vcpu cr3 is complete (so it may be a little
145 * out of date, but it will never be set early). If one vcpu is
146 * looking at another vcpu's cr3 value, it should use this variable.
147 */
148DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
149DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
150
151
d6182fbf
JF
152/*
153 * Just beyond the highest usermode address. STACK_TOP_MAX has a
154 * redzone above it, so round it up to a PGD boundary.
155 */
156#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
157
158
d451bb7a 159#define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
cf0923ea 160#define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
d451bb7a 161
cf0923ea 162/* Placeholder for holes in the address space */
cbcd79c2 163static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
cf0923ea
JF
164 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
165
166 /* Array of pointers to pages containing p2m entries */
cbcd79c2 167static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
cf0923ea 168 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
d451bb7a 169
d5edbc1f 170/* Arrays of p2m arrays expressed in mfns used for save/restore */
cbcd79c2 171static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
d5edbc1f 172
cbcd79c2
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173static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
174 __page_aligned_bss;
d5edbc1f 175
d451bb7a
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176static inline unsigned p2m_top_index(unsigned long pfn)
177{
8006ec3e 178 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
d451bb7a
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179 return pfn / P2M_ENTRIES_PER_PAGE;
180}
181
182static inline unsigned p2m_index(unsigned long pfn)
183{
184 return pfn % P2M_ENTRIES_PER_PAGE;
185}
186
d5edbc1f 187/* Build the parallel p2m_top_mfn structures */
cdaead6b 188static void __init xen_build_mfn_list_list(void)
d5edbc1f
JF
189{
190 unsigned pfn, idx;
191
f63c2f24 192 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
d5edbc1f
JF
193 unsigned topidx = p2m_top_index(pfn);
194
195 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
196 }
197
f63c2f24 198 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
d5edbc1f
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199 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
200 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
201 }
cdaead6b 202}
d5edbc1f 203
cdaead6b
JF
204void xen_setup_mfn_list_list(void)
205{
d5edbc1f
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206 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
207
208 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
209 virt_to_mfn(p2m_top_mfn_list);
210 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
211}
212
213/* Set up p2m_top to point to the domain-builder provided p2m pages */
d451bb7a
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214void __init xen_build_dynamic_phys_to_machine(void)
215{
d451bb7a 216 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
8006ec3e 217 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
d5edbc1f 218 unsigned pfn;
d451bb7a 219
f63c2f24 220 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
d451bb7a
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221 unsigned topidx = p2m_top_index(pfn);
222
223 p2m_top[topidx] = &mfn_list[pfn];
224 }
cdaead6b
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225
226 xen_build_mfn_list_list();
d451bb7a
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227}
228
229unsigned long get_phys_to_machine(unsigned long pfn)
230{
231 unsigned topidx, idx;
232
8006ec3e
JF
233 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
234 return INVALID_P2M_ENTRY;
235
d451bb7a 236 topidx = p2m_top_index(pfn);
d451bb7a
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237 idx = p2m_index(pfn);
238 return p2m_top[topidx][idx];
239}
15ce6005 240EXPORT_SYMBOL_GPL(get_phys_to_machine);
d451bb7a 241
e791ca0f
JF
242/* install a new p2m_top page */
243bool install_p2mtop_page(unsigned long pfn, unsigned long *p)
d451bb7a 244{
e791ca0f
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245 unsigned topidx = p2m_top_index(pfn);
246 unsigned long **pfnp, *mfnp;
d451bb7a
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247 unsigned i;
248
e791ca0f
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249 pfnp = &p2m_top[topidx];
250 mfnp = &p2m_top_mfn[topidx];
d451bb7a 251
f63c2f24 252 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
d451bb7a
JF
253 p[i] = INVALID_P2M_ENTRY;
254
e791ca0f 255 if (cmpxchg(pfnp, p2m_missing, p) == p2m_missing) {
d5edbc1f 256 *mfnp = virt_to_mfn(p);
e791ca0f
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257 return true;
258 }
259
260 return false;
d451bb7a
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261}
262
e791ca0f 263static void alloc_p2m(unsigned long pfn)
d451bb7a 264{
e791ca0f 265 unsigned long *p;
d451bb7a 266
e791ca0f
JF
267 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
268 BUG_ON(p == NULL);
269
270 if (!install_p2mtop_page(pfn, p))
271 free_page((unsigned long)p);
272}
273
274/* Try to install p2m mapping; fail if intermediate bits missing */
275bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
276{
277 unsigned topidx, idx;
8006ec3e
JF
278
279 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
280 BUG_ON(mfn != INVALID_P2M_ENTRY);
e791ca0f 281 return true;
d451bb7a
JF
282 }
283
284 topidx = p2m_top_index(pfn);
cf0923ea 285 if (p2m_top[topidx] == p2m_missing) {
d451bb7a 286 if (mfn == INVALID_P2M_ENTRY)
e791ca0f
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287 return true;
288 return false;
d451bb7a
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289 }
290
291 idx = p2m_index(pfn);
292 p2m_top[topidx][idx] = mfn;
e791ca0f
JF
293
294 return true;
295}
296
297void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
298{
299 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
300 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
301 return;
302 }
303
304 if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
305 alloc_p2m(pfn);
306
307 if (!__set_phys_to_machine(pfn, mfn))
308 BUG();
309 }
d451bb7a
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310}
311
9976b39b
JF
312unsigned long arbitrary_virt_to_mfn(void *vaddr)
313{
314 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
315
316 return PFN_DOWN(maddr.maddr);
317}
318
ce803e70 319xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 320{
ce803e70 321 unsigned long address = (unsigned long)vaddr;
da7bfc50 322 unsigned int level;
9f32d21c
CL
323 pte_t *pte;
324 unsigned offset;
3b827c1b 325
9f32d21c
CL
326 /*
327 * if the PFN is in the linear mapped vaddr range, we can just use
328 * the (quick) virt_to_machine() p2m lookup
329 */
330 if (virt_addr_valid(vaddr))
331 return virt_to_machine(vaddr);
332
333 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 334
9f32d21c
CL
335 pte = lookup_address(address, &level);
336 BUG_ON(pte == NULL);
337 offset = address & ~PAGE_MASK;
ebd879e3 338 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b
JF
339}
340
341void make_lowmem_page_readonly(void *vaddr)
342{
343 pte_t *pte, ptev;
344 unsigned long address = (unsigned long)vaddr;
da7bfc50 345 unsigned int level;
3b827c1b 346
f0646e43 347 pte = lookup_address(address, &level);
3b827c1b
JF
348 BUG_ON(pte == NULL);
349
350 ptev = pte_wrprotect(*pte);
351
352 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
353 BUG();
354}
355
356void make_lowmem_page_readwrite(void *vaddr)
357{
358 pte_t *pte, ptev;
359 unsigned long address = (unsigned long)vaddr;
da7bfc50 360 unsigned int level;
3b827c1b 361
f0646e43 362 pte = lookup_address(address, &level);
3b827c1b
JF
363 BUG_ON(pte == NULL);
364
365 ptev = pte_mkwrite(*pte);
366
367 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
368 BUG();
369}
370
371
7708ad64 372static bool xen_page_pinned(void *ptr)
e2426cf8
JF
373{
374 struct page *page = virt_to_page(ptr);
375
376 return PagePinned(page);
377}
378
7708ad64 379static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 380{
d66bf8fc
JF
381 struct multicall_space mcs;
382 struct mmu_update *u;
3b827c1b 383
400d3494
JF
384 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
385
994025ca
JF
386 if (mcs.mc != NULL) {
387 ADD_STATS(mmu_update_extended, 1);
388 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
389
400d3494 390 mcs.mc->args[1]++;
994025ca
JF
391
392 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
393 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
394 else
395 ADD_STATS(mmu_update_histo[0], 1);
396 } else {
397 ADD_STATS(mmu_update, 1);
400d3494
JF
398 mcs = __xen_mc_entry(sizeof(*u));
399 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
994025ca 400 ADD_STATS(mmu_update_histo[1], 1);
400d3494 401 }
d66bf8fc 402
d66bf8fc 403 u = mcs.args;
400d3494
JF
404 *u = *update;
405}
406
407void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
408{
409 struct mmu_update u;
410
411 preempt_disable();
412
413 xen_mc_batch();
414
ce803e70
JF
415 /* ptr may be ioremapped for 64-bit pagetable setup */
416 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 417 u.val = pmd_val_ma(val);
7708ad64 418 xen_extend_mmu_update(&u);
d66bf8fc 419
994025ca
JF
420 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
421
d66bf8fc
JF
422 xen_mc_issue(PARAVIRT_LAZY_MMU);
423
424 preempt_enable();
3b827c1b
JF
425}
426
e2426cf8
JF
427void xen_set_pmd(pmd_t *ptr, pmd_t val)
428{
994025ca
JF
429 ADD_STATS(pmd_update, 1);
430
e2426cf8
JF
431 /* If page is not pinned, we can just update the entry
432 directly */
7708ad64 433 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
434 *ptr = val;
435 return;
436 }
437
994025ca
JF
438 ADD_STATS(pmd_update_pinned, 1);
439
e2426cf8
JF
440 xen_set_pmd_hyper(ptr, val);
441}
442
3b827c1b
JF
443/*
444 * Associate a virtual page frame with a given physical page frame
445 * and protection flags for that frame.
446 */
447void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
448{
836fe2f2 449 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
450}
451
452void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
453 pte_t *ptep, pte_t pteval)
454{
994025ca
JF
455 ADD_STATS(set_pte_at, 1);
456// ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
457 ADD_STATS(set_pte_at_current, mm == current->mm);
458 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
459
d66bf8fc 460 if (mm == current->mm || mm == &init_mm) {
8965c1c0 461 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
d66bf8fc
JF
462 struct multicall_space mcs;
463 mcs = xen_mc_entry(0);
464
465 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
994025ca 466 ADD_STATS(set_pte_at_batched, 1);
d66bf8fc 467 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 468 goto out;
d66bf8fc
JF
469 } else
470 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
2bd50036 471 goto out;
d66bf8fc
JF
472 }
473 xen_set_pte(ptep, pteval);
2bd50036 474
2829b449 475out: return;
3b827c1b
JF
476}
477
f63c2f24
T
478pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
479 unsigned long addr, pte_t *ptep)
947a69c9 480{
e57778a1
JF
481 /* Just return the pte as-is. We preserve the bits on commit */
482 return *ptep;
483}
484
485void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
486 pte_t *ptep, pte_t pte)
487{
400d3494 488 struct mmu_update u;
e57778a1 489
400d3494 490 xen_mc_batch();
947a69c9 491
9f32d21c 492 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 493 u.val = pte_val_ma(pte);
7708ad64 494 xen_extend_mmu_update(&u);
947a69c9 495
994025ca
JF
496 ADD_STATS(prot_commit, 1);
497 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
498
e57778a1 499 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
500}
501
ebb9cfe2
JF
502/* Assume pteval_t is equivalent to all the other *val_t types. */
503static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 504{
ebb9cfe2 505 if (val & _PAGE_PRESENT) {
59438c9f 506 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 507 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 508 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 509 }
947a69c9 510
ebb9cfe2 511 return val;
947a69c9
JF
512}
513
ebb9cfe2 514static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 515{
ebb9cfe2 516 if (val & _PAGE_PRESENT) {
59438c9f 517 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 518 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 519 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
947a69c9
JF
520 }
521
ebb9cfe2 522 return val;
947a69c9
JF
523}
524
ebb9cfe2 525pteval_t xen_pte_val(pte_t pte)
947a69c9 526{
ebb9cfe2 527 return pte_mfn_to_pfn(pte.pte);
947a69c9 528}
da5de7c2 529PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 530
947a69c9
JF
531pgdval_t xen_pgd_val(pgd_t pgd)
532{
ebb9cfe2 533 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 534}
da5de7c2 535PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9
JF
536
537pte_t xen_make_pte(pteval_t pte)
538{
ebb9cfe2
JF
539 pte = pte_pfn_to_mfn(pte);
540 return native_make_pte(pte);
947a69c9 541}
da5de7c2 542PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9
JF
543
544pgd_t xen_make_pgd(pgdval_t pgd)
545{
ebb9cfe2
JF
546 pgd = pte_pfn_to_mfn(pgd);
547 return native_make_pgd(pgd);
947a69c9 548}
da5de7c2 549PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9
JF
550
551pmdval_t xen_pmd_val(pmd_t pmd)
552{
ebb9cfe2 553 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 554}
da5de7c2 555PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 556
e2426cf8 557void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 558{
400d3494 559 struct mmu_update u;
f4f97b3e 560
d66bf8fc
JF
561 preempt_disable();
562
400d3494
JF
563 xen_mc_batch();
564
ce803e70
JF
565 /* ptr may be ioremapped for 64-bit pagetable setup */
566 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 567 u.val = pud_val_ma(val);
7708ad64 568 xen_extend_mmu_update(&u);
d66bf8fc 569
994025ca
JF
570 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
571
d66bf8fc
JF
572 xen_mc_issue(PARAVIRT_LAZY_MMU);
573
574 preempt_enable();
f4f97b3e
JF
575}
576
e2426cf8
JF
577void xen_set_pud(pud_t *ptr, pud_t val)
578{
994025ca
JF
579 ADD_STATS(pud_update, 1);
580
e2426cf8
JF
581 /* If page is not pinned, we can just update the entry
582 directly */
7708ad64 583 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
584 *ptr = val;
585 return;
586 }
587
994025ca
JF
588 ADD_STATS(pud_update_pinned, 1);
589
e2426cf8
JF
590 xen_set_pud_hyper(ptr, val);
591}
592
f4f97b3e
JF
593void xen_set_pte(pte_t *ptep, pte_t pte)
594{
994025ca
JF
595 ADD_STATS(pte_update, 1);
596// ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
597 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
598
f6e58732 599#ifdef CONFIG_X86_PAE
f4f97b3e
JF
600 ptep->pte_high = pte.pte_high;
601 smp_wmb();
602 ptep->pte_low = pte.pte_low;
f6e58732
JF
603#else
604 *ptep = pte;
605#endif
f4f97b3e
JF
606}
607
f6e58732 608#ifdef CONFIG_X86_PAE
3b827c1b
JF
609void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
610{
f6e58732 611 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
612}
613
614void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
615{
616 ptep->pte_low = 0;
617 smp_wmb(); /* make sure low gets written first */
618 ptep->pte_high = 0;
619}
620
621void xen_pmd_clear(pmd_t *pmdp)
622{
e2426cf8 623 set_pmd(pmdp, __pmd(0));
3b827c1b 624}
f6e58732 625#endif /* CONFIG_X86_PAE */
3b827c1b 626
abf33038 627pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 628{
ebb9cfe2 629 pmd = pte_pfn_to_mfn(pmd);
947a69c9 630 return native_make_pmd(pmd);
3b827c1b 631}
da5de7c2 632PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 633
f6e58732
JF
634#if PAGETABLE_LEVELS == 4
635pudval_t xen_pud_val(pud_t pud)
636{
637 return pte_mfn_to_pfn(pud.pud);
638}
da5de7c2 639PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732
JF
640
641pud_t xen_make_pud(pudval_t pud)
642{
643 pud = pte_pfn_to_mfn(pud);
644
645 return native_make_pud(pud);
646}
da5de7c2 647PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 648
d6182fbf 649pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 650{
d6182fbf
JF
651 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
652 unsigned offset = pgd - pgd_page;
653 pgd_t *user_ptr = NULL;
f6e58732 654
d6182fbf
JF
655 if (offset < pgd_index(USER_LIMIT)) {
656 struct page *page = virt_to_page(pgd_page);
657 user_ptr = (pgd_t *)page->private;
658 if (user_ptr)
659 user_ptr += offset;
660 }
f6e58732 661
d6182fbf
JF
662 return user_ptr;
663}
664
665static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
666{
667 struct mmu_update u;
f6e58732
JF
668
669 u.ptr = virt_to_machine(ptr).maddr;
670 u.val = pgd_val_ma(val);
7708ad64 671 xen_extend_mmu_update(&u);
d6182fbf
JF
672}
673
674/*
675 * Raw hypercall-based set_pgd, intended for in early boot before
676 * there's a page structure. This implies:
677 * 1. The only existing pagetable is the kernel's
678 * 2. It is always pinned
679 * 3. It has no user pagetable attached to it
680 */
681void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
682{
683 preempt_disable();
684
685 xen_mc_batch();
686
687 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
688
689 xen_mc_issue(PARAVIRT_LAZY_MMU);
690
691 preempt_enable();
692}
693
694void xen_set_pgd(pgd_t *ptr, pgd_t val)
695{
d6182fbf
JF
696 pgd_t *user_ptr = xen_get_user_pgd(ptr);
697
994025ca
JF
698 ADD_STATS(pgd_update, 1);
699
f6e58732
JF
700 /* If page is not pinned, we can just update the entry
701 directly */
7708ad64 702 if (!xen_page_pinned(ptr)) {
f6e58732 703 *ptr = val;
d6182fbf 704 if (user_ptr) {
7708ad64 705 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
706 *user_ptr = val;
707 }
f6e58732
JF
708 return;
709 }
710
994025ca
JF
711 ADD_STATS(pgd_update_pinned, 1);
712 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
713
d6182fbf
JF
714 /* If it's pinned, then we can at least batch the kernel and
715 user updates together. */
716 xen_mc_batch();
717
718 __xen_set_pgd_hyper(ptr, val);
719 if (user_ptr)
720 __xen_set_pgd_hyper(user_ptr, val);
721
722 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
723}
724#endif /* PAGETABLE_LEVELS == 4 */
725
f4f97b3e 726/*
5deb30d1
JF
727 * (Yet another) pagetable walker. This one is intended for pinning a
728 * pagetable. This means that it walks a pagetable and calls the
729 * callback function on each page it finds making up the page table,
730 * at every level. It walks the entire pagetable, but it only bothers
731 * pinning pte pages which are below limit. In the normal case this
732 * will be STACK_TOP_MAX, but at boot we need to pin up to
733 * FIXADDR_TOP.
734 *
735 * For 32-bit the important bit is that we don't pin beyond there,
736 * because then we start getting into Xen's ptes.
737 *
738 * For 64-bit, we must skip the Xen hole in the middle of the address
739 * space, just after the big x86-64 virtual hole.
740 */
86bbc2c2
IC
741static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
742 int (*func)(struct mm_struct *mm, struct page *,
743 enum pt_level),
744 unsigned long limit)
3b827c1b 745{
f4f97b3e 746 int flush = 0;
5deb30d1
JF
747 unsigned hole_low, hole_high;
748 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
749 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 750
5deb30d1
JF
751 /* The limit is the last byte to be touched */
752 limit--;
753 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
754
755 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
756 return 0;
757
5deb30d1
JF
758 /*
759 * 64-bit has a great big hole in the middle of the address
760 * space, which contains the Xen mappings. On 32-bit these
761 * will end up making a zero-sized hole and so is a no-op.
762 */
d6182fbf 763 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
764 hole_high = pgd_index(PAGE_OFFSET);
765
766 pgdidx_limit = pgd_index(limit);
767#if PTRS_PER_PUD > 1
768 pudidx_limit = pud_index(limit);
769#else
770 pudidx_limit = 0;
771#endif
772#if PTRS_PER_PMD > 1
773 pmdidx_limit = pmd_index(limit);
774#else
775 pmdidx_limit = 0;
776#endif
777
5deb30d1 778 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 779 pud_t *pud;
3b827c1b 780
5deb30d1
JF
781 if (pgdidx >= hole_low && pgdidx < hole_high)
782 continue;
f4f97b3e 783
5deb30d1 784 if (!pgd_val(pgd[pgdidx]))
3b827c1b 785 continue;
f4f97b3e 786
5deb30d1 787 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
788
789 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 790 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 791
5deb30d1 792 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 793 pmd_t *pmd;
f4f97b3e 794
5deb30d1
JF
795 if (pgdidx == pgdidx_limit &&
796 pudidx > pudidx_limit)
797 goto out;
3b827c1b 798
5deb30d1 799 if (pud_none(pud[pudidx]))
3b827c1b 800 continue;
f4f97b3e 801
5deb30d1 802 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
803
804 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 805 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 806
5deb30d1
JF
807 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
808 struct page *pte;
809
810 if (pgdidx == pgdidx_limit &&
811 pudidx == pudidx_limit &&
812 pmdidx > pmdidx_limit)
813 goto out;
3b827c1b 814
5deb30d1 815 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
816 continue;
817
5deb30d1 818 pte = pmd_page(pmd[pmdidx]);
eefb47f6 819 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
820 }
821 }
822 }
11ad93e5 823
5deb30d1 824out:
11ad93e5
JF
825 /* Do the top level last, so that the callbacks can use it as
826 a cue to do final things like tlb flushes. */
eefb47f6 827 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
828
829 return flush;
3b827c1b
JF
830}
831
86bbc2c2
IC
832static int xen_pgd_walk(struct mm_struct *mm,
833 int (*func)(struct mm_struct *mm, struct page *,
834 enum pt_level),
835 unsigned long limit)
836{
837 return __xen_pgd_walk(mm, mm->pgd, func, limit);
838}
839
7708ad64
JF
840/* If we're using split pte locks, then take the page's lock and
841 return a pointer to it. Otherwise return NULL. */
eefb47f6 842static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
843{
844 spinlock_t *ptl = NULL;
845
f7d0b926 846#if USE_SPLIT_PTLOCKS
74260714 847 ptl = __pte_lockptr(page);
eefb47f6 848 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
849#endif
850
851 return ptl;
852}
853
7708ad64 854static void xen_pte_unlock(void *v)
74260714
JF
855{
856 spinlock_t *ptl = v;
857 spin_unlock(ptl);
858}
859
860static void xen_do_pin(unsigned level, unsigned long pfn)
861{
862 struct mmuext_op *op;
863 struct multicall_space mcs;
864
865 mcs = __xen_mc_entry(sizeof(*op));
866 op = mcs.args;
867 op->cmd = level;
868 op->arg1.mfn = pfn_to_mfn(pfn);
869 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
870}
871
eefb47f6
JF
872static int xen_pin_page(struct mm_struct *mm, struct page *page,
873 enum pt_level level)
f4f97b3e 874{
d60cd46b 875 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
876 int flush;
877
878 if (pgfl)
879 flush = 0; /* already pinned */
880 else if (PageHighMem(page))
881 /* kmaps need flushing if we found an unpinned
882 highpage */
883 flush = 1;
884 else {
885 void *pt = lowmem_page_address(page);
886 unsigned long pfn = page_to_pfn(page);
887 struct multicall_space mcs = __xen_mc_entry(0);
74260714 888 spinlock_t *ptl;
f4f97b3e
JF
889
890 flush = 0;
891
11ad93e5
JF
892 /*
893 * We need to hold the pagetable lock between the time
894 * we make the pagetable RO and when we actually pin
895 * it. If we don't, then other users may come in and
896 * attempt to update the pagetable by writing it,
897 * which will fail because the memory is RO but not
898 * pinned, so Xen won't do the trap'n'emulate.
899 *
900 * If we're using split pte locks, we can't hold the
901 * entire pagetable's worth of locks during the
902 * traverse, because we may wrap the preempt count (8
903 * bits). The solution is to mark RO and pin each PTE
904 * page while holding the lock. This means the number
905 * of locks we end up holding is never more than a
906 * batch size (~32 entries, at present).
907 *
908 * If we're not using split pte locks, we needn't pin
909 * the PTE pages independently, because we're
910 * protected by the overall pagetable lock.
911 */
74260714
JF
912 ptl = NULL;
913 if (level == PT_PTE)
eefb47f6 914 ptl = xen_pte_lock(page, mm);
74260714 915
f4f97b3e
JF
916 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
917 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
918 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
919
11ad93e5 920 if (ptl) {
74260714
JF
921 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
922
74260714
JF
923 /* Queue a deferred unlock for when this batch
924 is completed. */
7708ad64 925 xen_mc_callback(xen_pte_unlock, ptl);
74260714 926 }
f4f97b3e
JF
927 }
928
929 return flush;
930}
3b827c1b 931
f4f97b3e
JF
932/* This is called just after a mm has been created, but it has not
933 been used yet. We need to make sure that its pagetable is all
934 read-only, and can be pinned. */
eefb47f6 935static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 936{
d05fdf31
JF
937 vm_unmap_aliases();
938
f4f97b3e 939 xen_mc_batch();
3b827c1b 940
86bbc2c2 941 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 942 /* re-enable interrupts for flushing */
f87e4cac 943 xen_mc_issue(0);
d05fdf31 944
f4f97b3e 945 kmap_flush_unused();
d05fdf31 946
f87e4cac
JF
947 xen_mc_batch();
948 }
f4f97b3e 949
d6182fbf
JF
950#ifdef CONFIG_X86_64
951 {
952 pgd_t *user_pgd = xen_get_user_pgd(pgd);
953
954 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
955
956 if (user_pgd) {
eefb47f6 957 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
958 xen_do_pin(MMUEXT_PIN_L4_TABLE,
959 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
960 }
961 }
962#else /* CONFIG_X86_32 */
5deb30d1
JF
963#ifdef CONFIG_X86_PAE
964 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 965 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 966 PT_PMD);
5deb30d1 967#endif
28499143 968 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 969#endif /* CONFIG_X86_64 */
f4f97b3e 970 xen_mc_issue(0);
3b827c1b
JF
971}
972
eefb47f6
JF
973static void xen_pgd_pin(struct mm_struct *mm)
974{
975 __xen_pgd_pin(mm, mm->pgd);
976}
977
0e91398f
JF
978/*
979 * On save, we need to pin all pagetables to make sure they get their
980 * mfns turned into pfns. Search the list for any unpinned pgds and pin
981 * them (unpinned pgds are not currently in use, probably because the
982 * process is under construction or destruction).
eefb47f6
JF
983 *
984 * Expected to be called in stop_machine() ("equivalent to taking
985 * every spinlock in the system"), so the locking doesn't really
986 * matter all that much.
0e91398f
JF
987 */
988void xen_mm_pin_all(void)
989{
990 unsigned long flags;
991 struct page *page;
74260714 992
0e91398f 993 spin_lock_irqsave(&pgd_lock, flags);
f4f97b3e 994
0e91398f
JF
995 list_for_each_entry(page, &pgd_list, lru) {
996 if (!PagePinned(page)) {
eefb47f6 997 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
998 SetPageSavePinned(page);
999 }
1000 }
1001
1002 spin_unlock_irqrestore(&pgd_lock, flags);
3b827c1b
JF
1003}
1004
c1f2f09e
EH
1005/*
1006 * The init_mm pagetable is really pinned as soon as its created, but
1007 * that's before we have page structures to store the bits. So do all
1008 * the book-keeping now.
1009 */
eefb47f6
JF
1010static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
1011 enum pt_level level)
3b827c1b 1012{
f4f97b3e
JF
1013 SetPagePinned(page);
1014 return 0;
1015}
3b827c1b 1016
b96229b5 1017static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 1018{
eefb47f6 1019 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 1020}
3b827c1b 1021
eefb47f6
JF
1022static int xen_unpin_page(struct mm_struct *mm, struct page *page,
1023 enum pt_level level)
f4f97b3e 1024{
d60cd46b 1025 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 1026
f4f97b3e
JF
1027 if (pgfl && !PageHighMem(page)) {
1028 void *pt = lowmem_page_address(page);
1029 unsigned long pfn = page_to_pfn(page);
74260714
JF
1030 spinlock_t *ptl = NULL;
1031 struct multicall_space mcs;
1032
11ad93e5
JF
1033 /*
1034 * Do the converse to pin_page. If we're using split
1035 * pte locks, we must be holding the lock for while
1036 * the pte page is unpinned but still RO to prevent
1037 * concurrent updates from seeing it in this
1038 * partially-pinned state.
1039 */
74260714 1040 if (level == PT_PTE) {
eefb47f6 1041 ptl = xen_pte_lock(page, mm);
74260714 1042
11ad93e5
JF
1043 if (ptl)
1044 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
1045 }
1046
1047 mcs = __xen_mc_entry(0);
f4f97b3e
JF
1048
1049 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1050 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
1051 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1052
1053 if (ptl) {
1054 /* unlock when batch completed */
7708ad64 1055 xen_mc_callback(xen_pte_unlock, ptl);
74260714 1056 }
f4f97b3e
JF
1057 }
1058
1059 return 0; /* never need to flush on unpin */
3b827c1b
JF
1060}
1061
f4f97b3e 1062/* Release a pagetables pages back as normal RW */
eefb47f6 1063static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1064{
f4f97b3e
JF
1065 xen_mc_batch();
1066
74260714 1067 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1068
d6182fbf
JF
1069#ifdef CONFIG_X86_64
1070 {
1071 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1072
1073 if (user_pgd) {
f63c2f24
T
1074 xen_do_pin(MMUEXT_UNPIN_TABLE,
1075 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1076 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1077 }
1078 }
1079#endif
1080
5deb30d1
JF
1081#ifdef CONFIG_X86_PAE
1082 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1083 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1084 PT_PMD);
5deb30d1 1085#endif
d6182fbf 1086
86bbc2c2 1087 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
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1088
1089 xen_mc_issue(0);
1090}
3b827c1b 1091
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1092static void xen_pgd_unpin(struct mm_struct *mm)
1093{
1094 __xen_pgd_unpin(mm, mm->pgd);
1095}
1096
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1097/*
1098 * On resume, undo any pinning done at save, so that the rest of the
1099 * kernel doesn't see any unexpected pinned pagetables.
1100 */
1101void xen_mm_unpin_all(void)
1102{
1103 unsigned long flags;
1104 struct page *page;
1105
1106 spin_lock_irqsave(&pgd_lock, flags);
1107
1108 list_for_each_entry(page, &pgd_list, lru) {
1109 if (PageSavePinned(page)) {
1110 BUG_ON(!PagePinned(page));
eefb47f6 1111 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
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1112 ClearPageSavePinned(page);
1113 }
1114 }
1115
1116 spin_unlock_irqrestore(&pgd_lock, flags);
1117}
1118
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1119void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1120{
f4f97b3e 1121 spin_lock(&next->page_table_lock);
eefb47f6 1122 xen_pgd_pin(next);
f4f97b3e 1123 spin_unlock(&next->page_table_lock);
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1124}
1125
1126void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1127{
f4f97b3e 1128 spin_lock(&mm->page_table_lock);
eefb47f6 1129 xen_pgd_pin(mm);
f4f97b3e 1130 spin_unlock(&mm->page_table_lock);
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1131}
1132
3b827c1b 1133
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1134#ifdef CONFIG_SMP
1135/* Another cpu may still have their %cr3 pointing at the pagetable, so
1136 we need to repoint it somewhere else before we can unpin it. */
1137static void drop_other_mm_ref(void *info)
1138{
1139 struct mm_struct *mm = info;
ce87b3d3 1140 struct mm_struct *active_mm;
3b827c1b 1141
9eb912d1 1142 active_mm = percpu_read(cpu_tlbstate.active_mm);
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1143
1144 if (active_mm == mm)
f87e4cac 1145 leave_mm(smp_processor_id());
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1146
1147 /* If this cpu still has a stale cr3 reference, then make sure
1148 it has been flushed. */
7fd7d83d 1149 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1150 load_cr3(swapper_pg_dir);
f87e4cac 1151}
3b827c1b 1152
7708ad64 1153static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1154{
e4d98207 1155 cpumask_var_t mask;
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1156 unsigned cpu;
1157
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1158 if (current->active_mm == mm) {
1159 if (current->mm == mm)
1160 load_cr3(swapper_pg_dir);
1161 else
1162 leave_mm(smp_processor_id());
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1163 }
1164
1165 /* Get the "official" set of cpus referring to our pagetable. */
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1166 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1167 for_each_online_cpu(cpu) {
1168 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1169 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1170 continue;
1171 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1172 }
1173 return;
1174 }
1175 cpumask_copy(mask, &mm->cpu_vm_mask);
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1176
1177 /* It's possible that a vcpu may have a stale reference to our
1178 cr3, because its in lazy mode, and it hasn't yet flushed
1179 its set of pending hypercalls yet. In this case, we can
1180 look at its actual current cr3 value, and force it to flush
1181 if needed. */
1182 for_each_online_cpu(cpu) {
1183 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1184 cpumask_set_cpu(cpu, mask);
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1185 }
1186
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1187 if (!cpumask_empty(mask))
1188 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1189 free_cpumask_var(mask);
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1190}
1191#else
7708ad64 1192static void xen_drop_mm_ref(struct mm_struct *mm)
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1193{
1194 if (current->active_mm == mm)
1195 load_cr3(swapper_pg_dir);
1196}
1197#endif
1198
1199/*
1200 * While a process runs, Xen pins its pagetables, which means that the
1201 * hypervisor forces it to be read-only, and it controls all updates
1202 * to it. This means that all pagetable updates have to go via the
1203 * hypervisor, which is moderately expensive.
1204 *
1205 * Since we're pulling the pagetable down, we switch to use init_mm,
1206 * unpin old process pagetable and mark it all read-write, which
1207 * allows further operations on it to be simple memory accesses.
1208 *
1209 * The only subtle point is that another CPU may be still using the
1210 * pagetable because of lazy tlb flushing. This means we need need to
1211 * switch all CPUs off this pagetable before we can unpin it.
1212 */
1213void xen_exit_mmap(struct mm_struct *mm)
1214{
1215 get_cpu(); /* make sure we don't move around */
7708ad64 1216 xen_drop_mm_ref(mm);
f87e4cac 1217 put_cpu();
3b827c1b 1218
f120f13e 1219 spin_lock(&mm->page_table_lock);
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1220
1221 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1222 if (xen_page_pinned(mm->pgd))
eefb47f6 1223 xen_pgd_unpin(mm);
74260714 1224
f120f13e 1225 spin_unlock(&mm->page_table_lock);
3b827c1b 1226}
994025ca 1227
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1228static __init void xen_pagetable_setup_start(pgd_t *base)
1229{
1230}
1231
1232static __init void xen_pagetable_setup_done(pgd_t *base)
1233{
1234 xen_setup_shared_info();
1235}
1236
1237static void xen_write_cr2(unsigned long cr2)
1238{
1239 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1240}
1241
1242static unsigned long xen_read_cr2(void)
1243{
1244 return percpu_read(xen_vcpu)->arch.cr2;
1245}
1246
1247unsigned long xen_read_cr2_direct(void)
1248{
1249 return percpu_read(xen_vcpu_info.arch.cr2);
1250}
1251
1252static void xen_flush_tlb(void)
1253{
1254 struct mmuext_op *op;
1255 struct multicall_space mcs;
1256
1257 preempt_disable();
1258
1259 mcs = xen_mc_entry(sizeof(*op));
1260
1261 op = mcs.args;
1262 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1263 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1264
1265 xen_mc_issue(PARAVIRT_LAZY_MMU);
1266
1267 preempt_enable();
1268}
1269
1270static void xen_flush_tlb_single(unsigned long addr)
1271{
1272 struct mmuext_op *op;
1273 struct multicall_space mcs;
1274
1275 preempt_disable();
1276
1277 mcs = xen_mc_entry(sizeof(*op));
1278 op = mcs.args;
1279 op->cmd = MMUEXT_INVLPG_LOCAL;
1280 op->arg1.linear_addr = addr & PAGE_MASK;
1281 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1282
1283 xen_mc_issue(PARAVIRT_LAZY_MMU);
1284
1285 preempt_enable();
1286}
1287
1288static void xen_flush_tlb_others(const struct cpumask *cpus,
1289 struct mm_struct *mm, unsigned long va)
1290{
1291 struct {
1292 struct mmuext_op op;
1293 DECLARE_BITMAP(mask, NR_CPUS);
1294 } *args;
1295 struct multicall_space mcs;
1296
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1297 if (cpumask_empty(cpus))
1298 return; /* nothing to do */
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1299
1300 mcs = xen_mc_entry(sizeof(*args));
1301 args = mcs.args;
1302 args->op.arg2.vcpumask = to_cpumask(args->mask);
1303
1304 /* Remove us, and any offline CPUS. */
1305 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1306 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
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1307
1308 if (va == TLB_FLUSH_ALL) {
1309 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1310 } else {
1311 args->op.cmd = MMUEXT_INVLPG_MULTI;
1312 args->op.arg1.linear_addr = va;
1313 }
1314
1315 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1316
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1317 xen_mc_issue(PARAVIRT_LAZY_MMU);
1318}
1319
1320static unsigned long xen_read_cr3(void)
1321{
1322 return percpu_read(xen_cr3);
1323}
1324
1325static void set_current_cr3(void *v)
1326{
1327 percpu_write(xen_current_cr3, (unsigned long)v);
1328}
1329
1330static void __xen_write_cr3(bool kernel, unsigned long cr3)
1331{
1332 struct mmuext_op *op;
1333 struct multicall_space mcs;
1334 unsigned long mfn;
1335
1336 if (cr3)
1337 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1338 else
1339 mfn = 0;
1340
1341 WARN_ON(mfn == 0 && kernel);
1342
1343 mcs = __xen_mc_entry(sizeof(*op));
1344
1345 op = mcs.args;
1346 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1347 op->arg1.mfn = mfn;
1348
1349 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1350
1351 if (kernel) {
1352 percpu_write(xen_cr3, cr3);
1353
1354 /* Update xen_current_cr3 once the batch has actually
1355 been submitted. */
1356 xen_mc_callback(set_current_cr3, (void *)cr3);
1357 }
1358}
1359
1360static void xen_write_cr3(unsigned long cr3)
1361{
1362 BUG_ON(preemptible());
1363
1364 xen_mc_batch(); /* disables interrupts */
1365
1366 /* Update while interrupts are disabled, so its atomic with
1367 respect to ipis */
1368 percpu_write(xen_cr3, cr3);
1369
1370 __xen_write_cr3(true, cr3);
1371
1372#ifdef CONFIG_X86_64
1373 {
1374 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1375 if (user_pgd)
1376 __xen_write_cr3(false, __pa(user_pgd));
1377 else
1378 __xen_write_cr3(false, 0);
1379 }
1380#endif
1381
1382 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1383}
1384
1385static int xen_pgd_alloc(struct mm_struct *mm)
1386{
1387 pgd_t *pgd = mm->pgd;
1388 int ret = 0;
1389
1390 BUG_ON(PagePinned(virt_to_page(pgd)));
1391
1392#ifdef CONFIG_X86_64
1393 {
1394 struct page *page = virt_to_page(pgd);
1395 pgd_t *user_pgd;
1396
1397 BUG_ON(page->private != 0);
1398
1399 ret = -ENOMEM;
1400
1401 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1402 page->private = (unsigned long)user_pgd;
1403
1404 if (user_pgd != NULL) {
1405 user_pgd[pgd_index(VSYSCALL_START)] =
1406 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1407 ret = 0;
1408 }
1409
1410 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1411 }
1412#endif
1413
1414 return ret;
1415}
1416
1417static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1418{
1419#ifdef CONFIG_X86_64
1420 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1421
1422 if (user_pgd)
1423 free_page((unsigned long)user_pgd);
1424#endif
1425}
1426
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1427#ifdef CONFIG_HIGHPTE
1428static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1429{
1430 pgprot_t prot = PAGE_KERNEL;
1431
1432 if (PagePinned(page))
1433 prot = PAGE_KERNEL_RO;
1434
1435 if (0 && PageHighMem(page))
1436 printk("mapping highpte %lx type %d prot %s\n",
1437 page_to_pfn(page), type,
1438 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1439
1440 return kmap_atomic_prot(page, type, prot);
1441}
1442#endif
1443
1444#ifdef CONFIG_X86_32
1445static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1446{
1447 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1448 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1449 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1450 pte_val_ma(pte));
1451
1452 return pte;
1453}
1454
1455/* Init-time set_pte while constructing initial pagetables, which
1456 doesn't allow RO pagetable pages to be remapped RW */
1457static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1458{
1459 pte = mask_rw_pte(ptep, pte);
1460
1461 xen_set_pte(ptep, pte);
1462}
1463#endif
319f3ba5 1464
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1465static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1466{
1467 struct mmuext_op op;
1468 op.cmd = cmd;
1469 op.arg1.mfn = pfn_to_mfn(pfn);
1470 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1471 BUG();
1472}
1473
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1474/* Early in boot, while setting up the initial pagetable, assume
1475 everything is pinned. */
1476static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1477{
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1478#ifdef CONFIG_FLATMEM
1479 BUG_ON(mem_map); /* should only be used early */
1480#endif
1481 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1482 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1483}
1484
1485/* Used for pmd and pud */
1486static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1487{
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1488#ifdef CONFIG_FLATMEM
1489 BUG_ON(mem_map); /* should only be used early */
1490#endif
1491 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1492}
1493
1494/* Early release_pte assumes that all pts are pinned, since there's
1495 only init_mm and anything attached to that is pinned. */
b96229b5 1496static __init void xen_release_pte_init(unsigned long pfn)
319f3ba5 1497{
b96229b5 1498 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
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1499 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1500}
1501
b96229b5 1502static __init void xen_release_pmd_init(unsigned long pfn)
319f3ba5 1503{
b96229b5 1504 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
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1505}
1506
1507/* This needs to make sure the new pte page is pinned iff its being
1508 attached to a pinned pagetable. */
1509static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1510{
1511 struct page *page = pfn_to_page(pfn);
1512
1513 if (PagePinned(virt_to_page(mm->pgd))) {
1514 SetPagePinned(page);
1515
1516 vm_unmap_aliases();
1517 if (!PageHighMem(page)) {
1518 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1519 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1520 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1521 } else {
1522 /* make sure there are no stray mappings of
1523 this page */
1524 kmap_flush_unused();
1525 }
1526 }
1527}
1528
1529static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1530{
1531 xen_alloc_ptpage(mm, pfn, PT_PTE);
1532}
1533
1534static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1535{
1536 xen_alloc_ptpage(mm, pfn, PT_PMD);
1537}
1538
1539/* This should never happen until we're OK to use struct page */
1540static void xen_release_ptpage(unsigned long pfn, unsigned level)
1541{
1542 struct page *page = pfn_to_page(pfn);
1543
1544 if (PagePinned(page)) {
1545 if (!PageHighMem(page)) {
1546 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1547 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1548 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1549 }
1550 ClearPagePinned(page);
1551 }
1552}
1553
1554static void xen_release_pte(unsigned long pfn)
1555{
1556 xen_release_ptpage(pfn, PT_PTE);
1557}
1558
1559static void xen_release_pmd(unsigned long pfn)
1560{
1561 xen_release_ptpage(pfn, PT_PMD);
1562}
1563
1564#if PAGETABLE_LEVELS == 4
1565static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1566{
1567 xen_alloc_ptpage(mm, pfn, PT_PUD);
1568}
1569
1570static void xen_release_pud(unsigned long pfn)
1571{
1572 xen_release_ptpage(pfn, PT_PUD);
1573}
1574#endif
1575
1576void __init xen_reserve_top(void)
1577{
1578#ifdef CONFIG_X86_32
1579 unsigned long top = HYPERVISOR_VIRT_START;
1580 struct xen_platform_parameters pp;
1581
1582 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1583 top = pp.virt_start;
1584
1585 reserve_top_address(-top);
1586#endif /* CONFIG_X86_32 */
1587}
1588
1589/*
1590 * Like __va(), but returns address in the kernel mapping (which is
1591 * all we have until the physical memory mapping has been set up.
1592 */
1593static void *__ka(phys_addr_t paddr)
1594{
1595#ifdef CONFIG_X86_64
1596 return (void *)(paddr + __START_KERNEL_map);
1597#else
1598 return __va(paddr);
1599#endif
1600}
1601
1602/* Convert a machine address to physical address */
1603static unsigned long m2p(phys_addr_t maddr)
1604{
1605 phys_addr_t paddr;
1606
1607 maddr &= PTE_PFN_MASK;
1608 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1609
1610 return paddr;
1611}
1612
1613/* Convert a machine address to kernel virtual */
1614static void *m2v(phys_addr_t maddr)
1615{
1616 return __ka(m2p(maddr));
1617}
1618
1619static void set_page_prot(void *addr, pgprot_t prot)
1620{
1621 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1622 pte_t pte = pfn_pte(pfn, prot);
1623
1624 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1625 BUG();
1626}
1627
1628static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1629{
1630 unsigned pmdidx, pteidx;
1631 unsigned ident_pte;
1632 unsigned long pfn;
1633
1634 ident_pte = 0;
1635 pfn = 0;
1636 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1637 pte_t *pte_page;
1638
1639 /* Reuse or allocate a page of ptes */
1640 if (pmd_present(pmd[pmdidx]))
1641 pte_page = m2v(pmd[pmdidx].pmd);
1642 else {
1643 /* Check for free pte pages */
1644 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1645 break;
1646
1647 pte_page = &level1_ident_pgt[ident_pte];
1648 ident_pte += PTRS_PER_PTE;
1649
1650 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1651 }
1652
1653 /* Install mappings */
1654 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1655 pte_t pte;
1656
1657 if (pfn > max_pfn_mapped)
1658 max_pfn_mapped = pfn;
1659
1660 if (!pte_none(pte_page[pteidx]))
1661 continue;
1662
1663 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1664 pte_page[pteidx] = pte;
1665 }
1666 }
1667
1668 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1669 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1670
1671 set_page_prot(pmd, PAGE_KERNEL_RO);
1672}
1673
1674#ifdef CONFIG_X86_64
1675static void convert_pfn_mfn(void *v)
1676{
1677 pte_t *pte = v;
1678 int i;
1679
1680 /* All levels are converted the same way, so just treat them
1681 as ptes. */
1682 for (i = 0; i < PTRS_PER_PTE; i++)
1683 pte[i] = xen_make_pte(pte[i].pte);
1684}
1685
1686/*
1687 * Set up the inital kernel pagetable.
1688 *
1689 * We can construct this by grafting the Xen provided pagetable into
1690 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1691 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1692 * means that only the kernel has a physical mapping to start with -
1693 * but that's enough to get __va working. We need to fill in the rest
1694 * of the physical mapping once some sort of allocator has been set
1695 * up.
1696 */
1697__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1698 unsigned long max_pfn)
1699{
1700 pud_t *l3;
1701 pmd_t *l2;
1702
1703 /* Zap identity mapping */
1704 init_level4_pgt[0] = __pgd(0);
1705
1706 /* Pre-constructed entries are in pfn, so convert to mfn */
1707 convert_pfn_mfn(init_level4_pgt);
1708 convert_pfn_mfn(level3_ident_pgt);
1709 convert_pfn_mfn(level3_kernel_pgt);
1710
1711 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1712 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1713
1714 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1715 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1716
1717 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1718 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1719 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1720
1721 /* Set up identity map */
1722 xen_map_identity_early(level2_ident_pgt, max_pfn);
1723
1724 /* Make pagetable pieces RO */
1725 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1726 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1727 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1728 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1729 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1730 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1731
1732 /* Pin down new L4 */
1733 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1734 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1735
1736 /* Unpin Xen-provided one */
1737 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1738
1739 /* Switch over */
1740 pgd = init_level4_pgt;
1741
1742 /*
1743 * At this stage there can be no user pgd, and no page
1744 * structure to attach it to, so make sure we just set kernel
1745 * pgd.
1746 */
1747 xen_mc_batch();
1748 __xen_write_cr3(true, __pa(pgd));
1749 xen_mc_issue(PARAVIRT_LAZY_CPU);
1750
1751 reserve_early(__pa(xen_start_info->pt_base),
1752 __pa(xen_start_info->pt_base +
1753 xen_start_info->nr_pt_frames * PAGE_SIZE),
1754 "XEN PAGETABLES");
1755
1756 return pgd;
1757}
1758#else /* !CONFIG_X86_64 */
1759static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1760
1761__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1762 unsigned long max_pfn)
1763{
1764 pmd_t *kernel_pmd;
1765
93dbda7c
JF
1766 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1767 xen_start_info->nr_pt_frames * PAGE_SIZE +
1768 512*1024);
319f3ba5
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1769
1770 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1771 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1772
1773 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1774
1775 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1776 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1777 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1778
1779 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1780 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1781 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1782
1783 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1784
1785 xen_write_cr3(__pa(swapper_pg_dir));
1786
1787 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1788
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JF
1789 reserve_early(__pa(xen_start_info->pt_base),
1790 __pa(xen_start_info->pt_base +
1791 xen_start_info->nr_pt_frames * PAGE_SIZE),
1792 "XEN PAGETABLES");
1793
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JF
1794 return swapper_pg_dir;
1795}
1796#endif /* CONFIG_X86_64 */
1797
3b3809ac 1798static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
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JF
1799{
1800 pte_t pte;
1801
1802 phys >>= PAGE_SHIFT;
1803
1804 switch (idx) {
1805 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1806#ifdef CONFIG_X86_F00F_BUG
1807 case FIX_F00F_IDT:
1808#endif
1809#ifdef CONFIG_X86_32
1810 case FIX_WP_TEST:
1811 case FIX_VDSO:
1812# ifdef CONFIG_HIGHMEM
1813 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1814# endif
1815#else
1816 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1817#endif
1818#ifdef CONFIG_X86_LOCAL_APIC
1819 case FIX_APIC_BASE: /* maps dummy local APIC */
1820#endif
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1821 case FIX_TEXT_POKE0:
1822 case FIX_TEXT_POKE1:
1823 /* All local page mappings */
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1824 pte = pfn_pte(phys, prot);
1825 break;
1826
1827 default:
1828 pte = mfn_pte(phys, prot);
1829 break;
1830 }
1831
1832 __native_set_fixmap(idx, pte);
1833
1834#ifdef CONFIG_X86_64
1835 /* Replicate changes to map the vsyscall page into the user
1836 pagetable vsyscall mapping. */
1837 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1838 unsigned long vaddr = __fix_to_virt(idx);
1839 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1840 }
1841#endif
1842}
1843
1844__init void xen_post_allocator_init(void)
1845{
1846 pv_mmu_ops.set_pte = xen_set_pte;
1847 pv_mmu_ops.set_pmd = xen_set_pmd;
1848 pv_mmu_ops.set_pud = xen_set_pud;
1849#if PAGETABLE_LEVELS == 4
1850 pv_mmu_ops.set_pgd = xen_set_pgd;
1851#endif
1852
1853 /* This will work as long as patching hasn't happened yet
1854 (which it hasn't) */
1855 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1856 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1857 pv_mmu_ops.release_pte = xen_release_pte;
1858 pv_mmu_ops.release_pmd = xen_release_pmd;
1859#if PAGETABLE_LEVELS == 4
1860 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1861 pv_mmu_ops.release_pud = xen_release_pud;
1862#endif
1863
1864#ifdef CONFIG_X86_64
1865 SetPagePinned(virt_to_page(level3_user_vsyscall));
1866#endif
1867 xen_mark_init_mm_pinned();
1868}
1869
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1870static void xen_leave_lazy_mmu(void)
1871{
5caecb94 1872 preempt_disable();
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JF
1873 xen_mc_flush();
1874 paravirt_leave_lazy_mmu();
5caecb94 1875 preempt_enable();
b407fc57 1876}
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JF
1877
1878const struct pv_mmu_ops xen_mmu_ops __initdata = {
1879 .pagetable_setup_start = xen_pagetable_setup_start,
1880 .pagetable_setup_done = xen_pagetable_setup_done,
1881
1882 .read_cr2 = xen_read_cr2,
1883 .write_cr2 = xen_write_cr2,
1884
1885 .read_cr3 = xen_read_cr3,
1886 .write_cr3 = xen_write_cr3,
1887
1888 .flush_tlb_user = xen_flush_tlb,
1889 .flush_tlb_kernel = xen_flush_tlb,
1890 .flush_tlb_single = xen_flush_tlb_single,
1891 .flush_tlb_others = xen_flush_tlb_others,
1892
1893 .pte_update = paravirt_nop,
1894 .pte_update_defer = paravirt_nop,
1895
1896 .pgd_alloc = xen_pgd_alloc,
1897 .pgd_free = xen_pgd_free,
1898
1899 .alloc_pte = xen_alloc_pte_init,
1900 .release_pte = xen_release_pte_init,
b96229b5 1901 .alloc_pmd = xen_alloc_pmd_init,
319f3ba5 1902 .alloc_pmd_clone = paravirt_nop,
b96229b5 1903 .release_pmd = xen_release_pmd_init,
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JF
1904
1905#ifdef CONFIG_HIGHPTE
1906 .kmap_atomic_pte = xen_kmap_atomic_pte,
1907#endif
1908
1909#ifdef CONFIG_X86_64
1910 .set_pte = xen_set_pte,
1911#else
1912 .set_pte = xen_set_pte_init,
1913#endif
1914 .set_pte_at = xen_set_pte_at,
1915 .set_pmd = xen_set_pmd_hyper,
1916
1917 .ptep_modify_prot_start = __ptep_modify_prot_start,
1918 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1919
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JF
1920 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1921 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 1922
da5de7c2
JF
1923 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1924 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
1925
1926#ifdef CONFIG_X86_PAE
1927 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
1928 .pte_clear = xen_pte_clear,
1929 .pmd_clear = xen_pmd_clear,
1930#endif /* CONFIG_X86_PAE */
1931 .set_pud = xen_set_pud_hyper,
1932
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JF
1933 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1934 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
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JF
1935
1936#if PAGETABLE_LEVELS == 4
da5de7c2
JF
1937 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1938 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
1939 .set_pgd = xen_set_pgd_hyper,
1940
b96229b5
JF
1941 .alloc_pud = xen_alloc_pmd_init,
1942 .release_pud = xen_release_pmd_init,
319f3ba5
JF
1943#endif /* PAGETABLE_LEVELS == 4 */
1944
1945 .activate_mm = xen_activate_mm,
1946 .dup_mmap = xen_dup_mmap,
1947 .exit_mmap = xen_exit_mmap,
1948
1949 .lazy_mode = {
1950 .enter = paravirt_enter_lazy_mmu,
b407fc57 1951 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
1952 },
1953
1954 .set_fixmap = xen_set_fixmap,
1955};
1956
1957
994025ca
JF
1958#ifdef CONFIG_XEN_DEBUG_FS
1959
1960static struct dentry *d_mmu_debug;
1961
1962static int __init xen_mmu_debugfs(void)
1963{
1964 struct dentry *d_xen = xen_init_debugfs();
1965
1966 if (d_xen == NULL)
1967 return -ENOMEM;
1968
1969 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1970
1971 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1972
1973 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1974 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1975 &mmu_stats.pgd_update_pinned);
1976 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1977 &mmu_stats.pgd_update_pinned);
1978
1979 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1980 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1981 &mmu_stats.pud_update_pinned);
1982 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1983 &mmu_stats.pud_update_pinned);
1984
1985 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1986 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1987 &mmu_stats.pmd_update_pinned);
1988 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1989 &mmu_stats.pmd_update_pinned);
1990
1991 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1992// debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1993// &mmu_stats.pte_update_pinned);
1994 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1995 &mmu_stats.pte_update_pinned);
1996
1997 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1998 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1999 &mmu_stats.mmu_update_extended);
2000 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
2001 mmu_stats.mmu_update_histo, 20);
2002
2003 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
2004 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
2005 &mmu_stats.set_pte_at_batched);
2006 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
2007 &mmu_stats.set_pte_at_current);
2008 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
2009 &mmu_stats.set_pte_at_kernel);
2010
2011 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
2012 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
2013 &mmu_stats.prot_commit_batched);
2014
2015 return 0;
2016}
2017fs_initcall(xen_mmu_debugfs);
2018
2019#endif /* CONFIG_XEN_DEBUG_FS */