Commit | Line | Data |
---|---|---|
3b827c1b JF |
1 | /* |
2 | * Xen mmu operations | |
3 | * | |
4 | * This file contains the various mmu fetch and update operations. | |
5 | * The most important job they must perform is the mapping between the | |
6 | * domain's pfn and the overall machine mfns. | |
7 | * | |
8 | * Xen allows guests to directly update the pagetable, in a controlled | |
9 | * fashion. In other words, the guest modifies the same pagetable | |
10 | * that the CPU actually uses, which eliminates the overhead of having | |
11 | * a separate shadow pagetable. | |
12 | * | |
13 | * In order to allow this, it falls on the guest domain to map its | |
14 | * notion of a "physical" pfn - which is just a domain-local linear | |
15 | * address - into a real "machine address" which the CPU's MMU can | |
16 | * use. | |
17 | * | |
18 | * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be | |
19 | * inserted directly into the pagetable. When creating a new | |
20 | * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, | |
21 | * when reading the content back with __(pgd|pmd|pte)_val, it converts | |
22 | * the mfn back into a pfn. | |
23 | * | |
24 | * The other constraint is that all pages which make up a pagetable | |
25 | * must be mapped read-only in the guest. This prevents uncontrolled | |
26 | * guest updates to the pagetable. Xen strictly enforces this, and | |
27 | * will disallow any pagetable update which will end up mapping a | |
28 | * pagetable page RW, and will disallow using any writable page as a | |
29 | * pagetable. | |
30 | * | |
31 | * Naively, when loading %cr3 with the base of a new pagetable, Xen | |
32 | * would need to validate the whole pagetable before going on. | |
33 | * Naturally, this is quite slow. The solution is to "pin" a | |
34 | * pagetable, which enforces all the constraints on the pagetable even | |
35 | * when it is not actively in use. This menas that Xen can be assured | |
36 | * that it is still valid when you do load it into %cr3, and doesn't | |
37 | * need to revalidate it. | |
38 | * | |
39 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
40 | */ | |
f120f13e | 41 | #include <linux/sched.h> |
f4f97b3e | 42 | #include <linux/highmem.h> |
994025ca | 43 | #include <linux/debugfs.h> |
3b827c1b | 44 | #include <linux/bug.h> |
d2cb2145 | 45 | #include <linux/vmalloc.h> |
44408ad7 | 46 | #include <linux/module.h> |
5a0e3ad6 | 47 | #include <linux/gfp.h> |
a9ce6bc1 | 48 | #include <linux/memblock.h> |
2222e71b | 49 | #include <linux/seq_file.h> |
3b827c1b JF |
50 | |
51 | #include <asm/pgtable.h> | |
52 | #include <asm/tlbflush.h> | |
5deb30d1 | 53 | #include <asm/fixmap.h> |
3b827c1b | 54 | #include <asm/mmu_context.h> |
319f3ba5 | 55 | #include <asm/setup.h> |
f4f97b3e | 56 | #include <asm/paravirt.h> |
7347b408 | 57 | #include <asm/e820.h> |
cbcd79c2 | 58 | #include <asm/linkage.h> |
08bbc9da | 59 | #include <asm/page.h> |
fef5ba79 | 60 | #include <asm/init.h> |
41f2e477 | 61 | #include <asm/pat.h> |
900cba88 | 62 | #include <asm/smp.h> |
3b827c1b JF |
63 | |
64 | #include <asm/xen/hypercall.h> | |
f4f97b3e | 65 | #include <asm/xen/hypervisor.h> |
3b827c1b | 66 | |
c0011dbf | 67 | #include <xen/xen.h> |
3b827c1b JF |
68 | #include <xen/page.h> |
69 | #include <xen/interface/xen.h> | |
59151001 | 70 | #include <xen/interface/hvm/hvm_op.h> |
319f3ba5 | 71 | #include <xen/interface/version.h> |
c0011dbf | 72 | #include <xen/interface/memory.h> |
319f3ba5 | 73 | #include <xen/hvc-console.h> |
3b827c1b | 74 | |
f4f97b3e | 75 | #include "multicalls.h" |
3b827c1b | 76 | #include "mmu.h" |
994025ca JF |
77 | #include "debugfs.h" |
78 | ||
19001c8c AN |
79 | /* |
80 | * Protects atomic reservation decrease/increase against concurrent increases. | |
06f521d5 | 81 | * Also protects non-atomic updates of current_pages and balloon lists. |
19001c8c AN |
82 | */ |
83 | DEFINE_SPINLOCK(xen_reservation_lock); | |
84 | ||
319f3ba5 JF |
85 | /* |
86 | * Identity map, in addition to plain kernel map. This needs to be | |
87 | * large enough to allocate page table pages to allocate the rest. | |
88 | * Each page can map 2MB. | |
89 | */ | |
764f0138 JF |
90 | #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4) |
91 | static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES); | |
319f3ba5 JF |
92 | |
93 | #ifdef CONFIG_X86_64 | |
94 | /* l3 pud for userspace vsyscall mapping */ | |
95 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | |
96 | #endif /* CONFIG_X86_64 */ | |
97 | ||
98 | /* | |
99 | * Note about cr3 (pagetable base) values: | |
100 | * | |
101 | * xen_cr3 contains the current logical cr3 value; it contains the | |
102 | * last set cr3. This may not be the current effective cr3, because | |
103 | * its update may be being lazily deferred. However, a vcpu looking | |
104 | * at its own cr3 can use this value knowing that it everything will | |
105 | * be self-consistent. | |
106 | * | |
107 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
108 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
109 | * out of date, but it will never be set early). If one vcpu is | |
110 | * looking at another vcpu's cr3 value, it should use this variable. | |
111 | */ | |
112 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
113 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
114 | ||
115 | ||
d6182fbf JF |
116 | /* |
117 | * Just beyond the highest usermode address. STACK_TOP_MAX has a | |
118 | * redzone above it, so round it up to a PGD boundary. | |
119 | */ | |
120 | #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) | |
121 | ||
9976b39b JF |
122 | unsigned long arbitrary_virt_to_mfn(void *vaddr) |
123 | { | |
124 | xmaddr_t maddr = arbitrary_virt_to_machine(vaddr); | |
125 | ||
126 | return PFN_DOWN(maddr.maddr); | |
127 | } | |
128 | ||
ce803e70 | 129 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) |
3b827c1b | 130 | { |
ce803e70 | 131 | unsigned long address = (unsigned long)vaddr; |
da7bfc50 | 132 | unsigned int level; |
9f32d21c CL |
133 | pte_t *pte; |
134 | unsigned offset; | |
3b827c1b | 135 | |
9f32d21c CL |
136 | /* |
137 | * if the PFN is in the linear mapped vaddr range, we can just use | |
138 | * the (quick) virt_to_machine() p2m lookup | |
139 | */ | |
140 | if (virt_addr_valid(vaddr)) | |
141 | return virt_to_machine(vaddr); | |
142 | ||
143 | /* otherwise we have to do a (slower) full page-table walk */ | |
3b827c1b | 144 | |
9f32d21c CL |
145 | pte = lookup_address(address, &level); |
146 | BUG_ON(pte == NULL); | |
147 | offset = address & ~PAGE_MASK; | |
ebd879e3 | 148 | return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); |
3b827c1b | 149 | } |
de23be5f | 150 | EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine); |
3b827c1b JF |
151 | |
152 | void make_lowmem_page_readonly(void *vaddr) | |
153 | { | |
154 | pte_t *pte, ptev; | |
155 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 156 | unsigned int level; |
3b827c1b | 157 | |
f0646e43 | 158 | pte = lookup_address(address, &level); |
fef5ba79 JF |
159 | if (pte == NULL) |
160 | return; /* vaddr missing */ | |
3b827c1b JF |
161 | |
162 | ptev = pte_wrprotect(*pte); | |
163 | ||
164 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
165 | BUG(); | |
166 | } | |
167 | ||
168 | void make_lowmem_page_readwrite(void *vaddr) | |
169 | { | |
170 | pte_t *pte, ptev; | |
171 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 172 | unsigned int level; |
3b827c1b | 173 | |
f0646e43 | 174 | pte = lookup_address(address, &level); |
fef5ba79 JF |
175 | if (pte == NULL) |
176 | return; /* vaddr missing */ | |
3b827c1b JF |
177 | |
178 | ptev = pte_mkwrite(*pte); | |
179 | ||
180 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
181 | BUG(); | |
182 | } | |
183 | ||
184 | ||
7708ad64 | 185 | static bool xen_page_pinned(void *ptr) |
e2426cf8 JF |
186 | { |
187 | struct page *page = virt_to_page(ptr); | |
188 | ||
189 | return PagePinned(page); | |
190 | } | |
191 | ||
eba3ff8b | 192 | void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) |
c0011dbf JF |
193 | { |
194 | struct multicall_space mcs; | |
195 | struct mmu_update *u; | |
196 | ||
197 | mcs = xen_mc_entry(sizeof(*u)); | |
198 | u = mcs.args; | |
199 | ||
200 | /* ptep might be kmapped when using 32-bit HIGHPTE */ | |
d5108316 | 201 | u->ptr = virt_to_machine(ptep).maddr; |
c0011dbf JF |
202 | u->val = pte_val_ma(pteval); |
203 | ||
eba3ff8b | 204 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid); |
c0011dbf JF |
205 | |
206 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
207 | } | |
eba3ff8b JF |
208 | EXPORT_SYMBOL_GPL(xen_set_domain_pte); |
209 | ||
7708ad64 | 210 | static void xen_extend_mmu_update(const struct mmu_update *update) |
3b827c1b | 211 | { |
d66bf8fc JF |
212 | struct multicall_space mcs; |
213 | struct mmu_update *u; | |
3b827c1b | 214 | |
400d3494 JF |
215 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); |
216 | ||
994025ca | 217 | if (mcs.mc != NULL) { |
400d3494 | 218 | mcs.mc->args[1]++; |
994025ca | 219 | } else { |
400d3494 JF |
220 | mcs = __xen_mc_entry(sizeof(*u)); |
221 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); | |
222 | } | |
d66bf8fc | 223 | |
d66bf8fc | 224 | u = mcs.args; |
400d3494 JF |
225 | *u = *update; |
226 | } | |
227 | ||
4c13629f | 228 | static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) |
400d3494 JF |
229 | { |
230 | struct mmu_update u; | |
231 | ||
232 | preempt_disable(); | |
233 | ||
234 | xen_mc_batch(); | |
235 | ||
ce803e70 JF |
236 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
237 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 238 | u.val = pmd_val_ma(val); |
7708ad64 | 239 | xen_extend_mmu_update(&u); |
d66bf8fc JF |
240 | |
241 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
242 | ||
243 | preempt_enable(); | |
3b827c1b JF |
244 | } |
245 | ||
4c13629f | 246 | static void xen_set_pmd(pmd_t *ptr, pmd_t val) |
e2426cf8 JF |
247 | { |
248 | /* If page is not pinned, we can just update the entry | |
249 | directly */ | |
7708ad64 | 250 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
251 | *ptr = val; |
252 | return; | |
253 | } | |
254 | ||
255 | xen_set_pmd_hyper(ptr, val); | |
256 | } | |
257 | ||
3b827c1b JF |
258 | /* |
259 | * Associate a virtual page frame with a given physical page frame | |
260 | * and protection flags for that frame. | |
261 | */ | |
262 | void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |
263 | { | |
836fe2f2 | 264 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); |
3b827c1b JF |
265 | } |
266 | ||
4a35c13c | 267 | static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) |
3b827c1b | 268 | { |
4a35c13c | 269 | struct mmu_update u; |
c0011dbf | 270 | |
4a35c13c JF |
271 | if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) |
272 | return false; | |
994025ca | 273 | |
4a35c13c | 274 | xen_mc_batch(); |
d66bf8fc | 275 | |
4a35c13c JF |
276 | u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; |
277 | u.val = pte_val_ma(pteval); | |
278 | xen_extend_mmu_update(&u); | |
a99ac5e8 | 279 | |
4a35c13c | 280 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
2bd50036 | 281 | |
4a35c13c JF |
282 | return true; |
283 | } | |
284 | ||
4c13629f | 285 | static void xen_set_pte(pte_t *ptep, pte_t pteval) |
4a35c13c | 286 | { |
4a35c13c | 287 | if (!xen_batched_set_pte(ptep, pteval)) |
a99ac5e8 | 288 | native_set_pte(ptep, pteval); |
3b827c1b JF |
289 | } |
290 | ||
4c13629f | 291 | static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, |
4a35c13c JF |
292 | pte_t *ptep, pte_t pteval) |
293 | { | |
294 | xen_set_pte(ptep, pteval); | |
3b827c1b JF |
295 | } |
296 | ||
f63c2f24 T |
297 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, |
298 | unsigned long addr, pte_t *ptep) | |
947a69c9 | 299 | { |
e57778a1 JF |
300 | /* Just return the pte as-is. We preserve the bits on commit */ |
301 | return *ptep; | |
302 | } | |
303 | ||
304 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |
305 | pte_t *ptep, pte_t pte) | |
306 | { | |
400d3494 | 307 | struct mmu_update u; |
e57778a1 | 308 | |
400d3494 | 309 | xen_mc_batch(); |
947a69c9 | 310 | |
d5108316 | 311 | u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; |
400d3494 | 312 | u.val = pte_val_ma(pte); |
7708ad64 | 313 | xen_extend_mmu_update(&u); |
947a69c9 | 314 | |
e57778a1 | 315 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
947a69c9 JF |
316 | } |
317 | ||
ebb9cfe2 JF |
318 | /* Assume pteval_t is equivalent to all the other *val_t types. */ |
319 | static pteval_t pte_mfn_to_pfn(pteval_t val) | |
947a69c9 | 320 | { |
ebb9cfe2 | 321 | if (val & _PAGE_PRESENT) { |
59438c9f | 322 | unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 323 | pteval_t flags = val & PTE_FLAGS_MASK; |
d8355aca | 324 | val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; |
ebb9cfe2 | 325 | } |
947a69c9 | 326 | |
ebb9cfe2 | 327 | return val; |
947a69c9 JF |
328 | } |
329 | ||
ebb9cfe2 | 330 | static pteval_t pte_pfn_to_mfn(pteval_t val) |
947a69c9 | 331 | { |
ebb9cfe2 | 332 | if (val & _PAGE_PRESENT) { |
59438c9f | 333 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 334 | pteval_t flags = val & PTE_FLAGS_MASK; |
fb38923e | 335 | unsigned long mfn; |
cfd8951e | 336 | |
fb38923e KRW |
337 | if (!xen_feature(XENFEAT_auto_translated_physmap)) |
338 | mfn = get_phys_to_machine(pfn); | |
339 | else | |
340 | mfn = pfn; | |
cfd8951e JF |
341 | /* |
342 | * If there's no mfn for the pfn, then just create an | |
343 | * empty non-present pte. Unfortunately this loses | |
344 | * information about the original pfn, so | |
345 | * pte_mfn_to_pfn is asymmetric. | |
346 | */ | |
347 | if (unlikely(mfn == INVALID_P2M_ENTRY)) { | |
348 | mfn = 0; | |
349 | flags = 0; | |
fb38923e KRW |
350 | } else { |
351 | /* | |
352 | * Paramount to do this test _after_ the | |
353 | * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY & | |
354 | * IDENTITY_FRAME_BIT resolves to true. | |
355 | */ | |
356 | mfn &= ~FOREIGN_FRAME_BIT; | |
357 | if (mfn & IDENTITY_FRAME_BIT) { | |
358 | mfn &= ~IDENTITY_FRAME_BIT; | |
359 | flags |= _PAGE_IOMAP; | |
360 | } | |
cfd8951e | 361 | } |
cfd8951e | 362 | val = ((pteval_t)mfn << PAGE_SHIFT) | flags; |
947a69c9 JF |
363 | } |
364 | ||
ebb9cfe2 | 365 | return val; |
947a69c9 JF |
366 | } |
367 | ||
c0011dbf JF |
368 | static pteval_t iomap_pte(pteval_t val) |
369 | { | |
370 | if (val & _PAGE_PRESENT) { | |
371 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; | |
372 | pteval_t flags = val & PTE_FLAGS_MASK; | |
373 | ||
374 | /* We assume the pte frame number is a MFN, so | |
375 | just use it as-is. */ | |
376 | val = ((pteval_t)pfn << PAGE_SHIFT) | flags; | |
377 | } | |
378 | ||
379 | return val; | |
380 | } | |
381 | ||
4c13629f | 382 | static pteval_t xen_pte_val(pte_t pte) |
947a69c9 | 383 | { |
41f2e477 | 384 | pteval_t pteval = pte.pte; |
c0011dbf | 385 | |
41f2e477 JF |
386 | /* If this is a WC pte, convert back from Xen WC to Linux WC */ |
387 | if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) { | |
388 | WARN_ON(!pat_enabled); | |
389 | pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT; | |
390 | } | |
c0011dbf | 391 | |
41f2e477 JF |
392 | if (xen_initial_domain() && (pteval & _PAGE_IOMAP)) |
393 | return pteval; | |
394 | ||
395 | return pte_mfn_to_pfn(pteval); | |
947a69c9 | 396 | } |
da5de7c2 | 397 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); |
947a69c9 | 398 | |
4c13629f | 399 | static pgdval_t xen_pgd_val(pgd_t pgd) |
947a69c9 | 400 | { |
ebb9cfe2 | 401 | return pte_mfn_to_pfn(pgd.pgd); |
947a69c9 | 402 | } |
da5de7c2 | 403 | PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); |
947a69c9 | 404 | |
41f2e477 JF |
405 | /* |
406 | * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7 | |
407 | * are reserved for now, to correspond to the Intel-reserved PAT | |
408 | * types. | |
409 | * | |
410 | * We expect Linux's PAT set as follows: | |
411 | * | |
412 | * Idx PTE flags Linux Xen Default | |
413 | * 0 WB WB WB | |
414 | * 1 PWT WC WT WT | |
415 | * 2 PCD UC- UC- UC- | |
416 | * 3 PCD PWT UC UC UC | |
417 | * 4 PAT WB WC WB | |
418 | * 5 PAT PWT WC WP WT | |
419 | * 6 PAT PCD UC- UC UC- | |
420 | * 7 PAT PCD PWT UC UC UC | |
421 | */ | |
422 | ||
423 | void xen_set_pat(u64 pat) | |
424 | { | |
425 | /* We expect Linux to use a PAT setting of | |
426 | * UC UC- WC WB (ignoring the PAT flag) */ | |
427 | WARN_ON(pat != 0x0007010600070106ull); | |
428 | } | |
429 | ||
4c13629f | 430 | static pte_t xen_make_pte(pteval_t pte) |
947a69c9 | 431 | { |
7347b408 AN |
432 | phys_addr_t addr = (pte & PTE_PFN_MASK); |
433 | ||
41f2e477 JF |
434 | /* If Linux is trying to set a WC pte, then map to the Xen WC. |
435 | * If _PAGE_PAT is set, then it probably means it is really | |
436 | * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope | |
437 | * things work out OK... | |
438 | * | |
439 | * (We should never see kernel mappings with _PAGE_PSE set, | |
440 | * but we could see hugetlbfs mappings, I think.). | |
441 | */ | |
442 | if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) { | |
443 | if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT) | |
444 | pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT; | |
445 | } | |
446 | ||
7347b408 AN |
447 | /* |
448 | * Unprivileged domains are allowed to do IOMAPpings for | |
449 | * PCI passthrough, but not map ISA space. The ISA | |
450 | * mappings are just dummy local mappings to keep other | |
451 | * parts of the kernel happy. | |
452 | */ | |
453 | if (unlikely(pte & _PAGE_IOMAP) && | |
454 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | |
c0011dbf | 455 | pte = iomap_pte(pte); |
7347b408 AN |
456 | } else { |
457 | pte &= ~_PAGE_IOMAP; | |
c0011dbf | 458 | pte = pte_pfn_to_mfn(pte); |
7347b408 | 459 | } |
c0011dbf | 460 | |
ebb9cfe2 | 461 | return native_make_pte(pte); |
947a69c9 | 462 | } |
da5de7c2 | 463 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); |
947a69c9 | 464 | |
fc25151d KRW |
465 | #ifdef CONFIG_XEN_DEBUG |
466 | pte_t xen_make_pte_debug(pteval_t pte) | |
467 | { | |
468 | phys_addr_t addr = (pte & PTE_PFN_MASK); | |
469 | phys_addr_t other_addr; | |
470 | bool io_page = false; | |
471 | pte_t _pte; | |
472 | ||
473 | if (pte & _PAGE_IOMAP) | |
474 | io_page = true; | |
475 | ||
476 | _pte = xen_make_pte(pte); | |
477 | ||
478 | if (!addr) | |
479 | return _pte; | |
480 | ||
481 | if (io_page && | |
482 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | |
483 | other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT; | |
d88885d0 | 484 | WARN_ONCE(addr != other_addr, |
fc25151d KRW |
485 | "0x%lx is using VM_IO, but it is 0x%lx!\n", |
486 | (unsigned long)addr, (unsigned long)other_addr); | |
487 | } else { | |
488 | pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP; | |
489 | other_addr = (_pte.pte & PTE_PFN_MASK); | |
d88885d0 | 490 | WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set), |
fc25151d KRW |
491 | "0x%lx is missing VM_IO (and wasn't fixed)!\n", |
492 | (unsigned long)addr); | |
493 | } | |
494 | ||
495 | return _pte; | |
496 | } | |
497 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug); | |
498 | #endif | |
499 | ||
4c13629f | 500 | static pgd_t xen_make_pgd(pgdval_t pgd) |
947a69c9 | 501 | { |
ebb9cfe2 JF |
502 | pgd = pte_pfn_to_mfn(pgd); |
503 | return native_make_pgd(pgd); | |
947a69c9 | 504 | } |
da5de7c2 | 505 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); |
947a69c9 | 506 | |
4c13629f | 507 | static pmdval_t xen_pmd_val(pmd_t pmd) |
947a69c9 | 508 | { |
ebb9cfe2 | 509 | return pte_mfn_to_pfn(pmd.pmd); |
947a69c9 | 510 | } |
da5de7c2 | 511 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); |
28499143 | 512 | |
4c13629f | 513 | static void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
f4f97b3e | 514 | { |
400d3494 | 515 | struct mmu_update u; |
f4f97b3e | 516 | |
d66bf8fc JF |
517 | preempt_disable(); |
518 | ||
400d3494 JF |
519 | xen_mc_batch(); |
520 | ||
ce803e70 JF |
521 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
522 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 523 | u.val = pud_val_ma(val); |
7708ad64 | 524 | xen_extend_mmu_update(&u); |
d66bf8fc JF |
525 | |
526 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
527 | ||
528 | preempt_enable(); | |
f4f97b3e JF |
529 | } |
530 | ||
4c13629f | 531 | static void xen_set_pud(pud_t *ptr, pud_t val) |
e2426cf8 JF |
532 | { |
533 | /* If page is not pinned, we can just update the entry | |
534 | directly */ | |
7708ad64 | 535 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
536 | *ptr = val; |
537 | return; | |
538 | } | |
539 | ||
540 | xen_set_pud_hyper(ptr, val); | |
541 | } | |
542 | ||
f6e58732 | 543 | #ifdef CONFIG_X86_PAE |
4c13629f | 544 | static void xen_set_pte_atomic(pte_t *ptep, pte_t pte) |
3b827c1b | 545 | { |
f6e58732 | 546 | set_64bit((u64 *)ptep, native_pte_val(pte)); |
3b827c1b JF |
547 | } |
548 | ||
4c13629f | 549 | static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
3b827c1b | 550 | { |
4a35c13c JF |
551 | if (!xen_batched_set_pte(ptep, native_make_pte(0))) |
552 | native_pte_clear(mm, addr, ptep); | |
3b827c1b JF |
553 | } |
554 | ||
4c13629f | 555 | static void xen_pmd_clear(pmd_t *pmdp) |
3b827c1b | 556 | { |
e2426cf8 | 557 | set_pmd(pmdp, __pmd(0)); |
3b827c1b | 558 | } |
f6e58732 | 559 | #endif /* CONFIG_X86_PAE */ |
3b827c1b | 560 | |
4c13629f | 561 | static pmd_t xen_make_pmd(pmdval_t pmd) |
3b827c1b | 562 | { |
ebb9cfe2 | 563 | pmd = pte_pfn_to_mfn(pmd); |
947a69c9 | 564 | return native_make_pmd(pmd); |
3b827c1b | 565 | } |
da5de7c2 | 566 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); |
3b827c1b | 567 | |
f6e58732 | 568 | #if PAGETABLE_LEVELS == 4 |
4c13629f | 569 | static pudval_t xen_pud_val(pud_t pud) |
f6e58732 JF |
570 | { |
571 | return pte_mfn_to_pfn(pud.pud); | |
572 | } | |
da5de7c2 | 573 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); |
f6e58732 | 574 | |
4c13629f | 575 | static pud_t xen_make_pud(pudval_t pud) |
f6e58732 JF |
576 | { |
577 | pud = pte_pfn_to_mfn(pud); | |
578 | ||
579 | return native_make_pud(pud); | |
580 | } | |
da5de7c2 | 581 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); |
f6e58732 | 582 | |
4c13629f | 583 | static pgd_t *xen_get_user_pgd(pgd_t *pgd) |
f6e58732 | 584 | { |
d6182fbf JF |
585 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); |
586 | unsigned offset = pgd - pgd_page; | |
587 | pgd_t *user_ptr = NULL; | |
f6e58732 | 588 | |
d6182fbf JF |
589 | if (offset < pgd_index(USER_LIMIT)) { |
590 | struct page *page = virt_to_page(pgd_page); | |
591 | user_ptr = (pgd_t *)page->private; | |
592 | if (user_ptr) | |
593 | user_ptr += offset; | |
594 | } | |
f6e58732 | 595 | |
d6182fbf JF |
596 | return user_ptr; |
597 | } | |
598 | ||
599 | static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
600 | { | |
601 | struct mmu_update u; | |
f6e58732 JF |
602 | |
603 | u.ptr = virt_to_machine(ptr).maddr; | |
604 | u.val = pgd_val_ma(val); | |
7708ad64 | 605 | xen_extend_mmu_update(&u); |
d6182fbf JF |
606 | } |
607 | ||
608 | /* | |
609 | * Raw hypercall-based set_pgd, intended for in early boot before | |
610 | * there's a page structure. This implies: | |
611 | * 1. The only existing pagetable is the kernel's | |
612 | * 2. It is always pinned | |
613 | * 3. It has no user pagetable attached to it | |
614 | */ | |
4c13629f | 615 | static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) |
d6182fbf JF |
616 | { |
617 | preempt_disable(); | |
618 | ||
619 | xen_mc_batch(); | |
620 | ||
621 | __xen_set_pgd_hyper(ptr, val); | |
f6e58732 JF |
622 | |
623 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
624 | ||
625 | preempt_enable(); | |
626 | } | |
627 | ||
4c13629f | 628 | static void xen_set_pgd(pgd_t *ptr, pgd_t val) |
f6e58732 | 629 | { |
d6182fbf JF |
630 | pgd_t *user_ptr = xen_get_user_pgd(ptr); |
631 | ||
f6e58732 JF |
632 | /* If page is not pinned, we can just update the entry |
633 | directly */ | |
7708ad64 | 634 | if (!xen_page_pinned(ptr)) { |
f6e58732 | 635 | *ptr = val; |
d6182fbf | 636 | if (user_ptr) { |
7708ad64 | 637 | WARN_ON(xen_page_pinned(user_ptr)); |
d6182fbf JF |
638 | *user_ptr = val; |
639 | } | |
f6e58732 JF |
640 | return; |
641 | } | |
642 | ||
d6182fbf JF |
643 | /* If it's pinned, then we can at least batch the kernel and |
644 | user updates together. */ | |
645 | xen_mc_batch(); | |
646 | ||
647 | __xen_set_pgd_hyper(ptr, val); | |
648 | if (user_ptr) | |
649 | __xen_set_pgd_hyper(user_ptr, val); | |
650 | ||
651 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f6e58732 JF |
652 | } |
653 | #endif /* PAGETABLE_LEVELS == 4 */ | |
654 | ||
f4f97b3e | 655 | /* |
5deb30d1 JF |
656 | * (Yet another) pagetable walker. This one is intended for pinning a |
657 | * pagetable. This means that it walks a pagetable and calls the | |
658 | * callback function on each page it finds making up the page table, | |
659 | * at every level. It walks the entire pagetable, but it only bothers | |
660 | * pinning pte pages which are below limit. In the normal case this | |
661 | * will be STACK_TOP_MAX, but at boot we need to pin up to | |
662 | * FIXADDR_TOP. | |
663 | * | |
664 | * For 32-bit the important bit is that we don't pin beyond there, | |
665 | * because then we start getting into Xen's ptes. | |
666 | * | |
667 | * For 64-bit, we must skip the Xen hole in the middle of the address | |
668 | * space, just after the big x86-64 virtual hole. | |
669 | */ | |
86bbc2c2 IC |
670 | static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, |
671 | int (*func)(struct mm_struct *mm, struct page *, | |
672 | enum pt_level), | |
673 | unsigned long limit) | |
3b827c1b | 674 | { |
f4f97b3e | 675 | int flush = 0; |
5deb30d1 JF |
676 | unsigned hole_low, hole_high; |
677 | unsigned pgdidx_limit, pudidx_limit, pmdidx_limit; | |
678 | unsigned pgdidx, pudidx, pmdidx; | |
f4f97b3e | 679 | |
5deb30d1 JF |
680 | /* The limit is the last byte to be touched */ |
681 | limit--; | |
682 | BUG_ON(limit >= FIXADDR_TOP); | |
3b827c1b JF |
683 | |
684 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
f4f97b3e JF |
685 | return 0; |
686 | ||
5deb30d1 JF |
687 | /* |
688 | * 64-bit has a great big hole in the middle of the address | |
689 | * space, which contains the Xen mappings. On 32-bit these | |
690 | * will end up making a zero-sized hole and so is a no-op. | |
691 | */ | |
d6182fbf | 692 | hole_low = pgd_index(USER_LIMIT); |
5deb30d1 JF |
693 | hole_high = pgd_index(PAGE_OFFSET); |
694 | ||
695 | pgdidx_limit = pgd_index(limit); | |
696 | #if PTRS_PER_PUD > 1 | |
697 | pudidx_limit = pud_index(limit); | |
698 | #else | |
699 | pudidx_limit = 0; | |
700 | #endif | |
701 | #if PTRS_PER_PMD > 1 | |
702 | pmdidx_limit = pmd_index(limit); | |
703 | #else | |
704 | pmdidx_limit = 0; | |
705 | #endif | |
706 | ||
5deb30d1 | 707 | for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) { |
f4f97b3e | 708 | pud_t *pud; |
3b827c1b | 709 | |
5deb30d1 JF |
710 | if (pgdidx >= hole_low && pgdidx < hole_high) |
711 | continue; | |
f4f97b3e | 712 | |
5deb30d1 | 713 | if (!pgd_val(pgd[pgdidx])) |
3b827c1b | 714 | continue; |
f4f97b3e | 715 | |
5deb30d1 | 716 | pud = pud_offset(&pgd[pgdidx], 0); |
3b827c1b JF |
717 | |
718 | if (PTRS_PER_PUD > 1) /* not folded */ | |
eefb47f6 | 719 | flush |= (*func)(mm, virt_to_page(pud), PT_PUD); |
f4f97b3e | 720 | |
5deb30d1 | 721 | for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) { |
f4f97b3e | 722 | pmd_t *pmd; |
f4f97b3e | 723 | |
5deb30d1 JF |
724 | if (pgdidx == pgdidx_limit && |
725 | pudidx > pudidx_limit) | |
726 | goto out; | |
3b827c1b | 727 | |
5deb30d1 | 728 | if (pud_none(pud[pudidx])) |
3b827c1b | 729 | continue; |
f4f97b3e | 730 | |
5deb30d1 | 731 | pmd = pmd_offset(&pud[pudidx], 0); |
3b827c1b JF |
732 | |
733 | if (PTRS_PER_PMD > 1) /* not folded */ | |
eefb47f6 | 734 | flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); |
f4f97b3e | 735 | |
5deb30d1 JF |
736 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) { |
737 | struct page *pte; | |
738 | ||
739 | if (pgdidx == pgdidx_limit && | |
740 | pudidx == pudidx_limit && | |
741 | pmdidx > pmdidx_limit) | |
742 | goto out; | |
3b827c1b | 743 | |
5deb30d1 | 744 | if (pmd_none(pmd[pmdidx])) |
3b827c1b JF |
745 | continue; |
746 | ||
5deb30d1 | 747 | pte = pmd_page(pmd[pmdidx]); |
eefb47f6 | 748 | flush |= (*func)(mm, pte, PT_PTE); |
3b827c1b JF |
749 | } |
750 | } | |
751 | } | |
11ad93e5 | 752 | |
5deb30d1 | 753 | out: |
11ad93e5 JF |
754 | /* Do the top level last, so that the callbacks can use it as |
755 | a cue to do final things like tlb flushes. */ | |
eefb47f6 | 756 | flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); |
f4f97b3e JF |
757 | |
758 | return flush; | |
3b827c1b JF |
759 | } |
760 | ||
86bbc2c2 IC |
761 | static int xen_pgd_walk(struct mm_struct *mm, |
762 | int (*func)(struct mm_struct *mm, struct page *, | |
763 | enum pt_level), | |
764 | unsigned long limit) | |
765 | { | |
766 | return __xen_pgd_walk(mm, mm->pgd, func, limit); | |
767 | } | |
768 | ||
7708ad64 JF |
769 | /* If we're using split pte locks, then take the page's lock and |
770 | return a pointer to it. Otherwise return NULL. */ | |
eefb47f6 | 771 | static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) |
74260714 JF |
772 | { |
773 | spinlock_t *ptl = NULL; | |
774 | ||
f7d0b926 | 775 | #if USE_SPLIT_PTLOCKS |
74260714 | 776 | ptl = __pte_lockptr(page); |
eefb47f6 | 777 | spin_lock_nest_lock(ptl, &mm->page_table_lock); |
74260714 JF |
778 | #endif |
779 | ||
780 | return ptl; | |
781 | } | |
782 | ||
7708ad64 | 783 | static void xen_pte_unlock(void *v) |
74260714 JF |
784 | { |
785 | spinlock_t *ptl = v; | |
786 | spin_unlock(ptl); | |
787 | } | |
788 | ||
789 | static void xen_do_pin(unsigned level, unsigned long pfn) | |
790 | { | |
791 | struct mmuext_op *op; | |
792 | struct multicall_space mcs; | |
793 | ||
794 | mcs = __xen_mc_entry(sizeof(*op)); | |
795 | op = mcs.args; | |
796 | op->cmd = level; | |
797 | op->arg1.mfn = pfn_to_mfn(pfn); | |
798 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
799 | } | |
800 | ||
eefb47f6 JF |
801 | static int xen_pin_page(struct mm_struct *mm, struct page *page, |
802 | enum pt_level level) | |
f4f97b3e | 803 | { |
d60cd46b | 804 | unsigned pgfl = TestSetPagePinned(page); |
f4f97b3e JF |
805 | int flush; |
806 | ||
807 | if (pgfl) | |
808 | flush = 0; /* already pinned */ | |
809 | else if (PageHighMem(page)) | |
810 | /* kmaps need flushing if we found an unpinned | |
811 | highpage */ | |
812 | flush = 1; | |
813 | else { | |
814 | void *pt = lowmem_page_address(page); | |
815 | unsigned long pfn = page_to_pfn(page); | |
816 | struct multicall_space mcs = __xen_mc_entry(0); | |
74260714 | 817 | spinlock_t *ptl; |
f4f97b3e JF |
818 | |
819 | flush = 0; | |
820 | ||
11ad93e5 JF |
821 | /* |
822 | * We need to hold the pagetable lock between the time | |
823 | * we make the pagetable RO and when we actually pin | |
824 | * it. If we don't, then other users may come in and | |
825 | * attempt to update the pagetable by writing it, | |
826 | * which will fail because the memory is RO but not | |
827 | * pinned, so Xen won't do the trap'n'emulate. | |
828 | * | |
829 | * If we're using split pte locks, we can't hold the | |
830 | * entire pagetable's worth of locks during the | |
831 | * traverse, because we may wrap the preempt count (8 | |
832 | * bits). The solution is to mark RO and pin each PTE | |
833 | * page while holding the lock. This means the number | |
834 | * of locks we end up holding is never more than a | |
835 | * batch size (~32 entries, at present). | |
836 | * | |
837 | * If we're not using split pte locks, we needn't pin | |
838 | * the PTE pages independently, because we're | |
839 | * protected by the overall pagetable lock. | |
840 | */ | |
74260714 JF |
841 | ptl = NULL; |
842 | if (level == PT_PTE) | |
eefb47f6 | 843 | ptl = xen_pte_lock(page, mm); |
74260714 | 844 | |
f4f97b3e JF |
845 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, |
846 | pfn_pte(pfn, PAGE_KERNEL_RO), | |
74260714 JF |
847 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
848 | ||
11ad93e5 | 849 | if (ptl) { |
74260714 JF |
850 | xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); |
851 | ||
74260714 JF |
852 | /* Queue a deferred unlock for when this batch |
853 | is completed. */ | |
7708ad64 | 854 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 855 | } |
f4f97b3e JF |
856 | } |
857 | ||
858 | return flush; | |
859 | } | |
3b827c1b | 860 | |
f4f97b3e JF |
861 | /* This is called just after a mm has been created, but it has not |
862 | been used yet. We need to make sure that its pagetable is all | |
863 | read-only, and can be pinned. */ | |
eefb47f6 | 864 | static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) |
3b827c1b | 865 | { |
f4f97b3e | 866 | xen_mc_batch(); |
3b827c1b | 867 | |
86bbc2c2 | 868 | if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) { |
d05fdf31 | 869 | /* re-enable interrupts for flushing */ |
f87e4cac | 870 | xen_mc_issue(0); |
d05fdf31 | 871 | |
f4f97b3e | 872 | kmap_flush_unused(); |
d05fdf31 | 873 | |
f87e4cac JF |
874 | xen_mc_batch(); |
875 | } | |
f4f97b3e | 876 | |
d6182fbf JF |
877 | #ifdef CONFIG_X86_64 |
878 | { | |
879 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
880 | ||
881 | xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); | |
882 | ||
883 | if (user_pgd) { | |
eefb47f6 | 884 | xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); |
f63c2f24 T |
885 | xen_do_pin(MMUEXT_PIN_L4_TABLE, |
886 | PFN_DOWN(__pa(user_pgd))); | |
d6182fbf JF |
887 | } |
888 | } | |
889 | #else /* CONFIG_X86_32 */ | |
5deb30d1 JF |
890 | #ifdef CONFIG_X86_PAE |
891 | /* Need to make sure unshared kernel PMD is pinnable */ | |
47cb2ed9 | 892 | xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 893 | PT_PMD); |
5deb30d1 | 894 | #endif |
28499143 | 895 | xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); |
d6182fbf | 896 | #endif /* CONFIG_X86_64 */ |
f4f97b3e | 897 | xen_mc_issue(0); |
3b827c1b JF |
898 | } |
899 | ||
eefb47f6 JF |
900 | static void xen_pgd_pin(struct mm_struct *mm) |
901 | { | |
902 | __xen_pgd_pin(mm, mm->pgd); | |
903 | } | |
904 | ||
0e91398f JF |
905 | /* |
906 | * On save, we need to pin all pagetables to make sure they get their | |
907 | * mfns turned into pfns. Search the list for any unpinned pgds and pin | |
908 | * them (unpinned pgds are not currently in use, probably because the | |
909 | * process is under construction or destruction). | |
eefb47f6 JF |
910 | * |
911 | * Expected to be called in stop_machine() ("equivalent to taking | |
912 | * every spinlock in the system"), so the locking doesn't really | |
913 | * matter all that much. | |
0e91398f JF |
914 | */ |
915 | void xen_mm_pin_all(void) | |
916 | { | |
0e91398f | 917 | struct page *page; |
74260714 | 918 | |
a79e53d8 | 919 | spin_lock(&pgd_lock); |
f4f97b3e | 920 | |
0e91398f JF |
921 | list_for_each_entry(page, &pgd_list, lru) { |
922 | if (!PagePinned(page)) { | |
eefb47f6 | 923 | __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
924 | SetPageSavePinned(page); |
925 | } | |
926 | } | |
927 | ||
a79e53d8 | 928 | spin_unlock(&pgd_lock); |
3b827c1b JF |
929 | } |
930 | ||
c1f2f09e EH |
931 | /* |
932 | * The init_mm pagetable is really pinned as soon as its created, but | |
933 | * that's before we have page structures to store the bits. So do all | |
934 | * the book-keeping now. | |
935 | */ | |
3f508953 | 936 | static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page, |
eefb47f6 | 937 | enum pt_level level) |
3b827c1b | 938 | { |
f4f97b3e JF |
939 | SetPagePinned(page); |
940 | return 0; | |
941 | } | |
3b827c1b | 942 | |
b96229b5 | 943 | static void __init xen_mark_init_mm_pinned(void) |
f4f97b3e | 944 | { |
eefb47f6 | 945 | xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); |
f4f97b3e | 946 | } |
3b827c1b | 947 | |
eefb47f6 JF |
948 | static int xen_unpin_page(struct mm_struct *mm, struct page *page, |
949 | enum pt_level level) | |
f4f97b3e | 950 | { |
d60cd46b | 951 | unsigned pgfl = TestClearPagePinned(page); |
3b827c1b | 952 | |
f4f97b3e JF |
953 | if (pgfl && !PageHighMem(page)) { |
954 | void *pt = lowmem_page_address(page); | |
955 | unsigned long pfn = page_to_pfn(page); | |
74260714 JF |
956 | spinlock_t *ptl = NULL; |
957 | struct multicall_space mcs; | |
958 | ||
11ad93e5 JF |
959 | /* |
960 | * Do the converse to pin_page. If we're using split | |
961 | * pte locks, we must be holding the lock for while | |
962 | * the pte page is unpinned but still RO to prevent | |
963 | * concurrent updates from seeing it in this | |
964 | * partially-pinned state. | |
965 | */ | |
74260714 | 966 | if (level == PT_PTE) { |
eefb47f6 | 967 | ptl = xen_pte_lock(page, mm); |
74260714 | 968 | |
11ad93e5 JF |
969 | if (ptl) |
970 | xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); | |
74260714 JF |
971 | } |
972 | ||
973 | mcs = __xen_mc_entry(0); | |
f4f97b3e JF |
974 | |
975 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, | |
976 | pfn_pte(pfn, PAGE_KERNEL), | |
74260714 JF |
977 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
978 | ||
979 | if (ptl) { | |
980 | /* unlock when batch completed */ | |
7708ad64 | 981 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 982 | } |
f4f97b3e JF |
983 | } |
984 | ||
985 | return 0; /* never need to flush on unpin */ | |
3b827c1b JF |
986 | } |
987 | ||
f4f97b3e | 988 | /* Release a pagetables pages back as normal RW */ |
eefb47f6 | 989 | static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) |
f4f97b3e | 990 | { |
f4f97b3e JF |
991 | xen_mc_batch(); |
992 | ||
74260714 | 993 | xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); |
f4f97b3e | 994 | |
d6182fbf JF |
995 | #ifdef CONFIG_X86_64 |
996 | { | |
997 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
998 | ||
999 | if (user_pgd) { | |
f63c2f24 T |
1000 | xen_do_pin(MMUEXT_UNPIN_TABLE, |
1001 | PFN_DOWN(__pa(user_pgd))); | |
eefb47f6 | 1002 | xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); |
d6182fbf JF |
1003 | } |
1004 | } | |
1005 | #endif | |
1006 | ||
5deb30d1 JF |
1007 | #ifdef CONFIG_X86_PAE |
1008 | /* Need to make sure unshared kernel PMD is unpinned */ | |
47cb2ed9 | 1009 | xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 1010 | PT_PMD); |
5deb30d1 | 1011 | #endif |
d6182fbf | 1012 | |
86bbc2c2 | 1013 | __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); |
f4f97b3e JF |
1014 | |
1015 | xen_mc_issue(0); | |
1016 | } | |
3b827c1b | 1017 | |
eefb47f6 JF |
1018 | static void xen_pgd_unpin(struct mm_struct *mm) |
1019 | { | |
1020 | __xen_pgd_unpin(mm, mm->pgd); | |
1021 | } | |
1022 | ||
0e91398f JF |
1023 | /* |
1024 | * On resume, undo any pinning done at save, so that the rest of the | |
1025 | * kernel doesn't see any unexpected pinned pagetables. | |
1026 | */ | |
1027 | void xen_mm_unpin_all(void) | |
1028 | { | |
0e91398f JF |
1029 | struct page *page; |
1030 | ||
a79e53d8 | 1031 | spin_lock(&pgd_lock); |
0e91398f JF |
1032 | |
1033 | list_for_each_entry(page, &pgd_list, lru) { | |
1034 | if (PageSavePinned(page)) { | |
1035 | BUG_ON(!PagePinned(page)); | |
eefb47f6 | 1036 | __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
1037 | ClearPageSavePinned(page); |
1038 | } | |
1039 | } | |
1040 | ||
a79e53d8 | 1041 | spin_unlock(&pgd_lock); |
0e91398f JF |
1042 | } |
1043 | ||
4c13629f | 1044 | static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
3b827c1b | 1045 | { |
f4f97b3e | 1046 | spin_lock(&next->page_table_lock); |
eefb47f6 | 1047 | xen_pgd_pin(next); |
f4f97b3e | 1048 | spin_unlock(&next->page_table_lock); |
3b827c1b JF |
1049 | } |
1050 | ||
4c13629f | 1051 | static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) |
3b827c1b | 1052 | { |
f4f97b3e | 1053 | spin_lock(&mm->page_table_lock); |
eefb47f6 | 1054 | xen_pgd_pin(mm); |
f4f97b3e | 1055 | spin_unlock(&mm->page_table_lock); |
3b827c1b JF |
1056 | } |
1057 | ||
3b827c1b | 1058 | |
f87e4cac JF |
1059 | #ifdef CONFIG_SMP |
1060 | /* Another cpu may still have their %cr3 pointing at the pagetable, so | |
1061 | we need to repoint it somewhere else before we can unpin it. */ | |
1062 | static void drop_other_mm_ref(void *info) | |
1063 | { | |
1064 | struct mm_struct *mm = info; | |
ce87b3d3 | 1065 | struct mm_struct *active_mm; |
3b827c1b | 1066 | |
9eb912d1 | 1067 | active_mm = percpu_read(cpu_tlbstate.active_mm); |
ce87b3d3 | 1068 | |
7899891c | 1069 | if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK) |
f87e4cac | 1070 | leave_mm(smp_processor_id()); |
9f79991d JF |
1071 | |
1072 | /* If this cpu still has a stale cr3 reference, then make sure | |
1073 | it has been flushed. */ | |
7fd7d83d | 1074 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) |
9f79991d | 1075 | load_cr3(swapper_pg_dir); |
f87e4cac | 1076 | } |
3b827c1b | 1077 | |
7708ad64 | 1078 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac | 1079 | { |
e4d98207 | 1080 | cpumask_var_t mask; |
9f79991d JF |
1081 | unsigned cpu; |
1082 | ||
f87e4cac JF |
1083 | if (current->active_mm == mm) { |
1084 | if (current->mm == mm) | |
1085 | load_cr3(swapper_pg_dir); | |
1086 | else | |
1087 | leave_mm(smp_processor_id()); | |
9f79991d JF |
1088 | } |
1089 | ||
1090 | /* Get the "official" set of cpus referring to our pagetable. */ | |
e4d98207 MT |
1091 | if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { |
1092 | for_each_online_cpu(cpu) { | |
78f1c4d6 | 1093 | if (!cpumask_test_cpu(cpu, mm_cpumask(mm)) |
e4d98207 MT |
1094 | && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) |
1095 | continue; | |
1096 | smp_call_function_single(cpu, drop_other_mm_ref, mm, 1); | |
1097 | } | |
1098 | return; | |
1099 | } | |
78f1c4d6 | 1100 | cpumask_copy(mask, mm_cpumask(mm)); |
9f79991d JF |
1101 | |
1102 | /* It's possible that a vcpu may have a stale reference to our | |
1103 | cr3, because its in lazy mode, and it hasn't yet flushed | |
1104 | its set of pending hypercalls yet. In this case, we can | |
1105 | look at its actual current cr3 value, and force it to flush | |
1106 | if needed. */ | |
1107 | for_each_online_cpu(cpu) { | |
1108 | if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) | |
e4d98207 | 1109 | cpumask_set_cpu(cpu, mask); |
3b827c1b JF |
1110 | } |
1111 | ||
e4d98207 MT |
1112 | if (!cpumask_empty(mask)) |
1113 | smp_call_function_many(mask, drop_other_mm_ref, mm, 1); | |
1114 | free_cpumask_var(mask); | |
f87e4cac JF |
1115 | } |
1116 | #else | |
7708ad64 | 1117 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac JF |
1118 | { |
1119 | if (current->active_mm == mm) | |
1120 | load_cr3(swapper_pg_dir); | |
1121 | } | |
1122 | #endif | |
1123 | ||
1124 | /* | |
1125 | * While a process runs, Xen pins its pagetables, which means that the | |
1126 | * hypervisor forces it to be read-only, and it controls all updates | |
1127 | * to it. This means that all pagetable updates have to go via the | |
1128 | * hypervisor, which is moderately expensive. | |
1129 | * | |
1130 | * Since we're pulling the pagetable down, we switch to use init_mm, | |
1131 | * unpin old process pagetable and mark it all read-write, which | |
1132 | * allows further operations on it to be simple memory accesses. | |
1133 | * | |
1134 | * The only subtle point is that another CPU may be still using the | |
1135 | * pagetable because of lazy tlb flushing. This means we need need to | |
1136 | * switch all CPUs off this pagetable before we can unpin it. | |
1137 | */ | |
4c13629f | 1138 | static void xen_exit_mmap(struct mm_struct *mm) |
f87e4cac JF |
1139 | { |
1140 | get_cpu(); /* make sure we don't move around */ | |
7708ad64 | 1141 | xen_drop_mm_ref(mm); |
f87e4cac | 1142 | put_cpu(); |
3b827c1b | 1143 | |
f120f13e | 1144 | spin_lock(&mm->page_table_lock); |
df912ea4 JF |
1145 | |
1146 | /* pgd may not be pinned in the error exit path of execve */ | |
7708ad64 | 1147 | if (xen_page_pinned(mm->pgd)) |
eefb47f6 | 1148 | xen_pgd_unpin(mm); |
74260714 | 1149 | |
f120f13e | 1150 | spin_unlock(&mm->page_table_lock); |
3b827c1b | 1151 | } |
994025ca | 1152 | |
3f508953 | 1153 | static void __init xen_pagetable_setup_start(pgd_t *base) |
319f3ba5 JF |
1154 | { |
1155 | } | |
1156 | ||
279b706b SS |
1157 | static __init void xen_mapping_pagetable_reserve(u64 start, u64 end) |
1158 | { | |
1159 | /* reserve the range used */ | |
1160 | native_pagetable_reserve(start, end); | |
1161 | ||
1162 | /* set as RW the rest */ | |
1163 | printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end, | |
1164 | PFN_PHYS(pgt_buf_top)); | |
1165 | while (end < PFN_PHYS(pgt_buf_top)) { | |
1166 | make_lowmem_page_readwrite(__va(end)); | |
1167 | end += PAGE_SIZE; | |
1168 | } | |
1169 | } | |
1170 | ||
f1d7062a TG |
1171 | static void xen_post_allocator_init(void); |
1172 | ||
3f508953 | 1173 | static void __init xen_pagetable_setup_done(pgd_t *base) |
319f3ba5 JF |
1174 | { |
1175 | xen_setup_shared_info(); | |
f1d7062a | 1176 | xen_post_allocator_init(); |
319f3ba5 JF |
1177 | } |
1178 | ||
1179 | static void xen_write_cr2(unsigned long cr2) | |
1180 | { | |
1181 | percpu_read(xen_vcpu)->arch.cr2 = cr2; | |
1182 | } | |
1183 | ||
1184 | static unsigned long xen_read_cr2(void) | |
1185 | { | |
1186 | return percpu_read(xen_vcpu)->arch.cr2; | |
1187 | } | |
1188 | ||
1189 | unsigned long xen_read_cr2_direct(void) | |
1190 | { | |
1191 | return percpu_read(xen_vcpu_info.arch.cr2); | |
1192 | } | |
1193 | ||
1194 | static void xen_flush_tlb(void) | |
1195 | { | |
1196 | struct mmuext_op *op; | |
1197 | struct multicall_space mcs; | |
1198 | ||
1199 | preempt_disable(); | |
1200 | ||
1201 | mcs = xen_mc_entry(sizeof(*op)); | |
1202 | ||
1203 | op = mcs.args; | |
1204 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
1205 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1206 | ||
1207 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1208 | ||
1209 | preempt_enable(); | |
1210 | } | |
1211 | ||
1212 | static void xen_flush_tlb_single(unsigned long addr) | |
1213 | { | |
1214 | struct mmuext_op *op; | |
1215 | struct multicall_space mcs; | |
1216 | ||
1217 | preempt_disable(); | |
1218 | ||
1219 | mcs = xen_mc_entry(sizeof(*op)); | |
1220 | op = mcs.args; | |
1221 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
1222 | op->arg1.linear_addr = addr & PAGE_MASK; | |
1223 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1224 | ||
1225 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1226 | ||
1227 | preempt_enable(); | |
1228 | } | |
1229 | ||
1230 | static void xen_flush_tlb_others(const struct cpumask *cpus, | |
1231 | struct mm_struct *mm, unsigned long va) | |
1232 | { | |
1233 | struct { | |
1234 | struct mmuext_op op; | |
32dd1194 | 1235 | #ifdef CONFIG_SMP |
900cba88 | 1236 | DECLARE_BITMAP(mask, num_processors); |
32dd1194 KRW |
1237 | #else |
1238 | DECLARE_BITMAP(mask, NR_CPUS); | |
1239 | #endif | |
319f3ba5 JF |
1240 | } *args; |
1241 | struct multicall_space mcs; | |
1242 | ||
e3f8a74e JF |
1243 | if (cpumask_empty(cpus)) |
1244 | return; /* nothing to do */ | |
319f3ba5 JF |
1245 | |
1246 | mcs = xen_mc_entry(sizeof(*args)); | |
1247 | args = mcs.args; | |
1248 | args->op.arg2.vcpumask = to_cpumask(args->mask); | |
1249 | ||
1250 | /* Remove us, and any offline CPUS. */ | |
1251 | cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); | |
1252 | cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); | |
319f3ba5 JF |
1253 | |
1254 | if (va == TLB_FLUSH_ALL) { | |
1255 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; | |
1256 | } else { | |
1257 | args->op.cmd = MMUEXT_INVLPG_MULTI; | |
1258 | args->op.arg1.linear_addr = va; | |
1259 | } | |
1260 | ||
1261 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); | |
1262 | ||
319f3ba5 JF |
1263 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
1264 | } | |
1265 | ||
1266 | static unsigned long xen_read_cr3(void) | |
1267 | { | |
1268 | return percpu_read(xen_cr3); | |
1269 | } | |
1270 | ||
1271 | static void set_current_cr3(void *v) | |
1272 | { | |
1273 | percpu_write(xen_current_cr3, (unsigned long)v); | |
1274 | } | |
1275 | ||
1276 | static void __xen_write_cr3(bool kernel, unsigned long cr3) | |
1277 | { | |
1278 | struct mmuext_op *op; | |
1279 | struct multicall_space mcs; | |
1280 | unsigned long mfn; | |
1281 | ||
1282 | if (cr3) | |
1283 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
1284 | else | |
1285 | mfn = 0; | |
1286 | ||
1287 | WARN_ON(mfn == 0 && kernel); | |
1288 | ||
1289 | mcs = __xen_mc_entry(sizeof(*op)); | |
1290 | ||
1291 | op = mcs.args; | |
1292 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; | |
1293 | op->arg1.mfn = mfn; | |
1294 | ||
1295 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1296 | ||
1297 | if (kernel) { | |
1298 | percpu_write(xen_cr3, cr3); | |
1299 | ||
1300 | /* Update xen_current_cr3 once the batch has actually | |
1301 | been submitted. */ | |
1302 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
1303 | } | |
1304 | } | |
1305 | ||
1306 | static void xen_write_cr3(unsigned long cr3) | |
1307 | { | |
1308 | BUG_ON(preemptible()); | |
1309 | ||
1310 | xen_mc_batch(); /* disables interrupts */ | |
1311 | ||
1312 | /* Update while interrupts are disabled, so its atomic with | |
1313 | respect to ipis */ | |
1314 | percpu_write(xen_cr3, cr3); | |
1315 | ||
1316 | __xen_write_cr3(true, cr3); | |
1317 | ||
1318 | #ifdef CONFIG_X86_64 | |
1319 | { | |
1320 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | |
1321 | if (user_pgd) | |
1322 | __xen_write_cr3(false, __pa(user_pgd)); | |
1323 | else | |
1324 | __xen_write_cr3(false, 0); | |
1325 | } | |
1326 | #endif | |
1327 | ||
1328 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ | |
1329 | } | |
1330 | ||
1331 | static int xen_pgd_alloc(struct mm_struct *mm) | |
1332 | { | |
1333 | pgd_t *pgd = mm->pgd; | |
1334 | int ret = 0; | |
1335 | ||
1336 | BUG_ON(PagePinned(virt_to_page(pgd))); | |
1337 | ||
1338 | #ifdef CONFIG_X86_64 | |
1339 | { | |
1340 | struct page *page = virt_to_page(pgd); | |
1341 | pgd_t *user_pgd; | |
1342 | ||
1343 | BUG_ON(page->private != 0); | |
1344 | ||
1345 | ret = -ENOMEM; | |
1346 | ||
1347 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | |
1348 | page->private = (unsigned long)user_pgd; | |
1349 | ||
1350 | if (user_pgd != NULL) { | |
1351 | user_pgd[pgd_index(VSYSCALL_START)] = | |
1352 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | |
1353 | ret = 0; | |
1354 | } | |
1355 | ||
1356 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | |
1357 | } | |
1358 | #endif | |
1359 | ||
1360 | return ret; | |
1361 | } | |
1362 | ||
1363 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
1364 | { | |
1365 | #ifdef CONFIG_X86_64 | |
1366 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1367 | ||
1368 | if (user_pgd) | |
1369 | free_page((unsigned long)user_pgd); | |
1370 | #endif | |
1371 | } | |
1372 | ||
ee176455 | 1373 | #ifdef CONFIG_X86_32 |
3f508953 | 1374 | static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte) |
1f4f9315 JF |
1375 | { |
1376 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | |
1377 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
1378 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
1379 | pte_val_ma(pte)); | |
ee176455 SS |
1380 | |
1381 | return pte; | |
1382 | } | |
1383 | #else /* CONFIG_X86_64 */ | |
3f508953 | 1384 | static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte) |
ee176455 SS |
1385 | { |
1386 | unsigned long pfn = pte_pfn(pte); | |
fef5ba79 JF |
1387 | |
1388 | /* | |
1389 | * If the new pfn is within the range of the newly allocated | |
1390 | * kernel pagetable, and it isn't being mapped into an | |
d8aa5ec3 SS |
1391 | * early_ioremap fixmap slot as a freshly allocated page, make sure |
1392 | * it is RO. | |
fef5ba79 | 1393 | */ |
d8aa5ec3 | 1394 | if (((!is_early_ioremap_ptep(ptep) && |
b9269dc7 | 1395 | pfn >= pgt_buf_start && pfn < pgt_buf_top)) || |
d8aa5ec3 | 1396 | (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1))) |
fef5ba79 | 1397 | pte = pte_wrprotect(pte); |
1f4f9315 JF |
1398 | |
1399 | return pte; | |
1400 | } | |
ee176455 | 1401 | #endif /* CONFIG_X86_64 */ |
1f4f9315 JF |
1402 | |
1403 | /* Init-time set_pte while constructing initial pagetables, which | |
1404 | doesn't allow RO pagetable pages to be remapped RW */ | |
3f508953 | 1405 | static void __init xen_set_pte_init(pte_t *ptep, pte_t pte) |
1f4f9315 JF |
1406 | { |
1407 | pte = mask_rw_pte(ptep, pte); | |
1408 | ||
1409 | xen_set_pte(ptep, pte); | |
1410 | } | |
319f3ba5 | 1411 | |
b96229b5 JF |
1412 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
1413 | { | |
1414 | struct mmuext_op op; | |
1415 | op.cmd = cmd; | |
1416 | op.arg1.mfn = pfn_to_mfn(pfn); | |
1417 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
1418 | BUG(); | |
1419 | } | |
1420 | ||
319f3ba5 JF |
1421 | /* Early in boot, while setting up the initial pagetable, assume |
1422 | everything is pinned. */ | |
3f508953 | 1423 | static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) |
319f3ba5 | 1424 | { |
b96229b5 JF |
1425 | #ifdef CONFIG_FLATMEM |
1426 | BUG_ON(mem_map); /* should only be used early */ | |
1427 | #endif | |
1428 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1429 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1430 | } | |
1431 | ||
1432 | /* Used for pmd and pud */ | |
3f508953 | 1433 | static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) |
b96229b5 | 1434 | { |
319f3ba5 JF |
1435 | #ifdef CONFIG_FLATMEM |
1436 | BUG_ON(mem_map); /* should only be used early */ | |
1437 | #endif | |
1438 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1439 | } | |
1440 | ||
1441 | /* Early release_pte assumes that all pts are pinned, since there's | |
1442 | only init_mm and anything attached to that is pinned. */ | |
3f508953 | 1443 | static void __init xen_release_pte_init(unsigned long pfn) |
319f3ba5 | 1444 | { |
b96229b5 | 1445 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); |
319f3ba5 JF |
1446 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
1447 | } | |
1448 | ||
3f508953 | 1449 | static void __init xen_release_pmd_init(unsigned long pfn) |
319f3ba5 | 1450 | { |
b96229b5 | 1451 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
319f3ba5 JF |
1452 | } |
1453 | ||
1454 | /* This needs to make sure the new pte page is pinned iff its being | |
1455 | attached to a pinned pagetable. */ | |
1456 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) | |
1457 | { | |
1458 | struct page *page = pfn_to_page(pfn); | |
1459 | ||
1460 | if (PagePinned(virt_to_page(mm->pgd))) { | |
1461 | SetPagePinned(page); | |
1462 | ||
319f3ba5 JF |
1463 | if (!PageHighMem(page)) { |
1464 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); | |
1465 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1466 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1467 | } else { | |
1468 | /* make sure there are no stray mappings of | |
1469 | this page */ | |
1470 | kmap_flush_unused(); | |
1471 | } | |
1472 | } | |
1473 | } | |
1474 | ||
1475 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) | |
1476 | { | |
1477 | xen_alloc_ptpage(mm, pfn, PT_PTE); | |
1478 | } | |
1479 | ||
1480 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) | |
1481 | { | |
1482 | xen_alloc_ptpage(mm, pfn, PT_PMD); | |
1483 | } | |
1484 | ||
1485 | /* This should never happen until we're OK to use struct page */ | |
1486 | static void xen_release_ptpage(unsigned long pfn, unsigned level) | |
1487 | { | |
1488 | struct page *page = pfn_to_page(pfn); | |
1489 | ||
1490 | if (PagePinned(page)) { | |
1491 | if (!PageHighMem(page)) { | |
1492 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1493 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | |
1494 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
1495 | } | |
1496 | ClearPagePinned(page); | |
1497 | } | |
1498 | } | |
1499 | ||
1500 | static void xen_release_pte(unsigned long pfn) | |
1501 | { | |
1502 | xen_release_ptpage(pfn, PT_PTE); | |
1503 | } | |
1504 | ||
1505 | static void xen_release_pmd(unsigned long pfn) | |
1506 | { | |
1507 | xen_release_ptpage(pfn, PT_PMD); | |
1508 | } | |
1509 | ||
1510 | #if PAGETABLE_LEVELS == 4 | |
1511 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) | |
1512 | { | |
1513 | xen_alloc_ptpage(mm, pfn, PT_PUD); | |
1514 | } | |
1515 | ||
1516 | static void xen_release_pud(unsigned long pfn) | |
1517 | { | |
1518 | xen_release_ptpage(pfn, PT_PUD); | |
1519 | } | |
1520 | #endif | |
1521 | ||
1522 | void __init xen_reserve_top(void) | |
1523 | { | |
1524 | #ifdef CONFIG_X86_32 | |
1525 | unsigned long top = HYPERVISOR_VIRT_START; | |
1526 | struct xen_platform_parameters pp; | |
1527 | ||
1528 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1529 | top = pp.virt_start; | |
1530 | ||
1531 | reserve_top_address(-top); | |
1532 | #endif /* CONFIG_X86_32 */ | |
1533 | } | |
1534 | ||
1535 | /* | |
1536 | * Like __va(), but returns address in the kernel mapping (which is | |
1537 | * all we have until the physical memory mapping has been set up. | |
1538 | */ | |
1539 | static void *__ka(phys_addr_t paddr) | |
1540 | { | |
1541 | #ifdef CONFIG_X86_64 | |
1542 | return (void *)(paddr + __START_KERNEL_map); | |
1543 | #else | |
1544 | return __va(paddr); | |
1545 | #endif | |
1546 | } | |
1547 | ||
1548 | /* Convert a machine address to physical address */ | |
1549 | static unsigned long m2p(phys_addr_t maddr) | |
1550 | { | |
1551 | phys_addr_t paddr; | |
1552 | ||
1553 | maddr &= PTE_PFN_MASK; | |
1554 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; | |
1555 | ||
1556 | return paddr; | |
1557 | } | |
1558 | ||
1559 | /* Convert a machine address to kernel virtual */ | |
1560 | static void *m2v(phys_addr_t maddr) | |
1561 | { | |
1562 | return __ka(m2p(maddr)); | |
1563 | } | |
1564 | ||
4ec5387c | 1565 | /* Set the page permissions on an identity-mapped pages */ |
319f3ba5 JF |
1566 | static void set_page_prot(void *addr, pgprot_t prot) |
1567 | { | |
1568 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | |
1569 | pte_t pte = pfn_pte(pfn, prot); | |
1570 | ||
1571 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) | |
1572 | BUG(); | |
1573 | } | |
1574 | ||
3f508953 | 1575 | static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) |
319f3ba5 JF |
1576 | { |
1577 | unsigned pmdidx, pteidx; | |
1578 | unsigned ident_pte; | |
1579 | unsigned long pfn; | |
1580 | ||
764f0138 JF |
1581 | level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES, |
1582 | PAGE_SIZE); | |
1583 | ||
319f3ba5 JF |
1584 | ident_pte = 0; |
1585 | pfn = 0; | |
1586 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { | |
1587 | pte_t *pte_page; | |
1588 | ||
1589 | /* Reuse or allocate a page of ptes */ | |
1590 | if (pmd_present(pmd[pmdidx])) | |
1591 | pte_page = m2v(pmd[pmdidx].pmd); | |
1592 | else { | |
1593 | /* Check for free pte pages */ | |
764f0138 | 1594 | if (ident_pte == LEVEL1_IDENT_ENTRIES) |
319f3ba5 JF |
1595 | break; |
1596 | ||
1597 | pte_page = &level1_ident_pgt[ident_pte]; | |
1598 | ident_pte += PTRS_PER_PTE; | |
1599 | ||
1600 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); | |
1601 | } | |
1602 | ||
1603 | /* Install mappings */ | |
1604 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { | |
1605 | pte_t pte; | |
1606 | ||
a91d9287 SS |
1607 | #ifdef CONFIG_X86_32 |
1608 | if (pfn > max_pfn_mapped) | |
1609 | max_pfn_mapped = pfn; | |
1610 | #endif | |
1611 | ||
319f3ba5 JF |
1612 | if (!pte_none(pte_page[pteidx])) |
1613 | continue; | |
1614 | ||
1615 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | |
1616 | pte_page[pteidx] = pte; | |
1617 | } | |
1618 | } | |
1619 | ||
1620 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) | |
1621 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); | |
1622 | ||
1623 | set_page_prot(pmd, PAGE_KERNEL_RO); | |
1624 | } | |
1625 | ||
7e77506a IC |
1626 | void __init xen_setup_machphys_mapping(void) |
1627 | { | |
1628 | struct xen_machphys_mapping mapping; | |
1629 | unsigned long machine_to_phys_nr_ents; | |
1630 | ||
1631 | if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { | |
1632 | machine_to_phys_mapping = (unsigned long *)mapping.v_start; | |
1633 | machine_to_phys_nr_ents = mapping.max_mfn + 1; | |
1634 | } else { | |
1635 | machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES; | |
1636 | } | |
1637 | machine_to_phys_order = fls(machine_to_phys_nr_ents - 1); | |
1638 | } | |
1639 | ||
319f3ba5 JF |
1640 | #ifdef CONFIG_X86_64 |
1641 | static void convert_pfn_mfn(void *v) | |
1642 | { | |
1643 | pte_t *pte = v; | |
1644 | int i; | |
1645 | ||
1646 | /* All levels are converted the same way, so just treat them | |
1647 | as ptes. */ | |
1648 | for (i = 0; i < PTRS_PER_PTE; i++) | |
1649 | pte[i] = xen_make_pte(pte[i].pte); | |
1650 | } | |
1651 | ||
1652 | /* | |
0d2eb44f | 1653 | * Set up the initial kernel pagetable. |
319f3ba5 JF |
1654 | * |
1655 | * We can construct this by grafting the Xen provided pagetable into | |
1656 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | |
1657 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | |
1658 | * means that only the kernel has a physical mapping to start with - | |
1659 | * but that's enough to get __va working. We need to fill in the rest | |
1660 | * of the physical mapping once some sort of allocator has been set | |
1661 | * up. | |
1662 | */ | |
3f508953 | 1663 | pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd, |
319f3ba5 JF |
1664 | unsigned long max_pfn) |
1665 | { | |
1666 | pud_t *l3; | |
1667 | pmd_t *l2; | |
1668 | ||
14988a4d SS |
1669 | /* max_pfn_mapped is the last pfn mapped in the initial memory |
1670 | * mappings. Considering that on Xen after the kernel mappings we | |
1671 | * have the mappings of some pages that don't exist in pfn space, we | |
1672 | * set max_pfn_mapped to the last real pfn mapped. */ | |
1673 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); | |
1674 | ||
319f3ba5 JF |
1675 | /* Zap identity mapping */ |
1676 | init_level4_pgt[0] = __pgd(0); | |
1677 | ||
1678 | /* Pre-constructed entries are in pfn, so convert to mfn */ | |
1679 | convert_pfn_mfn(init_level4_pgt); | |
1680 | convert_pfn_mfn(level3_ident_pgt); | |
1681 | convert_pfn_mfn(level3_kernel_pgt); | |
1682 | ||
1683 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | |
1684 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | |
1685 | ||
1686 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1687 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1688 | ||
1689 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | |
1690 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | |
1691 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1692 | ||
1693 | /* Set up identity map */ | |
1694 | xen_map_identity_early(level2_ident_pgt, max_pfn); | |
1695 | ||
1696 | /* Make pagetable pieces RO */ | |
1697 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | |
1698 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | |
1699 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | |
1700 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); | |
1701 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | |
1702 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | |
1703 | ||
1704 | /* Pin down new L4 */ | |
1705 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, | |
1706 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | |
1707 | ||
1708 | /* Unpin Xen-provided one */ | |
1709 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1710 | ||
1711 | /* Switch over */ | |
1712 | pgd = init_level4_pgt; | |
1713 | ||
1714 | /* | |
1715 | * At this stage there can be no user pgd, and no page | |
1716 | * structure to attach it to, so make sure we just set kernel | |
1717 | * pgd. | |
1718 | */ | |
1719 | xen_mc_batch(); | |
1720 | __xen_write_cr3(true, __pa(pgd)); | |
1721 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1722 | ||
24aa0788 TH |
1723 | memblock_reserve(__pa(xen_start_info->pt_base), |
1724 | xen_start_info->nr_pt_frames * PAGE_SIZE); | |
319f3ba5 JF |
1725 | |
1726 | return pgd; | |
1727 | } | |
1728 | #else /* !CONFIG_X86_64 */ | |
5b5c1af1 IC |
1729 | static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); |
1730 | static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); | |
1731 | ||
3f508953 | 1732 | static void __init xen_write_cr3_init(unsigned long cr3) |
5b5c1af1 IC |
1733 | { |
1734 | unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); | |
1735 | ||
1736 | BUG_ON(read_cr3() != __pa(initial_page_table)); | |
1737 | BUG_ON(cr3 != __pa(swapper_pg_dir)); | |
1738 | ||
1739 | /* | |
1740 | * We are switching to swapper_pg_dir for the first time (from | |
1741 | * initial_page_table) and therefore need to mark that page | |
1742 | * read-only and then pin it. | |
1743 | * | |
1744 | * Xen disallows sharing of kernel PMDs for PAE | |
1745 | * guests. Therefore we must copy the kernel PMD from | |
1746 | * initial_page_table into a new kernel PMD to be used in | |
1747 | * swapper_pg_dir. | |
1748 | */ | |
1749 | swapper_kernel_pmd = | |
1750 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
1751 | memcpy(swapper_kernel_pmd, initial_kernel_pmd, | |
1752 | sizeof(pmd_t) * PTRS_PER_PMD); | |
1753 | swapper_pg_dir[KERNEL_PGD_BOUNDARY] = | |
1754 | __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); | |
1755 | set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); | |
1756 | ||
1757 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | |
1758 | xen_write_cr3(cr3); | |
1759 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); | |
1760 | ||
1761 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | |
1762 | PFN_DOWN(__pa(initial_page_table))); | |
1763 | set_page_prot(initial_page_table, PAGE_KERNEL); | |
1764 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL); | |
1765 | ||
1766 | pv_mmu_ops.write_cr3 = &xen_write_cr3; | |
1767 | } | |
319f3ba5 | 1768 | |
3f508953 | 1769 | pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd, |
319f3ba5 JF |
1770 | unsigned long max_pfn) |
1771 | { | |
1772 | pmd_t *kernel_pmd; | |
1773 | ||
5b5c1af1 IC |
1774 | initial_kernel_pmd = |
1775 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
f0991802 | 1776 | |
a91d9287 SS |
1777 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + |
1778 | xen_start_info->nr_pt_frames * PAGE_SIZE + | |
1779 | 512*1024); | |
319f3ba5 JF |
1780 | |
1781 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | |
5b5c1af1 | 1782 | memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); |
319f3ba5 | 1783 | |
5b5c1af1 | 1784 | xen_map_identity_early(initial_kernel_pmd, max_pfn); |
319f3ba5 | 1785 | |
5b5c1af1 IC |
1786 | memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD); |
1787 | initial_page_table[KERNEL_PGD_BOUNDARY] = | |
1788 | __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); | |
319f3ba5 | 1789 | |
5b5c1af1 IC |
1790 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); |
1791 | set_page_prot(initial_page_table, PAGE_KERNEL_RO); | |
319f3ba5 JF |
1792 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); |
1793 | ||
1794 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1795 | ||
5b5c1af1 IC |
1796 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, |
1797 | PFN_DOWN(__pa(initial_page_table))); | |
1798 | xen_write_cr3(__pa(initial_page_table)); | |
319f3ba5 | 1799 | |
24aa0788 TH |
1800 | memblock_reserve(__pa(xen_start_info->pt_base), |
1801 | xen_start_info->nr_pt_frames * PAGE_SIZE)); | |
33df4db0 | 1802 | |
5b5c1af1 | 1803 | return initial_page_table; |
319f3ba5 JF |
1804 | } |
1805 | #endif /* CONFIG_X86_64 */ | |
1806 | ||
98511f35 JF |
1807 | static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; |
1808 | ||
3b3809ac | 1809 | static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) |
319f3ba5 JF |
1810 | { |
1811 | pte_t pte; | |
1812 | ||
1813 | phys >>= PAGE_SHIFT; | |
1814 | ||
1815 | switch (idx) { | |
1816 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | |
1817 | #ifdef CONFIG_X86_F00F_BUG | |
1818 | case FIX_F00F_IDT: | |
1819 | #endif | |
1820 | #ifdef CONFIG_X86_32 | |
1821 | case FIX_WP_TEST: | |
1822 | case FIX_VDSO: | |
1823 | # ifdef CONFIG_HIGHMEM | |
1824 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: | |
1825 | # endif | |
1826 | #else | |
1827 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | |
319f3ba5 | 1828 | #endif |
3ecb1b7d JF |
1829 | case FIX_TEXT_POKE0: |
1830 | case FIX_TEXT_POKE1: | |
1831 | /* All local page mappings */ | |
319f3ba5 JF |
1832 | pte = pfn_pte(phys, prot); |
1833 | break; | |
1834 | ||
98511f35 JF |
1835 | #ifdef CONFIG_X86_LOCAL_APIC |
1836 | case FIX_APIC_BASE: /* maps dummy local APIC */ | |
1837 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1838 | break; | |
1839 | #endif | |
1840 | ||
1841 | #ifdef CONFIG_X86_IO_APIC | |
1842 | case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: | |
1843 | /* | |
1844 | * We just don't map the IO APIC - all access is via | |
1845 | * hypercalls. Keep the address in the pte for reference. | |
1846 | */ | |
1847 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1848 | break; | |
1849 | #endif | |
1850 | ||
c0011dbf JF |
1851 | case FIX_PARAVIRT_BOOTMAP: |
1852 | /* This is an MFN, but it isn't an IO mapping from the | |
1853 | IO domain */ | |
319f3ba5 JF |
1854 | pte = mfn_pte(phys, prot); |
1855 | break; | |
c0011dbf JF |
1856 | |
1857 | default: | |
1858 | /* By default, set_fixmap is used for hardware mappings */ | |
1859 | pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP)); | |
1860 | break; | |
319f3ba5 JF |
1861 | } |
1862 | ||
1863 | __native_set_fixmap(idx, pte); | |
1864 | ||
1865 | #ifdef CONFIG_X86_64 | |
1866 | /* Replicate changes to map the vsyscall page into the user | |
1867 | pagetable vsyscall mapping. */ | |
1868 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | |
1869 | unsigned long vaddr = __fix_to_virt(idx); | |
1870 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | |
1871 | } | |
1872 | #endif | |
1873 | } | |
1874 | ||
3f508953 | 1875 | void __init xen_ident_map_ISA(void) |
4ec5387c JQ |
1876 | { |
1877 | unsigned long pa; | |
1878 | ||
1879 | /* | |
1880 | * If we're dom0, then linear map the ISA machine addresses into | |
1881 | * the kernel's address space. | |
1882 | */ | |
1883 | if (!xen_initial_domain()) | |
1884 | return; | |
1885 | ||
1886 | xen_raw_printk("Xen: setup ISA identity maps\n"); | |
1887 | ||
1888 | for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) { | |
1889 | pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO); | |
1890 | ||
1891 | if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0)) | |
1892 | BUG(); | |
1893 | } | |
1894 | ||
1895 | xen_flush_tlb(); | |
1896 | } | |
1897 | ||
3f508953 | 1898 | static void __init xen_post_allocator_init(void) |
319f3ba5 | 1899 | { |
fc25151d KRW |
1900 | #ifdef CONFIG_XEN_DEBUG |
1901 | pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug); | |
1902 | #endif | |
319f3ba5 JF |
1903 | pv_mmu_ops.set_pte = xen_set_pte; |
1904 | pv_mmu_ops.set_pmd = xen_set_pmd; | |
1905 | pv_mmu_ops.set_pud = xen_set_pud; | |
1906 | #if PAGETABLE_LEVELS == 4 | |
1907 | pv_mmu_ops.set_pgd = xen_set_pgd; | |
1908 | #endif | |
1909 | ||
1910 | /* This will work as long as patching hasn't happened yet | |
1911 | (which it hasn't) */ | |
1912 | pv_mmu_ops.alloc_pte = xen_alloc_pte; | |
1913 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
1914 | pv_mmu_ops.release_pte = xen_release_pte; | |
1915 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
1916 | #if PAGETABLE_LEVELS == 4 | |
1917 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | |
1918 | pv_mmu_ops.release_pud = xen_release_pud; | |
1919 | #endif | |
1920 | ||
1921 | #ifdef CONFIG_X86_64 | |
1922 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | |
1923 | #endif | |
1924 | xen_mark_init_mm_pinned(); | |
1925 | } | |
1926 | ||
b407fc57 JF |
1927 | static void xen_leave_lazy_mmu(void) |
1928 | { | |
5caecb94 | 1929 | preempt_disable(); |
b407fc57 JF |
1930 | xen_mc_flush(); |
1931 | paravirt_leave_lazy_mmu(); | |
5caecb94 | 1932 | preempt_enable(); |
b407fc57 | 1933 | } |
319f3ba5 | 1934 | |
3f508953 | 1935 | static const struct pv_mmu_ops xen_mmu_ops __initconst = { |
319f3ba5 JF |
1936 | .read_cr2 = xen_read_cr2, |
1937 | .write_cr2 = xen_write_cr2, | |
1938 | ||
1939 | .read_cr3 = xen_read_cr3, | |
5b5c1af1 IC |
1940 | #ifdef CONFIG_X86_32 |
1941 | .write_cr3 = xen_write_cr3_init, | |
1942 | #else | |
319f3ba5 | 1943 | .write_cr3 = xen_write_cr3, |
5b5c1af1 | 1944 | #endif |
319f3ba5 JF |
1945 | |
1946 | .flush_tlb_user = xen_flush_tlb, | |
1947 | .flush_tlb_kernel = xen_flush_tlb, | |
1948 | .flush_tlb_single = xen_flush_tlb_single, | |
1949 | .flush_tlb_others = xen_flush_tlb_others, | |
1950 | ||
1951 | .pte_update = paravirt_nop, | |
1952 | .pte_update_defer = paravirt_nop, | |
1953 | ||
1954 | .pgd_alloc = xen_pgd_alloc, | |
1955 | .pgd_free = xen_pgd_free, | |
1956 | ||
1957 | .alloc_pte = xen_alloc_pte_init, | |
1958 | .release_pte = xen_release_pte_init, | |
b96229b5 | 1959 | .alloc_pmd = xen_alloc_pmd_init, |
b96229b5 | 1960 | .release_pmd = xen_release_pmd_init, |
319f3ba5 | 1961 | |
319f3ba5 | 1962 | .set_pte = xen_set_pte_init, |
319f3ba5 JF |
1963 | .set_pte_at = xen_set_pte_at, |
1964 | .set_pmd = xen_set_pmd_hyper, | |
1965 | ||
1966 | .ptep_modify_prot_start = __ptep_modify_prot_start, | |
1967 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
1968 | ||
da5de7c2 JF |
1969 | .pte_val = PV_CALLEE_SAVE(xen_pte_val), |
1970 | .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), | |
319f3ba5 | 1971 | |
da5de7c2 JF |
1972 | .make_pte = PV_CALLEE_SAVE(xen_make_pte), |
1973 | .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), | |
319f3ba5 JF |
1974 | |
1975 | #ifdef CONFIG_X86_PAE | |
1976 | .set_pte_atomic = xen_set_pte_atomic, | |
319f3ba5 JF |
1977 | .pte_clear = xen_pte_clear, |
1978 | .pmd_clear = xen_pmd_clear, | |
1979 | #endif /* CONFIG_X86_PAE */ | |
1980 | .set_pud = xen_set_pud_hyper, | |
1981 | ||
da5de7c2 JF |
1982 | .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), |
1983 | .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), | |
319f3ba5 JF |
1984 | |
1985 | #if PAGETABLE_LEVELS == 4 | |
da5de7c2 JF |
1986 | .pud_val = PV_CALLEE_SAVE(xen_pud_val), |
1987 | .make_pud = PV_CALLEE_SAVE(xen_make_pud), | |
319f3ba5 JF |
1988 | .set_pgd = xen_set_pgd_hyper, |
1989 | ||
b96229b5 JF |
1990 | .alloc_pud = xen_alloc_pmd_init, |
1991 | .release_pud = xen_release_pmd_init, | |
319f3ba5 JF |
1992 | #endif /* PAGETABLE_LEVELS == 4 */ |
1993 | ||
1994 | .activate_mm = xen_activate_mm, | |
1995 | .dup_mmap = xen_dup_mmap, | |
1996 | .exit_mmap = xen_exit_mmap, | |
1997 | ||
1998 | .lazy_mode = { | |
1999 | .enter = paravirt_enter_lazy_mmu, | |
b407fc57 | 2000 | .leave = xen_leave_lazy_mmu, |
319f3ba5 JF |
2001 | }, |
2002 | ||
2003 | .set_fixmap = xen_set_fixmap, | |
2004 | }; | |
2005 | ||
030cb6c0 TG |
2006 | void __init xen_init_mmu_ops(void) |
2007 | { | |
279b706b | 2008 | x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve; |
030cb6c0 TG |
2009 | x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start; |
2010 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; | |
2011 | pv_mmu_ops = xen_mmu_ops; | |
d2cb2145 | 2012 | |
98511f35 | 2013 | memset(dummy_mapping, 0xff, PAGE_SIZE); |
030cb6c0 | 2014 | } |
319f3ba5 | 2015 | |
08bbc9da AN |
2016 | /* Protected by xen_reservation_lock. */ |
2017 | #define MAX_CONTIG_ORDER 9 /* 2MB */ | |
2018 | static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; | |
2019 | ||
2020 | #define VOID_PTE (mfn_pte(0, __pgprot(0))) | |
2021 | static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, | |
2022 | unsigned long *in_frames, | |
2023 | unsigned long *out_frames) | |
2024 | { | |
2025 | int i; | |
2026 | struct multicall_space mcs; | |
2027 | ||
2028 | xen_mc_batch(); | |
2029 | for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { | |
2030 | mcs = __xen_mc_entry(0); | |
2031 | ||
2032 | if (in_frames) | |
2033 | in_frames[i] = virt_to_mfn(vaddr); | |
2034 | ||
2035 | MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); | |
6eaa412f | 2036 | __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); |
08bbc9da AN |
2037 | |
2038 | if (out_frames) | |
2039 | out_frames[i] = virt_to_pfn(vaddr); | |
2040 | } | |
2041 | xen_mc_issue(0); | |
2042 | } | |
2043 | ||
2044 | /* | |
2045 | * Update the pfn-to-mfn mappings for a virtual address range, either to | |
2046 | * point to an array of mfns, or contiguously from a single starting | |
2047 | * mfn. | |
2048 | */ | |
2049 | static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, | |
2050 | unsigned long *mfns, | |
2051 | unsigned long first_mfn) | |
2052 | { | |
2053 | unsigned i, limit; | |
2054 | unsigned long mfn; | |
2055 | ||
2056 | xen_mc_batch(); | |
2057 | ||
2058 | limit = 1u << order; | |
2059 | for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { | |
2060 | struct multicall_space mcs; | |
2061 | unsigned flags; | |
2062 | ||
2063 | mcs = __xen_mc_entry(0); | |
2064 | if (mfns) | |
2065 | mfn = mfns[i]; | |
2066 | else | |
2067 | mfn = first_mfn + i; | |
2068 | ||
2069 | if (i < (limit - 1)) | |
2070 | flags = 0; | |
2071 | else { | |
2072 | if (order == 0) | |
2073 | flags = UVMF_INVLPG | UVMF_ALL; | |
2074 | else | |
2075 | flags = UVMF_TLB_FLUSH | UVMF_ALL; | |
2076 | } | |
2077 | ||
2078 | MULTI_update_va_mapping(mcs.mc, vaddr, | |
2079 | mfn_pte(mfn, PAGE_KERNEL), flags); | |
2080 | ||
2081 | set_phys_to_machine(virt_to_pfn(vaddr), mfn); | |
2082 | } | |
2083 | ||
2084 | xen_mc_issue(0); | |
2085 | } | |
2086 | ||
2087 | /* | |
2088 | * Perform the hypercall to exchange a region of our pfns to point to | |
2089 | * memory with the required contiguous alignment. Takes the pfns as | |
2090 | * input, and populates mfns as output. | |
2091 | * | |
2092 | * Returns a success code indicating whether the hypervisor was able to | |
2093 | * satisfy the request or not. | |
2094 | */ | |
2095 | static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, | |
2096 | unsigned long *pfns_in, | |
2097 | unsigned long extents_out, | |
2098 | unsigned int order_out, | |
2099 | unsigned long *mfns_out, | |
2100 | unsigned int address_bits) | |
2101 | { | |
2102 | long rc; | |
2103 | int success; | |
2104 | ||
2105 | struct xen_memory_exchange exchange = { | |
2106 | .in = { | |
2107 | .nr_extents = extents_in, | |
2108 | .extent_order = order_in, | |
2109 | .extent_start = pfns_in, | |
2110 | .domid = DOMID_SELF | |
2111 | }, | |
2112 | .out = { | |
2113 | .nr_extents = extents_out, | |
2114 | .extent_order = order_out, | |
2115 | .extent_start = mfns_out, | |
2116 | .address_bits = address_bits, | |
2117 | .domid = DOMID_SELF | |
2118 | } | |
2119 | }; | |
2120 | ||
2121 | BUG_ON(extents_in << order_in != extents_out << order_out); | |
2122 | ||
2123 | rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); | |
2124 | success = (exchange.nr_exchanged == extents_in); | |
2125 | ||
2126 | BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); | |
2127 | BUG_ON(success && (rc != 0)); | |
2128 | ||
2129 | return success; | |
2130 | } | |
2131 | ||
2132 | int xen_create_contiguous_region(unsigned long vstart, unsigned int order, | |
2133 | unsigned int address_bits) | |
2134 | { | |
2135 | unsigned long *in_frames = discontig_frames, out_frame; | |
2136 | unsigned long flags; | |
2137 | int success; | |
2138 | ||
2139 | /* | |
2140 | * Currently an auto-translated guest will not perform I/O, nor will | |
2141 | * it require PAE page directories below 4GB. Therefore any calls to | |
2142 | * this function are redundant and can be ignored. | |
2143 | */ | |
2144 | ||
2145 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2146 | return 0; | |
2147 | ||
2148 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2149 | return -ENOMEM; | |
2150 | ||
2151 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2152 | ||
08bbc9da AN |
2153 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2154 | ||
2155 | /* 1. Zap current PTEs, remembering MFNs. */ | |
2156 | xen_zap_pfn_range(vstart, order, in_frames, NULL); | |
2157 | ||
2158 | /* 2. Get a new contiguous memory extent. */ | |
2159 | out_frame = virt_to_pfn(vstart); | |
2160 | success = xen_exchange_memory(1UL << order, 0, in_frames, | |
2161 | 1, order, &out_frame, | |
2162 | address_bits); | |
2163 | ||
2164 | /* 3. Map the new extent in place of old pages. */ | |
2165 | if (success) | |
2166 | xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); | |
2167 | else | |
2168 | xen_remap_exchanged_ptes(vstart, order, in_frames, 0); | |
2169 | ||
2170 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
2171 | ||
2172 | return success ? 0 : -ENOMEM; | |
2173 | } | |
2174 | EXPORT_SYMBOL_GPL(xen_create_contiguous_region); | |
2175 | ||
2176 | void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order) | |
2177 | { | |
2178 | unsigned long *out_frames = discontig_frames, in_frame; | |
2179 | unsigned long flags; | |
2180 | int success; | |
2181 | ||
2182 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2183 | return; | |
2184 | ||
2185 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2186 | return; | |
2187 | ||
2188 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2189 | ||
08bbc9da AN |
2190 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2191 | ||
2192 | /* 1. Find start MFN of contiguous extent. */ | |
2193 | in_frame = virt_to_mfn(vstart); | |
2194 | ||
2195 | /* 2. Zap current PTEs. */ | |
2196 | xen_zap_pfn_range(vstart, order, NULL, out_frames); | |
2197 | ||
2198 | /* 3. Do the exchange for non-contiguous MFNs. */ | |
2199 | success = xen_exchange_memory(1, order, &in_frame, 1UL << order, | |
2200 | 0, out_frames, 0); | |
2201 | ||
2202 | /* 4. Map new pages in place of old pages. */ | |
2203 | if (success) | |
2204 | xen_remap_exchanged_ptes(vstart, order, out_frames, 0); | |
2205 | else | |
2206 | xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); | |
2207 | ||
2208 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
030cb6c0 | 2209 | } |
08bbc9da | 2210 | EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region); |
319f3ba5 | 2211 | |
ca65f9fc | 2212 | #ifdef CONFIG_XEN_PVHVM |
59151001 SS |
2213 | static void xen_hvm_exit_mmap(struct mm_struct *mm) |
2214 | { | |
2215 | struct xen_hvm_pagetable_dying a; | |
2216 | int rc; | |
2217 | ||
2218 | a.domid = DOMID_SELF; | |
2219 | a.gpa = __pa(mm->pgd); | |
2220 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2221 | WARN_ON_ONCE(rc < 0); | |
2222 | } | |
2223 | ||
2224 | static int is_pagetable_dying_supported(void) | |
2225 | { | |
2226 | struct xen_hvm_pagetable_dying a; | |
2227 | int rc = 0; | |
2228 | ||
2229 | a.domid = DOMID_SELF; | |
2230 | a.gpa = 0x00; | |
2231 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2232 | if (rc < 0) { | |
2233 | printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n"); | |
2234 | return 0; | |
2235 | } | |
2236 | return 1; | |
2237 | } | |
2238 | ||
2239 | void __init xen_hvm_init_mmu_ops(void) | |
2240 | { | |
2241 | if (is_pagetable_dying_supported()) | |
2242 | pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap; | |
2243 | } | |
ca65f9fc | 2244 | #endif |
59151001 | 2245 | |
de1ef206 IC |
2246 | #define REMAP_BATCH_SIZE 16 |
2247 | ||
2248 | struct remap_data { | |
2249 | unsigned long mfn; | |
2250 | pgprot_t prot; | |
2251 | struct mmu_update *mmu_update; | |
2252 | }; | |
2253 | ||
2254 | static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token, | |
2255 | unsigned long addr, void *data) | |
2256 | { | |
2257 | struct remap_data *rmd = data; | |
2258 | pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot)); | |
2259 | ||
d5108316 | 2260 | rmd->mmu_update->ptr = virt_to_machine(ptep).maddr; |
de1ef206 IC |
2261 | rmd->mmu_update->val = pte_val_ma(pte); |
2262 | rmd->mmu_update++; | |
2263 | ||
2264 | return 0; | |
2265 | } | |
2266 | ||
2267 | int xen_remap_domain_mfn_range(struct vm_area_struct *vma, | |
2268 | unsigned long addr, | |
2269 | unsigned long mfn, int nr, | |
2270 | pgprot_t prot, unsigned domid) | |
2271 | { | |
2272 | struct remap_data rmd; | |
2273 | struct mmu_update mmu_update[REMAP_BATCH_SIZE]; | |
2274 | int batch; | |
2275 | unsigned long range; | |
2276 | int err = 0; | |
2277 | ||
2278 | prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP); | |
2279 | ||
e060e7af SS |
2280 | BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) == |
2281 | (VM_PFNMAP | VM_RESERVED | VM_IO))); | |
de1ef206 IC |
2282 | |
2283 | rmd.mfn = mfn; | |
2284 | rmd.prot = prot; | |
2285 | ||
2286 | while (nr) { | |
2287 | batch = min(REMAP_BATCH_SIZE, nr); | |
2288 | range = (unsigned long)batch << PAGE_SHIFT; | |
2289 | ||
2290 | rmd.mmu_update = mmu_update; | |
2291 | err = apply_to_page_range(vma->vm_mm, addr, range, | |
2292 | remap_area_mfn_pte_fn, &rmd); | |
2293 | if (err) | |
2294 | goto out; | |
2295 | ||
2296 | err = -EFAULT; | |
2297 | if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0) | |
2298 | goto out; | |
2299 | ||
2300 | nr -= batch; | |
2301 | addr += range; | |
2302 | } | |
2303 | ||
2304 | err = 0; | |
2305 | out: | |
2306 | ||
2307 | flush_tlb_all(); | |
2308 | ||
2309 | return err; | |
2310 | } | |
2311 | EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); | |
2312 | ||
994025ca | 2313 | #ifdef CONFIG_XEN_DEBUG_FS |
2222e71b KRW |
2314 | static int p2m_dump_open(struct inode *inode, struct file *filp) |
2315 | { | |
2316 | return single_open(filp, p2m_dump_show, NULL); | |
2317 | } | |
2318 | ||
2319 | static const struct file_operations p2m_dump_fops = { | |
2320 | .open = p2m_dump_open, | |
2321 | .read = seq_read, | |
2322 | .llseek = seq_lseek, | |
2323 | .release = single_release, | |
2324 | }; | |
4bf0ff24 | 2325 | #endif /* CONFIG_XEN_DEBUG_FS */ |