xen/m2p: use GNTTABOP_unmap_and_replace to reinstate the original mapping
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
5ead97c8
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
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25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
96f28bc6 34#include <linux/edd.h>
5ead97c8 35
1ccbf534 36#include <xen/xen.h>
0ec53ecf 37#include <xen/events.h>
5ead97c8 38#include <xen/interface/xen.h>
ecbf29cd 39#include <xen/interface/version.h>
5ead97c8
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40#include <xen/interface/physdev.h>
41#include <xen/interface/vcpu.h>
bee6ab53 42#include <xen/interface/memory.h>
cef12ee5 43#include <xen/interface/xen-mca.h>
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44#include <xen/features.h>
45#include <xen/page.h>
38e20b07 46#include <xen/hvm.h>
084a2a4e 47#include <xen/hvc-console.h>
211063dc 48#include <xen/acpi.h>
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49
50#include <asm/paravirt.h>
7b6aa335 51#include <asm/apic.h>
5ead97c8 52#include <asm/page.h>
b5401a96 53#include <asm/xen/pci.h>
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54#include <asm/xen/hypercall.h>
55#include <asm/xen/hypervisor.h>
56#include <asm/fixmap.h>
57#include <asm/processor.h>
707ebbc8 58#include <asm/proto.h>
1153968a 59#include <asm/msr-index.h>
6cac5a92 60#include <asm/traps.h>
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61#include <asm/setup.h>
62#include <asm/desc.h>
817a824b 63#include <asm/pgalloc.h>
5ead97c8 64#include <asm/pgtable.h>
f87e4cac 65#include <asm/tlbflush.h>
fefa629a 66#include <asm/reboot.h>
577eebea 67#include <asm/stackprotector.h>
bee6ab53 68#include <asm/hypervisor.h>
73c154c6 69#include <asm/mwait.h>
76a8df7b 70#include <asm/pci_x86.h>
c79c4982 71#include <asm/pat.h>
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72
73#ifdef CONFIG_ACPI
74#include <linux/acpi.h>
75#include <asm/acpi.h>
76#include <acpi/pdc_intel.h>
77#include <acpi/processor.h>
78#include <xen/interface/platform.h>
79#endif
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80
81#include "xen-ops.h"
3b827c1b 82#include "mmu.h"
f447d56d 83#include "smp.h"
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84#include "multicalls.h"
85
86EXPORT_SYMBOL_GPL(hypercall_page);
87
a520996a
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88/*
89 * Pointer to the xen_vcpu_info structure or
90 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
91 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
92 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point
93 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to
94 * acknowledge pending events.
95 * Also more subtly it is used by the patched version of irq enable/disable
96 * e.g. xen_irq_enable_direct and xen_iret in PV mode.
97 *
98 * The desire to be able to do those mask/unmask operations as a single
99 * instruction by using the per-cpu offset held in %gs is the real reason
100 * vcpu info is in a per-cpu pointer and the original reason for this
101 * hypercall.
102 *
103 */
5ead97c8 104DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
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105
106/*
107 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info
108 * hypercall. This can be used both in PV and PVHVM mode. The structure
109 * overrides the default per_cpu(xen_vcpu, cpu) value.
110 */
5ead97c8 111DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 112
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113enum xen_domain_type xen_domain_type = XEN_NATIVE;
114EXPORT_SYMBOL_GPL(xen_domain_type);
115
7e77506a
IC
116unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
117EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
118unsigned long machine_to_phys_nr;
119EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 120
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121struct start_info *xen_start_info;
122EXPORT_SYMBOL_GPL(xen_start_info);
123
a0d695c8 124struct shared_info xen_dummy_shared_info;
60223a32 125
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126void *xen_initial_gdt;
127
bee6ab53 128RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
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129__read_mostly int xen_have_vector_callback;
130EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 131
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132/*
133 * Point at some empty memory to start with. We map the real shared_info
134 * page as soon as fixmap is up and running.
135 */
4648da7c 136struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
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137
138/*
139 * Flag to determine whether vcpu info placement is available on all
140 * VCPUs. We assume it is to start with, and then set it to zero on
141 * the first failure. This is because it can succeed on some VCPUs
142 * and not others, since it can involve hypervisor memory allocation,
143 * or because the guest failed to guarantee all the appropriate
144 * constraints on all VCPUs (ie buffer can't cross a page boundary).
145 *
146 * Note that any particular CPU may be using a placed vcpu structure,
147 * but we can only optimise if the all are.
148 *
149 * 0: not available, 1: available
150 */
e4d04071 151static int have_vcpu_info_placement = 1;
60223a32 152
1c32cdc6
DV
153struct tls_descs {
154 struct desc_struct desc[3];
155};
156
157/*
158 * Updating the 3 TLS descriptors in the GDT on every task switch is
159 * surprisingly expensive so we avoid updating them if they haven't
160 * changed. Since Xen writes different descriptors than the one
161 * passed in the update_descriptor hypercall we keep shadow copies to
162 * compare against.
163 */
164static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
165
c06ee78d
MR
166static void clamp_max_cpus(void)
167{
168#ifdef CONFIG_SMP
169 if (setup_max_cpus > MAX_VIRT_CPUS)
170 setup_max_cpus = MAX_VIRT_CPUS;
171#endif
172}
173
9c7a7942 174static void xen_vcpu_setup(int cpu)
5ead97c8 175{
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176 struct vcpu_register_vcpu_info info;
177 int err;
178 struct vcpu_info *vcpup;
179
a0d695c8 180 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 181
7f1fc268
KRW
182 /*
183 * This path is called twice on PVHVM - first during bootup via
184 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being
185 * hotplugged: cpu_up -> xen_hvm_cpu_notify.
186 * As we can only do the VCPUOP_register_vcpu_info once lets
187 * not over-write its result.
188 *
189 * For PV it is called during restore (xen_vcpu_restore) and bootup
190 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not
191 * use this function.
192 */
193 if (xen_hvm_domain()) {
194 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
195 return;
196 }
c06ee78d
MR
197 if (cpu < MAX_VIRT_CPUS)
198 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 199
c06ee78d
MR
200 if (!have_vcpu_info_placement) {
201 if (cpu >= MAX_VIRT_CPUS)
202 clamp_max_cpus();
203 return;
204 }
60223a32 205
c06ee78d 206 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 207 info.mfn = arbitrary_virt_to_mfn(vcpup);
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208 info.offset = offset_in_page(vcpup);
209
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210 /* Check to see if the hypervisor will put the vcpu_info
211 structure where we want it, which allows direct access via
a520996a
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212 a percpu-variable.
213 N.B. This hypercall can _only_ be called once per CPU. Subsequent
214 calls will error out with -EINVAL. This is due to the fact that
215 hypervisor has no unregister variant and this hypercall does not
216 allow to over-write info.mfn and info.offset.
217 */
60223a32
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218 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
219
220 if (err) {
221 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
222 have_vcpu_info_placement = 0;
c06ee78d 223 clamp_max_cpus();
60223a32
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224 } else {
225 /* This cpu is using the registered vcpu info, even if
226 later ones fail to. */
227 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 228 }
5ead97c8
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229}
230
9c7a7942
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231/*
232 * On restore, set the vcpu placement up again.
233 * If it fails, then we're in a bad state, since
234 * we can't back out from using it...
235 */
236void xen_vcpu_restore(void)
237{
3905bb2a 238 int cpu;
9c7a7942 239
9d328a94 240 for_each_possible_cpu(cpu) {
3905bb2a 241 bool other_cpu = (cpu != smp_processor_id());
9d328a94 242 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL);
9c7a7942 243
9d328a94 244 if (other_cpu && is_up &&
3905bb2a
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245 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
246 BUG();
9c7a7942 247
3905bb2a 248 xen_setup_runstate_info(cpu);
9c7a7942 249
3905bb2a 250 if (have_vcpu_info_placement)
9c7a7942 251 xen_vcpu_setup(cpu);
9c7a7942 252
9d328a94 253 if (other_cpu && is_up &&
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254 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
255 BUG();
9c7a7942
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256 }
257}
258
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259static void __init xen_banner(void)
260{
95c7c23b
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261 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
262 struct xen_extraversion extra;
263 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
264
5ead97c8 265 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 266 pv_info.name);
95c7c23b
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267 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
268 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 269 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8 270}
394b40f6
KRW
271/* Check if running on Xen version (major, minor) or later */
272bool
273xen_running_on_version_or_later(unsigned int major, unsigned int minor)
274{
275 unsigned int version;
276
277 if (!xen_domain())
278 return false;
279
280 version = HYPERVISOR_xen_version(XENVER_version, NULL);
281 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
282 ((version >> 16) > major))
283 return true;
284 return false;
285}
5ead97c8 286
5e626254
AP
287#define CPUID_THERM_POWER_LEAF 6
288#define APERFMPERF_PRESENT 0
289
e826fe1b
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290static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
291static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
292
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KRW
293static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
294static __read_mostly unsigned int cpuid_leaf5_ecx_val;
295static __read_mostly unsigned int cpuid_leaf5_edx_val;
296
65ea5b03
PA
297static void xen_cpuid(unsigned int *ax, unsigned int *bx,
298 unsigned int *cx, unsigned int *dx)
5ead97c8 299{
82d64699 300 unsigned maskebx = ~0;
e826fe1b 301 unsigned maskecx = ~0;
5ead97c8 302 unsigned maskedx = ~0;
73c154c6 303 unsigned setecx = 0;
5ead97c8
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304 /*
305 * Mask out inconvenient features, to try and disable as many
306 * unsupported kernel subsystems as possible.
307 */
82d64699
JF
308 switch (*ax) {
309 case 1:
e826fe1b 310 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 311 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 312 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
313 break;
314
73c154c6
KRW
315 case CPUID_MWAIT_LEAF:
316 /* Synthesize the values.. */
317 *ax = 0;
318 *bx = 0;
319 *cx = cpuid_leaf5_ecx_val;
320 *dx = cpuid_leaf5_edx_val;
321 return;
322
5e626254
AP
323 case CPUID_THERM_POWER_LEAF:
324 /* Disabling APERFMPERF for kernel usage */
325 maskecx = ~(1 << APERFMPERF_PRESENT);
326 break;
327
82d64699
JF
328 case 0xb:
329 /* Suppress extended topology stuff */
330 maskebx = 0;
331 break;
e826fe1b 332 }
5ead97c8
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333
334 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
335 : "=a" (*ax),
336 "=b" (*bx),
337 "=c" (*cx),
338 "=d" (*dx)
339 : "0" (*ax), "2" (*cx));
e826fe1b 340
82d64699 341 *bx &= maskebx;
e826fe1b 342 *cx &= maskecx;
73c154c6 343 *cx |= setecx;
65ea5b03 344 *dx &= maskedx;
73c154c6 345
5ead97c8
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346}
347
73c154c6
KRW
348static bool __init xen_check_mwait(void)
349{
e3aa4e61 350#ifdef CONFIG_ACPI
73c154c6
KRW
351 struct xen_platform_op op = {
352 .cmd = XENPF_set_processor_pminfo,
353 .u.set_pminfo.id = -1,
354 .u.set_pminfo.type = XEN_PM_PDC,
355 };
356 uint32_t buf[3];
357 unsigned int ax, bx, cx, dx;
358 unsigned int mwait_mask;
359
360 /* We need to determine whether it is OK to expose the MWAIT
361 * capability to the kernel to harvest deeper than C3 states from ACPI
362 * _CST using the processor_harvest_xen.c module. For this to work, we
363 * need to gather the MWAIT_LEAF values (which the cstate.c code
364 * checks against). The hypervisor won't expose the MWAIT flag because
365 * it would break backwards compatibility; so we will find out directly
366 * from the hardware and hypercall.
367 */
368 if (!xen_initial_domain())
369 return false;
370
e3aa4e61
LJ
371 /*
372 * When running under platform earlier than Xen4.2, do not expose
373 * mwait, to avoid the risk of loading native acpi pad driver
374 */
375 if (!xen_running_on_version_or_later(4, 2))
376 return false;
377
73c154c6
KRW
378 ax = 1;
379 cx = 0;
380
381 native_cpuid(&ax, &bx, &cx, &dx);
382
383 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
384 (1 << (X86_FEATURE_MWAIT % 32));
385
386 if ((cx & mwait_mask) != mwait_mask)
387 return false;
388
389 /* We need to emulate the MWAIT_LEAF and for that we need both
390 * ecx and edx. The hypercall provides only partial information.
391 */
392
393 ax = CPUID_MWAIT_LEAF;
394 bx = 0;
395 cx = 0;
396 dx = 0;
397
398 native_cpuid(&ax, &bx, &cx, &dx);
399
400 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
401 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
402 */
403 buf[0] = ACPI_PDC_REVISION_ID;
404 buf[1] = 1;
405 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
406
407 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
408
409 if ((HYPERVISOR_dom0_op(&op) == 0) &&
410 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
411 cpuid_leaf5_ecx_val = cx;
412 cpuid_leaf5_edx_val = dx;
413 }
414 return true;
415#else
416 return false;
417#endif
418}
ad3062a0 419static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
420{
421 unsigned int ax, bx, cx, dx;
947ccf9c 422 unsigned int xsave_mask;
e826fe1b
JF
423
424 cpuid_leaf1_edx_mask =
cef12ee5 425 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
426 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
427
428 if (!xen_initial_domain())
429 cpuid_leaf1_edx_mask &=
6efa20e4 430 ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */
4ea9b9ac
ZD
431
432 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32));
433
947ccf9c 434 ax = 1;
5e287830 435 cx = 0;
947ccf9c 436 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 437
947ccf9c
SH
438 xsave_mask =
439 (1 << (X86_FEATURE_XSAVE % 32)) |
440 (1 << (X86_FEATURE_OSXSAVE % 32));
441
442 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
443 if ((cx & xsave_mask) != xsave_mask)
444 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
445 if (xen_check_mwait())
446 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
447}
448
5ead97c8
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449static void xen_set_debugreg(int reg, unsigned long val)
450{
451 HYPERVISOR_set_debugreg(reg, val);
452}
453
454static unsigned long xen_get_debugreg(int reg)
455{
456 return HYPERVISOR_get_debugreg(reg);
457}
458
224101ed 459static void xen_end_context_switch(struct task_struct *next)
5ead97c8 460{
5ead97c8 461 xen_mc_flush();
224101ed 462 paravirt_end_context_switch(next);
5ead97c8
JF
463}
464
465static unsigned long xen_store_tr(void)
466{
467 return 0;
468}
469
a05d2eba 470/*
cef43bf6
JF
471 * Set the page permissions for a particular virtual address. If the
472 * address is a vmalloc mapping (or other non-linear mapping), then
473 * find the linear mapping of the page and also set its protections to
474 * match.
a05d2eba
JF
475 */
476static void set_aliased_prot(void *v, pgprot_t prot)
477{
478 int level;
479 pte_t *ptep;
480 pte_t pte;
481 unsigned long pfn;
482 struct page *page;
483
484 ptep = lookup_address((unsigned long)v, &level);
485 BUG_ON(ptep == NULL);
486
487 pfn = pte_pfn(*ptep);
488 page = pfn_to_page(pfn);
489
490 pte = pfn_pte(pfn, prot);
491
492 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
493 BUG();
494
495 if (!PageHighMem(page)) {
496 void *av = __va(PFN_PHYS(pfn));
497
498 if (av != v)
499 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
500 BUG();
501 } else
502 kmap_flush_unused();
503}
504
38ffbe66
JF
505static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
506{
a05d2eba 507 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
508 int i;
509
a05d2eba
JF
510 for(i = 0; i < entries; i += entries_per_page)
511 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
512}
513
514static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
515{
a05d2eba 516 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
517 int i;
518
a05d2eba
JF
519 for(i = 0; i < entries; i += entries_per_page)
520 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
521}
522
5ead97c8
JF
523static void xen_set_ldt(const void *addr, unsigned entries)
524{
5ead97c8
JF
525 struct mmuext_op *op;
526 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
527
ab78f7ad
JF
528 trace_xen_cpu_set_ldt(addr, entries);
529
5ead97c8
JF
530 op = mcs.args;
531 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 532 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
533 op->arg2.nr_ents = entries;
534
535 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
536
537 xen_mc_issue(PARAVIRT_LAZY_CPU);
538}
539
6b68f01b 540static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 541{
5ead97c8
JF
542 unsigned long va = dtr->address;
543 unsigned int size = dtr->size + 1;
544 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 545 unsigned long frames[pages];
5ead97c8 546 int f;
5ead97c8 547
577eebea
JF
548 /*
549 * A GDT can be up to 64k in size, which corresponds to 8192
550 * 8-byte entries, or 16 4k pages..
551 */
5ead97c8
JF
552
553 BUG_ON(size > 65536);
554 BUG_ON(va & ~PAGE_MASK);
555
5ead97c8 556 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 557 int level;
577eebea 558 pte_t *ptep;
6ed6bf42
JF
559 unsigned long pfn, mfn;
560 void *virt;
561
577eebea
JF
562 /*
563 * The GDT is per-cpu and is in the percpu data area.
564 * That can be virtually mapped, so we need to do a
565 * page-walk to get the underlying MFN for the
566 * hypercall. The page can also be in the kernel's
567 * linear range, so we need to RO that mapping too.
568 */
569 ptep = lookup_address(va, &level);
6ed6bf42
JF
570 BUG_ON(ptep == NULL);
571
572 pfn = pte_pfn(*ptep);
573 mfn = pfn_to_mfn(pfn);
574 virt = __va(PFN_PHYS(pfn));
575
576 frames[f] = mfn;
9976b39b 577
5ead97c8 578 make_lowmem_page_readonly((void *)va);
6ed6bf42 579 make_lowmem_page_readonly(virt);
5ead97c8
JF
580 }
581
3ce5fa7e
JF
582 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
583 BUG();
5ead97c8
JF
584}
585
577eebea
JF
586/*
587 * load_gdt for early boot, when the gdt is only mapped once
588 */
ad3062a0 589static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
590{
591 unsigned long va = dtr->address;
592 unsigned int size = dtr->size + 1;
593 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
594 unsigned long frames[pages];
595 int f;
596
597 /*
598 * A GDT can be up to 64k in size, which corresponds to 8192
599 * 8-byte entries, or 16 4k pages..
600 */
601
602 BUG_ON(size > 65536);
603 BUG_ON(va & ~PAGE_MASK);
604
605 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
606 pte_t pte;
607 unsigned long pfn, mfn;
608
609 pfn = virt_to_pfn(va);
610 mfn = pfn_to_mfn(pfn);
611
612 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
613
614 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
615 BUG();
616
617 frames[f] = mfn;
618 }
619
620 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
621 BUG();
622}
623
59290362
DV
624static inline bool desc_equal(const struct desc_struct *d1,
625 const struct desc_struct *d2)
626{
627 return d1->a == d2->a && d1->b == d2->b;
628}
629
5ead97c8
JF
630static void load_TLS_descriptor(struct thread_struct *t,
631 unsigned int cpu, unsigned int i)
632{
1c32cdc6
DV
633 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
634 struct desc_struct *gdt;
635 xmaddr_t maddr;
636 struct multicall_space mc;
637
638 if (desc_equal(shadow, &t->tls_array[i]))
639 return;
640
641 *shadow = t->tls_array[i];
642
643 gdt = get_cpu_gdt_table(cpu);
644 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
645 mc = __xen_mc_entry(0);
5ead97c8
JF
646
647 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
648}
649
650static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
651{
8b84ad94 652 /*
ccbeed3a
TH
653 * XXX sleazy hack: If we're being called in a lazy-cpu zone
654 * and lazy gs handling is enabled, it means we're in a
655 * context switch, and %gs has just been saved. This means we
656 * can zero it out to prevent faults on exit from the
657 * hypervisor if the next process has no %gs. Either way, it
658 * has been saved, and the new value will get loaded properly.
659 * This will go away as soon as Xen has been modified to not
660 * save/restore %gs for normal hypercalls.
8a95408e
EH
661 *
662 * On x86_64, this hack is not used for %gs, because gs points
663 * to KERNEL_GS_BASE (and uses it for PDA references), so we
664 * must not zero %gs on x86_64
665 *
666 * For x86_64, we need to zero %fs, otherwise we may get an
667 * exception between the new %fs descriptor being loaded and
668 * %fs being effectively cleared at __switch_to().
8b84ad94 669 */
8a95408e
EH
670 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
671#ifdef CONFIG_X86_32
ccbeed3a 672 lazy_load_gs(0);
8a95408e
EH
673#else
674 loadsegment(fs, 0);
675#endif
676 }
677
678 xen_mc_batch();
679
680 load_TLS_descriptor(t, cpu, 0);
681 load_TLS_descriptor(t, cpu, 1);
682 load_TLS_descriptor(t, cpu, 2);
683
684 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
685}
686
a8fc1089
EH
687#ifdef CONFIG_X86_64
688static void xen_load_gs_index(unsigned int idx)
689{
690 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
691 BUG();
5ead97c8 692}
a8fc1089 693#endif
5ead97c8
JF
694
695static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 696 const void *ptr)
5ead97c8 697{
cef43bf6 698 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 699 u64 entry = *(u64 *)ptr;
5ead97c8 700
ab78f7ad
JF
701 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
702
f120f13e
JF
703 preempt_disable();
704
5ead97c8
JF
705 xen_mc_flush();
706 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
707 BUG();
f120f13e
JF
708
709 preempt_enable();
5ead97c8
JF
710}
711
e176d367 712static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
713 struct trap_info *info)
714{
6cac5a92
JF
715 unsigned long addr;
716
6d02c426 717 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
718 return 0;
719
720 info->vector = vector;
6cac5a92
JF
721
722 addr = gate_offset(*val);
723#ifdef CONFIG_X86_64
b80119bb
JF
724 /*
725 * Look for known traps using IST, and substitute them
726 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
727 * about. Xen will handle faults like double_fault,
728 * so we should never see them. Warn if
b80119bb
JF
729 * there's an unexpected IST-using fault handler.
730 */
6cac5a92
JF
731 if (addr == (unsigned long)debug)
732 addr = (unsigned long)xen_debug;
733 else if (addr == (unsigned long)int3)
734 addr = (unsigned long)xen_int3;
735 else if (addr == (unsigned long)stack_segment)
736 addr = (unsigned long)xen_stack_segment;
6efa20e4 737 else if (addr == (unsigned long)double_fault) {
b80119bb
JF
738 /* Don't need to handle these */
739 return 0;
740#ifdef CONFIG_X86_MCE
741 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
742 /*
743 * when xen hypervisor inject vMCE to guest,
744 * use native mce handler to handle it
745 */
746 ;
b80119bb 747#endif
6efa20e4
KRW
748 } else if (addr == (unsigned long)nmi)
749 /*
750 * Use the native version as well.
751 */
752 ;
753 else {
b80119bb
JF
754 /* Some other trap using IST? */
755 if (WARN_ON(val->ist != 0))
756 return 0;
757 }
6cac5a92
JF
758#endif /* CONFIG_X86_64 */
759 info->address = addr;
760
e176d367
EH
761 info->cs = gate_segment(*val);
762 info->flags = val->dpl;
5ead97c8 763 /* interrupt gates clear IF */
6d02c426
JF
764 if (val->type == GATE_INTERRUPT)
765 info->flags |= 1 << 2;
5ead97c8
JF
766
767 return 1;
768}
769
770/* Locations of each CPU's IDT */
6b68f01b 771static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
772
773/* Set an IDT entry. If the entry is part of the current IDT, then
774 also update Xen. */
8d947344 775static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 776{
5ead97c8 777 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
778 unsigned long start, end;
779
ab78f7ad
JF
780 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
781
f120f13e
JF
782 preempt_disable();
783
780f36d8
CL
784 start = __this_cpu_read(idt_desc.address);
785 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
786
787 xen_mc_flush();
788
8d947344 789 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
790
791 if (p >= start && (p + 8) <= end) {
792 struct trap_info info[2];
793
794 info[1].address = 0;
795
e176d367 796 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
797 if (HYPERVISOR_set_trap_table(info))
798 BUG();
799 }
f120f13e
JF
800
801 preempt_enable();
5ead97c8
JF
802}
803
6b68f01b 804static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 805 struct trap_info *traps)
5ead97c8 806{
5ead97c8
JF
807 unsigned in, out, count;
808
e176d367 809 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
810 BUG_ON(count > 256);
811
5ead97c8 812 for (in = out = 0; in < count; in++) {
e176d367 813 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 814
e176d367 815 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
816 out++;
817 }
818 traps[out].address = 0;
f87e4cac
JF
819}
820
821void xen_copy_trap_info(struct trap_info *traps)
822{
6b68f01b 823 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
824
825 xen_convert_trap_info(desc, traps);
f87e4cac
JF
826}
827
828/* Load a new IDT into Xen. In principle this can be per-CPU, so we
829 hold a spinlock to protect the static traps[] array (static because
830 it avoids allocation, and saves stack space). */
6b68f01b 831static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
832{
833 static DEFINE_SPINLOCK(lock);
834 static struct trap_info traps[257];
f87e4cac 835
ab78f7ad
JF
836 trace_xen_cpu_load_idt(desc);
837
f87e4cac
JF
838 spin_lock(&lock);
839
f120f13e
JF
840 __get_cpu_var(idt_desc) = *desc;
841
f87e4cac 842 xen_convert_trap_info(desc, traps);
5ead97c8
JF
843
844 xen_mc_flush();
845 if (HYPERVISOR_set_trap_table(traps))
846 BUG();
847
848 spin_unlock(&lock);
849}
850
851/* Write a GDT descriptor entry. Ignore LDT descriptors, since
852 they're handled differently. */
853static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 854 const void *desc, int type)
5ead97c8 855{
ab78f7ad
JF
856 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
857
f120f13e
JF
858 preempt_disable();
859
014b15be
GOC
860 switch (type) {
861 case DESC_LDT:
862 case DESC_TSS:
5ead97c8
JF
863 /* ignore */
864 break;
865
866 default: {
9976b39b 867 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
868
869 xen_mc_flush();
014b15be 870 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
871 BUG();
872 }
873
874 }
f120f13e
JF
875
876 preempt_enable();
5ead97c8
JF
877}
878
577eebea
JF
879/*
880 * Version of write_gdt_entry for use at early boot-time needed to
881 * update an entry as simply as possible.
882 */
ad3062a0 883static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
884 const void *desc, int type)
885{
ab78f7ad
JF
886 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
887
577eebea
JF
888 switch (type) {
889 case DESC_LDT:
890 case DESC_TSS:
891 /* ignore */
892 break;
893
894 default: {
895 xmaddr_t maddr = virt_to_machine(&dt[entry]);
896
897 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
898 dt[entry] = *(struct desc_struct *)desc;
899 }
900
901 }
902}
903
faca6227 904static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 905 struct thread_struct *thread)
5ead97c8 906{
ab78f7ad
JF
907 struct multicall_space mcs;
908
909 mcs = xen_mc_entry(0);
faca6227 910 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
911 xen_mc_issue(PARAVIRT_LAZY_CPU);
912}
913
914static void xen_set_iopl_mask(unsigned mask)
915{
916 struct physdev_set_iopl set_iopl;
917
918 /* Force the change at ring 0. */
919 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
920 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
921}
922
923static void xen_io_delay(void)
924{
925}
926
927#ifdef CONFIG_X86_LOCAL_APIC
558daa28
KRW
928static unsigned long xen_set_apic_id(unsigned int x)
929{
930 WARN_ON(1);
931 return x;
932}
933static unsigned int xen_get_apic_id(unsigned long x)
934{
935 return ((x)>>24) & 0xFFu;
936}
ad66dd34 937static u32 xen_apic_read(u32 reg)
5ead97c8 938{
558daa28
KRW
939 struct xen_platform_op op = {
940 .cmd = XENPF_get_cpuinfo,
941 .interface_version = XENPF_INTERFACE_VERSION,
942 .u.pcpu_info.xen_cpuid = 0,
943 };
944 int ret = 0;
945
946 /* Shouldn't need this as APIC is turned off for PV, and we only
947 * get called on the bootup processor. But just in case. */
948 if (!xen_initial_domain() || smp_processor_id())
949 return 0;
950
951 if (reg == APIC_LVR)
952 return 0x10;
953
954 if (reg != APIC_ID)
955 return 0;
956
957 ret = HYPERVISOR_dom0_op(&op);
958 if (ret)
959 return 0;
960
961 return op.u.pcpu_info.apic_id << 24;
5ead97c8 962}
f87e4cac 963
ad66dd34 964static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
965{
966 /* Warn to see if there's any stray references */
967 WARN_ON(1);
968}
ad66dd34 969
ad66dd34
SS
970static u64 xen_apic_icr_read(void)
971{
972 return 0;
973}
974
975static void xen_apic_icr_write(u32 low, u32 id)
976{
977 /* Warn to see if there's any stray references */
978 WARN_ON(1);
979}
980
981static void xen_apic_wait_icr_idle(void)
982{
983 return;
984}
985
94a8c3c2
YL
986static u32 xen_safe_apic_wait_icr_idle(void)
987{
988 return 0;
989}
990
c1eeb2de
YL
991static void set_xen_basic_apic_ops(void)
992{
993 apic->read = xen_apic_read;
994 apic->write = xen_apic_write;
995 apic->icr_read = xen_apic_icr_read;
996 apic->icr_write = xen_apic_icr_write;
997 apic->wait_icr_idle = xen_apic_wait_icr_idle;
998 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
558daa28
KRW
999 apic->set_apic_id = xen_set_apic_id;
1000 apic->get_apic_id = xen_get_apic_id;
f447d56d
BG
1001
1002#ifdef CONFIG_SMP
1003 apic->send_IPI_allbutself = xen_send_IPI_allbutself;
1004 apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;
1005 apic->send_IPI_mask = xen_send_IPI_mask;
1006 apic->send_IPI_all = xen_send_IPI_all;
1007 apic->send_IPI_self = xen_send_IPI_self;
1008#endif
c1eeb2de 1009}
ad66dd34 1010
5ead97c8
JF
1011#endif
1012
7b1333aa
JF
1013static void xen_clts(void)
1014{
1015 struct multicall_space mcs;
1016
1017 mcs = xen_mc_entry(0);
1018
1019 MULTI_fpu_taskswitch(mcs.mc, 0);
1020
1021 xen_mc_issue(PARAVIRT_LAZY_CPU);
1022}
1023
a789ed5f
JF
1024static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
1025
1026static unsigned long xen_read_cr0(void)
1027{
2113f469 1028 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
1029
1030 if (unlikely(cr0 == 0)) {
1031 cr0 = native_read_cr0();
2113f469 1032 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
1033 }
1034
1035 return cr0;
1036}
1037
7b1333aa
JF
1038static void xen_write_cr0(unsigned long cr0)
1039{
1040 struct multicall_space mcs;
1041
2113f469 1042 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 1043
7b1333aa
JF
1044 /* Only pay attention to cr0.TS; everything else is
1045 ignored. */
1046 mcs = xen_mc_entry(0);
1047
1048 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1049
1050 xen_mc_issue(PARAVIRT_LAZY_CPU);
1051}
1052
5ead97c8
JF
1053static void xen_write_cr4(unsigned long cr4)
1054{
2956a351
JF
1055 cr4 &= ~X86_CR4_PGE;
1056 cr4 &= ~X86_CR4_PSE;
1057
1058 native_write_cr4(cr4);
5ead97c8 1059}
1a7bbda5
KRW
1060#ifdef CONFIG_X86_64
1061static inline unsigned long xen_read_cr8(void)
1062{
1063 return 0;
1064}
1065static inline void xen_write_cr8(unsigned long val)
1066{
1067 BUG_ON(val);
1068}
1069#endif
1153968a
JF
1070static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1071{
1072 int ret;
1073
1074 ret = 0;
1075
f63c2f24 1076 switch (msr) {
1153968a
JF
1077#ifdef CONFIG_X86_64
1078 unsigned which;
1079 u64 base;
1080
1081 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1082 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1083 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1084
1085 set:
1086 base = ((u64)high << 32) | low;
1087 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 1088 ret = -EIO;
1153968a
JF
1089 break;
1090#endif
d89961e2
JF
1091
1092 case MSR_STAR:
1093 case MSR_CSTAR:
1094 case MSR_LSTAR:
1095 case MSR_SYSCALL_MASK:
1096 case MSR_IA32_SYSENTER_CS:
1097 case MSR_IA32_SYSENTER_ESP:
1098 case MSR_IA32_SYSENTER_EIP:
1099 /* Fast syscall setup is all done in hypercalls, so
1100 these are all ignored. Stub them out here to stop
1101 Xen console noise. */
1102 break;
1103
41f2e477
JF
1104 case MSR_IA32_CR_PAT:
1105 if (smp_processor_id() == 0)
1106 xen_set_pat(((u64)high << 32) | low);
1107 break;
1108
1153968a
JF
1109 default:
1110 ret = native_write_msr_safe(msr, low, high);
1111 }
1112
1113 return ret;
1114}
1115
0e91398f 1116void xen_setup_shared_info(void)
5ead97c8
JF
1117{
1118 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1119 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1120 xen_start_info->shared_info);
1121
1122 HYPERVISOR_shared_info =
1123 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1124 } else
1125 HYPERVISOR_shared_info =
1126 (struct shared_info *)__va(xen_start_info->shared_info);
1127
2e8fe719
JF
1128#ifndef CONFIG_SMP
1129 /* In UP this is as good a place as any to set up shared info */
1130 xen_setup_vcpu_info_placement();
1131#endif
d5edbc1f
JF
1132
1133 xen_setup_mfn_list_list();
2e8fe719
JF
1134}
1135
5f054e31 1136/* This is called once we have the cpu_possible_mask */
0e91398f 1137void xen_setup_vcpu_info_placement(void)
60223a32
JF
1138{
1139 int cpu;
1140
1141 for_each_possible_cpu(cpu)
1142 xen_vcpu_setup(cpu);
1143
1144 /* xen_vcpu_setup managed to place the vcpu_info within the
1145 percpu area for all cpus, so make use of it */
1146 if (have_vcpu_info_placement) {
ecb93d1c
JF
1147 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1148 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1149 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1150 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1151 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1152 }
5ead97c8
JF
1153}
1154
ab144f5e
AK
1155static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1156 unsigned long addr, unsigned len)
6487673b
JF
1157{
1158 char *start, *end, *reloc;
1159 unsigned ret;
1160
1161 start = end = reloc = NULL;
1162
93b1eab3
JF
1163#define SITE(op, x) \
1164 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1165 if (have_vcpu_info_placement) { \
1166 start = (char *)xen_##x##_direct; \
1167 end = xen_##x##_direct_end; \
1168 reloc = xen_##x##_direct_reloc; \
1169 } \
1170 goto patch_site
1171
1172 switch (type) {
93b1eab3
JF
1173 SITE(pv_irq_ops, irq_enable);
1174 SITE(pv_irq_ops, irq_disable);
1175 SITE(pv_irq_ops, save_fl);
1176 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1177#undef SITE
1178
1179 patch_site:
1180 if (start == NULL || (end-start) > len)
1181 goto default_patch;
1182
ab144f5e 1183 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1184
1185 /* Note: because reloc is assigned from something that
1186 appears to be an array, gcc assumes it's non-null,
1187 but doesn't know its relationship with start and
1188 end. */
1189 if (reloc > start && reloc < end) {
1190 int reloc_off = reloc - start;
ab144f5e
AK
1191 long *relocp = (long *)(insnbuf + reloc_off);
1192 long delta = start - (char *)addr;
6487673b
JF
1193
1194 *relocp += delta;
1195 }
1196 break;
1197
1198 default_patch:
1199 default:
ab144f5e
AK
1200 ret = paravirt_patch_default(type, clobbers, insnbuf,
1201 addr, len);
6487673b
JF
1202 break;
1203 }
1204
1205 return ret;
1206}
1207
ad3062a0 1208static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1209 .paravirt_enabled = 1,
1210 .shared_kernel_pmd = 0,
1211
318f5a2a
AL
1212#ifdef CONFIG_X86_64
1213 .extra_user_64bit_cs = FLAT_USER_CS64,
1214#endif
1215
5ead97c8 1216 .name = "Xen",
93b1eab3 1217};
5ead97c8 1218
ad3062a0 1219static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1220 .patch = xen_patch,
93b1eab3 1221};
5ead97c8 1222
ad3062a0 1223static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1224 .cpuid = xen_cpuid,
1225
1226 .set_debugreg = xen_set_debugreg,
1227 .get_debugreg = xen_get_debugreg,
1228
7b1333aa 1229 .clts = xen_clts,
5ead97c8 1230
a789ed5f 1231 .read_cr0 = xen_read_cr0,
7b1333aa 1232 .write_cr0 = xen_write_cr0,
5ead97c8 1233
5ead97c8
JF
1234 .read_cr4 = native_read_cr4,
1235 .read_cr4_safe = native_read_cr4_safe,
1236 .write_cr4 = xen_write_cr4,
1237
1a7bbda5
KRW
1238#ifdef CONFIG_X86_64
1239 .read_cr8 = xen_read_cr8,
1240 .write_cr8 = xen_write_cr8,
1241#endif
1242
5ead97c8
JF
1243 .wbinvd = native_wbinvd,
1244
1245 .read_msr = native_read_msr_safe,
1153968a 1246 .write_msr = xen_write_msr_safe,
1ab46fd3 1247
5ead97c8
JF
1248 .read_tsc = native_read_tsc,
1249 .read_pmc = native_read_pmc,
1250
cd0608e7
KRW
1251 .read_tscp = native_read_tscp,
1252
81e103f1 1253 .iret = xen_iret,
d75cd22f 1254 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1255#ifdef CONFIG_X86_64
1256 .usergs_sysret32 = xen_sysret32,
1257 .usergs_sysret64 = xen_sysret64,
1258#endif
5ead97c8
JF
1259
1260 .load_tr_desc = paravirt_nop,
1261 .set_ldt = xen_set_ldt,
1262 .load_gdt = xen_load_gdt,
1263 .load_idt = xen_load_idt,
1264 .load_tls = xen_load_tls,
a8fc1089
EH
1265#ifdef CONFIG_X86_64
1266 .load_gs_index = xen_load_gs_index,
1267#endif
5ead97c8 1268
38ffbe66
JF
1269 .alloc_ldt = xen_alloc_ldt,
1270 .free_ldt = xen_free_ldt,
1271
5ead97c8
JF
1272 .store_idt = native_store_idt,
1273 .store_tr = xen_store_tr,
1274
1275 .write_ldt_entry = xen_write_ldt_entry,
1276 .write_gdt_entry = xen_write_gdt_entry,
1277 .write_idt_entry = xen_write_idt_entry,
faca6227 1278 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1279
1280 .set_iopl_mask = xen_set_iopl_mask,
1281 .io_delay = xen_io_delay,
1282
952d1d70
JF
1283 /* Xen takes care of %gs when switching to usermode for us */
1284 .swapgs = paravirt_nop,
1285
224101ed
JF
1286 .start_context_switch = paravirt_start_context_switch,
1287 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1288};
1289
ad3062a0 1290static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1291#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1292 .startup_ipi_hook = paravirt_nop,
1293#endif
93b1eab3
JF
1294};
1295
fefa629a
JF
1296static void xen_reboot(int reason)
1297{
349c709f
JF
1298 struct sched_shutdown r = { .reason = reason };
1299
349c709f 1300 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1301 BUG();
1302}
1303
1304static void xen_restart(char *msg)
1305{
1306 xen_reboot(SHUTDOWN_reboot);
1307}
1308
1309static void xen_emergency_restart(void)
1310{
1311 xen_reboot(SHUTDOWN_reboot);
1312}
1313
1314static void xen_machine_halt(void)
1315{
1316 xen_reboot(SHUTDOWN_poweroff);
1317}
1318
b2abe506
TG
1319static void xen_machine_power_off(void)
1320{
1321 if (pm_power_off)
1322 pm_power_off();
1323 xen_reboot(SHUTDOWN_poweroff);
1324}
1325
fefa629a
JF
1326static void xen_crash_shutdown(struct pt_regs *regs)
1327{
1328 xen_reboot(SHUTDOWN_crash);
1329}
1330
f09f6d19
DD
1331static int
1332xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1333{
086748e5 1334 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1335 return NOTIFY_DONE;
1336}
1337
1338static struct notifier_block xen_panic_block = {
1339 .notifier_call= xen_panic_event,
1340};
1341
1342int xen_panic_handler_init(void)
1343{
1344 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1345 return 0;
1346}
1347
ad3062a0 1348static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1349 .restart = xen_restart,
1350 .halt = xen_machine_halt,
b2abe506 1351 .power_off = xen_machine_power_off,
fefa629a
JF
1352 .shutdown = xen_machine_halt,
1353 .crash_shutdown = xen_crash_shutdown,
1354 .emergency_restart = xen_emergency_restart,
1355};
1356
96f28bc6
DV
1357static void __init xen_boot_params_init_edd(void)
1358{
1359#if IS_ENABLED(CONFIG_EDD)
1360 struct xen_platform_op op;
1361 struct edd_info *edd_info;
1362 u32 *mbr_signature;
1363 unsigned nr;
1364 int ret;
1365
1366 edd_info = boot_params.eddbuf;
1367 mbr_signature = boot_params.edd_mbr_sig_buffer;
1368
1369 op.cmd = XENPF_firmware_info;
1370
1371 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1372 for (nr = 0; nr < EDDMAXNR; nr++) {
1373 struct edd_info *info = edd_info + nr;
1374
1375 op.u.firmware_info.index = nr;
1376 info->params.length = sizeof(info->params);
1377 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1378 &info->params);
1379 ret = HYPERVISOR_dom0_op(&op);
1380 if (ret)
1381 break;
1382
1383#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1384 C(device);
1385 C(version);
1386 C(interface_support);
1387 C(legacy_max_cylinder);
1388 C(legacy_max_head);
1389 C(legacy_sectors_per_track);
1390#undef C
1391 }
1392 boot_params.eddbuf_entries = nr;
1393
1394 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1395 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1396 op.u.firmware_info.index = nr;
1397 ret = HYPERVISOR_dom0_op(&op);
1398 if (ret)
1399 break;
1400 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1401 }
1402 boot_params.edd_mbr_sig_buf_entries = nr;
1403#endif
1404}
1405
577eebea
JF
1406/*
1407 * Set up the GDT and segment registers for -fstack-protector. Until
1408 * we do this, we have to be careful not to call any stack-protected
1409 * function, which is most of the kernel.
1410 */
1411static void __init xen_setup_stackprotector(void)
1412{
1413 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1414 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1415
1416 setup_stack_canary_segment(0);
1417 switch_to_new_gdt(0);
1418
1419 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1420 pv_cpu_ops.load_gdt = xen_load_gdt;
1421}
1422
5ead97c8
JF
1423/* First C function to be called on Xen boot */
1424asmlinkage void __init xen_start_kernel(void)
1425{
ec35a69c
KRW
1426 struct physdev_set_iopl set_iopl;
1427 int rc;
5ead97c8
JF
1428
1429 if (!xen_start_info)
1430 return;
1431
6e833587
JF
1432 xen_domain_type = XEN_PV_DOMAIN;
1433
7e77506a
IC
1434 xen_setup_machphys_mapping();
1435
5ead97c8 1436 /* Install Xen paravirt ops */
93b1eab3
JF
1437 pv_info = xen_info;
1438 pv_init_ops = xen_init_ops;
93b1eab3 1439 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1440 pv_apic_ops = xen_apic_ops;
93b1eab3 1441
6b18ae3e 1442 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1443 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1444 x86_init.oem.banner = xen_banner;
845b3944 1445
409771d2 1446 xen_init_time_ops();
93b1eab3 1447
ce2eef33 1448 /*
577eebea 1449 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1450 */
577eebea 1451
973df35e
JF
1452 xen_init_mmu_ops();
1453
577eebea
JF
1454 /* Prevent unwanted bits from being set in PTEs. */
1455 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1456#if 0
577eebea 1457 if (!xen_initial_domain())
8eaffa67 1458#endif
577eebea
JF
1459 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1460
1461 __supported_pte_mask |= _PAGE_IOMAP;
1462
817a824b
IC
1463 /*
1464 * Prevent page tables from being allocated in highmem, even
1465 * if CONFIG_HIGHPTE is enabled.
1466 */
1467 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1468
b75fe4e5 1469 /* Work out if we support NX */
4763ed4d 1470 x86_configure_nx();
b75fe4e5 1471
577eebea
JF
1472 xen_setup_features();
1473
1474 /* Get mfn list */
1475 if (!xen_feature(XENFEAT_auto_translated_physmap))
1476 xen_build_dynamic_phys_to_machine();
1477
1478 /*
1479 * Set up kernel GDT and segment registers, mainly so that
1480 * -fstack-protector code can be executed.
1481 */
1482 xen_setup_stackprotector();
0d1edf46 1483
ce2eef33 1484 xen_init_irq_ops();
e826fe1b
JF
1485 xen_init_cpuid_mask();
1486
94a8c3c2 1487#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1488 /*
94a8c3c2 1489 * set up the basic apic ops.
ad66dd34 1490 */
c1eeb2de 1491 set_xen_basic_apic_ops();
ad66dd34 1492#endif
93b1eab3 1493
e57778a1
JF
1494 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1495 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1496 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1497 }
1498
fefa629a
JF
1499 machine_ops = xen_machine_ops;
1500
38341432
JF
1501 /*
1502 * The only reliable way to retain the initial address of the
1503 * percpu gdt_page is to remember it here, so we can go and
1504 * mark it RW later, when the initial percpu area is freed.
1505 */
1506 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1507
a9e7062d 1508 xen_smp_init();
5ead97c8 1509
c1f5db1a
IC
1510#ifdef CONFIG_ACPI_NUMA
1511 /*
1512 * The pages we from Xen are not related to machine pages, so
1513 * any NUMA information the kernel tries to get from ACPI will
1514 * be meaningless. Prevent it from trying.
1515 */
1516 acpi_numa = -1;
1517#endif
c79c4982
KRW
1518#ifdef CONFIG_X86_PAT
1519 /*
1520 * For right now disable the PAT. We should remove this once
1521 * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1
1522 * (xen/pat: Disable PAT support for now) is reverted.
1523 */
1524 pat_enabled = 0;
1525#endif
60223a32 1526 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1527 possible map and a non-dummy shared_info. */
60223a32 1528 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1529
55d80856 1530 local_irq_disable();
2ce802f6 1531 early_boot_irqs_disabled = true;
55d80856 1532
084a2a4e 1533 xen_raw_console_write("mapping kernel into physical memory\n");
3699aad0 1534 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages);
5ead97c8 1535
33a84750
JF
1536 /* Allocate and initialize top and mid mfn levels for p2m structure */
1537 xen_build_mfn_list_list();
1538
5ead97c8
JF
1539 /* keep using Xen gdt for now; no urgent need to change it */
1540
e68266b7 1541#ifdef CONFIG_X86_32
93b1eab3 1542 pv_info.kernel_rpl = 1;
5ead97c8 1543 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1544 pv_info.kernel_rpl = 0;
e68266b7
IC
1545#else
1546 pv_info.kernel_rpl = 0;
1547#endif
5ead97c8 1548 /* set the limit of our address space */
fb1d8404 1549 xen_reserve_top();
5ead97c8 1550
ec35a69c
KRW
1551 /* We used to do this in xen_arch_setup, but that is too late on AMD
1552 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1553 * which pokes 0xcf8 port.
1554 */
1555 set_iopl.iopl = 1;
1556 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1557 if (rc != 0)
1558 xen_raw_printk("physdev_op failed %d\n", rc);
1559
7d087b68 1560#ifdef CONFIG_X86_32
5ead97c8
JF
1561 /* set up basic CPUID stuff */
1562 cpu_detect(&new_cpu_data);
60e019eb 1563 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
d560bc61 1564 new_cpu_data.wp_works_ok = 1;
5ead97c8 1565 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1566#endif
5ead97c8
JF
1567
1568 /* Poke various useful things into boot_params */
30c82645
PA
1569 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1570 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1571 ? __pa(xen_start_info->mod_start) : 0;
1572 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1573 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1574
6e833587 1575 if (!xen_initial_domain()) {
83abc70a 1576 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1577 add_preferred_console("tty", 0, NULL);
b8c2d3df 1578 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1579 if (pci_xen)
1580 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1581 } else {
c2419b4a
JF
1582 const struct dom0_vga_console_info *info =
1583 (void *)((char *)xen_start_info +
1584 xen_start_info->console.dom0.info_off);
ffb8b233
KRW
1585 struct xen_platform_op op = {
1586 .cmd = XENPF_firmware_info,
1587 .interface_version = XENPF_INTERFACE_VERSION,
1588 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1589 };
c2419b4a
JF
1590
1591 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1592 xen_start_info->console.domU.mfn = 0;
1593 xen_start_info->console.domU.evtchn = 0;
1594
ffb8b233
KRW
1595 if (HYPERVISOR_dom0_op(&op) == 0)
1596 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1597
31b3c9d7
KRW
1598 xen_init_apic();
1599
5d990b62
CW
1600 /* Make sure ACS will be enabled */
1601 pci_request_acs();
211063dc
KRW
1602
1603 xen_acpi_sleep_register();
bd49940a
KRW
1604
1605 /* Avoid searching for BIOS MP tables */
1606 x86_init.mpparse.find_smp_config = x86_init_noop;
1607 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
96f28bc6
DV
1608
1609 xen_boot_params_init_edd();
9e124fe1 1610 }
76a8df7b
DV
1611#ifdef CONFIG_PCI
1612 /* PCI BIOS service won't work from a PV guest. */
1613 pci_probe &= ~PCI_PROBE_BIOS;
1614#endif
084a2a4e
JF
1615 xen_raw_console_write("about to get started...\n");
1616
499d19b8
JF
1617 xen_setup_runstate_info(0);
1618
5ead97c8 1619 /* Start the world */
f5d36de0 1620#ifdef CONFIG_X86_32
f0d43100 1621 i386_start_kernel();
f5d36de0 1622#else
084a2a4e 1623 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1624#endif
5ead97c8 1625}
bee6ab53 1626
e9daff24 1627void __ref xen_hvm_init_shared_info(void)
bee6ab53 1628{
e9daff24 1629 int cpu;
bee6ab53 1630 struct xen_add_to_physmap xatp;
e9daff24 1631 static struct shared_info *shared_info_page = 0;
bee6ab53 1632
e9daff24
KRW
1633 if (!shared_info_page)
1634 shared_info_page = (struct shared_info *)
1635 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1636 xatp.domid = DOMID_SELF;
1637 xatp.idx = 0;
1638 xatp.space = XENMAPSPACE_shared_info;
e9daff24 1639 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
bee6ab53
SY
1640 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1641 BUG();
1642
e9daff24 1643 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
bee6ab53 1644
016b6f5f
SS
1645 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1646 * page, we use it in the event channel upcall and in some pvclock
1647 * related functions. We don't need the vcpu_info placement
1648 * optimizations because we don't use any pv_mmu or pv_irq op on
e9daff24
KRW
1649 * HVM.
1650 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1651 * online but xen_hvm_init_shared_info is run at resume time too and
1652 * in that case multiple vcpus might be online. */
1653 for_each_online_cpu(cpu) {
d5b17dbf
KRW
1654 /* Leave it to be NULL. */
1655 if (cpu >= MAX_VIRT_CPUS)
1656 continue;
016b6f5f
SS
1657 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1658 }
bee6ab53
SY
1659}
1660
e9daff24 1661#ifdef CONFIG_XEN_PVHVM
4ff2d062
OH
1662static void __init init_hvm_pv_info(void)
1663{
e9daff24 1664 int major, minor;
5eb65be2 1665 uint32_t eax, ebx, ecx, edx, pages, msr, base;
4ff2d062
OH
1666 u64 pfn;
1667
1668 base = xen_cpuid_base();
e9daff24
KRW
1669 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1670
1671 major = eax >> 16;
1672 minor = eax & 0xffff;
1673 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1674
4ff2d062
OH
1675 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1676
1677 pfn = __pa(hypercall_page);
1678 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1679
1680 xen_setup_features();
1681
1682 pv_info.name = "Xen HVM";
1683
1684 xen_domain_type = XEN_HVM_DOMAIN;
1685}
1686
148f9bb8
PG
1687static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action,
1688 void *hcpu)
38e20b07
SY
1689{
1690 int cpu = (long)hcpu;
1691 switch (action) {
1692 case CPU_UP_PREPARE:
90d4f553 1693 xen_vcpu_setup(cpu);
7918c92a 1694 if (xen_have_vector_callback) {
99bbb3a8 1695 xen_init_lock_cpu(cpu);
7918c92a
KRW
1696 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1697 xen_setup_timer(cpu);
1698 }
38e20b07
SY
1699 break;
1700 default:
1701 break;
1702 }
1703 return NOTIFY_OK;
1704}
1705
148f9bb8 1706static struct notifier_block xen_hvm_cpu_notifier = {
38e20b07
SY
1707 .notifier_call = xen_hvm_cpu_notify,
1708};
1709
bee6ab53
SY
1710static void __init xen_hvm_guest_init(void)
1711{
4ff2d062 1712 init_hvm_pv_info();
bee6ab53 1713
016b6f5f 1714 xen_hvm_init_shared_info();
38e20b07
SY
1715
1716 if (xen_feature(XENFEAT_hvm_callback_vector))
1717 xen_have_vector_callback = 1;
99bbb3a8 1718 xen_hvm_smp_init();
38e20b07 1719 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1720 xen_unplug_emulated_devices();
38e20b07 1721 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1722 xen_hvm_init_time_ops();
59151001 1723 xen_hvm_init_mmu_ops();
bee6ab53
SY
1724}
1725
1726static bool __init xen_hvm_platform(void)
1727{
1728 if (xen_pv_domain())
1729 return false;
1730
e9daff24 1731 if (!xen_cpuid_base())
bee6ab53
SY
1732 return false;
1733
1734 return true;
1735}
1736
d9b8ca84
SY
1737bool xen_hvm_need_lapic(void)
1738{
1739 if (xen_pv_domain())
1740 return false;
1741 if (!xen_hvm_domain())
1742 return false;
1743 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1744 return false;
1745 return true;
1746}
1747EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1748
ad3062a0 1749const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1750 .name = "Xen HVM",
1751 .detect = xen_hvm_platform,
1752 .init_platform = xen_hvm_guest_init,
4cca6ea0 1753 .x2apic_available = xen_x2apic_para_available,
bee6ab53
SY
1754};
1755EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1756#endif