xen: SWIOTLB is only used on x86
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
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25#include <linux/bootmem.h>
26#include <linux/module.h>
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
96f28bc6 34#include <linux/edd.h>
5ead97c8 35
1ccbf534 36#include <xen/xen.h>
0ec53ecf 37#include <xen/events.h>
5ead97c8 38#include <xen/interface/xen.h>
ecbf29cd 39#include <xen/interface/version.h>
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40#include <xen/interface/physdev.h>
41#include <xen/interface/vcpu.h>
bee6ab53 42#include <xen/interface/memory.h>
cef12ee5 43#include <xen/interface/xen-mca.h>
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44#include <xen/features.h>
45#include <xen/page.h>
38e20b07 46#include <xen/hvm.h>
084a2a4e 47#include <xen/hvc-console.h>
211063dc 48#include <xen/acpi.h>
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49
50#include <asm/paravirt.h>
7b6aa335 51#include <asm/apic.h>
5ead97c8 52#include <asm/page.h>
b5401a96 53#include <asm/xen/pci.h>
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54#include <asm/xen/hypercall.h>
55#include <asm/xen/hypervisor.h>
56#include <asm/fixmap.h>
57#include <asm/processor.h>
707ebbc8 58#include <asm/proto.h>
1153968a 59#include <asm/msr-index.h>
6cac5a92 60#include <asm/traps.h>
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61#include <asm/setup.h>
62#include <asm/desc.h>
817a824b 63#include <asm/pgalloc.h>
5ead97c8 64#include <asm/pgtable.h>
f87e4cac 65#include <asm/tlbflush.h>
fefa629a 66#include <asm/reboot.h>
577eebea 67#include <asm/stackprotector.h>
bee6ab53 68#include <asm/hypervisor.h>
73c154c6 69#include <asm/mwait.h>
76a8df7b 70#include <asm/pci_x86.h>
c79c4982 71#include <asm/pat.h>
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72
73#ifdef CONFIG_ACPI
74#include <linux/acpi.h>
75#include <asm/acpi.h>
76#include <acpi/pdc_intel.h>
77#include <acpi/processor.h>
78#include <xen/interface/platform.h>
79#endif
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80
81#include "xen-ops.h"
3b827c1b 82#include "mmu.h"
f447d56d 83#include "smp.h"
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84#include "multicalls.h"
85
86EXPORT_SYMBOL_GPL(hypercall_page);
87
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88/*
89 * Pointer to the xen_vcpu_info structure or
90 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
91 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
92 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point
93 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to
94 * acknowledge pending events.
95 * Also more subtly it is used by the patched version of irq enable/disable
96 * e.g. xen_irq_enable_direct and xen_iret in PV mode.
97 *
98 * The desire to be able to do those mask/unmask operations as a single
99 * instruction by using the per-cpu offset held in %gs is the real reason
100 * vcpu info is in a per-cpu pointer and the original reason for this
101 * hypercall.
102 *
103 */
5ead97c8 104DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
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105
106/*
107 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info
108 * hypercall. This can be used both in PV and PVHVM mode. The structure
109 * overrides the default per_cpu(xen_vcpu, cpu) value.
110 */
5ead97c8 111DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 112
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113enum xen_domain_type xen_domain_type = XEN_NATIVE;
114EXPORT_SYMBOL_GPL(xen_domain_type);
115
7e77506a
IC
116unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
117EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
118unsigned long machine_to_phys_nr;
119EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 120
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121struct start_info *xen_start_info;
122EXPORT_SYMBOL_GPL(xen_start_info);
123
a0d695c8 124struct shared_info xen_dummy_shared_info;
60223a32 125
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126void *xen_initial_gdt;
127
bee6ab53 128RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
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129__read_mostly int xen_have_vector_callback;
130EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 131
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132/*
133 * Point at some empty memory to start with. We map the real shared_info
134 * page as soon as fixmap is up and running.
135 */
4648da7c 136struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
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137
138/*
139 * Flag to determine whether vcpu info placement is available on all
140 * VCPUs. We assume it is to start with, and then set it to zero on
141 * the first failure. This is because it can succeed on some VCPUs
142 * and not others, since it can involve hypervisor memory allocation,
143 * or because the guest failed to guarantee all the appropriate
144 * constraints on all VCPUs (ie buffer can't cross a page boundary).
145 *
146 * Note that any particular CPU may be using a placed vcpu structure,
147 * but we can only optimise if the all are.
148 *
149 * 0: not available, 1: available
150 */
e4d04071 151static int have_vcpu_info_placement = 1;
60223a32 152
1c32cdc6
DV
153struct tls_descs {
154 struct desc_struct desc[3];
155};
156
157/*
158 * Updating the 3 TLS descriptors in the GDT on every task switch is
159 * surprisingly expensive so we avoid updating them if they haven't
160 * changed. Since Xen writes different descriptors than the one
161 * passed in the update_descriptor hypercall we keep shadow copies to
162 * compare against.
163 */
164static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
165
c06ee78d
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166static void clamp_max_cpus(void)
167{
168#ifdef CONFIG_SMP
169 if (setup_max_cpus > MAX_VIRT_CPUS)
170 setup_max_cpus = MAX_VIRT_CPUS;
171#endif
172}
173
9c7a7942 174static void xen_vcpu_setup(int cpu)
5ead97c8 175{
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176 struct vcpu_register_vcpu_info info;
177 int err;
178 struct vcpu_info *vcpup;
179
a0d695c8 180 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 181
7f1fc268
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182 /*
183 * This path is called twice on PVHVM - first during bootup via
184 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being
185 * hotplugged: cpu_up -> xen_hvm_cpu_notify.
186 * As we can only do the VCPUOP_register_vcpu_info once lets
187 * not over-write its result.
188 *
189 * For PV it is called during restore (xen_vcpu_restore) and bootup
190 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not
191 * use this function.
192 */
193 if (xen_hvm_domain()) {
194 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
195 return;
196 }
c06ee78d
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197 if (cpu < MAX_VIRT_CPUS)
198 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 199
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MR
200 if (!have_vcpu_info_placement) {
201 if (cpu >= MAX_VIRT_CPUS)
202 clamp_max_cpus();
203 return;
204 }
60223a32 205
c06ee78d 206 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 207 info.mfn = arbitrary_virt_to_mfn(vcpup);
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208 info.offset = offset_in_page(vcpup);
209
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210 /* Check to see if the hypervisor will put the vcpu_info
211 structure where we want it, which allows direct access via
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212 a percpu-variable.
213 N.B. This hypercall can _only_ be called once per CPU. Subsequent
214 calls will error out with -EINVAL. This is due to the fact that
215 hypervisor has no unregister variant and this hypercall does not
216 allow to over-write info.mfn and info.offset.
217 */
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218 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
219
220 if (err) {
221 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
222 have_vcpu_info_placement = 0;
c06ee78d 223 clamp_max_cpus();
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224 } else {
225 /* This cpu is using the registered vcpu info, even if
226 later ones fail to. */
227 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 228 }
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229}
230
9c7a7942
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231/*
232 * On restore, set the vcpu placement up again.
233 * If it fails, then we're in a bad state, since
234 * we can't back out from using it...
235 */
236void xen_vcpu_restore(void)
237{
3905bb2a 238 int cpu;
9c7a7942 239
9d328a94 240 for_each_possible_cpu(cpu) {
3905bb2a 241 bool other_cpu = (cpu != smp_processor_id());
9d328a94 242 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL);
9c7a7942 243
9d328a94 244 if (other_cpu && is_up &&
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245 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
246 BUG();
9c7a7942 247
3905bb2a 248 xen_setup_runstate_info(cpu);
9c7a7942 249
3905bb2a 250 if (have_vcpu_info_placement)
9c7a7942 251 xen_vcpu_setup(cpu);
9c7a7942 252
9d328a94 253 if (other_cpu && is_up &&
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254 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
255 BUG();
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256 }
257}
258
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259static void __init xen_banner(void)
260{
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261 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
262 struct xen_extraversion extra;
263 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
264
5ead97c8 265 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 266 pv_info.name);
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267 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
268 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 269 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8 270}
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271/* Check if running on Xen version (major, minor) or later */
272bool
273xen_running_on_version_or_later(unsigned int major, unsigned int minor)
274{
275 unsigned int version;
276
277 if (!xen_domain())
278 return false;
279
280 version = HYPERVISOR_xen_version(XENVER_version, NULL);
281 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
282 ((version >> 16) > major))
283 return true;
284 return false;
285}
5ead97c8 286
5e626254
AP
287#define CPUID_THERM_POWER_LEAF 6
288#define APERFMPERF_PRESENT 0
289
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290static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
291static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
292
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293static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
294static __read_mostly unsigned int cpuid_leaf5_ecx_val;
295static __read_mostly unsigned int cpuid_leaf5_edx_val;
296
65ea5b03
PA
297static void xen_cpuid(unsigned int *ax, unsigned int *bx,
298 unsigned int *cx, unsigned int *dx)
5ead97c8 299{
82d64699 300 unsigned maskebx = ~0;
e826fe1b 301 unsigned maskecx = ~0;
5ead97c8 302 unsigned maskedx = ~0;
73c154c6 303 unsigned setecx = 0;
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304 /*
305 * Mask out inconvenient features, to try and disable as many
306 * unsupported kernel subsystems as possible.
307 */
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308 switch (*ax) {
309 case 1:
e826fe1b 310 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 311 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 312 maskedx = cpuid_leaf1_edx_mask;
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313 break;
314
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315 case CPUID_MWAIT_LEAF:
316 /* Synthesize the values.. */
317 *ax = 0;
318 *bx = 0;
319 *cx = cpuid_leaf5_ecx_val;
320 *dx = cpuid_leaf5_edx_val;
321 return;
322
5e626254
AP
323 case CPUID_THERM_POWER_LEAF:
324 /* Disabling APERFMPERF for kernel usage */
325 maskecx = ~(1 << APERFMPERF_PRESENT);
326 break;
327
82d64699
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328 case 0xb:
329 /* Suppress extended topology stuff */
330 maskebx = 0;
331 break;
e826fe1b 332 }
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333
334 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
335 : "=a" (*ax),
336 "=b" (*bx),
337 "=c" (*cx),
338 "=d" (*dx)
339 : "0" (*ax), "2" (*cx));
e826fe1b 340
82d64699 341 *bx &= maskebx;
e826fe1b 342 *cx &= maskecx;
73c154c6 343 *cx |= setecx;
65ea5b03 344 *dx &= maskedx;
73c154c6 345
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346}
347
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348static bool __init xen_check_mwait(void)
349{
e3aa4e61 350#ifdef CONFIG_ACPI
73c154c6
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351 struct xen_platform_op op = {
352 .cmd = XENPF_set_processor_pminfo,
353 .u.set_pminfo.id = -1,
354 .u.set_pminfo.type = XEN_PM_PDC,
355 };
356 uint32_t buf[3];
357 unsigned int ax, bx, cx, dx;
358 unsigned int mwait_mask;
359
360 /* We need to determine whether it is OK to expose the MWAIT
361 * capability to the kernel to harvest deeper than C3 states from ACPI
362 * _CST using the processor_harvest_xen.c module. For this to work, we
363 * need to gather the MWAIT_LEAF values (which the cstate.c code
364 * checks against). The hypervisor won't expose the MWAIT flag because
365 * it would break backwards compatibility; so we will find out directly
366 * from the hardware and hypercall.
367 */
368 if (!xen_initial_domain())
369 return false;
370
e3aa4e61
LJ
371 /*
372 * When running under platform earlier than Xen4.2, do not expose
373 * mwait, to avoid the risk of loading native acpi pad driver
374 */
375 if (!xen_running_on_version_or_later(4, 2))
376 return false;
377
73c154c6
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378 ax = 1;
379 cx = 0;
380
381 native_cpuid(&ax, &bx, &cx, &dx);
382
383 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
384 (1 << (X86_FEATURE_MWAIT % 32));
385
386 if ((cx & mwait_mask) != mwait_mask)
387 return false;
388
389 /* We need to emulate the MWAIT_LEAF and for that we need both
390 * ecx and edx. The hypercall provides only partial information.
391 */
392
393 ax = CPUID_MWAIT_LEAF;
394 bx = 0;
395 cx = 0;
396 dx = 0;
397
398 native_cpuid(&ax, &bx, &cx, &dx);
399
400 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
401 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
402 */
403 buf[0] = ACPI_PDC_REVISION_ID;
404 buf[1] = 1;
405 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
406
407 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
408
409 if ((HYPERVISOR_dom0_op(&op) == 0) &&
410 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
411 cpuid_leaf5_ecx_val = cx;
412 cpuid_leaf5_edx_val = dx;
413 }
414 return true;
415#else
416 return false;
417#endif
418}
ad3062a0 419static void __init xen_init_cpuid_mask(void)
e826fe1b
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420{
421 unsigned int ax, bx, cx, dx;
947ccf9c 422 unsigned int xsave_mask;
e826fe1b
JF
423
424 cpuid_leaf1_edx_mask =
cef12ee5 425 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
426 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
427
428 if (!xen_initial_domain())
429 cpuid_leaf1_edx_mask &=
430 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
431 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
947ccf9c 432 ax = 1;
5e287830 433 cx = 0;
947ccf9c 434 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 435
947ccf9c
SH
436 xsave_mask =
437 (1 << (X86_FEATURE_XSAVE % 32)) |
438 (1 << (X86_FEATURE_OSXSAVE % 32));
439
440 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
441 if ((cx & xsave_mask) != xsave_mask)
442 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
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KRW
443 if (xen_check_mwait())
444 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
445}
446
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447static void xen_set_debugreg(int reg, unsigned long val)
448{
449 HYPERVISOR_set_debugreg(reg, val);
450}
451
452static unsigned long xen_get_debugreg(int reg)
453{
454 return HYPERVISOR_get_debugreg(reg);
455}
456
224101ed 457static void xen_end_context_switch(struct task_struct *next)
5ead97c8 458{
5ead97c8 459 xen_mc_flush();
224101ed 460 paravirt_end_context_switch(next);
5ead97c8
JF
461}
462
463static unsigned long xen_store_tr(void)
464{
465 return 0;
466}
467
a05d2eba 468/*
cef43bf6
JF
469 * Set the page permissions for a particular virtual address. If the
470 * address is a vmalloc mapping (or other non-linear mapping), then
471 * find the linear mapping of the page and also set its protections to
472 * match.
a05d2eba
JF
473 */
474static void set_aliased_prot(void *v, pgprot_t prot)
475{
476 int level;
477 pte_t *ptep;
478 pte_t pte;
479 unsigned long pfn;
480 struct page *page;
481
482 ptep = lookup_address((unsigned long)v, &level);
483 BUG_ON(ptep == NULL);
484
485 pfn = pte_pfn(*ptep);
486 page = pfn_to_page(pfn);
487
488 pte = pfn_pte(pfn, prot);
489
490 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
491 BUG();
492
493 if (!PageHighMem(page)) {
494 void *av = __va(PFN_PHYS(pfn));
495
496 if (av != v)
497 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
498 BUG();
499 } else
500 kmap_flush_unused();
501}
502
38ffbe66
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503static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
504{
a05d2eba 505 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
506 int i;
507
a05d2eba
JF
508 for(i = 0; i < entries; i += entries_per_page)
509 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
510}
511
512static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
513{
a05d2eba 514 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
515 int i;
516
a05d2eba
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517 for(i = 0; i < entries; i += entries_per_page)
518 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
519}
520
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521static void xen_set_ldt(const void *addr, unsigned entries)
522{
5ead97c8
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523 struct mmuext_op *op;
524 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
525
ab78f7ad
JF
526 trace_xen_cpu_set_ldt(addr, entries);
527
5ead97c8
JF
528 op = mcs.args;
529 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 530 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
531 op->arg2.nr_ents = entries;
532
533 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
534
535 xen_mc_issue(PARAVIRT_LAZY_CPU);
536}
537
6b68f01b 538static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 539{
5ead97c8
JF
540 unsigned long va = dtr->address;
541 unsigned int size = dtr->size + 1;
542 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 543 unsigned long frames[pages];
5ead97c8 544 int f;
5ead97c8 545
577eebea
JF
546 /*
547 * A GDT can be up to 64k in size, which corresponds to 8192
548 * 8-byte entries, or 16 4k pages..
549 */
5ead97c8
JF
550
551 BUG_ON(size > 65536);
552 BUG_ON(va & ~PAGE_MASK);
553
5ead97c8 554 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 555 int level;
577eebea 556 pte_t *ptep;
6ed6bf42
JF
557 unsigned long pfn, mfn;
558 void *virt;
559
577eebea
JF
560 /*
561 * The GDT is per-cpu and is in the percpu data area.
562 * That can be virtually mapped, so we need to do a
563 * page-walk to get the underlying MFN for the
564 * hypercall. The page can also be in the kernel's
565 * linear range, so we need to RO that mapping too.
566 */
567 ptep = lookup_address(va, &level);
6ed6bf42
JF
568 BUG_ON(ptep == NULL);
569
570 pfn = pte_pfn(*ptep);
571 mfn = pfn_to_mfn(pfn);
572 virt = __va(PFN_PHYS(pfn));
573
574 frames[f] = mfn;
9976b39b 575
5ead97c8 576 make_lowmem_page_readonly((void *)va);
6ed6bf42 577 make_lowmem_page_readonly(virt);
5ead97c8
JF
578 }
579
3ce5fa7e
JF
580 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
581 BUG();
5ead97c8
JF
582}
583
577eebea
JF
584/*
585 * load_gdt for early boot, when the gdt is only mapped once
586 */
ad3062a0 587static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
588{
589 unsigned long va = dtr->address;
590 unsigned int size = dtr->size + 1;
591 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
592 unsigned long frames[pages];
593 int f;
594
595 /*
596 * A GDT can be up to 64k in size, which corresponds to 8192
597 * 8-byte entries, or 16 4k pages..
598 */
599
600 BUG_ON(size > 65536);
601 BUG_ON(va & ~PAGE_MASK);
602
603 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
604 pte_t pte;
605 unsigned long pfn, mfn;
606
607 pfn = virt_to_pfn(va);
608 mfn = pfn_to_mfn(pfn);
609
610 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
611
612 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
613 BUG();
614
615 frames[f] = mfn;
616 }
617
618 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
619 BUG();
620}
621
59290362
DV
622static inline bool desc_equal(const struct desc_struct *d1,
623 const struct desc_struct *d2)
624{
625 return d1->a == d2->a && d1->b == d2->b;
626}
627
5ead97c8
JF
628static void load_TLS_descriptor(struct thread_struct *t,
629 unsigned int cpu, unsigned int i)
630{
1c32cdc6
DV
631 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
632 struct desc_struct *gdt;
633 xmaddr_t maddr;
634 struct multicall_space mc;
635
636 if (desc_equal(shadow, &t->tls_array[i]))
637 return;
638
639 *shadow = t->tls_array[i];
640
641 gdt = get_cpu_gdt_table(cpu);
642 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
643 mc = __xen_mc_entry(0);
5ead97c8
JF
644
645 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
646}
647
648static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
649{
8b84ad94 650 /*
ccbeed3a
TH
651 * XXX sleazy hack: If we're being called in a lazy-cpu zone
652 * and lazy gs handling is enabled, it means we're in a
653 * context switch, and %gs has just been saved. This means we
654 * can zero it out to prevent faults on exit from the
655 * hypervisor if the next process has no %gs. Either way, it
656 * has been saved, and the new value will get loaded properly.
657 * This will go away as soon as Xen has been modified to not
658 * save/restore %gs for normal hypercalls.
8a95408e
EH
659 *
660 * On x86_64, this hack is not used for %gs, because gs points
661 * to KERNEL_GS_BASE (and uses it for PDA references), so we
662 * must not zero %gs on x86_64
663 *
664 * For x86_64, we need to zero %fs, otherwise we may get an
665 * exception between the new %fs descriptor being loaded and
666 * %fs being effectively cleared at __switch_to().
8b84ad94 667 */
8a95408e
EH
668 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
669#ifdef CONFIG_X86_32
ccbeed3a 670 lazy_load_gs(0);
8a95408e
EH
671#else
672 loadsegment(fs, 0);
673#endif
674 }
675
676 xen_mc_batch();
677
678 load_TLS_descriptor(t, cpu, 0);
679 load_TLS_descriptor(t, cpu, 1);
680 load_TLS_descriptor(t, cpu, 2);
681
682 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
683}
684
a8fc1089
EH
685#ifdef CONFIG_X86_64
686static void xen_load_gs_index(unsigned int idx)
687{
688 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
689 BUG();
5ead97c8 690}
a8fc1089 691#endif
5ead97c8
JF
692
693static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 694 const void *ptr)
5ead97c8 695{
cef43bf6 696 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 697 u64 entry = *(u64 *)ptr;
5ead97c8 698
ab78f7ad
JF
699 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
700
f120f13e
JF
701 preempt_disable();
702
5ead97c8
JF
703 xen_mc_flush();
704 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
705 BUG();
f120f13e
JF
706
707 preempt_enable();
5ead97c8
JF
708}
709
e176d367 710static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
711 struct trap_info *info)
712{
6cac5a92
JF
713 unsigned long addr;
714
6d02c426 715 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
716 return 0;
717
718 info->vector = vector;
6cac5a92
JF
719
720 addr = gate_offset(*val);
721#ifdef CONFIG_X86_64
b80119bb
JF
722 /*
723 * Look for known traps using IST, and substitute them
724 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
725 * about. Xen will handle faults like double_fault,
726 * so we should never see them. Warn if
b80119bb
JF
727 * there's an unexpected IST-using fault handler.
728 */
6cac5a92
JF
729 if (addr == (unsigned long)debug)
730 addr = (unsigned long)xen_debug;
731 else if (addr == (unsigned long)int3)
732 addr = (unsigned long)xen_int3;
733 else if (addr == (unsigned long)stack_segment)
734 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
735 else if (addr == (unsigned long)double_fault ||
736 addr == (unsigned long)nmi) {
737 /* Don't need to handle these */
738 return 0;
739#ifdef CONFIG_X86_MCE
740 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
741 /*
742 * when xen hypervisor inject vMCE to guest,
743 * use native mce handler to handle it
744 */
745 ;
b80119bb
JF
746#endif
747 } else {
748 /* Some other trap using IST? */
749 if (WARN_ON(val->ist != 0))
750 return 0;
751 }
6cac5a92
JF
752#endif /* CONFIG_X86_64 */
753 info->address = addr;
754
e176d367
EH
755 info->cs = gate_segment(*val);
756 info->flags = val->dpl;
5ead97c8 757 /* interrupt gates clear IF */
6d02c426
JF
758 if (val->type == GATE_INTERRUPT)
759 info->flags |= 1 << 2;
5ead97c8
JF
760
761 return 1;
762}
763
764/* Locations of each CPU's IDT */
6b68f01b 765static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
766
767/* Set an IDT entry. If the entry is part of the current IDT, then
768 also update Xen. */
8d947344 769static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 770{
5ead97c8 771 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
772 unsigned long start, end;
773
ab78f7ad
JF
774 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
775
f120f13e
JF
776 preempt_disable();
777
780f36d8
CL
778 start = __this_cpu_read(idt_desc.address);
779 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
780
781 xen_mc_flush();
782
8d947344 783 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
784
785 if (p >= start && (p + 8) <= end) {
786 struct trap_info info[2];
787
788 info[1].address = 0;
789
e176d367 790 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
791 if (HYPERVISOR_set_trap_table(info))
792 BUG();
793 }
f120f13e
JF
794
795 preempt_enable();
5ead97c8
JF
796}
797
6b68f01b 798static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 799 struct trap_info *traps)
5ead97c8 800{
5ead97c8
JF
801 unsigned in, out, count;
802
e176d367 803 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
804 BUG_ON(count > 256);
805
5ead97c8 806 for (in = out = 0; in < count; in++) {
e176d367 807 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 808
e176d367 809 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
810 out++;
811 }
812 traps[out].address = 0;
f87e4cac
JF
813}
814
815void xen_copy_trap_info(struct trap_info *traps)
816{
6b68f01b 817 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
818
819 xen_convert_trap_info(desc, traps);
f87e4cac
JF
820}
821
822/* Load a new IDT into Xen. In principle this can be per-CPU, so we
823 hold a spinlock to protect the static traps[] array (static because
824 it avoids allocation, and saves stack space). */
6b68f01b 825static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
826{
827 static DEFINE_SPINLOCK(lock);
828 static struct trap_info traps[257];
f87e4cac 829
ab78f7ad
JF
830 trace_xen_cpu_load_idt(desc);
831
f87e4cac
JF
832 spin_lock(&lock);
833
f120f13e
JF
834 __get_cpu_var(idt_desc) = *desc;
835
f87e4cac 836 xen_convert_trap_info(desc, traps);
5ead97c8
JF
837
838 xen_mc_flush();
839 if (HYPERVISOR_set_trap_table(traps))
840 BUG();
841
842 spin_unlock(&lock);
843}
844
845/* Write a GDT descriptor entry. Ignore LDT descriptors, since
846 they're handled differently. */
847static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 848 const void *desc, int type)
5ead97c8 849{
ab78f7ad
JF
850 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
851
f120f13e
JF
852 preempt_disable();
853
014b15be
GOC
854 switch (type) {
855 case DESC_LDT:
856 case DESC_TSS:
5ead97c8
JF
857 /* ignore */
858 break;
859
860 default: {
9976b39b 861 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
862
863 xen_mc_flush();
014b15be 864 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
865 BUG();
866 }
867
868 }
f120f13e
JF
869
870 preempt_enable();
5ead97c8
JF
871}
872
577eebea
JF
873/*
874 * Version of write_gdt_entry for use at early boot-time needed to
875 * update an entry as simply as possible.
876 */
ad3062a0 877static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
878 const void *desc, int type)
879{
ab78f7ad
JF
880 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
881
577eebea
JF
882 switch (type) {
883 case DESC_LDT:
884 case DESC_TSS:
885 /* ignore */
886 break;
887
888 default: {
889 xmaddr_t maddr = virt_to_machine(&dt[entry]);
890
891 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
892 dt[entry] = *(struct desc_struct *)desc;
893 }
894
895 }
896}
897
faca6227 898static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 899 struct thread_struct *thread)
5ead97c8 900{
ab78f7ad
JF
901 struct multicall_space mcs;
902
903 mcs = xen_mc_entry(0);
faca6227 904 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
905 xen_mc_issue(PARAVIRT_LAZY_CPU);
906}
907
908static void xen_set_iopl_mask(unsigned mask)
909{
910 struct physdev_set_iopl set_iopl;
911
912 /* Force the change at ring 0. */
913 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
914 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
915}
916
917static void xen_io_delay(void)
918{
919}
920
921#ifdef CONFIG_X86_LOCAL_APIC
558daa28
KRW
922static unsigned long xen_set_apic_id(unsigned int x)
923{
924 WARN_ON(1);
925 return x;
926}
927static unsigned int xen_get_apic_id(unsigned long x)
928{
929 return ((x)>>24) & 0xFFu;
930}
ad66dd34 931static u32 xen_apic_read(u32 reg)
5ead97c8 932{
558daa28
KRW
933 struct xen_platform_op op = {
934 .cmd = XENPF_get_cpuinfo,
935 .interface_version = XENPF_INTERFACE_VERSION,
936 .u.pcpu_info.xen_cpuid = 0,
937 };
938 int ret = 0;
939
940 /* Shouldn't need this as APIC is turned off for PV, and we only
941 * get called on the bootup processor. But just in case. */
942 if (!xen_initial_domain() || smp_processor_id())
943 return 0;
944
945 if (reg == APIC_LVR)
946 return 0x10;
947
948 if (reg != APIC_ID)
949 return 0;
950
951 ret = HYPERVISOR_dom0_op(&op);
952 if (ret)
953 return 0;
954
955 return op.u.pcpu_info.apic_id << 24;
5ead97c8 956}
f87e4cac 957
ad66dd34 958static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
959{
960 /* Warn to see if there's any stray references */
961 WARN_ON(1);
962}
ad66dd34 963
ad66dd34
SS
964static u64 xen_apic_icr_read(void)
965{
966 return 0;
967}
968
969static void xen_apic_icr_write(u32 low, u32 id)
970{
971 /* Warn to see if there's any stray references */
972 WARN_ON(1);
973}
974
975static void xen_apic_wait_icr_idle(void)
976{
977 return;
978}
979
94a8c3c2
YL
980static u32 xen_safe_apic_wait_icr_idle(void)
981{
982 return 0;
983}
984
c1eeb2de
YL
985static void set_xen_basic_apic_ops(void)
986{
987 apic->read = xen_apic_read;
988 apic->write = xen_apic_write;
989 apic->icr_read = xen_apic_icr_read;
990 apic->icr_write = xen_apic_icr_write;
991 apic->wait_icr_idle = xen_apic_wait_icr_idle;
992 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
558daa28
KRW
993 apic->set_apic_id = xen_set_apic_id;
994 apic->get_apic_id = xen_get_apic_id;
f447d56d
BG
995
996#ifdef CONFIG_SMP
997 apic->send_IPI_allbutself = xen_send_IPI_allbutself;
998 apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;
999 apic->send_IPI_mask = xen_send_IPI_mask;
1000 apic->send_IPI_all = xen_send_IPI_all;
1001 apic->send_IPI_self = xen_send_IPI_self;
1002#endif
c1eeb2de 1003}
ad66dd34 1004
5ead97c8
JF
1005#endif
1006
7b1333aa
JF
1007static void xen_clts(void)
1008{
1009 struct multicall_space mcs;
1010
1011 mcs = xen_mc_entry(0);
1012
1013 MULTI_fpu_taskswitch(mcs.mc, 0);
1014
1015 xen_mc_issue(PARAVIRT_LAZY_CPU);
1016}
1017
a789ed5f
JF
1018static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
1019
1020static unsigned long xen_read_cr0(void)
1021{
2113f469 1022 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
1023
1024 if (unlikely(cr0 == 0)) {
1025 cr0 = native_read_cr0();
2113f469 1026 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
1027 }
1028
1029 return cr0;
1030}
1031
7b1333aa
JF
1032static void xen_write_cr0(unsigned long cr0)
1033{
1034 struct multicall_space mcs;
1035
2113f469 1036 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 1037
7b1333aa
JF
1038 /* Only pay attention to cr0.TS; everything else is
1039 ignored. */
1040 mcs = xen_mc_entry(0);
1041
1042 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1043
1044 xen_mc_issue(PARAVIRT_LAZY_CPU);
1045}
1046
5ead97c8
JF
1047static void xen_write_cr4(unsigned long cr4)
1048{
2956a351
JF
1049 cr4 &= ~X86_CR4_PGE;
1050 cr4 &= ~X86_CR4_PSE;
1051
1052 native_write_cr4(cr4);
5ead97c8 1053}
1a7bbda5
KRW
1054#ifdef CONFIG_X86_64
1055static inline unsigned long xen_read_cr8(void)
1056{
1057 return 0;
1058}
1059static inline void xen_write_cr8(unsigned long val)
1060{
1061 BUG_ON(val);
1062}
1063#endif
1153968a
JF
1064static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1065{
1066 int ret;
1067
1068 ret = 0;
1069
f63c2f24 1070 switch (msr) {
1153968a
JF
1071#ifdef CONFIG_X86_64
1072 unsigned which;
1073 u64 base;
1074
1075 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1076 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1077 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1078
1079 set:
1080 base = ((u64)high << 32) | low;
1081 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 1082 ret = -EIO;
1153968a
JF
1083 break;
1084#endif
d89961e2
JF
1085
1086 case MSR_STAR:
1087 case MSR_CSTAR:
1088 case MSR_LSTAR:
1089 case MSR_SYSCALL_MASK:
1090 case MSR_IA32_SYSENTER_CS:
1091 case MSR_IA32_SYSENTER_ESP:
1092 case MSR_IA32_SYSENTER_EIP:
1093 /* Fast syscall setup is all done in hypercalls, so
1094 these are all ignored. Stub them out here to stop
1095 Xen console noise. */
1096 break;
1097
41f2e477
JF
1098 case MSR_IA32_CR_PAT:
1099 if (smp_processor_id() == 0)
1100 xen_set_pat(((u64)high << 32) | low);
1101 break;
1102
1153968a
JF
1103 default:
1104 ret = native_write_msr_safe(msr, low, high);
1105 }
1106
1107 return ret;
1108}
1109
0e91398f 1110void xen_setup_shared_info(void)
5ead97c8
JF
1111{
1112 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1113 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1114 xen_start_info->shared_info);
1115
1116 HYPERVISOR_shared_info =
1117 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1118 } else
1119 HYPERVISOR_shared_info =
1120 (struct shared_info *)__va(xen_start_info->shared_info);
1121
2e8fe719
JF
1122#ifndef CONFIG_SMP
1123 /* In UP this is as good a place as any to set up shared info */
1124 xen_setup_vcpu_info_placement();
1125#endif
d5edbc1f
JF
1126
1127 xen_setup_mfn_list_list();
2e8fe719
JF
1128}
1129
5f054e31 1130/* This is called once we have the cpu_possible_mask */
0e91398f 1131void xen_setup_vcpu_info_placement(void)
60223a32
JF
1132{
1133 int cpu;
1134
1135 for_each_possible_cpu(cpu)
1136 xen_vcpu_setup(cpu);
1137
1138 /* xen_vcpu_setup managed to place the vcpu_info within the
1139 percpu area for all cpus, so make use of it */
1140 if (have_vcpu_info_placement) {
ecb93d1c
JF
1141 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1142 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1143 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1144 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1145 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1146 }
5ead97c8
JF
1147}
1148
ab144f5e
AK
1149static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1150 unsigned long addr, unsigned len)
6487673b
JF
1151{
1152 char *start, *end, *reloc;
1153 unsigned ret;
1154
1155 start = end = reloc = NULL;
1156
93b1eab3
JF
1157#define SITE(op, x) \
1158 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1159 if (have_vcpu_info_placement) { \
1160 start = (char *)xen_##x##_direct; \
1161 end = xen_##x##_direct_end; \
1162 reloc = xen_##x##_direct_reloc; \
1163 } \
1164 goto patch_site
1165
1166 switch (type) {
93b1eab3
JF
1167 SITE(pv_irq_ops, irq_enable);
1168 SITE(pv_irq_ops, irq_disable);
1169 SITE(pv_irq_ops, save_fl);
1170 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1171#undef SITE
1172
1173 patch_site:
1174 if (start == NULL || (end-start) > len)
1175 goto default_patch;
1176
ab144f5e 1177 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1178
1179 /* Note: because reloc is assigned from something that
1180 appears to be an array, gcc assumes it's non-null,
1181 but doesn't know its relationship with start and
1182 end. */
1183 if (reloc > start && reloc < end) {
1184 int reloc_off = reloc - start;
ab144f5e
AK
1185 long *relocp = (long *)(insnbuf + reloc_off);
1186 long delta = start - (char *)addr;
6487673b
JF
1187
1188 *relocp += delta;
1189 }
1190 break;
1191
1192 default_patch:
1193 default:
ab144f5e
AK
1194 ret = paravirt_patch_default(type, clobbers, insnbuf,
1195 addr, len);
6487673b
JF
1196 break;
1197 }
1198
1199 return ret;
1200}
1201
ad3062a0 1202static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1203 .paravirt_enabled = 1,
1204 .shared_kernel_pmd = 0,
1205
318f5a2a
AL
1206#ifdef CONFIG_X86_64
1207 .extra_user_64bit_cs = FLAT_USER_CS64,
1208#endif
1209
5ead97c8 1210 .name = "Xen",
93b1eab3 1211};
5ead97c8 1212
ad3062a0 1213static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1214 .patch = xen_patch,
93b1eab3 1215};
5ead97c8 1216
ad3062a0 1217static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1218 .cpuid = xen_cpuid,
1219
1220 .set_debugreg = xen_set_debugreg,
1221 .get_debugreg = xen_get_debugreg,
1222
7b1333aa 1223 .clts = xen_clts,
5ead97c8 1224
a789ed5f 1225 .read_cr0 = xen_read_cr0,
7b1333aa 1226 .write_cr0 = xen_write_cr0,
5ead97c8 1227
5ead97c8
JF
1228 .read_cr4 = native_read_cr4,
1229 .read_cr4_safe = native_read_cr4_safe,
1230 .write_cr4 = xen_write_cr4,
1231
1a7bbda5
KRW
1232#ifdef CONFIG_X86_64
1233 .read_cr8 = xen_read_cr8,
1234 .write_cr8 = xen_write_cr8,
1235#endif
1236
5ead97c8
JF
1237 .wbinvd = native_wbinvd,
1238
1239 .read_msr = native_read_msr_safe,
1153968a 1240 .write_msr = xen_write_msr_safe,
1ab46fd3 1241
5ead97c8
JF
1242 .read_tsc = native_read_tsc,
1243 .read_pmc = native_read_pmc,
1244
cd0608e7
KRW
1245 .read_tscp = native_read_tscp,
1246
81e103f1 1247 .iret = xen_iret,
d75cd22f 1248 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1249#ifdef CONFIG_X86_64
1250 .usergs_sysret32 = xen_sysret32,
1251 .usergs_sysret64 = xen_sysret64,
1252#endif
5ead97c8
JF
1253
1254 .load_tr_desc = paravirt_nop,
1255 .set_ldt = xen_set_ldt,
1256 .load_gdt = xen_load_gdt,
1257 .load_idt = xen_load_idt,
1258 .load_tls = xen_load_tls,
a8fc1089
EH
1259#ifdef CONFIG_X86_64
1260 .load_gs_index = xen_load_gs_index,
1261#endif
5ead97c8 1262
38ffbe66
JF
1263 .alloc_ldt = xen_alloc_ldt,
1264 .free_ldt = xen_free_ldt,
1265
5ead97c8
JF
1266 .store_gdt = native_store_gdt,
1267 .store_idt = native_store_idt,
1268 .store_tr = xen_store_tr,
1269
1270 .write_ldt_entry = xen_write_ldt_entry,
1271 .write_gdt_entry = xen_write_gdt_entry,
1272 .write_idt_entry = xen_write_idt_entry,
faca6227 1273 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1274
1275 .set_iopl_mask = xen_set_iopl_mask,
1276 .io_delay = xen_io_delay,
1277
952d1d70
JF
1278 /* Xen takes care of %gs when switching to usermode for us */
1279 .swapgs = paravirt_nop,
1280
224101ed
JF
1281 .start_context_switch = paravirt_start_context_switch,
1282 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1283};
1284
ad3062a0 1285static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1286#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1287 .startup_ipi_hook = paravirt_nop,
1288#endif
93b1eab3
JF
1289};
1290
fefa629a
JF
1291static void xen_reboot(int reason)
1292{
349c709f
JF
1293 struct sched_shutdown r = { .reason = reason };
1294
349c709f 1295 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1296 BUG();
1297}
1298
1299static void xen_restart(char *msg)
1300{
1301 xen_reboot(SHUTDOWN_reboot);
1302}
1303
1304static void xen_emergency_restart(void)
1305{
1306 xen_reboot(SHUTDOWN_reboot);
1307}
1308
1309static void xen_machine_halt(void)
1310{
1311 xen_reboot(SHUTDOWN_poweroff);
1312}
1313
b2abe506
TG
1314static void xen_machine_power_off(void)
1315{
1316 if (pm_power_off)
1317 pm_power_off();
1318 xen_reboot(SHUTDOWN_poweroff);
1319}
1320
fefa629a
JF
1321static void xen_crash_shutdown(struct pt_regs *regs)
1322{
1323 xen_reboot(SHUTDOWN_crash);
1324}
1325
f09f6d19
DD
1326static int
1327xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1328{
086748e5 1329 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1330 return NOTIFY_DONE;
1331}
1332
1333static struct notifier_block xen_panic_block = {
1334 .notifier_call= xen_panic_event,
1335};
1336
1337int xen_panic_handler_init(void)
1338{
1339 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1340 return 0;
1341}
1342
ad3062a0 1343static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1344 .restart = xen_restart,
1345 .halt = xen_machine_halt,
b2abe506 1346 .power_off = xen_machine_power_off,
fefa629a
JF
1347 .shutdown = xen_machine_halt,
1348 .crash_shutdown = xen_crash_shutdown,
1349 .emergency_restart = xen_emergency_restart,
1350};
1351
96f28bc6
DV
1352static void __init xen_boot_params_init_edd(void)
1353{
1354#if IS_ENABLED(CONFIG_EDD)
1355 struct xen_platform_op op;
1356 struct edd_info *edd_info;
1357 u32 *mbr_signature;
1358 unsigned nr;
1359 int ret;
1360
1361 edd_info = boot_params.eddbuf;
1362 mbr_signature = boot_params.edd_mbr_sig_buffer;
1363
1364 op.cmd = XENPF_firmware_info;
1365
1366 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1367 for (nr = 0; nr < EDDMAXNR; nr++) {
1368 struct edd_info *info = edd_info + nr;
1369
1370 op.u.firmware_info.index = nr;
1371 info->params.length = sizeof(info->params);
1372 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1373 &info->params);
1374 ret = HYPERVISOR_dom0_op(&op);
1375 if (ret)
1376 break;
1377
1378#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1379 C(device);
1380 C(version);
1381 C(interface_support);
1382 C(legacy_max_cylinder);
1383 C(legacy_max_head);
1384 C(legacy_sectors_per_track);
1385#undef C
1386 }
1387 boot_params.eddbuf_entries = nr;
1388
1389 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1390 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1391 op.u.firmware_info.index = nr;
1392 ret = HYPERVISOR_dom0_op(&op);
1393 if (ret)
1394 break;
1395 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1396 }
1397 boot_params.edd_mbr_sig_buf_entries = nr;
1398#endif
1399}
1400
577eebea
JF
1401/*
1402 * Set up the GDT and segment registers for -fstack-protector. Until
1403 * we do this, we have to be careful not to call any stack-protected
1404 * function, which is most of the kernel.
1405 */
1406static void __init xen_setup_stackprotector(void)
1407{
1408 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1409 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1410
1411 setup_stack_canary_segment(0);
1412 switch_to_new_gdt(0);
1413
1414 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1415 pv_cpu_ops.load_gdt = xen_load_gdt;
1416}
1417
5ead97c8
JF
1418/* First C function to be called on Xen boot */
1419asmlinkage void __init xen_start_kernel(void)
1420{
ec35a69c
KRW
1421 struct physdev_set_iopl set_iopl;
1422 int rc;
5ead97c8
JF
1423
1424 if (!xen_start_info)
1425 return;
1426
6e833587
JF
1427 xen_domain_type = XEN_PV_DOMAIN;
1428
7e77506a
IC
1429 xen_setup_machphys_mapping();
1430
5ead97c8 1431 /* Install Xen paravirt ops */
93b1eab3
JF
1432 pv_info = xen_info;
1433 pv_init_ops = xen_init_ops;
93b1eab3 1434 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1435 pv_apic_ops = xen_apic_ops;
93b1eab3 1436
6b18ae3e 1437 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1438 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1439 x86_init.oem.banner = xen_banner;
845b3944 1440
409771d2 1441 xen_init_time_ops();
93b1eab3 1442
ce2eef33 1443 /*
577eebea 1444 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1445 */
577eebea 1446
973df35e
JF
1447 xen_init_mmu_ops();
1448
577eebea
JF
1449 /* Prevent unwanted bits from being set in PTEs. */
1450 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1451#if 0
577eebea 1452 if (!xen_initial_domain())
8eaffa67 1453#endif
577eebea
JF
1454 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1455
1456 __supported_pte_mask |= _PAGE_IOMAP;
1457
817a824b
IC
1458 /*
1459 * Prevent page tables from being allocated in highmem, even
1460 * if CONFIG_HIGHPTE is enabled.
1461 */
1462 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1463
b75fe4e5 1464 /* Work out if we support NX */
4763ed4d 1465 x86_configure_nx();
b75fe4e5 1466
577eebea
JF
1467 xen_setup_features();
1468
1469 /* Get mfn list */
1470 if (!xen_feature(XENFEAT_auto_translated_physmap))
1471 xen_build_dynamic_phys_to_machine();
1472
1473 /*
1474 * Set up kernel GDT and segment registers, mainly so that
1475 * -fstack-protector code can be executed.
1476 */
1477 xen_setup_stackprotector();
0d1edf46 1478
ce2eef33 1479 xen_init_irq_ops();
e826fe1b
JF
1480 xen_init_cpuid_mask();
1481
94a8c3c2 1482#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1483 /*
94a8c3c2 1484 * set up the basic apic ops.
ad66dd34 1485 */
c1eeb2de 1486 set_xen_basic_apic_ops();
ad66dd34 1487#endif
93b1eab3 1488
e57778a1
JF
1489 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1490 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1491 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1492 }
1493
fefa629a
JF
1494 machine_ops = xen_machine_ops;
1495
38341432
JF
1496 /*
1497 * The only reliable way to retain the initial address of the
1498 * percpu gdt_page is to remember it here, so we can go and
1499 * mark it RW later, when the initial percpu area is freed.
1500 */
1501 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1502
a9e7062d 1503 xen_smp_init();
5ead97c8 1504
c1f5db1a
IC
1505#ifdef CONFIG_ACPI_NUMA
1506 /*
1507 * The pages we from Xen are not related to machine pages, so
1508 * any NUMA information the kernel tries to get from ACPI will
1509 * be meaningless. Prevent it from trying.
1510 */
1511 acpi_numa = -1;
1512#endif
c79c4982
KRW
1513#ifdef CONFIG_X86_PAT
1514 /*
1515 * For right now disable the PAT. We should remove this once
1516 * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1
1517 * (xen/pat: Disable PAT support for now) is reverted.
1518 */
1519 pat_enabled = 0;
1520#endif
60223a32 1521 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1522 possible map and a non-dummy shared_info. */
60223a32 1523 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1524
55d80856 1525 local_irq_disable();
2ce802f6 1526 early_boot_irqs_disabled = true;
55d80856 1527
084a2a4e 1528 xen_raw_console_write("mapping kernel into physical memory\n");
3699aad0 1529 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages);
5ead97c8 1530
33a84750
JF
1531 /* Allocate and initialize top and mid mfn levels for p2m structure */
1532 xen_build_mfn_list_list();
1533
5ead97c8
JF
1534 /* keep using Xen gdt for now; no urgent need to change it */
1535
e68266b7 1536#ifdef CONFIG_X86_32
93b1eab3 1537 pv_info.kernel_rpl = 1;
5ead97c8 1538 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1539 pv_info.kernel_rpl = 0;
e68266b7
IC
1540#else
1541 pv_info.kernel_rpl = 0;
1542#endif
5ead97c8 1543 /* set the limit of our address space */
fb1d8404 1544 xen_reserve_top();
5ead97c8 1545
ec35a69c
KRW
1546 /* We used to do this in xen_arch_setup, but that is too late on AMD
1547 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1548 * which pokes 0xcf8 port.
1549 */
1550 set_iopl.iopl = 1;
1551 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1552 if (rc != 0)
1553 xen_raw_printk("physdev_op failed %d\n", rc);
1554
7d087b68 1555#ifdef CONFIG_X86_32
5ead97c8
JF
1556 /* set up basic CPUID stuff */
1557 cpu_detect(&new_cpu_data);
1558 new_cpu_data.hard_math = 1;
d560bc61 1559 new_cpu_data.wp_works_ok = 1;
5ead97c8 1560 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1561#endif
5ead97c8
JF
1562
1563 /* Poke various useful things into boot_params */
30c82645
PA
1564 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1565 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1566 ? __pa(xen_start_info->mod_start) : 0;
1567 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1568 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1569
6e833587 1570 if (!xen_initial_domain()) {
83abc70a 1571 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1572 add_preferred_console("tty", 0, NULL);
b8c2d3df 1573 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1574 if (pci_xen)
1575 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1576 } else {
c2419b4a
JF
1577 const struct dom0_vga_console_info *info =
1578 (void *)((char *)xen_start_info +
1579 xen_start_info->console.dom0.info_off);
ffb8b233
KRW
1580 struct xen_platform_op op = {
1581 .cmd = XENPF_firmware_info,
1582 .interface_version = XENPF_INTERFACE_VERSION,
1583 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1584 };
c2419b4a
JF
1585
1586 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1587 xen_start_info->console.domU.mfn = 0;
1588 xen_start_info->console.domU.evtchn = 0;
1589
ffb8b233
KRW
1590 if (HYPERVISOR_dom0_op(&op) == 0)
1591 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1592
31b3c9d7
KRW
1593 xen_init_apic();
1594
5d990b62
CW
1595 /* Make sure ACS will be enabled */
1596 pci_request_acs();
211063dc
KRW
1597
1598 xen_acpi_sleep_register();
bd49940a
KRW
1599
1600 /* Avoid searching for BIOS MP tables */
1601 x86_init.mpparse.find_smp_config = x86_init_noop;
1602 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
96f28bc6
DV
1603
1604 xen_boot_params_init_edd();
9e124fe1 1605 }
76a8df7b
DV
1606#ifdef CONFIG_PCI
1607 /* PCI BIOS service won't work from a PV guest. */
1608 pci_probe &= ~PCI_PROBE_BIOS;
1609#endif
084a2a4e
JF
1610 xen_raw_console_write("about to get started...\n");
1611
499d19b8
JF
1612 xen_setup_runstate_info(0);
1613
5ead97c8 1614 /* Start the world */
f5d36de0 1615#ifdef CONFIG_X86_32
f0d43100 1616 i386_start_kernel();
f5d36de0 1617#else
084a2a4e 1618 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1619#endif
5ead97c8 1620}
bee6ab53 1621
e9daff24 1622void __ref xen_hvm_init_shared_info(void)
bee6ab53 1623{
e9daff24 1624 int cpu;
bee6ab53 1625 struct xen_add_to_physmap xatp;
e9daff24 1626 static struct shared_info *shared_info_page = 0;
bee6ab53 1627
e9daff24
KRW
1628 if (!shared_info_page)
1629 shared_info_page = (struct shared_info *)
1630 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1631 xatp.domid = DOMID_SELF;
1632 xatp.idx = 0;
1633 xatp.space = XENMAPSPACE_shared_info;
e9daff24 1634 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
bee6ab53
SY
1635 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1636 BUG();
1637
e9daff24 1638 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
bee6ab53 1639
016b6f5f
SS
1640 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1641 * page, we use it in the event channel upcall and in some pvclock
1642 * related functions. We don't need the vcpu_info placement
1643 * optimizations because we don't use any pv_mmu or pv_irq op on
e9daff24
KRW
1644 * HVM.
1645 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1646 * online but xen_hvm_init_shared_info is run at resume time too and
1647 * in that case multiple vcpus might be online. */
1648 for_each_online_cpu(cpu) {
d5b17dbf
KRW
1649 /* Leave it to be NULL. */
1650 if (cpu >= MAX_VIRT_CPUS)
1651 continue;
016b6f5f
SS
1652 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1653 }
bee6ab53
SY
1654}
1655
e9daff24 1656#ifdef CONFIG_XEN_PVHVM
4ff2d062
OH
1657static void __init init_hvm_pv_info(void)
1658{
e9daff24 1659 int major, minor;
5eb65be2 1660 uint32_t eax, ebx, ecx, edx, pages, msr, base;
4ff2d062
OH
1661 u64 pfn;
1662
1663 base = xen_cpuid_base();
e9daff24
KRW
1664 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1665
1666 major = eax >> 16;
1667 minor = eax & 0xffff;
1668 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1669
4ff2d062
OH
1670 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1671
1672 pfn = __pa(hypercall_page);
1673 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1674
1675 xen_setup_features();
1676
1677 pv_info.name = "Xen HVM";
1678
1679 xen_domain_type = XEN_HVM_DOMAIN;
1680}
1681
38e20b07
SY
1682static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1683 unsigned long action, void *hcpu)
1684{
1685 int cpu = (long)hcpu;
1686 switch (action) {
1687 case CPU_UP_PREPARE:
90d4f553 1688 xen_vcpu_setup(cpu);
7918c92a 1689 if (xen_have_vector_callback) {
99bbb3a8 1690 xen_init_lock_cpu(cpu);
7918c92a
KRW
1691 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1692 xen_setup_timer(cpu);
1693 }
38e20b07
SY
1694 break;
1695 default:
1696 break;
1697 }
1698 return NOTIFY_OK;
1699}
1700
ad3062a0 1701static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
38e20b07
SY
1702 .notifier_call = xen_hvm_cpu_notify,
1703};
1704
bee6ab53
SY
1705static void __init xen_hvm_guest_init(void)
1706{
4ff2d062 1707 init_hvm_pv_info();
bee6ab53 1708
016b6f5f 1709 xen_hvm_init_shared_info();
38e20b07
SY
1710
1711 if (xen_feature(XENFEAT_hvm_callback_vector))
1712 xen_have_vector_callback = 1;
99bbb3a8 1713 xen_hvm_smp_init();
38e20b07 1714 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1715 xen_unplug_emulated_devices();
38e20b07 1716 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1717 xen_hvm_init_time_ops();
59151001 1718 xen_hvm_init_mmu_ops();
bee6ab53
SY
1719}
1720
1721static bool __init xen_hvm_platform(void)
1722{
1723 if (xen_pv_domain())
1724 return false;
1725
e9daff24 1726 if (!xen_cpuid_base())
bee6ab53
SY
1727 return false;
1728
1729 return true;
1730}
1731
d9b8ca84
SY
1732bool xen_hvm_need_lapic(void)
1733{
1734 if (xen_pv_domain())
1735 return false;
1736 if (!xen_hvm_domain())
1737 return false;
1738 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1739 return false;
1740 return true;
1741}
1742EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1743
ad3062a0 1744const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1745 .name = "Xen HVM",
1746 .detect = xen_hvm_platform,
1747 .init_platform = xen_hvm_guest_init,
4cca6ea0 1748 .x2apic_available = xen_x2apic_para_available,
bee6ab53
SY
1749};
1750EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1751#endif