xen64: allocate and manage user pagetables
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
084a2a4e 36#include <xen/hvc-console.h>
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37
38#include <asm/paravirt.h>
39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
44#include <asm/setup.h>
45#include <asm/desc.h>
46#include <asm/pgtable.h>
f87e4cac 47#include <asm/tlbflush.h>
fefa629a 48#include <asm/reboot.h>
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49
50#include "xen-ops.h"
3b827c1b 51#include "mmu.h"
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52#include "multicalls.h"
53
54EXPORT_SYMBOL_GPL(hypercall_page);
55
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56DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
57DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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58
59/*
60 * Note about cr3 (pagetable base) values:
61 *
62 * xen_cr3 contains the current logical cr3 value; it contains the
63 * last set cr3. This may not be the current effective cr3, because
64 * its update may be being lazily deferred. However, a vcpu looking
65 * at its own cr3 can use this value knowing that it everything will
66 * be self-consistent.
67 *
68 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
69 * hypercall to set the vcpu cr3 is complete (so it may be a little
70 * out of date, but it will never be set early). If one vcpu is
71 * looking at another vcpu's cr3 value, it should use this variable.
72 */
73DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
74DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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75
76struct start_info *xen_start_info;
77EXPORT_SYMBOL_GPL(xen_start_info);
78
a0d695c8 79struct shared_info xen_dummy_shared_info;
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80
81/*
82 * Point at some empty memory to start with. We map the real shared_info
83 * page as soon as fixmap is up and running.
84 */
a0d695c8 85struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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86
87/*
88 * Flag to determine whether vcpu info placement is available on all
89 * VCPUs. We assume it is to start with, and then set it to zero on
90 * the first failure. This is because it can succeed on some VCPUs
91 * and not others, since it can involve hypervisor memory allocation,
92 * or because the guest failed to guarantee all the appropriate
93 * constraints on all VCPUs (ie buffer can't cross a page boundary).
94 *
95 * Note that any particular CPU may be using a placed vcpu structure,
96 * but we can only optimise if the all are.
97 *
98 * 0: not available, 1: available
99 */
04c44a08 100static int have_vcpu_info_placement = 1;
60223a32 101
9c7a7942 102static void xen_vcpu_setup(int cpu)
5ead97c8 103{
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104 struct vcpu_register_vcpu_info info;
105 int err;
106 struct vcpu_info *vcpup;
107
a0d695c8 108 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 109 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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110
111 if (!have_vcpu_info_placement)
112 return; /* already tested, not available */
113
114 vcpup = &per_cpu(xen_vcpu_info, cpu);
115
116 info.mfn = virt_to_mfn(vcpup);
117 info.offset = offset_in_page(vcpup);
118
e3d26976 119 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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120 cpu, vcpup, info.mfn, info.offset);
121
122 /* Check to see if the hypervisor will put the vcpu_info
123 structure where we want it, which allows direct access via
124 a percpu-variable. */
125 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
126
127 if (err) {
128 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
129 have_vcpu_info_placement = 0;
130 } else {
131 /* This cpu is using the registered vcpu info, even if
132 later ones fail to. */
133 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 134
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135 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
136 cpu, vcpup);
137 }
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138}
139
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140/*
141 * On restore, set the vcpu placement up again.
142 * If it fails, then we're in a bad state, since
143 * we can't back out from using it...
144 */
145void xen_vcpu_restore(void)
146{
147 if (have_vcpu_info_placement) {
148 int cpu;
149
150 for_each_online_cpu(cpu) {
151 bool other_cpu = (cpu != smp_processor_id());
152
153 if (other_cpu &&
154 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
155 BUG();
156
157 xen_vcpu_setup(cpu);
158
159 if (other_cpu &&
160 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
161 BUG();
162 }
163
164 BUG_ON(!have_vcpu_info_placement);
165 }
166}
167
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168static void __init xen_banner(void)
169{
170 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 171 pv_info.name);
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172 printk(KERN_INFO "Hypervisor signature: %s%s\n",
173 xen_start_info->magic,
174 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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175}
176
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177static void xen_cpuid(unsigned int *ax, unsigned int *bx,
178 unsigned int *cx, unsigned int *dx)
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179{
180 unsigned maskedx = ~0;
181
182 /*
183 * Mask out inconvenient features, to try and disable as many
184 * unsupported kernel subsystems as possible.
185 */
65ea5b03 186 if (*ax == 1)
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187 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
188 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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189 (1 << X86_FEATURE_MCE) | /* disable MCE */
190 (1 << X86_FEATURE_MCA) | /* disable MCA */
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191 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
192
193 asm(XEN_EMULATE_PREFIX "cpuid"
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PA
194 : "=a" (*ax),
195 "=b" (*bx),
196 "=c" (*cx),
197 "=d" (*dx)
198 : "0" (*ax), "2" (*cx));
199 *dx &= maskedx;
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200}
201
202static void xen_set_debugreg(int reg, unsigned long val)
203{
204 HYPERVISOR_set_debugreg(reg, val);
205}
206
207static unsigned long xen_get_debugreg(int reg)
208{
209 return HYPERVISOR_get_debugreg(reg);
210}
211
212static unsigned long xen_save_fl(void)
213{
214 struct vcpu_info *vcpu;
215 unsigned long flags;
216
5ead97c8 217 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 218
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219 /* flag has opposite sense of mask */
220 flags = !vcpu->evtchn_upcall_mask;
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221
222 /* convert to IF type flag
223 -0 -> 0x00000000
224 -1 -> 0xffffffff
225 */
226 return (-flags) & X86_EFLAGS_IF;
227}
228
229static void xen_restore_fl(unsigned long flags)
230{
231 struct vcpu_info *vcpu;
232
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233 /* convert from IF type flag */
234 flags = !(flags & X86_EFLAGS_IF);
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235
236 /* There's a one instruction preempt window here. We need to
237 make sure we're don't switch CPUs between getting the vcpu
238 pointer and updating the mask. */
239 preempt_disable();
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240 vcpu = x86_read_percpu(xen_vcpu);
241 vcpu->evtchn_upcall_mask = flags;
f120f13e 242 preempt_enable_no_resched();
5ead97c8 243
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244 /* Doesn't matter if we get preempted here, because any
245 pending event will get dealt with anyway. */
5ead97c8 246
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247 if (flags == 0) {
248 preempt_check_resched();
249 barrier(); /* unmask then check (avoid races) */
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250 if (unlikely(vcpu->evtchn_upcall_pending))
251 force_evtchn_callback();
f120f13e 252 }
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253}
254
255static void xen_irq_disable(void)
256{
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257 /* There's a one instruction preempt window here. We need to
258 make sure we're don't switch CPUs between getting the vcpu
259 pointer and updating the mask. */
5ead97c8 260 preempt_disable();
f120f13e 261 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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262 preempt_enable_no_resched();
263}
264
265static void xen_irq_enable(void)
266{
267 struct vcpu_info *vcpu;
268
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269 /* We don't need to worry about being preempted here, since
270 either a) interrupts are disabled, so no preemption, or b)
271 the caller is confused and is trying to re-enable interrupts
272 on an indeterminate processor. */
273
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274 vcpu = x86_read_percpu(xen_vcpu);
275 vcpu->evtchn_upcall_mask = 0;
276
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277 /* Doesn't matter if we get preempted here, because any
278 pending event will get dealt with anyway. */
5ead97c8 279
f120f13e 280 barrier(); /* unmask then check (avoid races) */
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281 if (unlikely(vcpu->evtchn_upcall_pending))
282 force_evtchn_callback();
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283}
284
285static void xen_safe_halt(void)
286{
287 /* Blocking includes an implicit local_irq_enable(). */
349c709f 288 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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289 BUG();
290}
291
292static void xen_halt(void)
293{
294 if (irqs_disabled())
295 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
296 else
297 xen_safe_halt();
298}
299
8965c1c0 300static void xen_leave_lazy(void)
5ead97c8 301{
8965c1c0 302 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 303 xen_mc_flush();
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304}
305
306static unsigned long xen_store_tr(void)
307{
308 return 0;
309}
310
311static void xen_set_ldt(const void *addr, unsigned entries)
312{
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313 struct mmuext_op *op;
314 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
315
316 op = mcs.args;
317 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 318 op->arg1.linear_addr = (unsigned long)addr;
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319 op->arg2.nr_ents = entries;
320
321 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
322
323 xen_mc_issue(PARAVIRT_LAZY_CPU);
324}
325
6b68f01b 326static void xen_load_gdt(const struct desc_ptr *dtr)
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327{
328 unsigned long *frames;
329 unsigned long va = dtr->address;
330 unsigned int size = dtr->size + 1;
331 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
332 int f;
333 struct multicall_space mcs;
334
335 /* A GDT can be up to 64k in size, which corresponds to 8192
336 8-byte entries, or 16 4k pages.. */
337
338 BUG_ON(size > 65536);
339 BUG_ON(va & ~PAGE_MASK);
340
341 mcs = xen_mc_entry(sizeof(*frames) * pages);
342 frames = mcs.args;
343
344 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
345 frames[f] = virt_to_mfn(va);
346 make_lowmem_page_readonly((void *)va);
347 }
348
349 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
350
351 xen_mc_issue(PARAVIRT_LAZY_CPU);
352}
353
354static void load_TLS_descriptor(struct thread_struct *t,
355 unsigned int cpu, unsigned int i)
356{
357 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
358 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
359 struct multicall_space mc = __xen_mc_entry(0);
360
361 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
362}
363
364static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
365{
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366 /*
367 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
368 * it means we're in a context switch, and %gs has just been
369 * saved. This means we can zero it out to prevent faults on
370 * exit from the hypervisor if the next process has no %gs.
371 * Either way, it has been saved, and the new value will get
372 * loaded properly. This will go away as soon as Xen has been
373 * modified to not save/restore %gs for normal hypercalls.
8a95408e
EH
374 *
375 * On x86_64, this hack is not used for %gs, because gs points
376 * to KERNEL_GS_BASE (and uses it for PDA references), so we
377 * must not zero %gs on x86_64
378 *
379 * For x86_64, we need to zero %fs, otherwise we may get an
380 * exception between the new %fs descriptor being loaded and
381 * %fs being effectively cleared at __switch_to().
8b84ad94 382 */
8a95408e
EH
383 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
384#ifdef CONFIG_X86_32
8b84ad94 385 loadsegment(gs, 0);
8a95408e
EH
386#else
387 loadsegment(fs, 0);
388#endif
389 }
390
391 xen_mc_batch();
392
393 load_TLS_descriptor(t, cpu, 0);
394 load_TLS_descriptor(t, cpu, 1);
395 load_TLS_descriptor(t, cpu, 2);
396
397 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
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398}
399
a8fc1089
EH
400#ifdef CONFIG_X86_64
401static void xen_load_gs_index(unsigned int idx)
402{
403 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
404 BUG();
405}
406#endif
407
5ead97c8 408static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 409 const void *ptr)
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410{
411 unsigned long lp = (unsigned long)&dt[entrynum];
412 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 413 u64 entry = *(u64 *)ptr;
5ead97c8 414
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415 preempt_disable();
416
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417 xen_mc_flush();
418 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
419 BUG();
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420
421 preempt_enable();
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422}
423
e176d367 424static int cvt_gate_to_trap(int vector, const gate_desc *val,
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425 struct trap_info *info)
426{
e176d367 427 if (val->type != 0xf && val->type != 0xe)
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428 return 0;
429
430 info->vector = vector;
e176d367
EH
431 info->address = gate_offset(*val);
432 info->cs = gate_segment(*val);
433 info->flags = val->dpl;
5ead97c8 434 /* interrupt gates clear IF */
e176d367 435 if (val->type == 0xe)
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436 info->flags |= 4;
437
438 return 1;
439}
440
441/* Locations of each CPU's IDT */
6b68f01b 442static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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443
444/* Set an IDT entry. If the entry is part of the current IDT, then
445 also update Xen. */
8d947344 446static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 447{
5ead97c8 448 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
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449 unsigned long start, end;
450
451 preempt_disable();
452
453 start = __get_cpu_var(idt_desc).address;
454 end = start + __get_cpu_var(idt_desc).size + 1;
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455
456 xen_mc_flush();
457
8d947344 458 native_write_idt_entry(dt, entrynum, g);
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459
460 if (p >= start && (p + 8) <= end) {
461 struct trap_info info[2];
462
463 info[1].address = 0;
464
e176d367 465 if (cvt_gate_to_trap(entrynum, g, &info[0]))
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466 if (HYPERVISOR_set_trap_table(info))
467 BUG();
468 }
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469
470 preempt_enable();
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471}
472
6b68f01b 473static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 474 struct trap_info *traps)
5ead97c8 475{
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476 unsigned in, out, count;
477
e176d367 478 count = (desc->size+1) / sizeof(gate_desc);
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479 BUG_ON(count > 256);
480
5ead97c8 481 for (in = out = 0; in < count; in++) {
e176d367 482 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 483
e176d367 484 if (cvt_gate_to_trap(in, entry, &traps[out]))
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485 out++;
486 }
487 traps[out].address = 0;
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488}
489
490void xen_copy_trap_info(struct trap_info *traps)
491{
6b68f01b 492 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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493
494 xen_convert_trap_info(desc, traps);
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495}
496
497/* Load a new IDT into Xen. In principle this can be per-CPU, so we
498 hold a spinlock to protect the static traps[] array (static because
499 it avoids allocation, and saves stack space). */
6b68f01b 500static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
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501{
502 static DEFINE_SPINLOCK(lock);
503 static struct trap_info traps[257];
f87e4cac
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504
505 spin_lock(&lock);
506
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507 __get_cpu_var(idt_desc) = *desc;
508
f87e4cac 509 xen_convert_trap_info(desc, traps);
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510
511 xen_mc_flush();
512 if (HYPERVISOR_set_trap_table(traps))
513 BUG();
514
515 spin_unlock(&lock);
516}
517
518/* Write a GDT descriptor entry. Ignore LDT descriptors, since
519 they're handled differently. */
520static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 521 const void *desc, int type)
5ead97c8 522{
f120f13e
JF
523 preempt_disable();
524
014b15be
GOC
525 switch (type) {
526 case DESC_LDT:
527 case DESC_TSS:
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528 /* ignore */
529 break;
530
531 default: {
532 xmaddr_t maddr = virt_to_machine(&dt[entry]);
5ead97c8
JF
533
534 xen_mc_flush();
014b15be 535 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
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536 BUG();
537 }
538
539 }
f120f13e
JF
540
541 preempt_enable();
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542}
543
faca6227 544static void xen_load_sp0(struct tss_struct *tss,
f120f13e 545 struct thread_struct *thread)
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546{
547 struct multicall_space mcs = xen_mc_entry(0);
faca6227 548 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
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549 xen_mc_issue(PARAVIRT_LAZY_CPU);
550}
551
552static void xen_set_iopl_mask(unsigned mask)
553{
554 struct physdev_set_iopl set_iopl;
555
556 /* Force the change at ring 0. */
557 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
558 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
559}
560
561static void xen_io_delay(void)
562{
563}
564
565#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 566static u32 xen_apic_read(unsigned long reg)
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567{
568 return 0;
569}
f87e4cac 570
42e0a9aa 571static void xen_apic_write(unsigned long reg, u32 val)
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JF
572{
573 /* Warn to see if there's any stray references */
574 WARN_ON(1);
575}
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576#endif
577
578static void xen_flush_tlb(void)
579{
d66bf8fc 580 struct mmuext_op *op;
41e332b2
JF
581 struct multicall_space mcs;
582
583 preempt_disable();
584
585 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 586
d66bf8fc
JF
587 op = mcs.args;
588 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
589 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
590
591 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
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592
593 preempt_enable();
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594}
595
596static void xen_flush_tlb_single(unsigned long addr)
597{
d66bf8fc 598 struct mmuext_op *op;
41e332b2
JF
599 struct multicall_space mcs;
600
601 preempt_disable();
5ead97c8 602
41e332b2 603 mcs = xen_mc_entry(sizeof(*op));
d66bf8fc
JF
604 op = mcs.args;
605 op->cmd = MMUEXT_INVLPG_LOCAL;
606 op->arg1.linear_addr = addr & PAGE_MASK;
607 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
608
609 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
610
611 preempt_enable();
5ead97c8
JF
612}
613
f87e4cac
JF
614static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
615 unsigned long va)
616{
d66bf8fc
JF
617 struct {
618 struct mmuext_op op;
619 cpumask_t mask;
620 } *args;
f87e4cac 621 cpumask_t cpumask = *cpus;
d66bf8fc 622 struct multicall_space mcs;
f87e4cac
JF
623
624 /*
625 * A couple of (to be removed) sanity checks:
626 *
627 * - current CPU must not be in mask
628 * - mask must exist :)
629 */
630 BUG_ON(cpus_empty(cpumask));
631 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
632 BUG_ON(!mm);
633
634 /* If a CPU which we ran on has gone down, OK. */
635 cpus_and(cpumask, cpumask, cpu_online_map);
636 if (cpus_empty(cpumask))
637 return;
638
d66bf8fc
JF
639 mcs = xen_mc_entry(sizeof(*args));
640 args = mcs.args;
641 args->mask = cpumask;
642 args->op.arg2.vcpumask = &args->mask;
643
f87e4cac 644 if (va == TLB_FLUSH_ALL) {
d66bf8fc 645 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 646 } else {
d66bf8fc
JF
647 args->op.cmd = MMUEXT_INVLPG_MULTI;
648 args->op.arg1.linear_addr = va;
f87e4cac
JF
649 }
650
d66bf8fc
JF
651 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
652
653 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
654}
655
7b1333aa
JF
656static void xen_clts(void)
657{
658 struct multicall_space mcs;
659
660 mcs = xen_mc_entry(0);
661
662 MULTI_fpu_taskswitch(mcs.mc, 0);
663
664 xen_mc_issue(PARAVIRT_LAZY_CPU);
665}
666
667static void xen_write_cr0(unsigned long cr0)
668{
669 struct multicall_space mcs;
670
671 /* Only pay attention to cr0.TS; everything else is
672 ignored. */
673 mcs = xen_mc_entry(0);
674
675 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
676
677 xen_mc_issue(PARAVIRT_LAZY_CPU);
678}
679
60223a32
JF
680static void xen_write_cr2(unsigned long cr2)
681{
682 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
683}
684
5ead97c8
JF
685static unsigned long xen_read_cr2(void)
686{
687 return x86_read_percpu(xen_vcpu)->arch.cr2;
688}
689
60223a32
JF
690static unsigned long xen_read_cr2_direct(void)
691{
692 return x86_read_percpu(xen_vcpu_info.arch.cr2);
693}
694
5ead97c8
JF
695static void xen_write_cr4(unsigned long cr4)
696{
2956a351
JF
697 cr4 &= ~X86_CR4_PGE;
698 cr4 &= ~X86_CR4_PSE;
699
700 native_write_cr4(cr4);
5ead97c8
JF
701}
702
5ead97c8
JF
703static unsigned long xen_read_cr3(void)
704{
705 return x86_read_percpu(xen_cr3);
706}
707
9f79991d
JF
708static void set_current_cr3(void *v)
709{
710 x86_write_percpu(xen_current_cr3, (unsigned long)v);
711}
712
d6182fbf 713static void __xen_write_cr3(bool kernel, unsigned long cr3)
5ead97c8 714{
9f79991d
JF
715 struct mmuext_op *op;
716 struct multicall_space mcs;
d6182fbf 717 unsigned long mfn;
9f79991d 718
d6182fbf
JF
719 if (cr3)
720 mfn = pfn_to_mfn(PFN_DOWN(cr3));
721 else
722 mfn = 0;
f120f13e 723
d6182fbf 724 WARN_ON(mfn == 0 && kernel);
5ead97c8 725
d6182fbf 726 mcs = __xen_mc_entry(sizeof(*op));
5ead97c8 727
9f79991d 728 op = mcs.args;
d6182fbf 729 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
9f79991d 730 op->arg1.mfn = mfn;
5ead97c8 731
9f79991d 732 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 733
d6182fbf
JF
734 if (kernel) {
735 x86_write_percpu(xen_cr3, cr3);
736
737 /* Update xen_current_cr3 once the batch has actually
738 been submitted. */
739 xen_mc_callback(set_current_cr3, (void *)cr3);
740 }
741}
742
743static void xen_write_cr3(unsigned long cr3)
744{
745 BUG_ON(preemptible());
746
747 xen_mc_batch(); /* disables interrupts */
748
749 /* Update while interrupts are disabled, so its atomic with
750 respect to ipis */
751 x86_write_percpu(xen_cr3, cr3);
752
753 __xen_write_cr3(true, cr3);
754
755#ifdef CONFIG_X86_64
756 {
757 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
758 if (user_pgd)
759 __xen_write_cr3(false, __pa(user_pgd));
760 else
761 __xen_write_cr3(false, 0);
762 }
763#endif
5ead97c8 764
9f79991d 765 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
766}
767
f4f97b3e
JF
768/* Early in boot, while setting up the initial pagetable, assume
769 everything is pinned. */
6944a9c8 770static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 771{
af7ae3b9 772#ifdef CONFIG_FLATMEM
f4f97b3e 773 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 774#endif
5ead97c8
JF
775 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
776}
777
6944a9c8 778/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 779 only init_mm and anything attached to that is pinned. */
6944a9c8 780static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
781{
782 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
783}
784
f6433706 785static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
786{
787 struct mmuext_op op;
f6433706 788 op.cmd = cmd;
74260714
JF
789 op.arg1.mfn = pfn_to_mfn(pfn);
790 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
791 BUG();
792}
793
f4f97b3e
JF
794/* This needs to make sure the new pte page is pinned iff its being
795 attached to a pinned pagetable. */
1c70e9bd 796static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 797{
f4f97b3e 798 struct page *page = pfn_to_page(pfn);
5ead97c8 799
f4f97b3e
JF
800 if (PagePinned(virt_to_page(mm->pgd))) {
801 SetPagePinned(page);
802
74260714 803 if (!PageHighMem(page)) {
f4f97b3e 804 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
805 if (level == PT_PTE)
806 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 807 } else
f4f97b3e
JF
808 /* make sure there are no stray mappings of
809 this page */
810 kmap_flush_unused();
811 }
5ead97c8
JF
812}
813
6944a9c8 814static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 815{
f6433706 816 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
817}
818
6944a9c8 819static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 820{
f6433706 821 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
822}
823
d6182fbf
JF
824static int xen_pgd_alloc(struct mm_struct *mm)
825{
826 pgd_t *pgd = mm->pgd;
827 int ret = 0;
828
829 BUG_ON(PagePinned(virt_to_page(pgd)));
830
831#ifdef CONFIG_X86_64
832 {
833 struct page *page = virt_to_page(pgd);
834
835 BUG_ON(page->private != 0);
836
837 page->private = __get_free_page(GFP_KERNEL | __GFP_ZERO);
838 if (page->private == 0)
839 ret = -ENOMEM;
840
841 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
842 }
843#endif
844
845 return ret;
846}
847
848static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
849{
850#ifdef CONFIG_X86_64
851 pgd_t *user_pgd = xen_get_user_pgd(pgd);
852
853 if (user_pgd)
854 free_page((unsigned long)user_pgd);
855#endif
856}
857
f4f97b3e 858/* This should never happen until we're OK to use struct page */
f6433706 859static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 860{
f4f97b3e
JF
861 struct page *page = pfn_to_page(pfn);
862
863 if (PagePinned(page)) {
74260714 864 if (!PageHighMem(page)) {
a684d69d
MM
865 if (level == PT_PTE)
866 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 867 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 868 }
c946c7de 869 ClearPagePinned(page);
f4f97b3e 870 }
5ead97c8
JF
871}
872
6944a9c8 873static void xen_release_pte(u32 pfn)
f6433706
MM
874{
875 xen_release_ptpage(pfn, PT_PTE);
876}
877
6944a9c8 878static void xen_release_pmd(u32 pfn)
f6433706
MM
879{
880 xen_release_ptpage(pfn, PT_PMD);
881}
882
f6e58732
JF
883#if PAGETABLE_LEVELS == 4
884static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
885{
886 xen_alloc_ptpage(mm, pfn, PT_PUD);
887}
888
889static void xen_release_pud(u32 pfn)
890{
891 xen_release_ptpage(pfn, PT_PUD);
892}
893#endif
894
f4f97b3e
JF
895#ifdef CONFIG_HIGHPTE
896static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 897{
f4f97b3e
JF
898 pgprot_t prot = PAGE_KERNEL;
899
900 if (PagePinned(page))
901 prot = PAGE_KERNEL_RO;
902
903 if (0 && PageHighMem(page))
904 printk("mapping highpte %lx type %d prot %s\n",
905 page_to_pfn(page), type,
906 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
907
908 return kmap_atomic_prot(page, type, prot);
5ead97c8 909}
f4f97b3e 910#endif
5ead97c8 911
9a4029fd
JF
912static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
913{
914 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
915 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
916 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
917 pte_val_ma(pte));
918
919 return pte;
920}
921
922/* Init-time set_pte while constructing initial pagetables, which
923 doesn't allow RO pagetable pages to be remapped RW */
924static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
925{
926 pte = mask_rw_pte(ptep, pte);
927
928 xen_set_pte(ptep, pte);
929}
930
5ead97c8
JF
931static __init void xen_pagetable_setup_start(pgd_t *base)
932{
5ead97c8
JF
933}
934
0e91398f 935void xen_setup_shared_info(void)
5ead97c8
JF
936{
937 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
938 set_fixmap(FIX_PARAVIRT_BOOTMAP,
939 xen_start_info->shared_info);
940
941 HYPERVISOR_shared_info =
942 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
943 } else
944 HYPERVISOR_shared_info =
945 (struct shared_info *)__va(xen_start_info->shared_info);
946
2e8fe719
JF
947#ifndef CONFIG_SMP
948 /* In UP this is as good a place as any to set up shared info */
949 xen_setup_vcpu_info_placement();
950#endif
d5edbc1f
JF
951
952 xen_setup_mfn_list_list();
2e8fe719
JF
953}
954
955static __init void xen_pagetable_setup_done(pgd_t *base)
956{
0e91398f 957 xen_setup_shared_info();
60223a32 958}
5ead97c8 959
e2426cf8
JF
960static __init void xen_post_allocator_init(void)
961{
8745f8b0 962 pv_mmu_ops.set_pte = xen_set_pte;
e2426cf8
JF
963 pv_mmu_ops.set_pmd = xen_set_pmd;
964 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
965#if PAGETABLE_LEVELS == 4
966 pv_mmu_ops.set_pgd = xen_set_pgd;
967#endif
e2426cf8 968
8745f8b0
JF
969 /* This will work as long as patching hasn't happened yet
970 (which it hasn't) */
971 pv_mmu_ops.alloc_pte = xen_alloc_pte;
972 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
973 pv_mmu_ops.release_pte = xen_release_pte;
974 pv_mmu_ops.release_pmd = xen_release_pmd;
975#if PAGETABLE_LEVELS == 4
976 pv_mmu_ops.alloc_pud = xen_alloc_pud;
977 pv_mmu_ops.release_pud = xen_release_pud;
978#endif
979
e2426cf8
JF
980 xen_mark_init_mm_pinned();
981}
982
60223a32 983/* This is called once we have the cpu_possible_map */
0e91398f 984void xen_setup_vcpu_info_placement(void)
60223a32
JF
985{
986 int cpu;
987
988 for_each_possible_cpu(cpu)
989 xen_vcpu_setup(cpu);
990
991 /* xen_vcpu_setup managed to place the vcpu_info within the
992 percpu area for all cpus, so make use of it */
5b09b287 993#ifdef CONFIG_X86_32
60223a32
JF
994 if (have_vcpu_info_placement) {
995 printk(KERN_INFO "Xen: using vcpu_info placement\n");
996
93b1eab3
JF
997 pv_irq_ops.save_fl = xen_save_fl_direct;
998 pv_irq_ops.restore_fl = xen_restore_fl_direct;
999 pv_irq_ops.irq_disable = xen_irq_disable_direct;
1000 pv_irq_ops.irq_enable = xen_irq_enable_direct;
1001 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1002 }
5b09b287 1003#endif
5ead97c8
JF
1004}
1005
ab144f5e
AK
1006static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1007 unsigned long addr, unsigned len)
6487673b
JF
1008{
1009 char *start, *end, *reloc;
1010 unsigned ret;
1011
1012 start = end = reloc = NULL;
1013
93b1eab3
JF
1014#define SITE(op, x) \
1015 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1016 if (have_vcpu_info_placement) { \
1017 start = (char *)xen_##x##_direct; \
1018 end = xen_##x##_direct_end; \
1019 reloc = xen_##x##_direct_reloc; \
1020 } \
1021 goto patch_site
1022
1023 switch (type) {
5b09b287 1024#ifdef CONFIG_X86_32
93b1eab3
JF
1025 SITE(pv_irq_ops, irq_enable);
1026 SITE(pv_irq_ops, irq_disable);
1027 SITE(pv_irq_ops, save_fl);
1028 SITE(pv_irq_ops, restore_fl);
5b09b287 1029#endif /* CONFIG_X86_32 */
6487673b
JF
1030#undef SITE
1031
1032 patch_site:
1033 if (start == NULL || (end-start) > len)
1034 goto default_patch;
1035
ab144f5e 1036 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1037
1038 /* Note: because reloc is assigned from something that
1039 appears to be an array, gcc assumes it's non-null,
1040 but doesn't know its relationship with start and
1041 end. */
1042 if (reloc > start && reloc < end) {
1043 int reloc_off = reloc - start;
ab144f5e
AK
1044 long *relocp = (long *)(insnbuf + reloc_off);
1045 long delta = start - (char *)addr;
6487673b
JF
1046
1047 *relocp += delta;
1048 }
1049 break;
1050
1051 default_patch:
1052 default:
ab144f5e
AK
1053 ret = paravirt_patch_default(type, clobbers, insnbuf,
1054 addr, len);
6487673b
JF
1055 break;
1056 }
1057
1058 return ret;
1059}
1060
aeaaa59c
JF
1061static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1062{
1063 pte_t pte;
1064
1065 phys >>= PAGE_SHIFT;
1066
1067 switch (idx) {
1068 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1069#ifdef CONFIG_X86_F00F_BUG
1070 case FIX_F00F_IDT:
1071#endif
15664f96 1072#ifdef CONFIG_X86_32
aeaaa59c
JF
1073 case FIX_WP_TEST:
1074 case FIX_VDSO:
15664f96
JF
1075 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1076#else
1077 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1078#endif
aeaaa59c
JF
1079#ifdef CONFIG_X86_LOCAL_APIC
1080 case FIX_APIC_BASE: /* maps dummy local APIC */
1081#endif
1082 pte = pfn_pte(phys, prot);
1083 break;
1084
1085 default:
1086 pte = mfn_pte(phys, prot);
1087 break;
1088 }
1089
1090 __native_set_fixmap(idx, pte);
1091}
1092
93b1eab3 1093static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1094 .paravirt_enabled = 1,
1095 .shared_kernel_pmd = 0,
1096
1097 .name = "Xen",
93b1eab3 1098};
5ead97c8 1099
93b1eab3 1100static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1101 .patch = xen_patch,
5ead97c8 1102
93b1eab3 1103 .banner = xen_banner,
5ead97c8
JF
1104 .memory_setup = xen_memory_setup,
1105 .arch_setup = xen_arch_setup,
e2426cf8 1106 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1107};
5ead97c8 1108
93b1eab3 1109static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1110 .time_init = xen_time_init,
93b1eab3 1111
15c84731
JF
1112 .set_wallclock = xen_set_wallclock,
1113 .get_wallclock = xen_get_wallclock,
e93ef949 1114 .get_tsc_khz = xen_tsc_khz,
ab550288 1115 .sched_clock = xen_sched_clock,
93b1eab3 1116};
15c84731 1117
93b1eab3 1118static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1119 .cpuid = xen_cpuid,
1120
1121 .set_debugreg = xen_set_debugreg,
1122 .get_debugreg = xen_get_debugreg,
1123
7b1333aa 1124 .clts = xen_clts,
5ead97c8
JF
1125
1126 .read_cr0 = native_read_cr0,
7b1333aa 1127 .write_cr0 = xen_write_cr0,
5ead97c8 1128
5ead97c8
JF
1129 .read_cr4 = native_read_cr4,
1130 .read_cr4_safe = native_read_cr4_safe,
1131 .write_cr4 = xen_write_cr4,
1132
5ead97c8
JF
1133 .wbinvd = native_wbinvd,
1134
1135 .read_msr = native_read_msr_safe,
1136 .write_msr = native_write_msr_safe,
1137 .read_tsc = native_read_tsc,
1138 .read_pmc = native_read_pmc,
1139
81e103f1 1140 .iret = xen_iret,
d75cd22f 1141 .irq_enable_sysexit = xen_sysexit,
5ead97c8
JF
1142
1143 .load_tr_desc = paravirt_nop,
1144 .set_ldt = xen_set_ldt,
1145 .load_gdt = xen_load_gdt,
1146 .load_idt = xen_load_idt,
1147 .load_tls = xen_load_tls,
a8fc1089
EH
1148#ifdef CONFIG_X86_64
1149 .load_gs_index = xen_load_gs_index,
1150#endif
5ead97c8
JF
1151
1152 .store_gdt = native_store_gdt,
1153 .store_idt = native_store_idt,
1154 .store_tr = xen_store_tr,
1155
1156 .write_ldt_entry = xen_write_ldt_entry,
1157 .write_gdt_entry = xen_write_gdt_entry,
1158 .write_idt_entry = xen_write_idt_entry,
faca6227 1159 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1160
1161 .set_iopl_mask = xen_set_iopl_mask,
1162 .io_delay = xen_io_delay,
1163
952d1d70
JF
1164 /* Xen takes care of %gs when switching to usermode for us */
1165 .swapgs = paravirt_nop,
1166
8965c1c0
JF
1167 .lazy_mode = {
1168 .enter = paravirt_enter_lazy_cpu,
1169 .leave = xen_leave_lazy,
1170 },
93b1eab3
JF
1171};
1172
0725cbb9
JF
1173static void __init __xen_init_IRQ(void)
1174{
1175#ifdef CONFIG_X86_64
1176 int i;
1177
1178 /* Create identity vector->irq map */
1179 for(i = 0; i < NR_VECTORS; i++) {
1180 int cpu;
1181
1182 for_each_possible_cpu(cpu)
1183 per_cpu(vector_irq, cpu)[i] = i;
1184 }
1185#endif /* CONFIG_X86_64 */
1186
1187 xen_init_IRQ();
1188}
1189
93b1eab3 1190static const struct pv_irq_ops xen_irq_ops __initdata = {
0725cbb9 1191 .init_IRQ = __xen_init_IRQ,
93b1eab3
JF
1192 .save_fl = xen_save_fl,
1193 .restore_fl = xen_restore_fl,
1194 .irq_disable = xen_irq_disable,
1195 .irq_enable = xen_irq_enable,
1196 .safe_halt = xen_safe_halt,
1197 .halt = xen_halt,
fab58420 1198#ifdef CONFIG_X86_64
997409d3 1199 .adjust_exception_frame = xen_adjust_exception_frame,
fab58420 1200#endif
93b1eab3 1201};
5ead97c8 1202
93b1eab3 1203static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1204#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac
JF
1205 .apic_write = xen_apic_write,
1206 .apic_write_atomic = xen_apic_write,
5ead97c8
JF
1207 .apic_read = xen_apic_read,
1208 .setup_boot_clock = paravirt_nop,
1209 .setup_secondary_clock = paravirt_nop,
1210 .startup_ipi_hook = paravirt_nop,
1211#endif
93b1eab3
JF
1212};
1213
1214static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1215 .pagetable_setup_start = xen_pagetable_setup_start,
1216 .pagetable_setup_done = xen_pagetable_setup_done,
1217
1218 .read_cr2 = xen_read_cr2,
1219 .write_cr2 = xen_write_cr2,
1220
1221 .read_cr3 = xen_read_cr3,
1222 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1223
1224 .flush_tlb_user = xen_flush_tlb,
1225 .flush_tlb_kernel = xen_flush_tlb,
1226 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1227 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1228
1229 .pte_update = paravirt_nop,
1230 .pte_update_defer = paravirt_nop,
1231
d6182fbf
JF
1232 .pgd_alloc = xen_pgd_alloc,
1233 .pgd_free = xen_pgd_free,
eba0045f 1234
6944a9c8
JF
1235 .alloc_pte = xen_alloc_pte_init,
1236 .release_pte = xen_release_pte_init,
1237 .alloc_pmd = xen_alloc_pte_init,
1238 .alloc_pmd_clone = paravirt_nop,
1239 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1240
1241#ifdef CONFIG_HIGHPTE
1242 .kmap_atomic_pte = xen_kmap_atomic_pte,
1243#endif
5ead97c8 1244
22911b3f
JF
1245#ifdef CONFIG_X86_64
1246 .set_pte = xen_set_pte,
1247#else
851fa3c4 1248 .set_pte = xen_set_pte_init,
22911b3f 1249#endif
3b827c1b 1250 .set_pte_at = xen_set_pte_at,
e2426cf8 1251 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1252
08b882c6
JF
1253 .ptep_modify_prot_start = __ptep_modify_prot_start,
1254 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1255
3b827c1b 1256 .pte_val = xen_pte_val,
a15af1c9 1257 .pte_flags = native_pte_val,
3b827c1b
JF
1258 .pgd_val = xen_pgd_val,
1259
1260 .make_pte = xen_make_pte,
1261 .make_pgd = xen_make_pgd,
1262
f6e58732 1263#ifdef CONFIG_X86_PAE
3b827c1b
JF
1264 .set_pte_atomic = xen_set_pte_atomic,
1265 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1266 .pte_clear = xen_pte_clear,
1267 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1268#endif /* CONFIG_X86_PAE */
1269 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1270
1271 .make_pmd = xen_make_pmd,
1272 .pmd_val = xen_pmd_val,
3b827c1b 1273
f6e58732
JF
1274#if PAGETABLE_LEVELS == 4
1275 .pud_val = xen_pud_val,
1276 .make_pud = xen_make_pud,
1277 .set_pgd = xen_set_pgd_hyper,
1278
1279 .alloc_pud = xen_alloc_pte_init,
1280 .release_pud = xen_release_pte_init,
1281#endif /* PAGETABLE_LEVELS == 4 */
1282
3b827c1b
JF
1283 .activate_mm = xen_activate_mm,
1284 .dup_mmap = xen_dup_mmap,
1285 .exit_mmap = xen_exit_mmap,
1286
8965c1c0
JF
1287 .lazy_mode = {
1288 .enter = paravirt_enter_lazy_mmu,
1289 .leave = xen_leave_lazy,
1290 },
aeaaa59c
JF
1291
1292 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1293};
1294
fefa629a
JF
1295static void xen_reboot(int reason)
1296{
349c709f
JF
1297 struct sched_shutdown r = { .reason = reason };
1298
fefa629a
JF
1299#ifdef CONFIG_SMP
1300 smp_send_stop();
1301#endif
1302
349c709f 1303 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1304 BUG();
1305}
1306
1307static void xen_restart(char *msg)
1308{
1309 xen_reboot(SHUTDOWN_reboot);
1310}
1311
1312static void xen_emergency_restart(void)
1313{
1314 xen_reboot(SHUTDOWN_reboot);
1315}
1316
1317static void xen_machine_halt(void)
1318{
1319 xen_reboot(SHUTDOWN_poweroff);
1320}
1321
1322static void xen_crash_shutdown(struct pt_regs *regs)
1323{
1324 xen_reboot(SHUTDOWN_crash);
1325}
1326
1327static const struct machine_ops __initdata xen_machine_ops = {
1328 .restart = xen_restart,
1329 .halt = xen_machine_halt,
1330 .power_off = xen_machine_halt,
1331 .shutdown = xen_machine_halt,
1332 .crash_shutdown = xen_crash_shutdown,
1333 .emergency_restart = xen_emergency_restart,
1334};
1335
6487673b 1336
fb1d8404
JF
1337static void __init xen_reserve_top(void)
1338{
f5d36de0 1339#ifdef CONFIG_X86_32
fb1d8404
JF
1340 unsigned long top = HYPERVISOR_VIRT_START;
1341 struct xen_platform_parameters pp;
1342
1343 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1344 top = pp.virt_start;
1345
1346 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1347#endif /* CONFIG_X86_32 */
fb1d8404
JF
1348}
1349
084a2a4e
JF
1350/*
1351 * Like __va(), but returns address in the kernel mapping (which is
1352 * all we have until the physical memory mapping has been set up.
1353 */
1354static void *__ka(phys_addr_t paddr)
1355{
39dbc5bd 1356#ifdef CONFIG_X86_64
084a2a4e 1357 return (void *)(paddr + __START_KERNEL_map);
39dbc5bd
JF
1358#else
1359 return __va(paddr);
1360#endif
084a2a4e
JF
1361}
1362
1363/* Convert a machine address to physical address */
1364static unsigned long m2p(phys_addr_t maddr)
1365{
1366 phys_addr_t paddr;
1367
1368 maddr &= PTE_MASK;
1369 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1370
1371 return paddr;
1372}
1373
1374/* Convert a machine address to kernel virtual */
1375static void *m2v(phys_addr_t maddr)
1376{
1377 return __ka(m2p(maddr));
1378}
1379
39dbc5bd 1380#ifdef CONFIG_X86_64
084a2a4e
JF
1381static void walk(pgd_t *pgd, unsigned long addr)
1382{
1383 unsigned l4idx = pgd_index(addr);
1384 unsigned l3idx = pud_index(addr);
1385 unsigned l2idx = pmd_index(addr);
1386 unsigned l1idx = pte_index(addr);
1387 pgd_t l4;
1388 pud_t l3;
1389 pmd_t l2;
1390 pte_t l1;
1391
1392 xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
1393 pgd, addr, l4idx, l3idx, l2idx, l1idx);
1394
1395 l4 = pgd[l4idx];
1396 xen_raw_printk(" l4: %016lx\n", l4.pgd);
1397 xen_raw_printk(" %016lx\n", pgd_val(l4));
1398
1399 l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
1400 xen_raw_printk(" l3: %016lx\n", l3.pud);
1401 xen_raw_printk(" %016lx\n", pud_val(l3));
1402
1403 l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
1404 xen_raw_printk(" l2: %016lx\n", l2.pmd);
1405 xen_raw_printk(" %016lx\n", pmd_val(l2));
1406
1407 l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
1408 xen_raw_printk(" l1: %016lx\n", l1.pte);
1409 xen_raw_printk(" %016lx\n", pte_val(l1));
1410}
39dbc5bd 1411#endif
084a2a4e
JF
1412
1413static void set_page_prot(void *addr, pgprot_t prot)
1414{
1415 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1416 pte_t pte = pfn_pte(pfn, prot);
1417
39dbc5bd 1418 xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
084a2a4e
JF
1419 addr, pfn, get_phys_to_machine(pfn),
1420 pgprot_val(prot), pte.pte);
1421
1422 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1423 BUG();
1424}
1425
d114e198
JF
1426/*
1427 * Identity map, in addition to plain kernel map. This needs to be
1428 * large enough to allocate page table pages to allocate the rest.
1429 * Each page can map 2MB.
1430 */
1431static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
1432
39dbc5bd 1433static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
d114e198
JF
1434{
1435 unsigned pmdidx, pteidx;
1436 unsigned ident_pte;
1437 unsigned long pfn;
1438
1439 ident_pte = 0;
1440 pfn = 0;
1441 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1442 pte_t *pte_page;
1443
d114e198 1444 /* Reuse or allocate a page of ptes */
39dbc5bd
JF
1445 if (pmd_present(pmd[pmdidx]))
1446 pte_page = m2v(pmd[pmdidx].pmd);
d114e198
JF
1447 else {
1448 /* Check for free pte pages */
1449 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1450 break;
1451
1452 pte_page = &level1_ident_pgt[ident_pte];
1453 ident_pte += PTRS_PER_PTE;
1454
39dbc5bd 1455 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
d114e198
JF
1456 }
1457
1458 /* Install mappings */
1459 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1460 pte_t pte;
1461
1462 if (pfn > max_pfn_mapped)
1463 max_pfn_mapped = pfn;
1464
1465 if (!pte_none(pte_page[pteidx]))
1466 continue;
1467
1468 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1469 pte_page[pteidx] = pte;
1470 }
1471 }
1472
1473 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1474 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
39dbc5bd
JF
1475
1476 set_page_prot(pmd, PAGE_KERNEL_RO);
1477}
1478
1479#ifdef CONFIG_X86_64
1480static void convert_pfn_mfn(void *v)
1481{
1482 pte_t *pte = v;
1483 int i;
1484
1485 /* All levels are converted the same way, so just treat them
1486 as ptes. */
1487 for(i = 0; i < PTRS_PER_PTE; i++)
1488 pte[i] = xen_make_pte(pte[i].pte);
d114e198
JF
1489}
1490
084a2a4e
JF
1491/*
1492 * Set up the inital kernel pagetable.
1493 *
1494 * We can construct this by grafting the Xen provided pagetable into
1495 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1496 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1497 * means that only the kernel has a physical mapping to start with -
1498 * but that's enough to get __va working. We need to fill in the rest
1499 * of the physical mapping once some sort of allocator has been set
1500 * up.
1501 */
d114e198 1502static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1503{
1504 pud_t *l3;
1505 pmd_t *l2;
1506
1507 /* Zap identity mapping */
1508 init_level4_pgt[0] = __pgd(0);
1509
1510 /* Pre-constructed entries are in pfn, so convert to mfn */
1511 convert_pfn_mfn(init_level4_pgt);
1512 convert_pfn_mfn(level3_ident_pgt);
1513 convert_pfn_mfn(level3_kernel_pgt);
1514
1515 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1516 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1517
1518 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1519 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1520
1521 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1522 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1523 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1524
d114e198 1525 /* Set up identity map */
39dbc5bd 1526 xen_map_identity_early(level2_ident_pgt, max_pfn);
d114e198 1527
084a2a4e
JF
1528 /* Make pagetable pieces RO */
1529 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1530 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1531 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
084a2a4e
JF
1532 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1533 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1534
1535 /* Pin down new L4 */
39dbc5bd
JF
1536 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1537 PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1538
1539 /* Unpin Xen-provided one */
1540 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1541
1542 /* Switch over */
1543 pgd = init_level4_pgt;
d6182fbf
JF
1544
1545 /*
1546 * At this stage there can be no user pgd, and no page
1547 * structure to attach it to, so make sure we just set kernel
1548 * pgd.
1549 */
1550 xen_mc_batch();
1551 __xen_write_cr3(true, __pa(pgd));
1552 xen_mc_issue(PARAVIRT_LAZY_CPU);
084a2a4e 1553
d114e198
JF
1554 reserve_early(__pa(xen_start_info->pt_base),
1555 __pa(xen_start_info->pt_base +
1556 xen_start_info->nr_pt_frames * PAGE_SIZE),
1557 "XEN PAGETABLES");
084a2a4e
JF
1558
1559 return pgd;
1560}
39dbc5bd
JF
1561#else /* !CONFIG_X86_64 */
1562static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1563
d114e198 1564static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e 1565{
39dbc5bd
JF
1566 pmd_t *kernel_pmd;
1567
084a2a4e
JF
1568 init_pg_tables_start = __pa(pgd);
1569 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1570 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1571
39dbc5bd
JF
1572 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1573 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
d114e198 1574
39dbc5bd
JF
1575 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1576
1577 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1578 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1579 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1580
1581 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1582 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1583 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1584
1585 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1586
1587 xen_write_cr3(__pa(swapper_pg_dir));
1588
1589 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1590
1591 return swapper_pg_dir;
084a2a4e
JF
1592}
1593#endif /* CONFIG_X86_64 */
1594
5ead97c8
JF
1595/* First C function to be called on Xen boot */
1596asmlinkage void __init xen_start_kernel(void)
1597{
1598 pgd_t *pgd;
1599
1600 if (!xen_start_info)
1601 return;
1602
7999f4b4 1603 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1604
e57778a1
JF
1605 xen_setup_features();
1606
5ead97c8 1607 /* Install Xen paravirt ops */
93b1eab3
JF
1608 pv_info = xen_info;
1609 pv_init_ops = xen_init_ops;
1610 pv_time_ops = xen_time_ops;
1611 pv_cpu_ops = xen_cpu_ops;
1612 pv_irq_ops = xen_irq_ops;
1613 pv_apic_ops = xen_apic_ops;
1614 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1615
e57778a1
JF
1616 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1617 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1618 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1619 }
1620
fefa629a
JF
1621 machine_ops = xen_machine_ops;
1622
f5d36de0
JF
1623#ifdef CONFIG_X86_64
1624 /* Disable until direct per-cpu data access. */
1625 have_vcpu_info_placement = 0;
5b09b287 1626 x86_64_init_pda();
f5d36de0
JF
1627#endif
1628
a9e7062d 1629 xen_smp_init();
5ead97c8 1630
5ead97c8
JF
1631 /* Get mfn list */
1632 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1633 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1634
1635 pgd = (pgd_t *)xen_start_info->pt_base;
1636
084a2a4e
JF
1637 /* Prevent unwanted bits from being set in PTEs. */
1638 __supported_pte_mask &= ~_PAGE_GLOBAL;
1639 if (!is_initial_xendomain())
1640 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1641
1642 /* Don't do the full vcpu_info placement stuff until we have a
1643 possible map and a non-dummy shared_info. */
1644 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1645
1646 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1647 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1648
084a2a4e 1649 init_mm.pgd = pgd;
5ead97c8
JF
1650
1651 /* keep using Xen gdt for now; no urgent need to change it */
1652
93b1eab3 1653 pv_info.kernel_rpl = 1;
5ead97c8 1654 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1655 pv_info.kernel_rpl = 0;
5ead97c8
JF
1656
1657 /* set the limit of our address space */
fb1d8404 1658 xen_reserve_top();
5ead97c8 1659
7d087b68 1660#ifdef CONFIG_X86_32
5ead97c8
JF
1661 /* set up basic CPUID stuff */
1662 cpu_detect(&new_cpu_data);
1663 new_cpu_data.hard_math = 1;
1664 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1665#endif
5ead97c8
JF
1666
1667 /* Poke various useful things into boot_params */
30c82645
PA
1668 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1669 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1670 ? __pa(xen_start_info->mod_start) : 0;
1671 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1672 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1673
9e124fe1 1674 if (!is_initial_xendomain()) {
83abc70a 1675 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1676 add_preferred_console("tty", 0, NULL);
b8c2d3df 1677 add_preferred_console("hvc", 0, NULL);
9e124fe1 1678 }
b8c2d3df 1679
084a2a4e
JF
1680 xen_raw_console_write("about to get started...\n");
1681
1682#if 0
1683 xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
1684 &boot_params, __pa_symbol(&boot_params),
1685 __va(__pa_symbol(&boot_params)));
1686
1687 walk(pgd, &boot_params);
1688 walk(pgd, __va(__pa(&boot_params)));
1689#endif
1690
5ead97c8 1691 /* Start the world */
f5d36de0 1692#ifdef CONFIG_X86_32
f0d43100 1693 i386_start_kernel();
f5d36de0 1694#else
084a2a4e 1695 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1696#endif
5ead97c8 1697}