xen64: add 64-bit assembler
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
36
37#include <asm/paravirt.h>
38#include <asm/page.h>
39#include <asm/xen/hypercall.h>
40#include <asm/xen/hypervisor.h>
41#include <asm/fixmap.h>
42#include <asm/processor.h>
43#include <asm/setup.h>
44#include <asm/desc.h>
45#include <asm/pgtable.h>
f87e4cac 46#include <asm/tlbflush.h>
fefa629a 47#include <asm/reboot.h>
eba0045f 48#include <asm/pgalloc.h>
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49
50#include "xen-ops.h"
3b827c1b 51#include "mmu.h"
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52#include "multicalls.h"
53
54EXPORT_SYMBOL_GPL(hypercall_page);
55
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56DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
57DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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58
59/*
60 * Note about cr3 (pagetable base) values:
61 *
62 * xen_cr3 contains the current logical cr3 value; it contains the
63 * last set cr3. This may not be the current effective cr3, because
64 * its update may be being lazily deferred. However, a vcpu looking
65 * at its own cr3 can use this value knowing that it everything will
66 * be self-consistent.
67 *
68 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
69 * hypercall to set the vcpu cr3 is complete (so it may be a little
70 * out of date, but it will never be set early). If one vcpu is
71 * looking at another vcpu's cr3 value, it should use this variable.
72 */
73DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
74DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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75
76struct start_info *xen_start_info;
77EXPORT_SYMBOL_GPL(xen_start_info);
78
a0d695c8 79struct shared_info xen_dummy_shared_info;
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80
81/*
82 * Point at some empty memory to start with. We map the real shared_info
83 * page as soon as fixmap is up and running.
84 */
a0d695c8 85struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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86
87/*
88 * Flag to determine whether vcpu info placement is available on all
89 * VCPUs. We assume it is to start with, and then set it to zero on
90 * the first failure. This is because it can succeed on some VCPUs
91 * and not others, since it can involve hypervisor memory allocation,
92 * or because the guest failed to guarantee all the appropriate
93 * constraints on all VCPUs (ie buffer can't cross a page boundary).
94 *
95 * Note that any particular CPU may be using a placed vcpu structure,
96 * but we can only optimise if the all are.
97 *
98 * 0: not available, 1: available
99 */
04c44a08 100static int have_vcpu_info_placement = 1;
60223a32 101
9c7a7942 102static void xen_vcpu_setup(int cpu)
5ead97c8 103{
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104 struct vcpu_register_vcpu_info info;
105 int err;
106 struct vcpu_info *vcpup;
107
a0d695c8 108 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 109 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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110
111 if (!have_vcpu_info_placement)
112 return; /* already tested, not available */
113
114 vcpup = &per_cpu(xen_vcpu_info, cpu);
115
116 info.mfn = virt_to_mfn(vcpup);
117 info.offset = offset_in_page(vcpup);
118
e3d26976 119 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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120 cpu, vcpup, info.mfn, info.offset);
121
122 /* Check to see if the hypervisor will put the vcpu_info
123 structure where we want it, which allows direct access via
124 a percpu-variable. */
125 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
126
127 if (err) {
128 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
129 have_vcpu_info_placement = 0;
130 } else {
131 /* This cpu is using the registered vcpu info, even if
132 later ones fail to. */
133 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 134
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135 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
136 cpu, vcpup);
137 }
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138}
139
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140/*
141 * On restore, set the vcpu placement up again.
142 * If it fails, then we're in a bad state, since
143 * we can't back out from using it...
144 */
145void xen_vcpu_restore(void)
146{
147 if (have_vcpu_info_placement) {
148 int cpu;
149
150 for_each_online_cpu(cpu) {
151 bool other_cpu = (cpu != smp_processor_id());
152
153 if (other_cpu &&
154 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
155 BUG();
156
157 xen_vcpu_setup(cpu);
158
159 if (other_cpu &&
160 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
161 BUG();
162 }
163
164 BUG_ON(!have_vcpu_info_placement);
165 }
166}
167
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168static void __init xen_banner(void)
169{
170 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 171 pv_info.name);
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172 printk(KERN_INFO "Hypervisor signature: %s%s\n",
173 xen_start_info->magic,
174 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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175}
176
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177static void xen_cpuid(unsigned int *ax, unsigned int *bx,
178 unsigned int *cx, unsigned int *dx)
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179{
180 unsigned maskedx = ~0;
181
182 /*
183 * Mask out inconvenient features, to try and disable as many
184 * unsupported kernel subsystems as possible.
185 */
65ea5b03 186 if (*ax == 1)
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187 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
188 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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189 (1 << X86_FEATURE_MCE) | /* disable MCE */
190 (1 << X86_FEATURE_MCA) | /* disable MCA */
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191 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
192
193 asm(XEN_EMULATE_PREFIX "cpuid"
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194 : "=a" (*ax),
195 "=b" (*bx),
196 "=c" (*cx),
197 "=d" (*dx)
198 : "0" (*ax), "2" (*cx));
199 *dx &= maskedx;
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200}
201
202static void xen_set_debugreg(int reg, unsigned long val)
203{
204 HYPERVISOR_set_debugreg(reg, val);
205}
206
207static unsigned long xen_get_debugreg(int reg)
208{
209 return HYPERVISOR_get_debugreg(reg);
210}
211
212static unsigned long xen_save_fl(void)
213{
214 struct vcpu_info *vcpu;
215 unsigned long flags;
216
5ead97c8 217 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 218
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219 /* flag has opposite sense of mask */
220 flags = !vcpu->evtchn_upcall_mask;
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221
222 /* convert to IF type flag
223 -0 -> 0x00000000
224 -1 -> 0xffffffff
225 */
226 return (-flags) & X86_EFLAGS_IF;
227}
228
229static void xen_restore_fl(unsigned long flags)
230{
231 struct vcpu_info *vcpu;
232
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233 /* convert from IF type flag */
234 flags = !(flags & X86_EFLAGS_IF);
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235
236 /* There's a one instruction preempt window here. We need to
237 make sure we're don't switch CPUs between getting the vcpu
238 pointer and updating the mask. */
239 preempt_disable();
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240 vcpu = x86_read_percpu(xen_vcpu);
241 vcpu->evtchn_upcall_mask = flags;
f120f13e 242 preempt_enable_no_resched();
5ead97c8 243
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244 /* Doesn't matter if we get preempted here, because any
245 pending event will get dealt with anyway. */
5ead97c8 246
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247 if (flags == 0) {
248 preempt_check_resched();
249 barrier(); /* unmask then check (avoid races) */
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250 if (unlikely(vcpu->evtchn_upcall_pending))
251 force_evtchn_callback();
f120f13e 252 }
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253}
254
255static void xen_irq_disable(void)
256{
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257 /* There's a one instruction preempt window here. We need to
258 make sure we're don't switch CPUs between getting the vcpu
259 pointer and updating the mask. */
5ead97c8 260 preempt_disable();
f120f13e 261 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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262 preempt_enable_no_resched();
263}
264
265static void xen_irq_enable(void)
266{
267 struct vcpu_info *vcpu;
268
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269 /* We don't need to worry about being preempted here, since
270 either a) interrupts are disabled, so no preemption, or b)
271 the caller is confused and is trying to re-enable interrupts
272 on an indeterminate processor. */
273
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274 vcpu = x86_read_percpu(xen_vcpu);
275 vcpu->evtchn_upcall_mask = 0;
276
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277 /* Doesn't matter if we get preempted here, because any
278 pending event will get dealt with anyway. */
5ead97c8 279
f120f13e 280 barrier(); /* unmask then check (avoid races) */
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281 if (unlikely(vcpu->evtchn_upcall_pending))
282 force_evtchn_callback();
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283}
284
285static void xen_safe_halt(void)
286{
287 /* Blocking includes an implicit local_irq_enable(). */
349c709f 288 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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289 BUG();
290}
291
292static void xen_halt(void)
293{
294 if (irqs_disabled())
295 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
296 else
297 xen_safe_halt();
298}
299
8965c1c0 300static void xen_leave_lazy(void)
5ead97c8 301{
8965c1c0 302 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 303 xen_mc_flush();
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304}
305
306static unsigned long xen_store_tr(void)
307{
308 return 0;
309}
310
311static void xen_set_ldt(const void *addr, unsigned entries)
312{
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313 struct mmuext_op *op;
314 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
315
316 op = mcs.args;
317 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 318 op->arg1.linear_addr = (unsigned long)addr;
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319 op->arg2.nr_ents = entries;
320
321 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
322
323 xen_mc_issue(PARAVIRT_LAZY_CPU);
324}
325
6b68f01b 326static void xen_load_gdt(const struct desc_ptr *dtr)
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327{
328 unsigned long *frames;
329 unsigned long va = dtr->address;
330 unsigned int size = dtr->size + 1;
331 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
332 int f;
333 struct multicall_space mcs;
334
335 /* A GDT can be up to 64k in size, which corresponds to 8192
336 8-byte entries, or 16 4k pages.. */
337
338 BUG_ON(size > 65536);
339 BUG_ON(va & ~PAGE_MASK);
340
341 mcs = xen_mc_entry(sizeof(*frames) * pages);
342 frames = mcs.args;
343
344 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
345 frames[f] = virt_to_mfn(va);
346 make_lowmem_page_readonly((void *)va);
347 }
348
349 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
350
351 xen_mc_issue(PARAVIRT_LAZY_CPU);
352}
353
354static void load_TLS_descriptor(struct thread_struct *t,
355 unsigned int cpu, unsigned int i)
356{
357 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
358 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
359 struct multicall_space mc = __xen_mc_entry(0);
360
361 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
362}
363
364static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
365{
366 xen_mc_batch();
367
368 load_TLS_descriptor(t, cpu, 0);
369 load_TLS_descriptor(t, cpu, 1);
370 load_TLS_descriptor(t, cpu, 2);
371
372 xen_mc_issue(PARAVIRT_LAZY_CPU);
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373
374 /*
375 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
376 * it means we're in a context switch, and %gs has just been
377 * saved. This means we can zero it out to prevent faults on
378 * exit from the hypervisor if the next process has no %gs.
379 * Either way, it has been saved, and the new value will get
380 * loaded properly. This will go away as soon as Xen has been
381 * modified to not save/restore %gs for normal hypercalls.
382 */
8965c1c0 383 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
8b84ad94 384 loadsegment(gs, 0);
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385}
386
387static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 388 const void *ptr)
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389{
390 unsigned long lp = (unsigned long)&dt[entrynum];
391 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 392 u64 entry = *(u64 *)ptr;
5ead97c8 393
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394 preempt_disable();
395
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396 xen_mc_flush();
397 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
398 BUG();
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399
400 preempt_enable();
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401}
402
403static int cvt_gate_to_trap(int vector, u32 low, u32 high,
404 struct trap_info *info)
405{
406 u8 type, dpl;
407
408 type = (high >> 8) & 0x1f;
409 dpl = (high >> 13) & 3;
410
411 if (type != 0xf && type != 0xe)
412 return 0;
413
414 info->vector = vector;
415 info->address = (high & 0xffff0000) | (low & 0x0000ffff);
416 info->cs = low >> 16;
417 info->flags = dpl;
418 /* interrupt gates clear IF */
419 if (type == 0xe)
420 info->flags |= 4;
421
422 return 1;
423}
424
425/* Locations of each CPU's IDT */
6b68f01b 426static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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427
428/* Set an IDT entry. If the entry is part of the current IDT, then
429 also update Xen. */
8d947344 430static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 431{
5ead97c8 432 unsigned long p = (unsigned long)&dt[entrynum];
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433 unsigned long start, end;
434
435 preempt_disable();
436
437 start = __get_cpu_var(idt_desc).address;
438 end = start + __get_cpu_var(idt_desc).size + 1;
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439
440 xen_mc_flush();
441
8d947344 442 native_write_idt_entry(dt, entrynum, g);
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443
444 if (p >= start && (p + 8) <= end) {
445 struct trap_info info[2];
8d947344 446 u32 *desc = (u32 *)g;
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447
448 info[1].address = 0;
449
8d947344 450 if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0]))
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451 if (HYPERVISOR_set_trap_table(info))
452 BUG();
453 }
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454
455 preempt_enable();
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456}
457
6b68f01b 458static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 459 struct trap_info *traps)
5ead97c8 460{
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461 unsigned in, out, count;
462
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463 count = (desc->size+1) / 8;
464 BUG_ON(count > 256);
465
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466 for (in = out = 0; in < count; in++) {
467 const u32 *entry = (u32 *)(desc->address + in * 8);
468
469 if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out]))
470 out++;
471 }
472 traps[out].address = 0;
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473}
474
475void xen_copy_trap_info(struct trap_info *traps)
476{
6b68f01b 477 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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478
479 xen_convert_trap_info(desc, traps);
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480}
481
482/* Load a new IDT into Xen. In principle this can be per-CPU, so we
483 hold a spinlock to protect the static traps[] array (static because
484 it avoids allocation, and saves stack space). */
6b68f01b 485static void xen_load_idt(const struct desc_ptr *desc)
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486{
487 static DEFINE_SPINLOCK(lock);
488 static struct trap_info traps[257];
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489
490 spin_lock(&lock);
491
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492 __get_cpu_var(idt_desc) = *desc;
493
f87e4cac 494 xen_convert_trap_info(desc, traps);
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495
496 xen_mc_flush();
497 if (HYPERVISOR_set_trap_table(traps))
498 BUG();
499
500 spin_unlock(&lock);
501}
502
503/* Write a GDT descriptor entry. Ignore LDT descriptors, since
504 they're handled differently. */
505static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 506 const void *desc, int type)
5ead97c8 507{
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508 preempt_disable();
509
014b15be
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510 switch (type) {
511 case DESC_LDT:
512 case DESC_TSS:
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513 /* ignore */
514 break;
515
516 default: {
517 xmaddr_t maddr = virt_to_machine(&dt[entry]);
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518
519 xen_mc_flush();
014b15be 520 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
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521 BUG();
522 }
523
524 }
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525
526 preempt_enable();
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527}
528
faca6227 529static void xen_load_sp0(struct tss_struct *tss,
f120f13e 530 struct thread_struct *thread)
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531{
532 struct multicall_space mcs = xen_mc_entry(0);
faca6227 533 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
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534 xen_mc_issue(PARAVIRT_LAZY_CPU);
535}
536
537static void xen_set_iopl_mask(unsigned mask)
538{
539 struct physdev_set_iopl set_iopl;
540
541 /* Force the change at ring 0. */
542 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
543 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
544}
545
546static void xen_io_delay(void)
547{
548}
549
550#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 551static u32 xen_apic_read(unsigned long reg)
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552{
553 return 0;
554}
f87e4cac 555
42e0a9aa 556static void xen_apic_write(unsigned long reg, u32 val)
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557{
558 /* Warn to see if there's any stray references */
559 WARN_ON(1);
560}
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561#endif
562
563static void xen_flush_tlb(void)
564{
d66bf8fc 565 struct mmuext_op *op;
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566 struct multicall_space mcs;
567
568 preempt_disable();
569
570 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 571
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572 op = mcs.args;
573 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
574 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
575
576 xen_mc_issue(PARAVIRT_LAZY_MMU);
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577
578 preempt_enable();
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579}
580
581static void xen_flush_tlb_single(unsigned long addr)
582{
d66bf8fc 583 struct mmuext_op *op;
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584 struct multicall_space mcs;
585
586 preempt_disable();
5ead97c8 587
41e332b2 588 mcs = xen_mc_entry(sizeof(*op));
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589 op = mcs.args;
590 op->cmd = MMUEXT_INVLPG_LOCAL;
591 op->arg1.linear_addr = addr & PAGE_MASK;
592 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
593
594 xen_mc_issue(PARAVIRT_LAZY_MMU);
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595
596 preempt_enable();
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597}
598
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599static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
600 unsigned long va)
601{
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602 struct {
603 struct mmuext_op op;
604 cpumask_t mask;
605 } *args;
f87e4cac 606 cpumask_t cpumask = *cpus;
d66bf8fc 607 struct multicall_space mcs;
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608
609 /*
610 * A couple of (to be removed) sanity checks:
611 *
612 * - current CPU must not be in mask
613 * - mask must exist :)
614 */
615 BUG_ON(cpus_empty(cpumask));
616 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
617 BUG_ON(!mm);
618
619 /* If a CPU which we ran on has gone down, OK. */
620 cpus_and(cpumask, cpumask, cpu_online_map);
621 if (cpus_empty(cpumask))
622 return;
623
d66bf8fc
JF
624 mcs = xen_mc_entry(sizeof(*args));
625 args = mcs.args;
626 args->mask = cpumask;
627 args->op.arg2.vcpumask = &args->mask;
628
f87e4cac 629 if (va == TLB_FLUSH_ALL) {
d66bf8fc 630 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 631 } else {
d66bf8fc
JF
632 args->op.cmd = MMUEXT_INVLPG_MULTI;
633 args->op.arg1.linear_addr = va;
f87e4cac
JF
634 }
635
d66bf8fc
JF
636 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
637
638 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
639}
640
7b1333aa
JF
641static void xen_clts(void)
642{
643 struct multicall_space mcs;
644
645 mcs = xen_mc_entry(0);
646
647 MULTI_fpu_taskswitch(mcs.mc, 0);
648
649 xen_mc_issue(PARAVIRT_LAZY_CPU);
650}
651
652static void xen_write_cr0(unsigned long cr0)
653{
654 struct multicall_space mcs;
655
656 /* Only pay attention to cr0.TS; everything else is
657 ignored. */
658 mcs = xen_mc_entry(0);
659
660 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
661
662 xen_mc_issue(PARAVIRT_LAZY_CPU);
663}
664
60223a32
JF
665static void xen_write_cr2(unsigned long cr2)
666{
667 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
668}
669
5ead97c8
JF
670static unsigned long xen_read_cr2(void)
671{
672 return x86_read_percpu(xen_vcpu)->arch.cr2;
673}
674
60223a32
JF
675static unsigned long xen_read_cr2_direct(void)
676{
677 return x86_read_percpu(xen_vcpu_info.arch.cr2);
678}
679
5ead97c8
JF
680static void xen_write_cr4(unsigned long cr4)
681{
2956a351
JF
682 cr4 &= ~X86_CR4_PGE;
683 cr4 &= ~X86_CR4_PSE;
684
685 native_write_cr4(cr4);
5ead97c8
JF
686}
687
5ead97c8
JF
688static unsigned long xen_read_cr3(void)
689{
690 return x86_read_percpu(xen_cr3);
691}
692
9f79991d
JF
693static void set_current_cr3(void *v)
694{
695 x86_write_percpu(xen_current_cr3, (unsigned long)v);
696}
697
5ead97c8
JF
698static void xen_write_cr3(unsigned long cr3)
699{
9f79991d
JF
700 struct mmuext_op *op;
701 struct multicall_space mcs;
702 unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3));
703
f120f13e
JF
704 BUG_ON(preemptible());
705
9f79991d 706 mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */
5ead97c8 707
9f79991d
JF
708 /* Update while interrupts are disabled, so its atomic with
709 respect to ipis */
5ead97c8
JF
710 x86_write_percpu(xen_cr3, cr3);
711
9f79991d
JF
712 op = mcs.args;
713 op->cmd = MMUEXT_NEW_BASEPTR;
714 op->arg1.mfn = mfn;
5ead97c8 715
9f79991d 716 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 717
9f79991d
JF
718 /* Update xen_update_cr3 once the batch has actually
719 been submitted. */
720 xen_mc_callback(set_current_cr3, (void *)cr3);
5ead97c8 721
9f79991d 722 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
723}
724
f4f97b3e
JF
725/* Early in boot, while setting up the initial pagetable, assume
726 everything is pinned. */
6944a9c8 727static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 728{
af7ae3b9 729#ifdef CONFIG_FLATMEM
f4f97b3e 730 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 731#endif
5ead97c8
JF
732 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
733}
734
6944a9c8 735/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 736 only init_mm and anything attached to that is pinned. */
6944a9c8 737static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
738{
739 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
740}
741
f6433706 742static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
743{
744 struct mmuext_op op;
f6433706 745 op.cmd = cmd;
74260714
JF
746 op.arg1.mfn = pfn_to_mfn(pfn);
747 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
748 BUG();
749}
750
f4f97b3e
JF
751/* This needs to make sure the new pte page is pinned iff its being
752 attached to a pinned pagetable. */
1c70e9bd 753static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 754{
f4f97b3e 755 struct page *page = pfn_to_page(pfn);
5ead97c8 756
f4f97b3e
JF
757 if (PagePinned(virt_to_page(mm->pgd))) {
758 SetPagePinned(page);
759
74260714 760 if (!PageHighMem(page)) {
f4f97b3e 761 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
762 if (level == PT_PTE)
763 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 764 } else
f4f97b3e
JF
765 /* make sure there are no stray mappings of
766 this page */
767 kmap_flush_unused();
768 }
5ead97c8
JF
769}
770
6944a9c8 771static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 772{
f6433706 773 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
774}
775
6944a9c8 776static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 777{
f6433706 778 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
779}
780
f4f97b3e 781/* This should never happen until we're OK to use struct page */
f6433706 782static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 783{
f4f97b3e
JF
784 struct page *page = pfn_to_page(pfn);
785
786 if (PagePinned(page)) {
74260714 787 if (!PageHighMem(page)) {
a684d69d
MM
788 if (level == PT_PTE)
789 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 790 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 791 }
c946c7de 792 ClearPagePinned(page);
f4f97b3e 793 }
5ead97c8
JF
794}
795
6944a9c8 796static void xen_release_pte(u32 pfn)
f6433706
MM
797{
798 xen_release_ptpage(pfn, PT_PTE);
799}
800
6944a9c8 801static void xen_release_pmd(u32 pfn)
f6433706
MM
802{
803 xen_release_ptpage(pfn, PT_PMD);
804}
805
f6e58732
JF
806#if PAGETABLE_LEVELS == 4
807static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
808{
809 xen_alloc_ptpage(mm, pfn, PT_PUD);
810}
811
812static void xen_release_pud(u32 pfn)
813{
814 xen_release_ptpage(pfn, PT_PUD);
815}
816#endif
817
f4f97b3e
JF
818#ifdef CONFIG_HIGHPTE
819static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 820{
f4f97b3e
JF
821 pgprot_t prot = PAGE_KERNEL;
822
823 if (PagePinned(page))
824 prot = PAGE_KERNEL_RO;
825
826 if (0 && PageHighMem(page))
827 printk("mapping highpte %lx type %d prot %s\n",
828 page_to_pfn(page), type,
829 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
830
831 return kmap_atomic_prot(page, type, prot);
5ead97c8 832}
f4f97b3e 833#endif
5ead97c8 834
9a4029fd
JF
835static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
836{
837 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
838 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
839 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
840 pte_val_ma(pte));
841
842 return pte;
843}
844
845/* Init-time set_pte while constructing initial pagetables, which
846 doesn't allow RO pagetable pages to be remapped RW */
847static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
848{
849 pte = mask_rw_pte(ptep, pte);
850
851 xen_set_pte(ptep, pte);
852}
853
5ead97c8
JF
854static __init void xen_pagetable_setup_start(pgd_t *base)
855{
a312b37b 856#ifdef CONFIG_X86_32
5ead97c8 857 pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
3843fc25 858 int i;
5ead97c8
JF
859
860 init_mm.pgd = base;
861 /*
3843fc25
JF
862 * copy top-level of Xen-supplied pagetable into place. This
863 * is a stand-in while we copy the pmd pages.
5ead97c8
JF
864 */
865 memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
866
3843fc25
JF
867 /*
868 * For PAE, need to allocate new pmds, rather than
869 * share Xen's, since Xen doesn't like pmd's being
870 * shared between address spaces.
871 */
872 for (i = 0; i < PTRS_PER_PGD; i++) {
873 if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
874 pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
5ead97c8 875
3843fc25
JF
876 memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
877 PAGE_SIZE);
5ead97c8 878
3843fc25 879 make_lowmem_page_readonly(pmd);
5ead97c8 880
3843fc25
JF
881 set_pgd(&base[i], __pgd(1 + __pa(pmd)));
882 } else
883 pgd_clear(&base[i]);
5ead97c8
JF
884 }
885
886 /* make sure zero_page is mapped RO so we can use it in pagetables */
887 make_lowmem_page_readonly(empty_zero_page);
888 make_lowmem_page_readonly(base);
889 /*
890 * Switch to new pagetable. This is done before
891 * pagetable_init has done anything so that the new pages
892 * added to the table can be prepared properly for Xen.
893 */
894 xen_write_cr3(__pa(base));
2b540781
JF
895
896 /* Unpin initial Xen pagetable */
897 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
898 PFN_DOWN(__pa(xen_start_info->pt_base)));
a312b37b 899#endif /* CONFIG_X86_32 */
5ead97c8
JF
900}
901
0e91398f 902void xen_setup_shared_info(void)
5ead97c8
JF
903{
904 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
2e8fe719
JF
905 unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP);
906
5ead97c8
JF
907 /*
908 * Create a mapping for the shared info page.
909 * Should be set_fixmap(), but shared_info is a machine
910 * address with no corresponding pseudo-phys address.
911 */
2e8fe719 912 set_pte_mfn(addr,
5ead97c8
JF
913 PFN_DOWN(xen_start_info->shared_info),
914 PAGE_KERNEL);
5ead97c8 915
2e8fe719 916 HYPERVISOR_shared_info = (struct shared_info *)addr;
5ead97c8
JF
917 } else
918 HYPERVISOR_shared_info =
919 (struct shared_info *)__va(xen_start_info->shared_info);
920
2e8fe719
JF
921#ifndef CONFIG_SMP
922 /* In UP this is as good a place as any to set up shared info */
923 xen_setup_vcpu_info_placement();
924#endif
d5edbc1f
JF
925
926 xen_setup_mfn_list_list();
2e8fe719
JF
927}
928
929static __init void xen_pagetable_setup_done(pgd_t *base)
930{
931 /* This will work as long as patching hasn't happened yet
932 (which it hasn't) */
6944a9c8
JF
933 pv_mmu_ops.alloc_pte = xen_alloc_pte;
934 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
935 pv_mmu_ops.release_pte = xen_release_pte;
936 pv_mmu_ops.release_pmd = xen_release_pmd;
f6e58732
JF
937#if PAGETABLE_LEVELS == 4
938 pv_mmu_ops.alloc_pud = xen_alloc_pud;
939 pv_mmu_ops.release_pud = xen_release_pud;
940#endif
941
2e8fe719
JF
942 pv_mmu_ops.set_pte = xen_set_pte;
943
0e91398f 944 xen_setup_shared_info();
2e8fe719 945
a312b37b 946#ifdef CONFIG_X86_32
f4f97b3e
JF
947 /* Actually pin the pagetable down, but we can't set PG_pinned
948 yet because the page structures don't exist yet. */
3843fc25 949 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
a312b37b 950#endif
60223a32 951}
5ead97c8 952
e2426cf8
JF
953static __init void xen_post_allocator_init(void)
954{
955 pv_mmu_ops.set_pmd = xen_set_pmd;
956 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
957#if PAGETABLE_LEVELS == 4
958 pv_mmu_ops.set_pgd = xen_set_pgd;
959#endif
e2426cf8
JF
960
961 xen_mark_init_mm_pinned();
962}
963
60223a32 964/* This is called once we have the cpu_possible_map */
0e91398f 965void xen_setup_vcpu_info_placement(void)
60223a32
JF
966{
967 int cpu;
968
969 for_each_possible_cpu(cpu)
970 xen_vcpu_setup(cpu);
971
972 /* xen_vcpu_setup managed to place the vcpu_info within the
973 percpu area for all cpus, so make use of it */
5b09b287 974#ifdef CONFIG_X86_32
60223a32
JF
975 if (have_vcpu_info_placement) {
976 printk(KERN_INFO "Xen: using vcpu_info placement\n");
977
93b1eab3
JF
978 pv_irq_ops.save_fl = xen_save_fl_direct;
979 pv_irq_ops.restore_fl = xen_restore_fl_direct;
980 pv_irq_ops.irq_disable = xen_irq_disable_direct;
981 pv_irq_ops.irq_enable = xen_irq_enable_direct;
982 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 983 }
5b09b287 984#endif
5ead97c8
JF
985}
986
ab144f5e
AK
987static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
988 unsigned long addr, unsigned len)
6487673b
JF
989{
990 char *start, *end, *reloc;
991 unsigned ret;
992
993 start = end = reloc = NULL;
994
93b1eab3
JF
995#define SITE(op, x) \
996 case PARAVIRT_PATCH(op.x): \
6487673b
JF
997 if (have_vcpu_info_placement) { \
998 start = (char *)xen_##x##_direct; \
999 end = xen_##x##_direct_end; \
1000 reloc = xen_##x##_direct_reloc; \
1001 } \
1002 goto patch_site
1003
1004 switch (type) {
5b09b287 1005#ifdef CONFIG_X86_32
93b1eab3
JF
1006 SITE(pv_irq_ops, irq_enable);
1007 SITE(pv_irq_ops, irq_disable);
1008 SITE(pv_irq_ops, save_fl);
1009 SITE(pv_irq_ops, restore_fl);
5b09b287 1010#endif /* CONFIG_X86_32 */
6487673b
JF
1011#undef SITE
1012
1013 patch_site:
1014 if (start == NULL || (end-start) > len)
1015 goto default_patch;
1016
ab144f5e 1017 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1018
1019 /* Note: because reloc is assigned from something that
1020 appears to be an array, gcc assumes it's non-null,
1021 but doesn't know its relationship with start and
1022 end. */
1023 if (reloc > start && reloc < end) {
1024 int reloc_off = reloc - start;
ab144f5e
AK
1025 long *relocp = (long *)(insnbuf + reloc_off);
1026 long delta = start - (char *)addr;
6487673b
JF
1027
1028 *relocp += delta;
1029 }
1030 break;
1031
1032 default_patch:
1033 default:
ab144f5e
AK
1034 ret = paravirt_patch_default(type, clobbers, insnbuf,
1035 addr, len);
6487673b
JF
1036 break;
1037 }
1038
1039 return ret;
1040}
1041
aeaaa59c
JF
1042static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1043{
1044 pte_t pte;
1045
1046 phys >>= PAGE_SHIFT;
1047
1048 switch (idx) {
1049 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1050#ifdef CONFIG_X86_F00F_BUG
1051 case FIX_F00F_IDT:
1052#endif
1053 case FIX_WP_TEST:
1054 case FIX_VDSO:
1055#ifdef CONFIG_X86_LOCAL_APIC
1056 case FIX_APIC_BASE: /* maps dummy local APIC */
1057#endif
1058 pte = pfn_pte(phys, prot);
1059 break;
1060
1061 default:
1062 pte = mfn_pte(phys, prot);
1063 break;
1064 }
1065
1066 __native_set_fixmap(idx, pte);
1067}
1068
93b1eab3 1069static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1070 .paravirt_enabled = 1,
1071 .shared_kernel_pmd = 0,
1072
1073 .name = "Xen",
93b1eab3 1074};
5ead97c8 1075
93b1eab3 1076static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1077 .patch = xen_patch,
5ead97c8 1078
93b1eab3 1079 .banner = xen_banner,
5ead97c8
JF
1080 .memory_setup = xen_memory_setup,
1081 .arch_setup = xen_arch_setup,
e2426cf8 1082 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1083};
5ead97c8 1084
93b1eab3 1085static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1086 .time_init = xen_time_init,
93b1eab3 1087
15c84731
JF
1088 .set_wallclock = xen_set_wallclock,
1089 .get_wallclock = xen_get_wallclock,
e93ef949 1090 .get_tsc_khz = xen_tsc_khz,
ab550288 1091 .sched_clock = xen_sched_clock,
93b1eab3 1092};
15c84731 1093
93b1eab3 1094static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1095 .cpuid = xen_cpuid,
1096
1097 .set_debugreg = xen_set_debugreg,
1098 .get_debugreg = xen_get_debugreg,
1099
7b1333aa 1100 .clts = xen_clts,
5ead97c8
JF
1101
1102 .read_cr0 = native_read_cr0,
7b1333aa 1103 .write_cr0 = xen_write_cr0,
5ead97c8 1104
5ead97c8
JF
1105 .read_cr4 = native_read_cr4,
1106 .read_cr4_safe = native_read_cr4_safe,
1107 .write_cr4 = xen_write_cr4,
1108
5ead97c8
JF
1109 .wbinvd = native_wbinvd,
1110
1111 .read_msr = native_read_msr_safe,
1112 .write_msr = native_write_msr_safe,
1113 .read_tsc = native_read_tsc,
1114 .read_pmc = native_read_pmc,
1115
81e103f1 1116 .iret = xen_iret,
d75cd22f 1117 .irq_enable_sysexit = xen_sysexit,
5ead97c8
JF
1118
1119 .load_tr_desc = paravirt_nop,
1120 .set_ldt = xen_set_ldt,
1121 .load_gdt = xen_load_gdt,
1122 .load_idt = xen_load_idt,
1123 .load_tls = xen_load_tls,
1124
1125 .store_gdt = native_store_gdt,
1126 .store_idt = native_store_idt,
1127 .store_tr = xen_store_tr,
1128
1129 .write_ldt_entry = xen_write_ldt_entry,
1130 .write_gdt_entry = xen_write_gdt_entry,
1131 .write_idt_entry = xen_write_idt_entry,
faca6227 1132 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1133
1134 .set_iopl_mask = xen_set_iopl_mask,
1135 .io_delay = xen_io_delay,
1136
8965c1c0
JF
1137 .lazy_mode = {
1138 .enter = paravirt_enter_lazy_cpu,
1139 .leave = xen_leave_lazy,
1140 },
93b1eab3
JF
1141};
1142
1143static const struct pv_irq_ops xen_irq_ops __initdata = {
1144 .init_IRQ = xen_init_IRQ,
1145 .save_fl = xen_save_fl,
1146 .restore_fl = xen_restore_fl,
1147 .irq_disable = xen_irq_disable,
1148 .irq_enable = xen_irq_enable,
1149 .safe_halt = xen_safe_halt,
1150 .halt = xen_halt,
fab58420
JF
1151#ifdef CONFIG_X86_64
1152 .adjust_exception_frame = paravirt_nop,
1153#endif
93b1eab3 1154};
5ead97c8 1155
93b1eab3 1156static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1157#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac
JF
1158 .apic_write = xen_apic_write,
1159 .apic_write_atomic = xen_apic_write,
5ead97c8
JF
1160 .apic_read = xen_apic_read,
1161 .setup_boot_clock = paravirt_nop,
1162 .setup_secondary_clock = paravirt_nop,
1163 .startup_ipi_hook = paravirt_nop,
1164#endif
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JF
1165};
1166
1167static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1168 .pagetable_setup_start = xen_pagetable_setup_start,
1169 .pagetable_setup_done = xen_pagetable_setup_done,
1170
1171 .read_cr2 = xen_read_cr2,
1172 .write_cr2 = xen_write_cr2,
1173
1174 .read_cr3 = xen_read_cr3,
1175 .write_cr3 = xen_write_cr3,
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1176
1177 .flush_tlb_user = xen_flush_tlb,
1178 .flush_tlb_kernel = xen_flush_tlb,
1179 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1180 .flush_tlb_others = xen_flush_tlb_others,
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JF
1181
1182 .pte_update = paravirt_nop,
1183 .pte_update_defer = paravirt_nop,
1184
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1185 .pgd_alloc = __paravirt_pgd_alloc,
1186 .pgd_free = paravirt_nop,
1187
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JF
1188 .alloc_pte = xen_alloc_pte_init,
1189 .release_pte = xen_release_pte_init,
1190 .alloc_pmd = xen_alloc_pte_init,
1191 .alloc_pmd_clone = paravirt_nop,
1192 .release_pmd = xen_release_pte_init,
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1193
1194#ifdef CONFIG_HIGHPTE
1195 .kmap_atomic_pte = xen_kmap_atomic_pte,
1196#endif
5ead97c8 1197
851fa3c4 1198 .set_pte = xen_set_pte_init,
3b827c1b 1199 .set_pte_at = xen_set_pte_at,
e2426cf8 1200 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1201
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1202 .ptep_modify_prot_start = __ptep_modify_prot_start,
1203 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1204
3b827c1b 1205 .pte_val = xen_pte_val,
a15af1c9 1206 .pte_flags = native_pte_val,
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1207 .pgd_val = xen_pgd_val,
1208
1209 .make_pte = xen_make_pte,
1210 .make_pgd = xen_make_pgd,
1211
f6e58732 1212#ifdef CONFIG_X86_PAE
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1213 .set_pte_atomic = xen_set_pte_atomic,
1214 .set_pte_present = xen_set_pte_at,
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1215 .pte_clear = xen_pte_clear,
1216 .pmd_clear = xen_pmd_clear,
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1217#endif /* CONFIG_X86_PAE */
1218 .set_pud = xen_set_pud_hyper,
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1219
1220 .make_pmd = xen_make_pmd,
1221 .pmd_val = xen_pmd_val,
3b827c1b 1222
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1223#if PAGETABLE_LEVELS == 4
1224 .pud_val = xen_pud_val,
1225 .make_pud = xen_make_pud,
1226 .set_pgd = xen_set_pgd_hyper,
1227
1228 .alloc_pud = xen_alloc_pte_init,
1229 .release_pud = xen_release_pte_init,
1230#endif /* PAGETABLE_LEVELS == 4 */
1231
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1232 .activate_mm = xen_activate_mm,
1233 .dup_mmap = xen_dup_mmap,
1234 .exit_mmap = xen_exit_mmap,
1235
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1236 .lazy_mode = {
1237 .enter = paravirt_enter_lazy_mmu,
1238 .leave = xen_leave_lazy,
1239 },
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1240
1241 .set_fixmap = xen_set_fixmap,
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1242};
1243
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1244static void xen_reboot(int reason)
1245{
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1246 struct sched_shutdown r = { .reason = reason };
1247
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1248#ifdef CONFIG_SMP
1249 smp_send_stop();
1250#endif
1251
349c709f 1252 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
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1253 BUG();
1254}
1255
1256static void xen_restart(char *msg)
1257{
1258 xen_reboot(SHUTDOWN_reboot);
1259}
1260
1261static void xen_emergency_restart(void)
1262{
1263 xen_reboot(SHUTDOWN_reboot);
1264}
1265
1266static void xen_machine_halt(void)
1267{
1268 xen_reboot(SHUTDOWN_poweroff);
1269}
1270
1271static void xen_crash_shutdown(struct pt_regs *regs)
1272{
1273 xen_reboot(SHUTDOWN_crash);
1274}
1275
1276static const struct machine_ops __initdata xen_machine_ops = {
1277 .restart = xen_restart,
1278 .halt = xen_machine_halt,
1279 .power_off = xen_machine_halt,
1280 .shutdown = xen_machine_halt,
1281 .crash_shutdown = xen_crash_shutdown,
1282 .emergency_restart = xen_emergency_restart,
1283};
1284
6487673b 1285
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1286static void __init xen_reserve_top(void)
1287{
f5d36de0 1288#ifdef CONFIG_X86_32
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1289 unsigned long top = HYPERVISOR_VIRT_START;
1290 struct xen_platform_parameters pp;
1291
1292 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1293 top = pp.virt_start;
1294
1295 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1296#endif /* CONFIG_X86_32 */
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1297}
1298
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1299/* First C function to be called on Xen boot */
1300asmlinkage void __init xen_start_kernel(void)
1301{
1302 pgd_t *pgd;
1303
1304 if (!xen_start_info)
1305 return;
1306
7999f4b4 1307 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1308
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1309 xen_setup_features();
1310
5ead97c8 1311 /* Install Xen paravirt ops */
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1312 pv_info = xen_info;
1313 pv_init_ops = xen_init_ops;
1314 pv_time_ops = xen_time_ops;
1315 pv_cpu_ops = xen_cpu_ops;
1316 pv_irq_ops = xen_irq_ops;
1317 pv_apic_ops = xen_apic_ops;
1318 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1319
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1320 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1321 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1322 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1323 }
1324
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1325 machine_ops = xen_machine_ops;
1326
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1327#ifdef CONFIG_X86_64
1328 /* Disable until direct per-cpu data access. */
1329 have_vcpu_info_placement = 0;
5b09b287 1330 x86_64_init_pda();
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1331#endif
1332
a9e7062d 1333 xen_smp_init();
5ead97c8 1334
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1335 /* Get mfn list */
1336 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1337 xen_build_dynamic_phys_to_machine();
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1338
1339 pgd = (pgd_t *)xen_start_info->pt_base;
1340
f5d36de0 1341#ifdef CONFIG_X86_32
f0d43100 1342 init_pg_tables_start = __pa(pgd);
5ead97c8 1343 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
88a6846c 1344 max_pfn_mapped = (init_pg_tables_end + 512*1024) >> PAGE_SHIFT;
f5d36de0 1345#endif
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1346
1347 init_mm.pgd = pgd; /* use the Xen pagetables to start */
1348
1349 /* keep using Xen gdt for now; no urgent need to change it */
1350
1351 x86_write_percpu(xen_cr3, __pa(pgd));
9f79991d 1352 x86_write_percpu(xen_current_cr3, __pa(pgd));
60223a32 1353
60223a32 1354 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1355 possible map and a non-dummy shared_info. */
60223a32 1356 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1357
93b1eab3 1358 pv_info.kernel_rpl = 1;
5ead97c8 1359 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1360 pv_info.kernel_rpl = 0;
5ead97c8 1361
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1362 /* Prevent unwanted bits from being set in PTEs. */
1363 __supported_pte_mask &= ~_PAGE_GLOBAL;
1364 if (!is_initial_xendomain())
1365 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1366
5ead97c8 1367 /* set the limit of our address space */
fb1d8404 1368 xen_reserve_top();
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1369
1370 /* set up basic CPUID stuff */
1371 cpu_detect(&new_cpu_data);
f5d36de0 1372#ifdef CONFIG_X86_32
5ead97c8 1373 new_cpu_data.hard_math = 1;
f5d36de0 1374#endif
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1375 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1376
1377 /* Poke various useful things into boot_params */
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PA
1378 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1379 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1380 ? __pa(xen_start_info->mod_start) : 0;
1381 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
5ead97c8 1382
9e124fe1 1383 if (!is_initial_xendomain()) {
83abc70a 1384 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1385 add_preferred_console("tty", 0, NULL);
b8c2d3df 1386 add_preferred_console("hvc", 0, NULL);
9e124fe1 1387 }
b8c2d3df 1388
5ead97c8 1389 /* Start the world */
f5d36de0 1390#ifdef CONFIG_X86_32
f0d43100 1391 i386_start_kernel();
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1392#else
1393 x86_64_start_kernel((char *)&boot_params);
1394#endif
5ead97c8 1395}