Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
6cac5a92 | 23 | #include <linux/kprobes.h> |
5ead97c8 JF |
24 | #include <linux/bootmem.h> |
25 | #include <linux/module.h> | |
f4f97b3e JF |
26 | #include <linux/mm.h> |
27 | #include <linux/page-flags.h> | |
28 | #include <linux/highmem.h> | |
b8c2d3df | 29 | #include <linux/console.h> |
5ead97c8 | 30 | |
1ccbf534 | 31 | #include <xen/xen.h> |
5ead97c8 | 32 | #include <xen/interface/xen.h> |
ecbf29cd | 33 | #include <xen/interface/version.h> |
5ead97c8 JF |
34 | #include <xen/interface/physdev.h> |
35 | #include <xen/interface/vcpu.h> | |
36 | #include <xen/features.h> | |
37 | #include <xen/page.h> | |
084a2a4e | 38 | #include <xen/hvc-console.h> |
5ead97c8 JF |
39 | |
40 | #include <asm/paravirt.h> | |
7b6aa335 | 41 | #include <asm/apic.h> |
5ead97c8 JF |
42 | #include <asm/page.h> |
43 | #include <asm/xen/hypercall.h> | |
44 | #include <asm/xen/hypervisor.h> | |
45 | #include <asm/fixmap.h> | |
46 | #include <asm/processor.h> | |
707ebbc8 | 47 | #include <asm/proto.h> |
1153968a | 48 | #include <asm/msr-index.h> |
6cac5a92 | 49 | #include <asm/traps.h> |
5ead97c8 JF |
50 | #include <asm/setup.h> |
51 | #include <asm/desc.h> | |
52 | #include <asm/pgtable.h> | |
f87e4cac | 53 | #include <asm/tlbflush.h> |
fefa629a | 54 | #include <asm/reboot.h> |
577eebea | 55 | #include <asm/stackprotector.h> |
5ead97c8 JF |
56 | |
57 | #include "xen-ops.h" | |
3b827c1b | 58 | #include "mmu.h" |
5ead97c8 JF |
59 | #include "multicalls.h" |
60 | ||
61 | EXPORT_SYMBOL_GPL(hypercall_page); | |
62 | ||
5ead97c8 JF |
63 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
64 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 65 | |
6e833587 JF |
66 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
67 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
68 | ||
5ead97c8 JF |
69 | struct start_info *xen_start_info; |
70 | EXPORT_SYMBOL_GPL(xen_start_info); | |
71 | ||
a0d695c8 | 72 | struct shared_info xen_dummy_shared_info; |
60223a32 | 73 | |
38341432 JF |
74 | void *xen_initial_gdt; |
75 | ||
60223a32 JF |
76 | /* |
77 | * Point at some empty memory to start with. We map the real shared_info | |
78 | * page as soon as fixmap is up and running. | |
79 | */ | |
a0d695c8 | 80 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
81 | |
82 | /* | |
83 | * Flag to determine whether vcpu info placement is available on all | |
84 | * VCPUs. We assume it is to start with, and then set it to zero on | |
85 | * the first failure. This is because it can succeed on some VCPUs | |
86 | * and not others, since it can involve hypervisor memory allocation, | |
87 | * or because the guest failed to guarantee all the appropriate | |
88 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
89 | * | |
90 | * Note that any particular CPU may be using a placed vcpu structure, | |
91 | * but we can only optimise if the all are. | |
92 | * | |
93 | * 0: not available, 1: available | |
94 | */ | |
e4d04071 | 95 | static int have_vcpu_info_placement = 1; |
60223a32 | 96 | |
9c7a7942 | 97 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 98 | { |
60223a32 JF |
99 | struct vcpu_register_vcpu_info info; |
100 | int err; | |
101 | struct vcpu_info *vcpup; | |
102 | ||
a0d695c8 | 103 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 104 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
105 | |
106 | if (!have_vcpu_info_placement) | |
107 | return; /* already tested, not available */ | |
108 | ||
109 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
110 | ||
9976b39b | 111 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
112 | info.offset = offset_in_page(vcpup); |
113 | ||
e3d26976 | 114 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
115 | cpu, vcpup, info.mfn, info.offset); |
116 | ||
117 | /* Check to see if the hypervisor will put the vcpu_info | |
118 | structure where we want it, which allows direct access via | |
119 | a percpu-variable. */ | |
120 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
121 | ||
122 | if (err) { | |
123 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
124 | have_vcpu_info_placement = 0; | |
125 | } else { | |
126 | /* This cpu is using the registered vcpu info, even if | |
127 | later ones fail to. */ | |
128 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 129 | |
60223a32 JF |
130 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
131 | cpu, vcpup); | |
132 | } | |
5ead97c8 JF |
133 | } |
134 | ||
9c7a7942 JF |
135 | /* |
136 | * On restore, set the vcpu placement up again. | |
137 | * If it fails, then we're in a bad state, since | |
138 | * we can't back out from using it... | |
139 | */ | |
140 | void xen_vcpu_restore(void) | |
141 | { | |
142 | if (have_vcpu_info_placement) { | |
143 | int cpu; | |
144 | ||
145 | for_each_online_cpu(cpu) { | |
146 | bool other_cpu = (cpu != smp_processor_id()); | |
147 | ||
148 | if (other_cpu && | |
149 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
150 | BUG(); | |
151 | ||
152 | xen_vcpu_setup(cpu); | |
153 | ||
154 | if (other_cpu && | |
155 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
156 | BUG(); | |
157 | } | |
158 | ||
159 | BUG_ON(!have_vcpu_info_placement); | |
160 | } | |
161 | } | |
162 | ||
5ead97c8 JF |
163 | static void __init xen_banner(void) |
164 | { | |
95c7c23b JF |
165 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
166 | struct xen_extraversion extra; | |
167 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
168 | ||
5ead97c8 | 169 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 170 | pv_info.name); |
95c7c23b JF |
171 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
172 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 173 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
174 | } |
175 | ||
e826fe1b JF |
176 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
177 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
178 | ||
65ea5b03 PA |
179 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
180 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 181 | { |
e826fe1b | 182 | unsigned maskecx = ~0; |
5ead97c8 JF |
183 | unsigned maskedx = ~0; |
184 | ||
185 | /* | |
186 | * Mask out inconvenient features, to try and disable as many | |
187 | * unsupported kernel subsystems as possible. | |
188 | */ | |
e826fe1b JF |
189 | if (*ax == 1) { |
190 | maskecx = cpuid_leaf1_ecx_mask; | |
191 | maskedx = cpuid_leaf1_edx_mask; | |
192 | } | |
5ead97c8 JF |
193 | |
194 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
195 | : "=a" (*ax), |
196 | "=b" (*bx), | |
197 | "=c" (*cx), | |
198 | "=d" (*dx) | |
199 | : "0" (*ax), "2" (*cx)); | |
e826fe1b JF |
200 | |
201 | *cx &= maskecx; | |
65ea5b03 | 202 | *dx &= maskedx; |
5ead97c8 JF |
203 | } |
204 | ||
e826fe1b JF |
205 | static __init void xen_init_cpuid_mask(void) |
206 | { | |
207 | unsigned int ax, bx, cx, dx; | |
208 | ||
209 | cpuid_leaf1_edx_mask = | |
210 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
211 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
212 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ | |
213 | ||
214 | if (!xen_initial_domain()) | |
215 | cpuid_leaf1_edx_mask &= | |
216 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
217 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
218 | ||
219 | ax = 1; | |
7adb4df4 | 220 | cx = 0; |
e826fe1b JF |
221 | xen_cpuid(&ax, &bx, &cx, &dx); |
222 | ||
223 | /* cpuid claims we support xsave; try enabling it to see what happens */ | |
224 | if (cx & (1 << (X86_FEATURE_XSAVE % 32))) { | |
225 | unsigned long cr4; | |
226 | ||
227 | set_in_cr4(X86_CR4_OSXSAVE); | |
228 | ||
229 | cr4 = read_cr4(); | |
230 | ||
231 | if ((cr4 & X86_CR4_OSXSAVE) == 0) | |
232 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32)); | |
233 | ||
234 | clear_in_cr4(X86_CR4_OSXSAVE); | |
235 | } | |
236 | } | |
237 | ||
5ead97c8 JF |
238 | static void xen_set_debugreg(int reg, unsigned long val) |
239 | { | |
240 | HYPERVISOR_set_debugreg(reg, val); | |
241 | } | |
242 | ||
243 | static unsigned long xen_get_debugreg(int reg) | |
244 | { | |
245 | return HYPERVISOR_get_debugreg(reg); | |
246 | } | |
247 | ||
224101ed | 248 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 249 | { |
5ead97c8 | 250 | xen_mc_flush(); |
224101ed | 251 | paravirt_end_context_switch(next); |
5ead97c8 JF |
252 | } |
253 | ||
254 | static unsigned long xen_store_tr(void) | |
255 | { | |
256 | return 0; | |
257 | } | |
258 | ||
a05d2eba | 259 | /* |
cef43bf6 JF |
260 | * Set the page permissions for a particular virtual address. If the |
261 | * address is a vmalloc mapping (or other non-linear mapping), then | |
262 | * find the linear mapping of the page and also set its protections to | |
263 | * match. | |
a05d2eba JF |
264 | */ |
265 | static void set_aliased_prot(void *v, pgprot_t prot) | |
266 | { | |
267 | int level; | |
268 | pte_t *ptep; | |
269 | pte_t pte; | |
270 | unsigned long pfn; | |
271 | struct page *page; | |
272 | ||
273 | ptep = lookup_address((unsigned long)v, &level); | |
274 | BUG_ON(ptep == NULL); | |
275 | ||
276 | pfn = pte_pfn(*ptep); | |
277 | page = pfn_to_page(pfn); | |
278 | ||
279 | pte = pfn_pte(pfn, prot); | |
280 | ||
281 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
282 | BUG(); | |
283 | ||
284 | if (!PageHighMem(page)) { | |
285 | void *av = __va(PFN_PHYS(pfn)); | |
286 | ||
287 | if (av != v) | |
288 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
289 | BUG(); | |
290 | } else | |
291 | kmap_flush_unused(); | |
292 | } | |
293 | ||
38ffbe66 JF |
294 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
295 | { | |
a05d2eba | 296 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
297 | int i; |
298 | ||
a05d2eba JF |
299 | for(i = 0; i < entries; i += entries_per_page) |
300 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
301 | } |
302 | ||
303 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
304 | { | |
a05d2eba | 305 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
306 | int i; |
307 | ||
a05d2eba JF |
308 | for(i = 0; i < entries; i += entries_per_page) |
309 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
310 | } |
311 | ||
5ead97c8 JF |
312 | static void xen_set_ldt(const void *addr, unsigned entries) |
313 | { | |
5ead97c8 JF |
314 | struct mmuext_op *op; |
315 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
316 | ||
317 | op = mcs.args; | |
318 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 319 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
320 | op->arg2.nr_ents = entries; |
321 | ||
322 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
323 | ||
324 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
325 | } | |
326 | ||
6b68f01b | 327 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 328 | { |
5ead97c8 JF |
329 | unsigned long va = dtr->address; |
330 | unsigned int size = dtr->size + 1; | |
331 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 332 | unsigned long frames[pages]; |
5ead97c8 | 333 | int f; |
5ead97c8 | 334 | |
577eebea JF |
335 | /* |
336 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
337 | * 8-byte entries, or 16 4k pages.. | |
338 | */ | |
5ead97c8 JF |
339 | |
340 | BUG_ON(size > 65536); | |
341 | BUG_ON(va & ~PAGE_MASK); | |
342 | ||
5ead97c8 | 343 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 344 | int level; |
577eebea | 345 | pte_t *ptep; |
6ed6bf42 JF |
346 | unsigned long pfn, mfn; |
347 | void *virt; | |
348 | ||
577eebea JF |
349 | /* |
350 | * The GDT is per-cpu and is in the percpu data area. | |
351 | * That can be virtually mapped, so we need to do a | |
352 | * page-walk to get the underlying MFN for the | |
353 | * hypercall. The page can also be in the kernel's | |
354 | * linear range, so we need to RO that mapping too. | |
355 | */ | |
356 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
357 | BUG_ON(ptep == NULL); |
358 | ||
359 | pfn = pte_pfn(*ptep); | |
360 | mfn = pfn_to_mfn(pfn); | |
361 | virt = __va(PFN_PHYS(pfn)); | |
362 | ||
363 | frames[f] = mfn; | |
9976b39b | 364 | |
5ead97c8 | 365 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 366 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
367 | } |
368 | ||
3ce5fa7e JF |
369 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
370 | BUG(); | |
5ead97c8 JF |
371 | } |
372 | ||
577eebea JF |
373 | /* |
374 | * load_gdt for early boot, when the gdt is only mapped once | |
375 | */ | |
376 | static __init void xen_load_gdt_boot(const struct desc_ptr *dtr) | |
377 | { | |
378 | unsigned long va = dtr->address; | |
379 | unsigned int size = dtr->size + 1; | |
380 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
381 | unsigned long frames[pages]; | |
382 | int f; | |
383 | ||
384 | /* | |
385 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
386 | * 8-byte entries, or 16 4k pages.. | |
387 | */ | |
388 | ||
389 | BUG_ON(size > 65536); | |
390 | BUG_ON(va & ~PAGE_MASK); | |
391 | ||
392 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
393 | pte_t pte; | |
394 | unsigned long pfn, mfn; | |
395 | ||
396 | pfn = virt_to_pfn(va); | |
397 | mfn = pfn_to_mfn(pfn); | |
398 | ||
399 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
400 | ||
401 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
402 | BUG(); | |
403 | ||
404 | frames[f] = mfn; | |
405 | } | |
406 | ||
407 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
408 | BUG(); | |
409 | } | |
410 | ||
5ead97c8 JF |
411 | static void load_TLS_descriptor(struct thread_struct *t, |
412 | unsigned int cpu, unsigned int i) | |
413 | { | |
414 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 415 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
416 | struct multicall_space mc = __xen_mc_entry(0); |
417 | ||
418 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
419 | } | |
420 | ||
421 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
422 | { | |
8b84ad94 | 423 | /* |
ccbeed3a TH |
424 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
425 | * and lazy gs handling is enabled, it means we're in a | |
426 | * context switch, and %gs has just been saved. This means we | |
427 | * can zero it out to prevent faults on exit from the | |
428 | * hypervisor if the next process has no %gs. Either way, it | |
429 | * has been saved, and the new value will get loaded properly. | |
430 | * This will go away as soon as Xen has been modified to not | |
431 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
432 | * |
433 | * On x86_64, this hack is not used for %gs, because gs points | |
434 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
435 | * must not zero %gs on x86_64 | |
436 | * | |
437 | * For x86_64, we need to zero %fs, otherwise we may get an | |
438 | * exception between the new %fs descriptor being loaded and | |
439 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 440 | */ |
8a95408e EH |
441 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
442 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 443 | lazy_load_gs(0); |
8a95408e EH |
444 | #else |
445 | loadsegment(fs, 0); | |
446 | #endif | |
447 | } | |
448 | ||
449 | xen_mc_batch(); | |
450 | ||
451 | load_TLS_descriptor(t, cpu, 0); | |
452 | load_TLS_descriptor(t, cpu, 1); | |
453 | load_TLS_descriptor(t, cpu, 2); | |
454 | ||
455 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
456 | } |
457 | ||
a8fc1089 EH |
458 | #ifdef CONFIG_X86_64 |
459 | static void xen_load_gs_index(unsigned int idx) | |
460 | { | |
461 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
462 | BUG(); | |
5ead97c8 | 463 | } |
a8fc1089 | 464 | #endif |
5ead97c8 JF |
465 | |
466 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 467 | const void *ptr) |
5ead97c8 | 468 | { |
cef43bf6 | 469 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 470 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 471 | |
f120f13e JF |
472 | preempt_disable(); |
473 | ||
5ead97c8 JF |
474 | xen_mc_flush(); |
475 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
476 | BUG(); | |
f120f13e JF |
477 | |
478 | preempt_enable(); | |
5ead97c8 JF |
479 | } |
480 | ||
e176d367 | 481 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
482 | struct trap_info *info) |
483 | { | |
6cac5a92 JF |
484 | unsigned long addr; |
485 | ||
6d02c426 | 486 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
487 | return 0; |
488 | ||
489 | info->vector = vector; | |
6cac5a92 JF |
490 | |
491 | addr = gate_offset(*val); | |
492 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
493 | /* |
494 | * Look for known traps using IST, and substitute them | |
495 | * appropriately. The debugger ones are the only ones we care | |
496 | * about. Xen will handle faults like double_fault and | |
497 | * machine_check, so we should never see them. Warn if | |
498 | * there's an unexpected IST-using fault handler. | |
499 | */ | |
6cac5a92 JF |
500 | if (addr == (unsigned long)debug) |
501 | addr = (unsigned long)xen_debug; | |
502 | else if (addr == (unsigned long)int3) | |
503 | addr = (unsigned long)xen_int3; | |
504 | else if (addr == (unsigned long)stack_segment) | |
505 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
506 | else if (addr == (unsigned long)double_fault || |
507 | addr == (unsigned long)nmi) { | |
508 | /* Don't need to handle these */ | |
509 | return 0; | |
510 | #ifdef CONFIG_X86_MCE | |
511 | } else if (addr == (unsigned long)machine_check) { | |
512 | return 0; | |
513 | #endif | |
514 | } else { | |
515 | /* Some other trap using IST? */ | |
516 | if (WARN_ON(val->ist != 0)) | |
517 | return 0; | |
518 | } | |
6cac5a92 JF |
519 | #endif /* CONFIG_X86_64 */ |
520 | info->address = addr; | |
521 | ||
e176d367 EH |
522 | info->cs = gate_segment(*val); |
523 | info->flags = val->dpl; | |
5ead97c8 | 524 | /* interrupt gates clear IF */ |
6d02c426 JF |
525 | if (val->type == GATE_INTERRUPT) |
526 | info->flags |= 1 << 2; | |
5ead97c8 JF |
527 | |
528 | return 1; | |
529 | } | |
530 | ||
531 | /* Locations of each CPU's IDT */ | |
6b68f01b | 532 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
533 | |
534 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
535 | also update Xen. */ | |
8d947344 | 536 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 537 | { |
5ead97c8 | 538 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
539 | unsigned long start, end; |
540 | ||
541 | preempt_disable(); | |
542 | ||
543 | start = __get_cpu_var(idt_desc).address; | |
544 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
545 | |
546 | xen_mc_flush(); | |
547 | ||
8d947344 | 548 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
549 | |
550 | if (p >= start && (p + 8) <= end) { | |
551 | struct trap_info info[2]; | |
552 | ||
553 | info[1].address = 0; | |
554 | ||
e176d367 | 555 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
556 | if (HYPERVISOR_set_trap_table(info)) |
557 | BUG(); | |
558 | } | |
f120f13e JF |
559 | |
560 | preempt_enable(); | |
5ead97c8 JF |
561 | } |
562 | ||
6b68f01b | 563 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 564 | struct trap_info *traps) |
5ead97c8 | 565 | { |
5ead97c8 JF |
566 | unsigned in, out, count; |
567 | ||
e176d367 | 568 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
569 | BUG_ON(count > 256); |
570 | ||
5ead97c8 | 571 | for (in = out = 0; in < count; in++) { |
e176d367 | 572 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 573 | |
e176d367 | 574 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
575 | out++; |
576 | } | |
577 | traps[out].address = 0; | |
f87e4cac JF |
578 | } |
579 | ||
580 | void xen_copy_trap_info(struct trap_info *traps) | |
581 | { | |
6b68f01b | 582 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
583 | |
584 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
585 | } |
586 | ||
587 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
588 | hold a spinlock to protect the static traps[] array (static because | |
589 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 590 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
591 | { |
592 | static DEFINE_SPINLOCK(lock); | |
593 | static struct trap_info traps[257]; | |
f87e4cac JF |
594 | |
595 | spin_lock(&lock); | |
596 | ||
f120f13e JF |
597 | __get_cpu_var(idt_desc) = *desc; |
598 | ||
f87e4cac | 599 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
600 | |
601 | xen_mc_flush(); | |
602 | if (HYPERVISOR_set_trap_table(traps)) | |
603 | BUG(); | |
604 | ||
605 | spin_unlock(&lock); | |
606 | } | |
607 | ||
608 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
609 | they're handled differently. */ | |
610 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 611 | const void *desc, int type) |
5ead97c8 | 612 | { |
f120f13e JF |
613 | preempt_disable(); |
614 | ||
014b15be GOC |
615 | switch (type) { |
616 | case DESC_LDT: | |
617 | case DESC_TSS: | |
5ead97c8 JF |
618 | /* ignore */ |
619 | break; | |
620 | ||
621 | default: { | |
9976b39b | 622 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
623 | |
624 | xen_mc_flush(); | |
014b15be | 625 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
626 | BUG(); |
627 | } | |
628 | ||
629 | } | |
f120f13e JF |
630 | |
631 | preempt_enable(); | |
5ead97c8 JF |
632 | } |
633 | ||
577eebea JF |
634 | /* |
635 | * Version of write_gdt_entry for use at early boot-time needed to | |
636 | * update an entry as simply as possible. | |
637 | */ | |
638 | static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, | |
639 | const void *desc, int type) | |
640 | { | |
641 | switch (type) { | |
642 | case DESC_LDT: | |
643 | case DESC_TSS: | |
644 | /* ignore */ | |
645 | break; | |
646 | ||
647 | default: { | |
648 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
649 | ||
650 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
651 | dt[entry] = *(struct desc_struct *)desc; | |
652 | } | |
653 | ||
654 | } | |
655 | } | |
656 | ||
faca6227 | 657 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 658 | struct thread_struct *thread) |
5ead97c8 JF |
659 | { |
660 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 661 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
662 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
663 | } | |
664 | ||
665 | static void xen_set_iopl_mask(unsigned mask) | |
666 | { | |
667 | struct physdev_set_iopl set_iopl; | |
668 | ||
669 | /* Force the change at ring 0. */ | |
670 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
671 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
672 | } | |
673 | ||
674 | static void xen_io_delay(void) | |
675 | { | |
676 | } | |
677 | ||
678 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 679 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
680 | { |
681 | return 0; | |
682 | } | |
f87e4cac | 683 | |
ad66dd34 | 684 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
685 | { |
686 | /* Warn to see if there's any stray references */ | |
687 | WARN_ON(1); | |
688 | } | |
ad66dd34 | 689 | |
ad66dd34 SS |
690 | static u64 xen_apic_icr_read(void) |
691 | { | |
692 | return 0; | |
693 | } | |
694 | ||
695 | static void xen_apic_icr_write(u32 low, u32 id) | |
696 | { | |
697 | /* Warn to see if there's any stray references */ | |
698 | WARN_ON(1); | |
699 | } | |
700 | ||
701 | static void xen_apic_wait_icr_idle(void) | |
702 | { | |
703 | return; | |
704 | } | |
705 | ||
94a8c3c2 YL |
706 | static u32 xen_safe_apic_wait_icr_idle(void) |
707 | { | |
708 | return 0; | |
709 | } | |
710 | ||
c1eeb2de YL |
711 | static void set_xen_basic_apic_ops(void) |
712 | { | |
713 | apic->read = xen_apic_read; | |
714 | apic->write = xen_apic_write; | |
715 | apic->icr_read = xen_apic_icr_read; | |
716 | apic->icr_write = xen_apic_icr_write; | |
717 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
718 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
719 | } | |
ad66dd34 | 720 | |
5ead97c8 JF |
721 | #endif |
722 | ||
f87e4cac | 723 | |
7b1333aa JF |
724 | static void xen_clts(void) |
725 | { | |
726 | struct multicall_space mcs; | |
727 | ||
728 | mcs = xen_mc_entry(0); | |
729 | ||
730 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
731 | ||
732 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
733 | } | |
734 | ||
a789ed5f JF |
735 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
736 | ||
737 | static unsigned long xen_read_cr0(void) | |
738 | { | |
739 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
740 | ||
741 | if (unlikely(cr0 == 0)) { | |
742 | cr0 = native_read_cr0(); | |
743 | percpu_write(xen_cr0_value, cr0); | |
744 | } | |
745 | ||
746 | return cr0; | |
747 | } | |
748 | ||
7b1333aa JF |
749 | static void xen_write_cr0(unsigned long cr0) |
750 | { | |
751 | struct multicall_space mcs; | |
752 | ||
a789ed5f JF |
753 | percpu_write(xen_cr0_value, cr0); |
754 | ||
7b1333aa JF |
755 | /* Only pay attention to cr0.TS; everything else is |
756 | ignored. */ | |
757 | mcs = xen_mc_entry(0); | |
758 | ||
759 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
760 | ||
761 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
762 | } | |
763 | ||
5ead97c8 JF |
764 | static void xen_write_cr4(unsigned long cr4) |
765 | { | |
2956a351 JF |
766 | cr4 &= ~X86_CR4_PGE; |
767 | cr4 &= ~X86_CR4_PSE; | |
768 | ||
769 | native_write_cr4(cr4); | |
5ead97c8 JF |
770 | } |
771 | ||
1153968a JF |
772 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
773 | { | |
774 | int ret; | |
775 | ||
776 | ret = 0; | |
777 | ||
f63c2f24 | 778 | switch (msr) { |
1153968a JF |
779 | #ifdef CONFIG_X86_64 |
780 | unsigned which; | |
781 | u64 base; | |
782 | ||
783 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
784 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
785 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
786 | ||
787 | set: | |
788 | base = ((u64)high << 32) | low; | |
789 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 790 | ret = -EIO; |
1153968a JF |
791 | break; |
792 | #endif | |
d89961e2 JF |
793 | |
794 | case MSR_STAR: | |
795 | case MSR_CSTAR: | |
796 | case MSR_LSTAR: | |
797 | case MSR_SYSCALL_MASK: | |
798 | case MSR_IA32_SYSENTER_CS: | |
799 | case MSR_IA32_SYSENTER_ESP: | |
800 | case MSR_IA32_SYSENTER_EIP: | |
801 | /* Fast syscall setup is all done in hypercalls, so | |
802 | these are all ignored. Stub them out here to stop | |
803 | Xen console noise. */ | |
804 | break; | |
805 | ||
1153968a JF |
806 | default: |
807 | ret = native_write_msr_safe(msr, low, high); | |
808 | } | |
809 | ||
810 | return ret; | |
811 | } | |
812 | ||
0e91398f | 813 | void xen_setup_shared_info(void) |
5ead97c8 JF |
814 | { |
815 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
816 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
817 | xen_start_info->shared_info); | |
818 | ||
819 | HYPERVISOR_shared_info = | |
820 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
821 | } else |
822 | HYPERVISOR_shared_info = | |
823 | (struct shared_info *)__va(xen_start_info->shared_info); | |
824 | ||
2e8fe719 JF |
825 | #ifndef CONFIG_SMP |
826 | /* In UP this is as good a place as any to set up shared info */ | |
827 | xen_setup_vcpu_info_placement(); | |
828 | #endif | |
d5edbc1f JF |
829 | |
830 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
831 | } |
832 | ||
60223a32 | 833 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 834 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
835 | { |
836 | int cpu; | |
837 | ||
838 | for_each_possible_cpu(cpu) | |
839 | xen_vcpu_setup(cpu); | |
840 | ||
841 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
842 | percpu area for all cpus, so make use of it */ | |
843 | if (have_vcpu_info_placement) { | |
844 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
845 | ||
ecb93d1c JF |
846 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
847 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
848 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
849 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 850 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 851 | } |
5ead97c8 JF |
852 | } |
853 | ||
ab144f5e AK |
854 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
855 | unsigned long addr, unsigned len) | |
6487673b JF |
856 | { |
857 | char *start, *end, *reloc; | |
858 | unsigned ret; | |
859 | ||
860 | start = end = reloc = NULL; | |
861 | ||
93b1eab3 JF |
862 | #define SITE(op, x) \ |
863 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
864 | if (have_vcpu_info_placement) { \ |
865 | start = (char *)xen_##x##_direct; \ | |
866 | end = xen_##x##_direct_end; \ | |
867 | reloc = xen_##x##_direct_reloc; \ | |
868 | } \ | |
869 | goto patch_site | |
870 | ||
871 | switch (type) { | |
93b1eab3 JF |
872 | SITE(pv_irq_ops, irq_enable); |
873 | SITE(pv_irq_ops, irq_disable); | |
874 | SITE(pv_irq_ops, save_fl); | |
875 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
876 | #undef SITE |
877 | ||
878 | patch_site: | |
879 | if (start == NULL || (end-start) > len) | |
880 | goto default_patch; | |
881 | ||
ab144f5e | 882 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
883 | |
884 | /* Note: because reloc is assigned from something that | |
885 | appears to be an array, gcc assumes it's non-null, | |
886 | but doesn't know its relationship with start and | |
887 | end. */ | |
888 | if (reloc > start && reloc < end) { | |
889 | int reloc_off = reloc - start; | |
ab144f5e AK |
890 | long *relocp = (long *)(insnbuf + reloc_off); |
891 | long delta = start - (char *)addr; | |
6487673b JF |
892 | |
893 | *relocp += delta; | |
894 | } | |
895 | break; | |
896 | ||
897 | default_patch: | |
898 | default: | |
ab144f5e AK |
899 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
900 | addr, len); | |
6487673b JF |
901 | break; |
902 | } | |
903 | ||
904 | return ret; | |
905 | } | |
906 | ||
93b1eab3 | 907 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
908 | .paravirt_enabled = 1, |
909 | .shared_kernel_pmd = 0, | |
910 | ||
911 | .name = "Xen", | |
93b1eab3 | 912 | }; |
5ead97c8 | 913 | |
93b1eab3 | 914 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 915 | .patch = xen_patch, |
93b1eab3 | 916 | }; |
5ead97c8 | 917 | |
93b1eab3 | 918 | static const struct pv_time_ops xen_time_ops __initdata = { |
ab550288 | 919 | .sched_clock = xen_sched_clock, |
93b1eab3 | 920 | }; |
15c84731 | 921 | |
93b1eab3 | 922 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
923 | .cpuid = xen_cpuid, |
924 | ||
925 | .set_debugreg = xen_set_debugreg, | |
926 | .get_debugreg = xen_get_debugreg, | |
927 | ||
7b1333aa | 928 | .clts = xen_clts, |
5ead97c8 | 929 | |
a789ed5f | 930 | .read_cr0 = xen_read_cr0, |
7b1333aa | 931 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 932 | |
5ead97c8 JF |
933 | .read_cr4 = native_read_cr4, |
934 | .read_cr4_safe = native_read_cr4_safe, | |
935 | .write_cr4 = xen_write_cr4, | |
936 | ||
5ead97c8 JF |
937 | .wbinvd = native_wbinvd, |
938 | ||
939 | .read_msr = native_read_msr_safe, | |
1153968a | 940 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
941 | .read_tsc = native_read_tsc, |
942 | .read_pmc = native_read_pmc, | |
943 | ||
81e103f1 | 944 | .iret = xen_iret, |
d75cd22f | 945 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
946 | #ifdef CONFIG_X86_64 |
947 | .usergs_sysret32 = xen_sysret32, | |
948 | .usergs_sysret64 = xen_sysret64, | |
949 | #endif | |
5ead97c8 JF |
950 | |
951 | .load_tr_desc = paravirt_nop, | |
952 | .set_ldt = xen_set_ldt, | |
953 | .load_gdt = xen_load_gdt, | |
954 | .load_idt = xen_load_idt, | |
955 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
956 | #ifdef CONFIG_X86_64 |
957 | .load_gs_index = xen_load_gs_index, | |
958 | #endif | |
5ead97c8 | 959 | |
38ffbe66 JF |
960 | .alloc_ldt = xen_alloc_ldt, |
961 | .free_ldt = xen_free_ldt, | |
962 | ||
5ead97c8 JF |
963 | .store_gdt = native_store_gdt, |
964 | .store_idt = native_store_idt, | |
965 | .store_tr = xen_store_tr, | |
966 | ||
967 | .write_ldt_entry = xen_write_ldt_entry, | |
968 | .write_gdt_entry = xen_write_gdt_entry, | |
969 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 970 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
971 | |
972 | .set_iopl_mask = xen_set_iopl_mask, | |
973 | .io_delay = xen_io_delay, | |
974 | ||
952d1d70 JF |
975 | /* Xen takes care of %gs when switching to usermode for us */ |
976 | .swapgs = paravirt_nop, | |
977 | ||
224101ed JF |
978 | .start_context_switch = paravirt_start_context_switch, |
979 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
980 | }; |
981 | ||
93b1eab3 | 982 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 983 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
984 | .startup_ipi_hook = paravirt_nop, |
985 | #endif | |
93b1eab3 JF |
986 | }; |
987 | ||
fefa629a JF |
988 | static void xen_reboot(int reason) |
989 | { | |
349c709f JF |
990 | struct sched_shutdown r = { .reason = reason }; |
991 | ||
fefa629a JF |
992 | #ifdef CONFIG_SMP |
993 | smp_send_stop(); | |
994 | #endif | |
995 | ||
349c709f | 996 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
997 | BUG(); |
998 | } | |
999 | ||
1000 | static void xen_restart(char *msg) | |
1001 | { | |
1002 | xen_reboot(SHUTDOWN_reboot); | |
1003 | } | |
1004 | ||
1005 | static void xen_emergency_restart(void) | |
1006 | { | |
1007 | xen_reboot(SHUTDOWN_reboot); | |
1008 | } | |
1009 | ||
1010 | static void xen_machine_halt(void) | |
1011 | { | |
1012 | xen_reboot(SHUTDOWN_poweroff); | |
1013 | } | |
1014 | ||
1015 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1016 | { | |
1017 | xen_reboot(SHUTDOWN_crash); | |
1018 | } | |
1019 | ||
1020 | static const struct machine_ops __initdata xen_machine_ops = { | |
1021 | .restart = xen_restart, | |
1022 | .halt = xen_machine_halt, | |
1023 | .power_off = xen_machine_halt, | |
1024 | .shutdown = xen_machine_halt, | |
1025 | .crash_shutdown = xen_crash_shutdown, | |
1026 | .emergency_restart = xen_emergency_restart, | |
1027 | }; | |
1028 | ||
577eebea JF |
1029 | /* |
1030 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1031 | * we do this, we have to be careful not to call any stack-protected | |
1032 | * function, which is most of the kernel. | |
1033 | */ | |
1034 | static void __init xen_setup_stackprotector(void) | |
1035 | { | |
1036 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1037 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1038 | ||
1039 | setup_stack_canary_segment(0); | |
1040 | switch_to_new_gdt(0); | |
1041 | ||
1042 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1043 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1044 | } | |
1045 | ||
5ead97c8 JF |
1046 | /* First C function to be called on Xen boot */ |
1047 | asmlinkage void __init xen_start_kernel(void) | |
1048 | { | |
1049 | pgd_t *pgd; | |
1050 | ||
1051 | if (!xen_start_info) | |
1052 | return; | |
1053 | ||
6e833587 JF |
1054 | xen_domain_type = XEN_PV_DOMAIN; |
1055 | ||
5ead97c8 | 1056 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1057 | pv_info = xen_info; |
1058 | pv_init_ops = xen_init_ops; | |
1059 | pv_time_ops = xen_time_ops; | |
1060 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 | 1061 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1062 | |
6b18ae3e | 1063 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1064 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1065 | x86_init.oem.banner = xen_banner; |
845b3944 TG |
1066 | |
1067 | x86_init.timers.timer_init = xen_time_init; | |
736decac TG |
1068 | x86_init.timers.setup_percpu_clockev = x86_init_noop; |
1069 | x86_cpuinit.setup_percpu_clockev = x86_init_noop; | |
6b18ae3e | 1070 | |
2d826404 | 1071 | x86_platform.calibrate_tsc = xen_tsc_khz; |
7bd867df FT |
1072 | x86_platform.get_wallclock = xen_get_wallclock; |
1073 | x86_platform.set_wallclock = xen_set_wallclock; | |
93b1eab3 | 1074 | |
ce2eef33 | 1075 | /* |
577eebea | 1076 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1077 | */ |
577eebea | 1078 | |
973df35e JF |
1079 | xen_init_mmu_ops(); |
1080 | ||
577eebea JF |
1081 | /* Prevent unwanted bits from being set in PTEs. */ |
1082 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1083 | if (!xen_initial_domain()) | |
1084 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1085 | ||
1086 | __supported_pte_mask |= _PAGE_IOMAP; | |
1087 | ||
b75fe4e5 JF |
1088 | #ifdef CONFIG_X86_64 |
1089 | /* Work out if we support NX */ | |
1090 | check_efer(); | |
1091 | #endif | |
1092 | ||
577eebea JF |
1093 | xen_setup_features(); |
1094 | ||
1095 | /* Get mfn list */ | |
1096 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1097 | xen_build_dynamic_phys_to_machine(); | |
1098 | ||
1099 | /* | |
1100 | * Set up kernel GDT and segment registers, mainly so that | |
1101 | * -fstack-protector code can be executed. | |
1102 | */ | |
1103 | xen_setup_stackprotector(); | |
0d1edf46 | 1104 | |
ce2eef33 | 1105 | xen_init_irq_ops(); |
e826fe1b JF |
1106 | xen_init_cpuid_mask(); |
1107 | ||
94a8c3c2 | 1108 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1109 | /* |
94a8c3c2 | 1110 | * set up the basic apic ops. |
ad66dd34 | 1111 | */ |
c1eeb2de | 1112 | set_xen_basic_apic_ops(); |
ad66dd34 | 1113 | #endif |
93b1eab3 | 1114 | |
e57778a1 JF |
1115 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1116 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1117 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1118 | } | |
1119 | ||
fefa629a JF |
1120 | machine_ops = xen_machine_ops; |
1121 | ||
38341432 JF |
1122 | /* |
1123 | * The only reliable way to retain the initial address of the | |
1124 | * percpu gdt_page is to remember it here, so we can go and | |
1125 | * mark it RW later, when the initial percpu area is freed. | |
1126 | */ | |
1127 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1128 | |
a9e7062d | 1129 | xen_smp_init(); |
5ead97c8 | 1130 | |
5ead97c8 JF |
1131 | pgd = (pgd_t *)xen_start_info->pt_base; |
1132 | ||
60223a32 | 1133 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1134 | possible map and a non-dummy shared_info. */ |
60223a32 | 1135 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1136 | |
55d80856 JF |
1137 | local_irq_disable(); |
1138 | early_boot_irqs_off(); | |
1139 | ||
084a2a4e | 1140 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1141 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1142 | |
084a2a4e | 1143 | init_mm.pgd = pgd; |
5ead97c8 JF |
1144 | |
1145 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1146 | ||
93b1eab3 | 1147 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1148 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1149 | pv_info.kernel_rpl = 0; |
5ead97c8 JF |
1150 | |
1151 | /* set the limit of our address space */ | |
fb1d8404 | 1152 | xen_reserve_top(); |
5ead97c8 | 1153 | |
7d087b68 | 1154 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1155 | /* set up basic CPUID stuff */ |
1156 | cpu_detect(&new_cpu_data); | |
1157 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1158 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1159 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1160 | #endif |
5ead97c8 JF |
1161 | |
1162 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1163 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1164 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1165 | ? __pa(xen_start_info->mod_start) : 0; | |
1166 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1167 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1168 | |
6e833587 | 1169 | if (!xen_initial_domain()) { |
83abc70a | 1170 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1171 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1172 | add_preferred_console("hvc", 0, NULL); |
9e124fe1 | 1173 | } |
b8c2d3df | 1174 | |
084a2a4e JF |
1175 | xen_raw_console_write("about to get started...\n"); |
1176 | ||
5ead97c8 | 1177 | /* Start the world */ |
f5d36de0 | 1178 | #ifdef CONFIG_X86_32 |
f0d43100 | 1179 | i386_start_kernel(); |
f5d36de0 | 1180 | #else |
084a2a4e | 1181 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1182 | #endif |
5ead97c8 | 1183 | } |