Merge branches 'x86/xen', 'x86/build', 'x86/microcode', 'x86/mm-debug-v2', 'x86/memor...
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
33#include <xen/features.h>
34#include <xen/page.h>
084a2a4e 35#include <xen/hvc-console.h>
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36
37#include <asm/paravirt.h>
caf43bf7 38#include <asm/apic.h>
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39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
1153968a 44#include <asm/msr-index.h>
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45#include <asm/setup.h>
46#include <asm/desc.h>
47#include <asm/pgtable.h>
f87e4cac 48#include <asm/tlbflush.h>
fefa629a 49#include <asm/reboot.h>
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50
51#include "xen-ops.h"
3b827c1b 52#include "mmu.h"
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53#include "multicalls.h"
54
55EXPORT_SYMBOL_GPL(hypercall_page);
56
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57DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
58DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 59
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60enum xen_domain_type xen_domain_type = XEN_NATIVE;
61EXPORT_SYMBOL_GPL(xen_domain_type);
62
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63/*
64 * Identity map, in addition to plain kernel map. This needs to be
65 * large enough to allocate page table pages to allocate the rest.
66 * Each page can map 2MB.
67 */
68static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
69
70#ifdef CONFIG_X86_64
71/* l3 pud for userspace vsyscall mapping */
72static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
73#endif /* CONFIG_X86_64 */
74
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75/*
76 * Note about cr3 (pagetable base) values:
77 *
78 * xen_cr3 contains the current logical cr3 value; it contains the
79 * last set cr3. This may not be the current effective cr3, because
80 * its update may be being lazily deferred. However, a vcpu looking
81 * at its own cr3 can use this value knowing that it everything will
82 * be self-consistent.
83 *
84 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
85 * hypercall to set the vcpu cr3 is complete (so it may be a little
86 * out of date, but it will never be set early). If one vcpu is
87 * looking at another vcpu's cr3 value, it should use this variable.
88 */
89DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
90DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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91
92struct start_info *xen_start_info;
93EXPORT_SYMBOL_GPL(xen_start_info);
94
a0d695c8 95struct shared_info xen_dummy_shared_info;
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96
97/*
98 * Point at some empty memory to start with. We map the real shared_info
99 * page as soon as fixmap is up and running.
100 */
a0d695c8 101struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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102
103/*
104 * Flag to determine whether vcpu info placement is available on all
105 * VCPUs. We assume it is to start with, and then set it to zero on
106 * the first failure. This is because it can succeed on some VCPUs
107 * and not others, since it can involve hypervisor memory allocation,
108 * or because the guest failed to guarantee all the appropriate
109 * constraints on all VCPUs (ie buffer can't cross a page boundary).
110 *
111 * Note that any particular CPU may be using a placed vcpu structure,
112 * but we can only optimise if the all are.
113 *
114 * 0: not available, 1: available
115 */
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116static int have_vcpu_info_placement =
117#ifdef CONFIG_X86_32
118 1
119#else
120 0
121#endif
122 ;
123
60223a32 124
9c7a7942 125static void xen_vcpu_setup(int cpu)
5ead97c8 126{
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127 struct vcpu_register_vcpu_info info;
128 int err;
129 struct vcpu_info *vcpup;
130
a0d695c8 131 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 132 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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133
134 if (!have_vcpu_info_placement)
135 return; /* already tested, not available */
136
137 vcpup = &per_cpu(xen_vcpu_info, cpu);
138
139 info.mfn = virt_to_mfn(vcpup);
140 info.offset = offset_in_page(vcpup);
141
e3d26976 142 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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143 cpu, vcpup, info.mfn, info.offset);
144
145 /* Check to see if the hypervisor will put the vcpu_info
146 structure where we want it, which allows direct access via
147 a percpu-variable. */
148 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
149
150 if (err) {
151 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
152 have_vcpu_info_placement = 0;
153 } else {
154 /* This cpu is using the registered vcpu info, even if
155 later ones fail to. */
156 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 157
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158 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
159 cpu, vcpup);
160 }
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161}
162
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163/*
164 * On restore, set the vcpu placement up again.
165 * If it fails, then we're in a bad state, since
166 * we can't back out from using it...
167 */
168void xen_vcpu_restore(void)
169{
170 if (have_vcpu_info_placement) {
171 int cpu;
172
173 for_each_online_cpu(cpu) {
174 bool other_cpu = (cpu != smp_processor_id());
175
176 if (other_cpu &&
177 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
178 BUG();
179
180 xen_vcpu_setup(cpu);
181
182 if (other_cpu &&
183 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
184 BUG();
185 }
186
187 BUG_ON(!have_vcpu_info_placement);
188 }
189}
190
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191static void __init xen_banner(void)
192{
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193 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
194 struct xen_extraversion extra;
195 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
196
5ead97c8 197 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 198 pv_info.name);
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199 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
200 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 201 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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202}
203
65ea5b03
PA
204static void xen_cpuid(unsigned int *ax, unsigned int *bx,
205 unsigned int *cx, unsigned int *dx)
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206{
207 unsigned maskedx = ~0;
208
209 /*
210 * Mask out inconvenient features, to try and disable as many
211 * unsupported kernel subsystems as possible.
212 */
65ea5b03 213 if (*ax == 1)
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214 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
215 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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216 (1 << X86_FEATURE_MCE) | /* disable MCE */
217 (1 << X86_FEATURE_MCA) | /* disable MCA */
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218 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
219
220 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
221 : "=a" (*ax),
222 "=b" (*bx),
223 "=c" (*cx),
224 "=d" (*dx)
225 : "0" (*ax), "2" (*cx));
226 *dx &= maskedx;
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227}
228
229static void xen_set_debugreg(int reg, unsigned long val)
230{
231 HYPERVISOR_set_debugreg(reg, val);
232}
233
234static unsigned long xen_get_debugreg(int reg)
235{
236 return HYPERVISOR_get_debugreg(reg);
237}
238
8965c1c0 239static void xen_leave_lazy(void)
5ead97c8 240{
8965c1c0 241 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 242 xen_mc_flush();
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243}
244
245static unsigned long xen_store_tr(void)
246{
247 return 0;
248}
249
a05d2eba 250/*
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251 * Set the page permissions for a particular virtual address. If the
252 * address is a vmalloc mapping (or other non-linear mapping), then
253 * find the linear mapping of the page and also set its protections to
254 * match.
a05d2eba
JF
255 */
256static void set_aliased_prot(void *v, pgprot_t prot)
257{
258 int level;
259 pte_t *ptep;
260 pte_t pte;
261 unsigned long pfn;
262 struct page *page;
263
264 ptep = lookup_address((unsigned long)v, &level);
265 BUG_ON(ptep == NULL);
266
267 pfn = pte_pfn(*ptep);
268 page = pfn_to_page(pfn);
269
270 pte = pfn_pte(pfn, prot);
271
272 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
273 BUG();
274
275 if (!PageHighMem(page)) {
276 void *av = __va(PFN_PHYS(pfn));
277
278 if (av != v)
279 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
280 BUG();
281 } else
282 kmap_flush_unused();
283}
284
38ffbe66
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285static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
286{
a05d2eba 287 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
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288 int i;
289
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290 for(i = 0; i < entries; i += entries_per_page)
291 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
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292}
293
294static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
295{
a05d2eba 296 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
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297 int i;
298
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299 for(i = 0; i < entries; i += entries_per_page)
300 set_aliased_prot(ldt + i, PAGE_KERNEL);
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301}
302
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303static void xen_set_ldt(const void *addr, unsigned entries)
304{
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305 struct mmuext_op *op;
306 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
307
308 op = mcs.args;
309 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 310 op->arg1.linear_addr = (unsigned long)addr;
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311 op->arg2.nr_ents = entries;
312
313 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
314
315 xen_mc_issue(PARAVIRT_LAZY_CPU);
316}
317
6b68f01b 318static void xen_load_gdt(const struct desc_ptr *dtr)
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319{
320 unsigned long *frames;
321 unsigned long va = dtr->address;
322 unsigned int size = dtr->size + 1;
323 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
324 int f;
325 struct multicall_space mcs;
326
327 /* A GDT can be up to 64k in size, which corresponds to 8192
328 8-byte entries, or 16 4k pages.. */
329
330 BUG_ON(size > 65536);
331 BUG_ON(va & ~PAGE_MASK);
332
333 mcs = xen_mc_entry(sizeof(*frames) * pages);
334 frames = mcs.args;
335
336 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
337 frames[f] = virt_to_mfn(va);
338 make_lowmem_page_readonly((void *)va);
339 }
340
341 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
342
343 xen_mc_issue(PARAVIRT_LAZY_CPU);
344}
345
346static void load_TLS_descriptor(struct thread_struct *t,
347 unsigned int cpu, unsigned int i)
348{
349 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
350 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
351 struct multicall_space mc = __xen_mc_entry(0);
352
353 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
354}
355
356static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
357{
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358 /*
359 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
360 * it means we're in a context switch, and %gs has just been
361 * saved. This means we can zero it out to prevent faults on
362 * exit from the hypervisor if the next process has no %gs.
363 * Either way, it has been saved, and the new value will get
364 * loaded properly. This will go away as soon as Xen has been
365 * modified to not save/restore %gs for normal hypercalls.
8a95408e
EH
366 *
367 * On x86_64, this hack is not used for %gs, because gs points
368 * to KERNEL_GS_BASE (and uses it for PDA references), so we
369 * must not zero %gs on x86_64
370 *
371 * For x86_64, we need to zero %fs, otherwise we may get an
372 * exception between the new %fs descriptor being loaded and
373 * %fs being effectively cleared at __switch_to().
8b84ad94 374 */
8a95408e
EH
375 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
376#ifdef CONFIG_X86_32
8b84ad94 377 loadsegment(gs, 0);
8a95408e
EH
378#else
379 loadsegment(fs, 0);
380#endif
381 }
382
383 xen_mc_batch();
384
385 load_TLS_descriptor(t, cpu, 0);
386 load_TLS_descriptor(t, cpu, 1);
387 load_TLS_descriptor(t, cpu, 2);
388
389 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
390}
391
a8fc1089
EH
392#ifdef CONFIG_X86_64
393static void xen_load_gs_index(unsigned int idx)
394{
395 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
396 BUG();
5ead97c8 397}
a8fc1089 398#endif
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399
400static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 401 const void *ptr)
5ead97c8 402{
cef43bf6 403 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 404 u64 entry = *(u64 *)ptr;
5ead97c8 405
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406 preempt_disable();
407
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408 xen_mc_flush();
409 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
410 BUG();
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411
412 preempt_enable();
5ead97c8
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413}
414
e176d367 415static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
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416 struct trap_info *info)
417{
e176d367 418 if (val->type != 0xf && val->type != 0xe)
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JF
419 return 0;
420
421 info->vector = vector;
e176d367
EH
422 info->address = gate_offset(*val);
423 info->cs = gate_segment(*val);
424 info->flags = val->dpl;
5ead97c8 425 /* interrupt gates clear IF */
e176d367 426 if (val->type == 0xe)
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427 info->flags |= 4;
428
429 return 1;
430}
431
432/* Locations of each CPU's IDT */
6b68f01b 433static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
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434
435/* Set an IDT entry. If the entry is part of the current IDT, then
436 also update Xen. */
8d947344 437static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 438{
5ead97c8 439 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
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440 unsigned long start, end;
441
442 preempt_disable();
443
444 start = __get_cpu_var(idt_desc).address;
445 end = start + __get_cpu_var(idt_desc).size + 1;
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446
447 xen_mc_flush();
448
8d947344 449 native_write_idt_entry(dt, entrynum, g);
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450
451 if (p >= start && (p + 8) <= end) {
452 struct trap_info info[2];
453
454 info[1].address = 0;
455
e176d367 456 if (cvt_gate_to_trap(entrynum, g, &info[0]))
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457 if (HYPERVISOR_set_trap_table(info))
458 BUG();
459 }
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460
461 preempt_enable();
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462}
463
6b68f01b 464static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 465 struct trap_info *traps)
5ead97c8 466{
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467 unsigned in, out, count;
468
e176d367 469 count = (desc->size+1) / sizeof(gate_desc);
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470 BUG_ON(count > 256);
471
5ead97c8 472 for (in = out = 0; in < count; in++) {
e176d367 473 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 474
e176d367 475 if (cvt_gate_to_trap(in, entry, &traps[out]))
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476 out++;
477 }
478 traps[out].address = 0;
f87e4cac
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479}
480
481void xen_copy_trap_info(struct trap_info *traps)
482{
6b68f01b 483 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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484
485 xen_convert_trap_info(desc, traps);
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486}
487
488/* Load a new IDT into Xen. In principle this can be per-CPU, so we
489 hold a spinlock to protect the static traps[] array (static because
490 it avoids allocation, and saves stack space). */
6b68f01b 491static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
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492{
493 static DEFINE_SPINLOCK(lock);
494 static struct trap_info traps[257];
f87e4cac
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495
496 spin_lock(&lock);
497
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498 __get_cpu_var(idt_desc) = *desc;
499
f87e4cac 500 xen_convert_trap_info(desc, traps);
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501
502 xen_mc_flush();
503 if (HYPERVISOR_set_trap_table(traps))
504 BUG();
505
506 spin_unlock(&lock);
507}
508
509/* Write a GDT descriptor entry. Ignore LDT descriptors, since
510 they're handled differently. */
511static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 512 const void *desc, int type)
5ead97c8 513{
f120f13e
JF
514 preempt_disable();
515
014b15be
GOC
516 switch (type) {
517 case DESC_LDT:
518 case DESC_TSS:
5ead97c8
JF
519 /* ignore */
520 break;
521
522 default: {
523 xmaddr_t maddr = virt_to_machine(&dt[entry]);
5ead97c8
JF
524
525 xen_mc_flush();
014b15be 526 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
527 BUG();
528 }
529
530 }
f120f13e
JF
531
532 preempt_enable();
5ead97c8
JF
533}
534
faca6227 535static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 536 struct thread_struct *thread)
5ead97c8
JF
537{
538 struct multicall_space mcs = xen_mc_entry(0);
faca6227 539 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
540 xen_mc_issue(PARAVIRT_LAZY_CPU);
541}
542
543static void xen_set_iopl_mask(unsigned mask)
544{
545 struct physdev_set_iopl set_iopl;
546
547 /* Force the change at ring 0. */
548 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
549 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
550}
551
552static void xen_io_delay(void)
553{
554}
555
556#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 557static u32 xen_apic_read(u32 reg)
5ead97c8
JF
558{
559 return 0;
560}
f87e4cac 561
ad66dd34 562static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
563{
564 /* Warn to see if there's any stray references */
565 WARN_ON(1);
566}
ad66dd34 567
ad66dd34
SS
568static u64 xen_apic_icr_read(void)
569{
570 return 0;
571}
572
573static void xen_apic_icr_write(u32 low, u32 id)
574{
575 /* Warn to see if there's any stray references */
576 WARN_ON(1);
577}
578
579static void xen_apic_wait_icr_idle(void)
580{
581 return;
582}
583
94a8c3c2
YL
584static u32 xen_safe_apic_wait_icr_idle(void)
585{
586 return 0;
587}
588
ad66dd34
SS
589static struct apic_ops xen_basic_apic_ops = {
590 .read = xen_apic_read,
591 .write = xen_apic_write,
ad66dd34
SS
592 .icr_read = xen_apic_icr_read,
593 .icr_write = xen_apic_icr_write,
594 .wait_icr_idle = xen_apic_wait_icr_idle,
94a8c3c2 595 .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
ad66dd34 596};
ad66dd34 597
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598#endif
599
600static void xen_flush_tlb(void)
601{
d66bf8fc 602 struct mmuext_op *op;
41e332b2
JF
603 struct multicall_space mcs;
604
605 preempt_disable();
606
607 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 608
d66bf8fc
JF
609 op = mcs.args;
610 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
611 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
612
613 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
614
615 preempt_enable();
5ead97c8
JF
616}
617
618static void xen_flush_tlb_single(unsigned long addr)
619{
d66bf8fc 620 struct mmuext_op *op;
41e332b2
JF
621 struct multicall_space mcs;
622
623 preempt_disable();
5ead97c8 624
41e332b2 625 mcs = xen_mc_entry(sizeof(*op));
d66bf8fc
JF
626 op = mcs.args;
627 op->cmd = MMUEXT_INVLPG_LOCAL;
628 op->arg1.linear_addr = addr & PAGE_MASK;
629 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
630
631 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
632
633 preempt_enable();
5ead97c8
JF
634}
635
f87e4cac
JF
636static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
637 unsigned long va)
638{
d66bf8fc
JF
639 struct {
640 struct mmuext_op op;
641 cpumask_t mask;
642 } *args;
f87e4cac 643 cpumask_t cpumask = *cpus;
d66bf8fc 644 struct multicall_space mcs;
f87e4cac
JF
645
646 /*
647 * A couple of (to be removed) sanity checks:
648 *
649 * - current CPU must not be in mask
650 * - mask must exist :)
651 */
652 BUG_ON(cpus_empty(cpumask));
653 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
654 BUG_ON(!mm);
655
656 /* If a CPU which we ran on has gone down, OK. */
657 cpus_and(cpumask, cpumask, cpu_online_map);
658 if (cpus_empty(cpumask))
659 return;
660
d66bf8fc
JF
661 mcs = xen_mc_entry(sizeof(*args));
662 args = mcs.args;
663 args->mask = cpumask;
664 args->op.arg2.vcpumask = &args->mask;
665
f87e4cac 666 if (va == TLB_FLUSH_ALL) {
d66bf8fc 667 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 668 } else {
d66bf8fc
JF
669 args->op.cmd = MMUEXT_INVLPG_MULTI;
670 args->op.arg1.linear_addr = va;
f87e4cac
JF
671 }
672
d66bf8fc
JF
673 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
674
675 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
676}
677
7b1333aa
JF
678static void xen_clts(void)
679{
680 struct multicall_space mcs;
681
682 mcs = xen_mc_entry(0);
683
684 MULTI_fpu_taskswitch(mcs.mc, 0);
685
686 xen_mc_issue(PARAVIRT_LAZY_CPU);
687}
688
689static void xen_write_cr0(unsigned long cr0)
690{
691 struct multicall_space mcs;
692
693 /* Only pay attention to cr0.TS; everything else is
694 ignored. */
695 mcs = xen_mc_entry(0);
696
697 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
698
699 xen_mc_issue(PARAVIRT_LAZY_CPU);
700}
701
60223a32
JF
702static void xen_write_cr2(unsigned long cr2)
703{
704 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
705}
706
5ead97c8
JF
707static unsigned long xen_read_cr2(void)
708{
709 return x86_read_percpu(xen_vcpu)->arch.cr2;
710}
711
60223a32
JF
712static unsigned long xen_read_cr2_direct(void)
713{
714 return x86_read_percpu(xen_vcpu_info.arch.cr2);
715}
716
5ead97c8
JF
717static void xen_write_cr4(unsigned long cr4)
718{
2956a351
JF
719 cr4 &= ~X86_CR4_PGE;
720 cr4 &= ~X86_CR4_PSE;
721
722 native_write_cr4(cr4);
5ead97c8
JF
723}
724
5ead97c8
JF
725static unsigned long xen_read_cr3(void)
726{
727 return x86_read_percpu(xen_cr3);
728}
729
9f79991d
JF
730static void set_current_cr3(void *v)
731{
732 x86_write_percpu(xen_current_cr3, (unsigned long)v);
733}
734
d6182fbf 735static void __xen_write_cr3(bool kernel, unsigned long cr3)
5ead97c8 736{
9f79991d
JF
737 struct mmuext_op *op;
738 struct multicall_space mcs;
d6182fbf 739 unsigned long mfn;
9f79991d 740
d6182fbf
JF
741 if (cr3)
742 mfn = pfn_to_mfn(PFN_DOWN(cr3));
743 else
744 mfn = 0;
f120f13e 745
d6182fbf 746 WARN_ON(mfn == 0 && kernel);
5ead97c8 747
d6182fbf 748 mcs = __xen_mc_entry(sizeof(*op));
5ead97c8 749
9f79991d 750 op = mcs.args;
d6182fbf 751 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
9f79991d 752 op->arg1.mfn = mfn;
5ead97c8 753
9f79991d 754 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 755
d6182fbf
JF
756 if (kernel) {
757 x86_write_percpu(xen_cr3, cr3);
758
759 /* Update xen_current_cr3 once the batch has actually
760 been submitted. */
761 xen_mc_callback(set_current_cr3, (void *)cr3);
762 }
763}
764
765static void xen_write_cr3(unsigned long cr3)
766{
767 BUG_ON(preemptible());
768
769 xen_mc_batch(); /* disables interrupts */
770
771 /* Update while interrupts are disabled, so its atomic with
772 respect to ipis */
773 x86_write_percpu(xen_cr3, cr3);
774
775 __xen_write_cr3(true, cr3);
776
777#ifdef CONFIG_X86_64
778 {
779 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
780 if (user_pgd)
781 __xen_write_cr3(false, __pa(user_pgd));
782 else
783 __xen_write_cr3(false, 0);
784 }
785#endif
5ead97c8 786
9f79991d 787 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
788}
789
1153968a
JF
790static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
791{
792 int ret;
793
794 ret = 0;
795
796 switch(msr) {
797#ifdef CONFIG_X86_64
798 unsigned which;
799 u64 base;
800
801 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
802 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
803 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
804
805 set:
806 base = ((u64)high << 32) | low;
807 if (HYPERVISOR_set_segment_base(which, base) != 0)
808 ret = -EFAULT;
809 break;
810#endif
d89961e2
JF
811
812 case MSR_STAR:
813 case MSR_CSTAR:
814 case MSR_LSTAR:
815 case MSR_SYSCALL_MASK:
816 case MSR_IA32_SYSENTER_CS:
817 case MSR_IA32_SYSENTER_ESP:
818 case MSR_IA32_SYSENTER_EIP:
819 /* Fast syscall setup is all done in hypercalls, so
820 these are all ignored. Stub them out here to stop
821 Xen console noise. */
822 break;
823
1153968a
JF
824 default:
825 ret = native_write_msr_safe(msr, low, high);
826 }
827
828 return ret;
829}
830
f4f97b3e
JF
831/* Early in boot, while setting up the initial pagetable, assume
832 everything is pinned. */
f8639939 833static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
5ead97c8 834{
af7ae3b9 835#ifdef CONFIG_FLATMEM
f4f97b3e 836 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 837#endif
5ead97c8
JF
838 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
839}
840
6944a9c8 841/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 842 only init_mm and anything attached to that is pinned. */
f8639939 843static void xen_release_pte_init(unsigned long pfn)
1c70e9bd
JF
844{
845 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
846}
847
f6433706 848static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
849{
850 struct mmuext_op op;
f6433706 851 op.cmd = cmd;
74260714
JF
852 op.arg1.mfn = pfn_to_mfn(pfn);
853 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
854 BUG();
855}
856
f4f97b3e
JF
857/* This needs to make sure the new pte page is pinned iff its being
858 attached to a pinned pagetable. */
f8639939 859static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
5ead97c8 860{
f4f97b3e 861 struct page *page = pfn_to_page(pfn);
5ead97c8 862
f4f97b3e
JF
863 if (PagePinned(virt_to_page(mm->pgd))) {
864 SetPagePinned(page);
865
74260714 866 if (!PageHighMem(page)) {
169ad16b 867 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
6a9e9184 868 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
f6433706 869 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 870 } else
f4f97b3e
JF
871 /* make sure there are no stray mappings of
872 this page */
873 kmap_flush_unused();
874 }
5ead97c8
JF
875}
876
f8639939 877static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1c70e9bd 878{
f6433706 879 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
880}
881
f8639939 882static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1c70e9bd 883{
f6433706 884 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
885}
886
d6182fbf
JF
887static int xen_pgd_alloc(struct mm_struct *mm)
888{
889 pgd_t *pgd = mm->pgd;
890 int ret = 0;
891
892 BUG_ON(PagePinned(virt_to_page(pgd)));
893
894#ifdef CONFIG_X86_64
895 {
896 struct page *page = virt_to_page(pgd);
bf18bf94 897 pgd_t *user_pgd;
d6182fbf
JF
898
899 BUG_ON(page->private != 0);
900
bf18bf94
JF
901 ret = -ENOMEM;
902
903 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
904 page->private = (unsigned long)user_pgd;
905
906 if (user_pgd != NULL) {
907 user_pgd[pgd_index(VSYSCALL_START)] =
908 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
909 ret = 0;
910 }
d6182fbf
JF
911
912 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
913 }
914#endif
915
916 return ret;
917}
918
919static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
920{
921#ifdef CONFIG_X86_64
922 pgd_t *user_pgd = xen_get_user_pgd(pgd);
923
924 if (user_pgd)
925 free_page((unsigned long)user_pgd);
926#endif
927}
928
f4f97b3e 929/* This should never happen until we're OK to use struct page */
f8639939 930static void xen_release_ptpage(unsigned long pfn, unsigned level)
5ead97c8 931{
f4f97b3e
JF
932 struct page *page = pfn_to_page(pfn);
933
934 if (PagePinned(page)) {
74260714 935 if (!PageHighMem(page)) {
6a9e9184 936 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
a684d69d 937 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 938 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 939 }
c946c7de 940 ClearPagePinned(page);
f4f97b3e 941 }
5ead97c8
JF
942}
943
f8639939 944static void xen_release_pte(unsigned long pfn)
f6433706
MM
945{
946 xen_release_ptpage(pfn, PT_PTE);
947}
948
f8639939 949static void xen_release_pmd(unsigned long pfn)
f6433706
MM
950{
951 xen_release_ptpage(pfn, PT_PMD);
952}
953
f6e58732 954#if PAGETABLE_LEVELS == 4
f8639939 955static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
f6e58732
JF
956{
957 xen_alloc_ptpage(mm, pfn, PT_PUD);
958}
959
f8639939 960static void xen_release_pud(unsigned long pfn)
f6e58732
JF
961{
962 xen_release_ptpage(pfn, PT_PUD);
963}
964#endif
965
f4f97b3e
JF
966#ifdef CONFIG_HIGHPTE
967static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 968{
f4f97b3e
JF
969 pgprot_t prot = PAGE_KERNEL;
970
971 if (PagePinned(page))
972 prot = PAGE_KERNEL_RO;
973
974 if (0 && PageHighMem(page))
975 printk("mapping highpte %lx type %d prot %s\n",
976 page_to_pfn(page), type,
977 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
978
979 return kmap_atomic_prot(page, type, prot);
5ead97c8 980}
f4f97b3e 981#endif
5ead97c8 982
db053b86 983#ifdef CONFIG_X86_32
9a4029fd
JF
984static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
985{
986 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
987 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
988 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
989 pte_val_ma(pte));
990
991 return pte;
992}
993
994/* Init-time set_pte while constructing initial pagetables, which
995 doesn't allow RO pagetable pages to be remapped RW */
996static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
997{
998 pte = mask_rw_pte(ptep, pte);
999
1000 xen_set_pte(ptep, pte);
1001}
db053b86 1002#endif
9a4029fd 1003
5ead97c8
JF
1004static __init void xen_pagetable_setup_start(pgd_t *base)
1005{
5ead97c8
JF
1006}
1007
0e91398f 1008void xen_setup_shared_info(void)
5ead97c8
JF
1009{
1010 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1011 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1012 xen_start_info->shared_info);
1013
1014 HYPERVISOR_shared_info =
1015 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1016 } else
1017 HYPERVISOR_shared_info =
1018 (struct shared_info *)__va(xen_start_info->shared_info);
1019
2e8fe719
JF
1020#ifndef CONFIG_SMP
1021 /* In UP this is as good a place as any to set up shared info */
1022 xen_setup_vcpu_info_placement();
1023#endif
d5edbc1f
JF
1024
1025 xen_setup_mfn_list_list();
2e8fe719
JF
1026}
1027
1028static __init void xen_pagetable_setup_done(pgd_t *base)
1029{
0e91398f 1030 xen_setup_shared_info();
60223a32 1031}
5ead97c8 1032
e2426cf8
JF
1033static __init void xen_post_allocator_init(void)
1034{
8745f8b0 1035 pv_mmu_ops.set_pte = xen_set_pte;
e2426cf8
JF
1036 pv_mmu_ops.set_pmd = xen_set_pmd;
1037 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
1038#if PAGETABLE_LEVELS == 4
1039 pv_mmu_ops.set_pgd = xen_set_pgd;
1040#endif
e2426cf8 1041
2e8fe719
JF
1042 /* This will work as long as patching hasn't happened yet
1043 (which it hasn't) */
6944a9c8
JF
1044 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1045 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1046 pv_mmu_ops.release_pte = xen_release_pte;
1047 pv_mmu_ops.release_pmd = xen_release_pmd;
8745f8b0
JF
1048#if PAGETABLE_LEVELS == 4
1049 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1050 pv_mmu_ops.release_pud = xen_release_pud;
1051#endif
e2426cf8 1052
bf18bf94
JF
1053#ifdef CONFIG_X86_64
1054 SetPagePinned(virt_to_page(level3_user_vsyscall));
1055#endif
e2426cf8
JF
1056 xen_mark_init_mm_pinned();
1057}
1058
60223a32 1059/* This is called once we have the cpu_possible_map */
0e91398f 1060void xen_setup_vcpu_info_placement(void)
60223a32
JF
1061{
1062 int cpu;
1063
1064 for_each_possible_cpu(cpu)
1065 xen_vcpu_setup(cpu);
1066
1067 /* xen_vcpu_setup managed to place the vcpu_info within the
1068 percpu area for all cpus, so make use of it */
1069 if (have_vcpu_info_placement) {
1070 printk(KERN_INFO "Xen: using vcpu_info placement\n");
1071
93b1eab3
JF
1072 pv_irq_ops.save_fl = xen_save_fl_direct;
1073 pv_irq_ops.restore_fl = xen_restore_fl_direct;
1074 pv_irq_ops.irq_disable = xen_irq_disable_direct;
1075 pv_irq_ops.irq_enable = xen_irq_enable_direct;
1076 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1077 }
5ead97c8
JF
1078}
1079
ab144f5e
AK
1080static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1081 unsigned long addr, unsigned len)
6487673b
JF
1082{
1083 char *start, *end, *reloc;
1084 unsigned ret;
1085
1086 start = end = reloc = NULL;
1087
93b1eab3
JF
1088#define SITE(op, x) \
1089 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1090 if (have_vcpu_info_placement) { \
1091 start = (char *)xen_##x##_direct; \
1092 end = xen_##x##_direct_end; \
1093 reloc = xen_##x##_direct_reloc; \
1094 } \
1095 goto patch_site
1096
1097 switch (type) {
93b1eab3
JF
1098 SITE(pv_irq_ops, irq_enable);
1099 SITE(pv_irq_ops, irq_disable);
1100 SITE(pv_irq_ops, save_fl);
1101 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1102#undef SITE
1103
1104 patch_site:
1105 if (start == NULL || (end-start) > len)
1106 goto default_patch;
1107
ab144f5e 1108 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1109
1110 /* Note: because reloc is assigned from something that
1111 appears to be an array, gcc assumes it's non-null,
1112 but doesn't know its relationship with start and
1113 end. */
1114 if (reloc > start && reloc < end) {
1115 int reloc_off = reloc - start;
ab144f5e
AK
1116 long *relocp = (long *)(insnbuf + reloc_off);
1117 long delta = start - (char *)addr;
6487673b
JF
1118
1119 *relocp += delta;
1120 }
1121 break;
1122
1123 default_patch:
1124 default:
ab144f5e
AK
1125 ret = paravirt_patch_default(type, clobbers, insnbuf,
1126 addr, len);
6487673b
JF
1127 break;
1128 }
1129
1130 return ret;
1131}
1132
aeaaa59c
JF
1133static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1134{
1135 pte_t pte;
1136
1137 phys >>= PAGE_SHIFT;
1138
1139 switch (idx) {
1140 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1141#ifdef CONFIG_X86_F00F_BUG
1142 case FIX_F00F_IDT:
1143#endif
15664f96 1144#ifdef CONFIG_X86_32
aeaaa59c
JF
1145 case FIX_WP_TEST:
1146 case FIX_VDSO:
b3fe1243 1147# ifdef CONFIG_HIGHMEM
15664f96 1148 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
b3fe1243 1149# endif
15664f96
JF
1150#else
1151 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1152#endif
aeaaa59c
JF
1153#ifdef CONFIG_X86_LOCAL_APIC
1154 case FIX_APIC_BASE: /* maps dummy local APIC */
1155#endif
1156 pte = pfn_pte(phys, prot);
1157 break;
1158
1159 default:
1160 pte = mfn_pte(phys, prot);
1161 break;
1162 }
1163
1164 __native_set_fixmap(idx, pte);
bf18bf94
JF
1165
1166#ifdef CONFIG_X86_64
1167 /* Replicate changes to map the vsyscall page into the user
1168 pagetable vsyscall mapping. */
1169 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1170 unsigned long vaddr = __fix_to_virt(idx);
1171 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1172 }
1173#endif
aeaaa59c
JF
1174}
1175
93b1eab3 1176static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1177 .paravirt_enabled = 1,
1178 .shared_kernel_pmd = 0,
1179
1180 .name = "Xen",
93b1eab3 1181};
5ead97c8 1182
93b1eab3 1183static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1184 .patch = xen_patch,
5ead97c8 1185
93b1eab3 1186 .banner = xen_banner,
5ead97c8
JF
1187 .memory_setup = xen_memory_setup,
1188 .arch_setup = xen_arch_setup,
e2426cf8 1189 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1190};
5ead97c8 1191
93b1eab3 1192static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1193 .time_init = xen_time_init,
93b1eab3 1194
15c84731
JF
1195 .set_wallclock = xen_set_wallclock,
1196 .get_wallclock = xen_get_wallclock,
e93ef949 1197 .get_tsc_khz = xen_tsc_khz,
ab550288 1198 .sched_clock = xen_sched_clock,
93b1eab3 1199};
15c84731 1200
93b1eab3 1201static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1202 .cpuid = xen_cpuid,
1203
1204 .set_debugreg = xen_set_debugreg,
1205 .get_debugreg = xen_get_debugreg,
1206
7b1333aa 1207 .clts = xen_clts,
5ead97c8
JF
1208
1209 .read_cr0 = native_read_cr0,
7b1333aa 1210 .write_cr0 = xen_write_cr0,
5ead97c8 1211
5ead97c8
JF
1212 .read_cr4 = native_read_cr4,
1213 .read_cr4_safe = native_read_cr4_safe,
1214 .write_cr4 = xen_write_cr4,
1215
5ead97c8
JF
1216 .wbinvd = native_wbinvd,
1217
1218 .read_msr = native_read_msr_safe,
1153968a 1219 .write_msr = xen_write_msr_safe,
5ead97c8
JF
1220 .read_tsc = native_read_tsc,
1221 .read_pmc = native_read_pmc,
1222
81e103f1 1223 .iret = xen_iret,
d75cd22f 1224 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1225#ifdef CONFIG_X86_64
1226 .usergs_sysret32 = xen_sysret32,
1227 .usergs_sysret64 = xen_sysret64,
1228#endif
5ead97c8
JF
1229
1230 .load_tr_desc = paravirt_nop,
1231 .set_ldt = xen_set_ldt,
1232 .load_gdt = xen_load_gdt,
1233 .load_idt = xen_load_idt,
1234 .load_tls = xen_load_tls,
a8fc1089
EH
1235#ifdef CONFIG_X86_64
1236 .load_gs_index = xen_load_gs_index,
1237#endif
5ead97c8 1238
38ffbe66
JF
1239 .alloc_ldt = xen_alloc_ldt,
1240 .free_ldt = xen_free_ldt,
1241
5ead97c8
JF
1242 .store_gdt = native_store_gdt,
1243 .store_idt = native_store_idt,
1244 .store_tr = xen_store_tr,
1245
1246 .write_ldt_entry = xen_write_ldt_entry,
1247 .write_gdt_entry = xen_write_gdt_entry,
1248 .write_idt_entry = xen_write_idt_entry,
faca6227 1249 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1250
1251 .set_iopl_mask = xen_set_iopl_mask,
1252 .io_delay = xen_io_delay,
1253
952d1d70
JF
1254 /* Xen takes care of %gs when switching to usermode for us */
1255 .swapgs = paravirt_nop,
1256
8965c1c0
JF
1257 .lazy_mode = {
1258 .enter = paravirt_enter_lazy_cpu,
1259 .leave = xen_leave_lazy,
1260 },
93b1eab3
JF
1261};
1262
93b1eab3 1263static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1264#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1265 .setup_boot_clock = paravirt_nop,
1266 .setup_secondary_clock = paravirt_nop,
1267 .startup_ipi_hook = paravirt_nop,
1268#endif
93b1eab3
JF
1269};
1270
1271static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1272 .pagetable_setup_start = xen_pagetable_setup_start,
1273 .pagetable_setup_done = xen_pagetable_setup_done,
1274
1275 .read_cr2 = xen_read_cr2,
1276 .write_cr2 = xen_write_cr2,
1277
1278 .read_cr3 = xen_read_cr3,
1279 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1280
1281 .flush_tlb_user = xen_flush_tlb,
1282 .flush_tlb_kernel = xen_flush_tlb,
1283 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1284 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1285
1286 .pte_update = paravirt_nop,
1287 .pte_update_defer = paravirt_nop,
1288
d6182fbf
JF
1289 .pgd_alloc = xen_pgd_alloc,
1290 .pgd_free = xen_pgd_free,
eba0045f 1291
6944a9c8
JF
1292 .alloc_pte = xen_alloc_pte_init,
1293 .release_pte = xen_release_pte_init,
1294 .alloc_pmd = xen_alloc_pte_init,
1295 .alloc_pmd_clone = paravirt_nop,
1296 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1297
1298#ifdef CONFIG_HIGHPTE
1299 .kmap_atomic_pte = xen_kmap_atomic_pte,
1300#endif
5ead97c8 1301
22911b3f
JF
1302#ifdef CONFIG_X86_64
1303 .set_pte = xen_set_pte,
1304#else
851fa3c4 1305 .set_pte = xen_set_pte_init,
22911b3f 1306#endif
3b827c1b 1307 .set_pte_at = xen_set_pte_at,
e2426cf8 1308 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1309
08b882c6
JF
1310 .ptep_modify_prot_start = __ptep_modify_prot_start,
1311 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1312
3b827c1b 1313 .pte_val = xen_pte_val,
b56afe1d 1314 .pte_flags = native_pte_flags,
3b827c1b
JF
1315 .pgd_val = xen_pgd_val,
1316
1317 .make_pte = xen_make_pte,
1318 .make_pgd = xen_make_pgd,
1319
f6e58732 1320#ifdef CONFIG_X86_PAE
3b827c1b
JF
1321 .set_pte_atomic = xen_set_pte_atomic,
1322 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1323 .pte_clear = xen_pte_clear,
1324 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1325#endif /* CONFIG_X86_PAE */
1326 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1327
1328 .make_pmd = xen_make_pmd,
1329 .pmd_val = xen_pmd_val,
3b827c1b 1330
f6e58732
JF
1331#if PAGETABLE_LEVELS == 4
1332 .pud_val = xen_pud_val,
1333 .make_pud = xen_make_pud,
1334 .set_pgd = xen_set_pgd_hyper,
1335
1336 .alloc_pud = xen_alloc_pte_init,
1337 .release_pud = xen_release_pte_init,
1338#endif /* PAGETABLE_LEVELS == 4 */
1339
3b827c1b
JF
1340 .activate_mm = xen_activate_mm,
1341 .dup_mmap = xen_dup_mmap,
1342 .exit_mmap = xen_exit_mmap,
1343
8965c1c0
JF
1344 .lazy_mode = {
1345 .enter = paravirt_enter_lazy_mmu,
1346 .leave = xen_leave_lazy,
1347 },
aeaaa59c
JF
1348
1349 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1350};
1351
fefa629a
JF
1352static void xen_reboot(int reason)
1353{
349c709f
JF
1354 struct sched_shutdown r = { .reason = reason };
1355
fefa629a
JF
1356#ifdef CONFIG_SMP
1357 smp_send_stop();
1358#endif
1359
349c709f 1360 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1361 BUG();
1362}
1363
1364static void xen_restart(char *msg)
1365{
1366 xen_reboot(SHUTDOWN_reboot);
1367}
1368
1369static void xen_emergency_restart(void)
1370{
1371 xen_reboot(SHUTDOWN_reboot);
1372}
1373
1374static void xen_machine_halt(void)
1375{
1376 xen_reboot(SHUTDOWN_poweroff);
1377}
1378
1379static void xen_crash_shutdown(struct pt_regs *regs)
1380{
1381 xen_reboot(SHUTDOWN_crash);
1382}
1383
1384static const struct machine_ops __initdata xen_machine_ops = {
1385 .restart = xen_restart,
1386 .halt = xen_machine_halt,
1387 .power_off = xen_machine_halt,
1388 .shutdown = xen_machine_halt,
1389 .crash_shutdown = xen_crash_shutdown,
1390 .emergency_restart = xen_emergency_restart,
1391};
1392
6487673b 1393
fb1d8404
JF
1394static void __init xen_reserve_top(void)
1395{
f5d36de0 1396#ifdef CONFIG_X86_32
fb1d8404
JF
1397 unsigned long top = HYPERVISOR_VIRT_START;
1398 struct xen_platform_parameters pp;
1399
1400 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1401 top = pp.virt_start;
1402
5dc64a34 1403 reserve_top_address(-top);
f5d36de0 1404#endif /* CONFIG_X86_32 */
fb1d8404
JF
1405}
1406
084a2a4e
JF
1407/*
1408 * Like __va(), but returns address in the kernel mapping (which is
1409 * all we have until the physical memory mapping has been set up.
1410 */
1411static void *__ka(phys_addr_t paddr)
1412{
39dbc5bd 1413#ifdef CONFIG_X86_64
084a2a4e 1414 return (void *)(paddr + __START_KERNEL_map);
39dbc5bd
JF
1415#else
1416 return __va(paddr);
1417#endif
fb1d8404
JF
1418}
1419
084a2a4e
JF
1420/* Convert a machine address to physical address */
1421static unsigned long m2p(phys_addr_t maddr)
1422{
1423 phys_addr_t paddr;
1424
59438c9f 1425 maddr &= PTE_PFN_MASK;
084a2a4e
JF
1426 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1427
1428 return paddr;
fb1d8404
JF
1429}
1430
084a2a4e
JF
1431/* Convert a machine address to kernel virtual */
1432static void *m2v(phys_addr_t maddr)
1433{
1434 return __ka(m2p(maddr));
1435}
1436
084a2a4e
JF
1437static void set_page_prot(void *addr, pgprot_t prot)
1438{
1439 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1440 pte_t pte = pfn_pte(pfn, prot);
1441
084a2a4e
JF
1442 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1443 BUG();
1444}
1445
39dbc5bd 1446static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
d114e198
JF
1447{
1448 unsigned pmdidx, pteidx;
1449 unsigned ident_pte;
1450 unsigned long pfn;
1451
1452 ident_pte = 0;
1453 pfn = 0;
1454 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1455 pte_t *pte_page;
1456
d114e198 1457 /* Reuse or allocate a page of ptes */
39dbc5bd
JF
1458 if (pmd_present(pmd[pmdidx]))
1459 pte_page = m2v(pmd[pmdidx].pmd);
d114e198
JF
1460 else {
1461 /* Check for free pte pages */
1462 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1463 break;
1464
1465 pte_page = &level1_ident_pgt[ident_pte];
1466 ident_pte += PTRS_PER_PTE;
1467
39dbc5bd 1468 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
d114e198
JF
1469 }
1470
1471 /* Install mappings */
1472 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1473 pte_t pte;
1474
1475 if (pfn > max_pfn_mapped)
1476 max_pfn_mapped = pfn;
1477
1478 if (!pte_none(pte_page[pteidx]))
1479 continue;
1480
1481 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1482 pte_page[pteidx] = pte;
1483 }
1484 }
1485
1486 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1487 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
39dbc5bd
JF
1488
1489 set_page_prot(pmd, PAGE_KERNEL_RO);
1490}
1491
1492#ifdef CONFIG_X86_64
1493static void convert_pfn_mfn(void *v)
1494{
1495 pte_t *pte = v;
1496 int i;
1497
1498 /* All levels are converted the same way, so just treat them
1499 as ptes. */
1500 for(i = 0; i < PTRS_PER_PTE; i++)
1501 pte[i] = xen_make_pte(pte[i].pte);
d114e198
JF
1502}
1503
084a2a4e
JF
1504/*
1505 * Set up the inital kernel pagetable.
1506 *
1507 * We can construct this by grafting the Xen provided pagetable into
1508 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1509 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1510 * means that only the kernel has a physical mapping to start with -
1511 * but that's enough to get __va working. We need to fill in the rest
1512 * of the physical mapping once some sort of allocator has been set
1513 * up.
1514 */
d114e198 1515static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1516{
1517 pud_t *l3;
1518 pmd_t *l2;
1519
1520 /* Zap identity mapping */
1521 init_level4_pgt[0] = __pgd(0);
1522
1523 /* Pre-constructed entries are in pfn, so convert to mfn */
1524 convert_pfn_mfn(init_level4_pgt);
1525 convert_pfn_mfn(level3_ident_pgt);
1526 convert_pfn_mfn(level3_kernel_pgt);
1527
1528 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1529 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1530
1531 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1532 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1533
1534 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1535 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1536 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1537
d114e198 1538 /* Set up identity map */
39dbc5bd 1539 xen_map_identity_early(level2_ident_pgt, max_pfn);
d114e198 1540
084a2a4e
JF
1541 /* Make pagetable pieces RO */
1542 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1543 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1544 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
bf18bf94 1545 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
084a2a4e
JF
1546 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1547 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1548
1549 /* Pin down new L4 */
39dbc5bd
JF
1550 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1551 PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1552
1553 /* Unpin Xen-provided one */
1554 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1555
1556 /* Switch over */
1557 pgd = init_level4_pgt;
d6182fbf
JF
1558
1559 /*
1560 * At this stage there can be no user pgd, and no page
1561 * structure to attach it to, so make sure we just set kernel
1562 * pgd.
1563 */
1564 xen_mc_batch();
1565 __xen_write_cr3(true, __pa(pgd));
1566 xen_mc_issue(PARAVIRT_LAZY_CPU);
084a2a4e 1567
d114e198
JF
1568 reserve_early(__pa(xen_start_info->pt_base),
1569 __pa(xen_start_info->pt_base +
1570 xen_start_info->nr_pt_frames * PAGE_SIZE),
1571 "XEN PAGETABLES");
084a2a4e
JF
1572
1573 return pgd;
1574}
39dbc5bd
JF
1575#else /* !CONFIG_X86_64 */
1576static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1577
d114e198 1578static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e 1579{
39dbc5bd
JF
1580 pmd_t *kernel_pmd;
1581
084a2a4e
JF
1582 init_pg_tables_start = __pa(pgd);
1583 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1584 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1585
39dbc5bd
JF
1586 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1587 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
d114e198 1588
39dbc5bd
JF
1589 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1590
1591 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1592 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1593 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1594
1595 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1596 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1597 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1598
1599 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1600
1601 xen_write_cr3(__pa(swapper_pg_dir));
1602
1603 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1604
1605 return swapper_pg_dir;
fb1d8404 1606}
084a2a4e 1607#endif /* CONFIG_X86_64 */
fb1d8404 1608
5ead97c8
JF
1609/* First C function to be called on Xen boot */
1610asmlinkage void __init xen_start_kernel(void)
1611{
1612 pgd_t *pgd;
1613
1614 if (!xen_start_info)
1615 return;
1616
6e833587
JF
1617 xen_domain_type = XEN_PV_DOMAIN;
1618
7999f4b4 1619 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1620
e57778a1
JF
1621 xen_setup_features();
1622
5ead97c8 1623 /* Install Xen paravirt ops */
93b1eab3
JF
1624 pv_info = xen_info;
1625 pv_init_ops = xen_init_ops;
1626 pv_time_ops = xen_time_ops;
1627 pv_cpu_ops = xen_cpu_ops;
93b1eab3
JF
1628 pv_apic_ops = xen_apic_ops;
1629 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1630
0d1edf46
JF
1631 xen_init_irq_ops();
1632
94a8c3c2 1633#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1634 /*
94a8c3c2 1635 * set up the basic apic ops.
ad66dd34
SS
1636 */
1637 apic_ops = &xen_basic_apic_ops;
1638#endif
93b1eab3 1639
e57778a1
JF
1640 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1641 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1642 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1643 }
1644
fefa629a
JF
1645 machine_ops = xen_machine_ops;
1646
f5d36de0
JF
1647#ifdef CONFIG_X86_64
1648 /* Disable until direct per-cpu data access. */
1649 have_vcpu_info_placement = 0;
5b09b287 1650 x86_64_init_pda();
f87e4cac 1651#endif
5ead97c8 1652
a9e7062d 1653 xen_smp_init();
5ead97c8
JF
1654
1655 /* Get mfn list */
1656 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1657 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1658
1659 pgd = (pgd_t *)xen_start_info->pt_base;
1660
084a2a4e
JF
1661 /* Prevent unwanted bits from being set in PTEs. */
1662 __supported_pte_mask &= ~_PAGE_GLOBAL;
6e833587 1663 if (!xen_initial_domain())
084a2a4e 1664 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
60223a32 1665
60223a32 1666 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1667 possible map and a non-dummy shared_info. */
60223a32 1668 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1669
084a2a4e 1670 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1671 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1672
084a2a4e 1673 init_mm.pgd = pgd;
5ead97c8
JF
1674
1675 /* keep using Xen gdt for now; no urgent need to change it */
1676
93b1eab3 1677 pv_info.kernel_rpl = 1;
5ead97c8 1678 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1679 pv_info.kernel_rpl = 0;
5ead97c8
JF
1680
1681 /* set the limit of our address space */
fb1d8404 1682 xen_reserve_top();
5ead97c8 1683
7d087b68 1684#ifdef CONFIG_X86_32
5ead97c8
JF
1685 /* set up basic CPUID stuff */
1686 cpu_detect(&new_cpu_data);
1687 new_cpu_data.hard_math = 1;
1688 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1689#endif
5ead97c8
JF
1690
1691 /* Poke various useful things into boot_params */
30c82645
PA
1692 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1693 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1694 ? __pa(xen_start_info->mod_start) : 0;
1695 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1696 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1697
6e833587 1698 if (!xen_initial_domain()) {
83abc70a 1699 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1700 add_preferred_console("tty", 0, NULL);
b8c2d3df 1701 add_preferred_console("hvc", 0, NULL);
9e124fe1 1702 }
b8c2d3df 1703
084a2a4e
JF
1704 xen_raw_console_write("about to get started...\n");
1705
5ead97c8 1706 /* Start the world */
f5d36de0 1707#ifdef CONFIG_X86_32
f0d43100 1708 i386_start_kernel();
f5d36de0 1709#else
084a2a4e 1710 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1711#endif
5ead97c8 1712}