Commit | Line | Data |
---|---|---|
5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
96f28bc6 | 34 | #include <linux/edd.h> |
5ead97c8 | 35 | |
1ccbf534 | 36 | #include <xen/xen.h> |
0ec53ecf | 37 | #include <xen/events.h> |
5ead97c8 | 38 | #include <xen/interface/xen.h> |
ecbf29cd | 39 | #include <xen/interface/version.h> |
5ead97c8 JF |
40 | #include <xen/interface/physdev.h> |
41 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 42 | #include <xen/interface/memory.h> |
cef12ee5 | 43 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
44 | #include <xen/features.h> |
45 | #include <xen/page.h> | |
38e20b07 | 46 | #include <xen/hvm.h> |
084a2a4e | 47 | #include <xen/hvc-console.h> |
211063dc | 48 | #include <xen/acpi.h> |
5ead97c8 JF |
49 | |
50 | #include <asm/paravirt.h> | |
7b6aa335 | 51 | #include <asm/apic.h> |
5ead97c8 | 52 | #include <asm/page.h> |
b5401a96 | 53 | #include <asm/xen/pci.h> |
5ead97c8 JF |
54 | #include <asm/xen/hypercall.h> |
55 | #include <asm/xen/hypervisor.h> | |
56 | #include <asm/fixmap.h> | |
57 | #include <asm/processor.h> | |
707ebbc8 | 58 | #include <asm/proto.h> |
1153968a | 59 | #include <asm/msr-index.h> |
6cac5a92 | 60 | #include <asm/traps.h> |
5ead97c8 JF |
61 | #include <asm/setup.h> |
62 | #include <asm/desc.h> | |
817a824b | 63 | #include <asm/pgalloc.h> |
5ead97c8 | 64 | #include <asm/pgtable.h> |
f87e4cac | 65 | #include <asm/tlbflush.h> |
fefa629a | 66 | #include <asm/reboot.h> |
577eebea | 67 | #include <asm/stackprotector.h> |
bee6ab53 | 68 | #include <asm/hypervisor.h> |
73c154c6 | 69 | #include <asm/mwait.h> |
76a8df7b | 70 | #include <asm/pci_x86.h> |
c79c4982 | 71 | #include <asm/pat.h> |
73c154c6 KRW |
72 | |
73 | #ifdef CONFIG_ACPI | |
74 | #include <linux/acpi.h> | |
75 | #include <asm/acpi.h> | |
76 | #include <acpi/pdc_intel.h> | |
77 | #include <acpi/processor.h> | |
78 | #include <xen/interface/platform.h> | |
79 | #endif | |
5ead97c8 JF |
80 | |
81 | #include "xen-ops.h" | |
3b827c1b | 82 | #include "mmu.h" |
f447d56d | 83 | #include "smp.h" |
5ead97c8 JF |
84 | #include "multicalls.h" |
85 | ||
86 | EXPORT_SYMBOL_GPL(hypercall_page); | |
87 | ||
5ead97c8 JF |
88 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
89 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 90 | |
6e833587 JF |
91 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
92 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
93 | ||
7e77506a IC |
94 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
95 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
96 | unsigned long machine_to_phys_nr; |
97 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 98 | |
5ead97c8 JF |
99 | struct start_info *xen_start_info; |
100 | EXPORT_SYMBOL_GPL(xen_start_info); | |
101 | ||
a0d695c8 | 102 | struct shared_info xen_dummy_shared_info; |
60223a32 | 103 | |
38341432 JF |
104 | void *xen_initial_gdt; |
105 | ||
bee6ab53 | 106 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
107 | __read_mostly int xen_have_vector_callback; |
108 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 109 | |
60223a32 JF |
110 | /* |
111 | * Point at some empty memory to start with. We map the real shared_info | |
112 | * page as soon as fixmap is up and running. | |
113 | */ | |
4648da7c | 114 | struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; |
60223a32 JF |
115 | |
116 | /* | |
117 | * Flag to determine whether vcpu info placement is available on all | |
118 | * VCPUs. We assume it is to start with, and then set it to zero on | |
119 | * the first failure. This is because it can succeed on some VCPUs | |
120 | * and not others, since it can involve hypervisor memory allocation, | |
121 | * or because the guest failed to guarantee all the appropriate | |
122 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
123 | * | |
124 | * Note that any particular CPU may be using a placed vcpu structure, | |
125 | * but we can only optimise if the all are. | |
126 | * | |
127 | * 0: not available, 1: available | |
128 | */ | |
e4d04071 | 129 | static int have_vcpu_info_placement = 1; |
60223a32 | 130 | |
1c32cdc6 DV |
131 | struct tls_descs { |
132 | struct desc_struct desc[3]; | |
133 | }; | |
134 | ||
135 | /* | |
136 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
137 | * surprisingly expensive so we avoid updating them if they haven't | |
138 | * changed. Since Xen writes different descriptors than the one | |
139 | * passed in the update_descriptor hypercall we keep shadow copies to | |
140 | * compare against. | |
141 | */ | |
142 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
143 | ||
c06ee78d MR |
144 | static void clamp_max_cpus(void) |
145 | { | |
146 | #ifdef CONFIG_SMP | |
147 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
148 | setup_max_cpus = MAX_VIRT_CPUS; | |
149 | #endif | |
150 | } | |
151 | ||
9c7a7942 | 152 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 153 | { |
60223a32 JF |
154 | struct vcpu_register_vcpu_info info; |
155 | int err; | |
156 | struct vcpu_info *vcpup; | |
157 | ||
a0d695c8 | 158 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 159 | |
7f1fc268 KRW |
160 | /* |
161 | * This path is called twice on PVHVM - first during bootup via | |
162 | * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being | |
163 | * hotplugged: cpu_up -> xen_hvm_cpu_notify. | |
164 | * As we can only do the VCPUOP_register_vcpu_info once lets | |
165 | * not over-write its result. | |
166 | * | |
167 | * For PV it is called during restore (xen_vcpu_restore) and bootup | |
168 | * (xen_setup_vcpu_info_placement). The hotplug mechanism does not | |
169 | * use this function. | |
170 | */ | |
171 | if (xen_hvm_domain()) { | |
172 | if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu)) | |
173 | return; | |
174 | } | |
c06ee78d MR |
175 | if (cpu < MAX_VIRT_CPUS) |
176 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 177 | |
c06ee78d MR |
178 | if (!have_vcpu_info_placement) { |
179 | if (cpu >= MAX_VIRT_CPUS) | |
180 | clamp_max_cpus(); | |
181 | return; | |
182 | } | |
60223a32 | 183 | |
c06ee78d | 184 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 185 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
186 | info.offset = offset_in_page(vcpup); |
187 | ||
60223a32 JF |
188 | /* Check to see if the hypervisor will put the vcpu_info |
189 | structure where we want it, which allows direct access via | |
190 | a percpu-variable. */ | |
191 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
192 | ||
193 | if (err) { | |
194 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
195 | have_vcpu_info_placement = 0; | |
c06ee78d | 196 | clamp_max_cpus(); |
60223a32 JF |
197 | } else { |
198 | /* This cpu is using the registered vcpu info, even if | |
199 | later ones fail to. */ | |
200 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 201 | } |
5ead97c8 JF |
202 | } |
203 | ||
9c7a7942 JF |
204 | /* |
205 | * On restore, set the vcpu placement up again. | |
206 | * If it fails, then we're in a bad state, since | |
207 | * we can't back out from using it... | |
208 | */ | |
209 | void xen_vcpu_restore(void) | |
210 | { | |
3905bb2a | 211 | int cpu; |
9c7a7942 | 212 | |
9d328a94 | 213 | for_each_possible_cpu(cpu) { |
3905bb2a | 214 | bool other_cpu = (cpu != smp_processor_id()); |
9d328a94 | 215 | bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL); |
9c7a7942 | 216 | |
9d328a94 | 217 | if (other_cpu && is_up && |
3905bb2a JF |
218 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) |
219 | BUG(); | |
9c7a7942 | 220 | |
3905bb2a | 221 | xen_setup_runstate_info(cpu); |
9c7a7942 | 222 | |
3905bb2a | 223 | if (have_vcpu_info_placement) |
9c7a7942 | 224 | xen_vcpu_setup(cpu); |
9c7a7942 | 225 | |
9d328a94 | 226 | if (other_cpu && is_up && |
3905bb2a JF |
227 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) |
228 | BUG(); | |
9c7a7942 JF |
229 | } |
230 | } | |
231 | ||
5ead97c8 JF |
232 | static void __init xen_banner(void) |
233 | { | |
95c7c23b JF |
234 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
235 | struct xen_extraversion extra; | |
236 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
237 | ||
5ead97c8 | 238 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 239 | pv_info.name); |
95c7c23b JF |
240 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
241 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 242 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 | 243 | } |
394b40f6 KRW |
244 | /* Check if running on Xen version (major, minor) or later */ |
245 | bool | |
246 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
247 | { | |
248 | unsigned int version; | |
249 | ||
250 | if (!xen_domain()) | |
251 | return false; | |
252 | ||
253 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
254 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
255 | ((version >> 16) > major)) | |
256 | return true; | |
257 | return false; | |
258 | } | |
5ead97c8 | 259 | |
5e626254 AP |
260 | #define CPUID_THERM_POWER_LEAF 6 |
261 | #define APERFMPERF_PRESENT 0 | |
262 | ||
e826fe1b JF |
263 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
264 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
265 | ||
73c154c6 KRW |
266 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
267 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
268 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
269 | ||
65ea5b03 PA |
270 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
271 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 272 | { |
82d64699 | 273 | unsigned maskebx = ~0; |
e826fe1b | 274 | unsigned maskecx = ~0; |
5ead97c8 | 275 | unsigned maskedx = ~0; |
73c154c6 | 276 | unsigned setecx = 0; |
5ead97c8 JF |
277 | /* |
278 | * Mask out inconvenient features, to try and disable as many | |
279 | * unsupported kernel subsystems as possible. | |
280 | */ | |
82d64699 JF |
281 | switch (*ax) { |
282 | case 1: | |
e826fe1b | 283 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 284 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 285 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
286 | break; |
287 | ||
73c154c6 KRW |
288 | case CPUID_MWAIT_LEAF: |
289 | /* Synthesize the values.. */ | |
290 | *ax = 0; | |
291 | *bx = 0; | |
292 | *cx = cpuid_leaf5_ecx_val; | |
293 | *dx = cpuid_leaf5_edx_val; | |
294 | return; | |
295 | ||
5e626254 AP |
296 | case CPUID_THERM_POWER_LEAF: |
297 | /* Disabling APERFMPERF for kernel usage */ | |
298 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
299 | break; | |
300 | ||
82d64699 JF |
301 | case 0xb: |
302 | /* Suppress extended topology stuff */ | |
303 | maskebx = 0; | |
304 | break; | |
e826fe1b | 305 | } |
5ead97c8 JF |
306 | |
307 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
308 | : "=a" (*ax), |
309 | "=b" (*bx), | |
310 | "=c" (*cx), | |
311 | "=d" (*dx) | |
312 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 313 | |
82d64699 | 314 | *bx &= maskebx; |
e826fe1b | 315 | *cx &= maskecx; |
73c154c6 | 316 | *cx |= setecx; |
65ea5b03 | 317 | *dx &= maskedx; |
73c154c6 | 318 | |
5ead97c8 JF |
319 | } |
320 | ||
73c154c6 KRW |
321 | static bool __init xen_check_mwait(void) |
322 | { | |
e3aa4e61 | 323 | #ifdef CONFIG_ACPI |
73c154c6 KRW |
324 | struct xen_platform_op op = { |
325 | .cmd = XENPF_set_processor_pminfo, | |
326 | .u.set_pminfo.id = -1, | |
327 | .u.set_pminfo.type = XEN_PM_PDC, | |
328 | }; | |
329 | uint32_t buf[3]; | |
330 | unsigned int ax, bx, cx, dx; | |
331 | unsigned int mwait_mask; | |
332 | ||
333 | /* We need to determine whether it is OK to expose the MWAIT | |
334 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
335 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
336 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
337 | * checks against). The hypervisor won't expose the MWAIT flag because | |
338 | * it would break backwards compatibility; so we will find out directly | |
339 | * from the hardware and hypercall. | |
340 | */ | |
341 | if (!xen_initial_domain()) | |
342 | return false; | |
343 | ||
e3aa4e61 LJ |
344 | /* |
345 | * When running under platform earlier than Xen4.2, do not expose | |
346 | * mwait, to avoid the risk of loading native acpi pad driver | |
347 | */ | |
348 | if (!xen_running_on_version_or_later(4, 2)) | |
349 | return false; | |
350 | ||
73c154c6 KRW |
351 | ax = 1; |
352 | cx = 0; | |
353 | ||
354 | native_cpuid(&ax, &bx, &cx, &dx); | |
355 | ||
356 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
357 | (1 << (X86_FEATURE_MWAIT % 32)); | |
358 | ||
359 | if ((cx & mwait_mask) != mwait_mask) | |
360 | return false; | |
361 | ||
362 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
363 | * ecx and edx. The hypercall provides only partial information. | |
364 | */ | |
365 | ||
366 | ax = CPUID_MWAIT_LEAF; | |
367 | bx = 0; | |
368 | cx = 0; | |
369 | dx = 0; | |
370 | ||
371 | native_cpuid(&ax, &bx, &cx, &dx); | |
372 | ||
373 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
374 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
375 | */ | |
376 | buf[0] = ACPI_PDC_REVISION_ID; | |
377 | buf[1] = 1; | |
378 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
379 | ||
380 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
381 | ||
382 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
383 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
384 | cpuid_leaf5_ecx_val = cx; | |
385 | cpuid_leaf5_edx_val = dx; | |
386 | } | |
387 | return true; | |
388 | #else | |
389 | return false; | |
390 | #endif | |
391 | } | |
ad3062a0 | 392 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
393 | { |
394 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 395 | unsigned int xsave_mask; |
e826fe1b JF |
396 | |
397 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 398 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
399 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
400 | ||
401 | if (!xen_initial_domain()) | |
402 | cpuid_leaf1_edx_mask &= | |
403 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
404 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 405 | ax = 1; |
5e287830 | 406 | cx = 0; |
947ccf9c | 407 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 408 | |
947ccf9c SH |
409 | xsave_mask = |
410 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
411 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
412 | ||
413 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
414 | if ((cx & xsave_mask) != xsave_mask) | |
415 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
416 | if (xen_check_mwait()) |
417 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
418 | } |
419 | ||
5ead97c8 JF |
420 | static void xen_set_debugreg(int reg, unsigned long val) |
421 | { | |
422 | HYPERVISOR_set_debugreg(reg, val); | |
423 | } | |
424 | ||
425 | static unsigned long xen_get_debugreg(int reg) | |
426 | { | |
427 | return HYPERVISOR_get_debugreg(reg); | |
428 | } | |
429 | ||
224101ed | 430 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 431 | { |
5ead97c8 | 432 | xen_mc_flush(); |
224101ed | 433 | paravirt_end_context_switch(next); |
5ead97c8 JF |
434 | } |
435 | ||
436 | static unsigned long xen_store_tr(void) | |
437 | { | |
438 | return 0; | |
439 | } | |
440 | ||
a05d2eba | 441 | /* |
cef43bf6 JF |
442 | * Set the page permissions for a particular virtual address. If the |
443 | * address is a vmalloc mapping (or other non-linear mapping), then | |
444 | * find the linear mapping of the page and also set its protections to | |
445 | * match. | |
a05d2eba JF |
446 | */ |
447 | static void set_aliased_prot(void *v, pgprot_t prot) | |
448 | { | |
449 | int level; | |
450 | pte_t *ptep; | |
451 | pte_t pte; | |
452 | unsigned long pfn; | |
453 | struct page *page; | |
454 | ||
455 | ptep = lookup_address((unsigned long)v, &level); | |
456 | BUG_ON(ptep == NULL); | |
457 | ||
458 | pfn = pte_pfn(*ptep); | |
459 | page = pfn_to_page(pfn); | |
460 | ||
461 | pte = pfn_pte(pfn, prot); | |
462 | ||
463 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
464 | BUG(); | |
465 | ||
466 | if (!PageHighMem(page)) { | |
467 | void *av = __va(PFN_PHYS(pfn)); | |
468 | ||
469 | if (av != v) | |
470 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
471 | BUG(); | |
472 | } else | |
473 | kmap_flush_unused(); | |
474 | } | |
475 | ||
38ffbe66 JF |
476 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
477 | { | |
a05d2eba | 478 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
479 | int i; |
480 | ||
a05d2eba JF |
481 | for(i = 0; i < entries; i += entries_per_page) |
482 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
483 | } |
484 | ||
485 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
486 | { | |
a05d2eba | 487 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
488 | int i; |
489 | ||
a05d2eba JF |
490 | for(i = 0; i < entries; i += entries_per_page) |
491 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
492 | } |
493 | ||
5ead97c8 JF |
494 | static void xen_set_ldt(const void *addr, unsigned entries) |
495 | { | |
5ead97c8 JF |
496 | struct mmuext_op *op; |
497 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
498 | ||
ab78f7ad JF |
499 | trace_xen_cpu_set_ldt(addr, entries); |
500 | ||
5ead97c8 JF |
501 | op = mcs.args; |
502 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 503 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
504 | op->arg2.nr_ents = entries; |
505 | ||
506 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
507 | ||
508 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
509 | } | |
510 | ||
6b68f01b | 511 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 512 | { |
5ead97c8 JF |
513 | unsigned long va = dtr->address; |
514 | unsigned int size = dtr->size + 1; | |
515 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 516 | unsigned long frames[pages]; |
5ead97c8 | 517 | int f; |
5ead97c8 | 518 | |
577eebea JF |
519 | /* |
520 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
521 | * 8-byte entries, or 16 4k pages.. | |
522 | */ | |
5ead97c8 JF |
523 | |
524 | BUG_ON(size > 65536); | |
525 | BUG_ON(va & ~PAGE_MASK); | |
526 | ||
5ead97c8 | 527 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 528 | int level; |
577eebea | 529 | pte_t *ptep; |
6ed6bf42 JF |
530 | unsigned long pfn, mfn; |
531 | void *virt; | |
532 | ||
577eebea JF |
533 | /* |
534 | * The GDT is per-cpu and is in the percpu data area. | |
535 | * That can be virtually mapped, so we need to do a | |
536 | * page-walk to get the underlying MFN for the | |
537 | * hypercall. The page can also be in the kernel's | |
538 | * linear range, so we need to RO that mapping too. | |
539 | */ | |
540 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
541 | BUG_ON(ptep == NULL); |
542 | ||
543 | pfn = pte_pfn(*ptep); | |
544 | mfn = pfn_to_mfn(pfn); | |
545 | virt = __va(PFN_PHYS(pfn)); | |
546 | ||
547 | frames[f] = mfn; | |
9976b39b | 548 | |
5ead97c8 | 549 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 550 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
551 | } |
552 | ||
3ce5fa7e JF |
553 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
554 | BUG(); | |
5ead97c8 JF |
555 | } |
556 | ||
577eebea JF |
557 | /* |
558 | * load_gdt for early boot, when the gdt is only mapped once | |
559 | */ | |
ad3062a0 | 560 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
561 | { |
562 | unsigned long va = dtr->address; | |
563 | unsigned int size = dtr->size + 1; | |
564 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
565 | unsigned long frames[pages]; | |
566 | int f; | |
567 | ||
568 | /* | |
569 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
570 | * 8-byte entries, or 16 4k pages.. | |
571 | */ | |
572 | ||
573 | BUG_ON(size > 65536); | |
574 | BUG_ON(va & ~PAGE_MASK); | |
575 | ||
576 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
577 | pte_t pte; | |
578 | unsigned long pfn, mfn; | |
579 | ||
580 | pfn = virt_to_pfn(va); | |
581 | mfn = pfn_to_mfn(pfn); | |
582 | ||
583 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
584 | ||
585 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
586 | BUG(); | |
587 | ||
588 | frames[f] = mfn; | |
589 | } | |
590 | ||
591 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
592 | BUG(); | |
593 | } | |
594 | ||
59290362 DV |
595 | static inline bool desc_equal(const struct desc_struct *d1, |
596 | const struct desc_struct *d2) | |
597 | { | |
598 | return d1->a == d2->a && d1->b == d2->b; | |
599 | } | |
600 | ||
5ead97c8 JF |
601 | static void load_TLS_descriptor(struct thread_struct *t, |
602 | unsigned int cpu, unsigned int i) | |
603 | { | |
1c32cdc6 DV |
604 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
605 | struct desc_struct *gdt; | |
606 | xmaddr_t maddr; | |
607 | struct multicall_space mc; | |
608 | ||
609 | if (desc_equal(shadow, &t->tls_array[i])) | |
610 | return; | |
611 | ||
612 | *shadow = t->tls_array[i]; | |
613 | ||
614 | gdt = get_cpu_gdt_table(cpu); | |
615 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
616 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
617 | |
618 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
619 | } | |
620 | ||
621 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
622 | { | |
8b84ad94 | 623 | /* |
ccbeed3a TH |
624 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
625 | * and lazy gs handling is enabled, it means we're in a | |
626 | * context switch, and %gs has just been saved. This means we | |
627 | * can zero it out to prevent faults on exit from the | |
628 | * hypervisor if the next process has no %gs. Either way, it | |
629 | * has been saved, and the new value will get loaded properly. | |
630 | * This will go away as soon as Xen has been modified to not | |
631 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
632 | * |
633 | * On x86_64, this hack is not used for %gs, because gs points | |
634 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
635 | * must not zero %gs on x86_64 | |
636 | * | |
637 | * For x86_64, we need to zero %fs, otherwise we may get an | |
638 | * exception between the new %fs descriptor being loaded and | |
639 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 640 | */ |
8a95408e EH |
641 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
642 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 643 | lazy_load_gs(0); |
8a95408e EH |
644 | #else |
645 | loadsegment(fs, 0); | |
646 | #endif | |
647 | } | |
648 | ||
649 | xen_mc_batch(); | |
650 | ||
651 | load_TLS_descriptor(t, cpu, 0); | |
652 | load_TLS_descriptor(t, cpu, 1); | |
653 | load_TLS_descriptor(t, cpu, 2); | |
654 | ||
655 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
656 | } |
657 | ||
a8fc1089 EH |
658 | #ifdef CONFIG_X86_64 |
659 | static void xen_load_gs_index(unsigned int idx) | |
660 | { | |
661 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
662 | BUG(); | |
5ead97c8 | 663 | } |
a8fc1089 | 664 | #endif |
5ead97c8 JF |
665 | |
666 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 667 | const void *ptr) |
5ead97c8 | 668 | { |
cef43bf6 | 669 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 670 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 671 | |
ab78f7ad JF |
672 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
673 | ||
f120f13e JF |
674 | preempt_disable(); |
675 | ||
5ead97c8 JF |
676 | xen_mc_flush(); |
677 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
678 | BUG(); | |
f120f13e JF |
679 | |
680 | preempt_enable(); | |
5ead97c8 JF |
681 | } |
682 | ||
e176d367 | 683 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
684 | struct trap_info *info) |
685 | { | |
6cac5a92 JF |
686 | unsigned long addr; |
687 | ||
6d02c426 | 688 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
689 | return 0; |
690 | ||
691 | info->vector = vector; | |
6cac5a92 JF |
692 | |
693 | addr = gate_offset(*val); | |
694 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
695 | /* |
696 | * Look for known traps using IST, and substitute them | |
697 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
698 | * about. Xen will handle faults like double_fault, |
699 | * so we should never see them. Warn if | |
b80119bb JF |
700 | * there's an unexpected IST-using fault handler. |
701 | */ | |
6cac5a92 JF |
702 | if (addr == (unsigned long)debug) |
703 | addr = (unsigned long)xen_debug; | |
704 | else if (addr == (unsigned long)int3) | |
705 | addr = (unsigned long)xen_int3; | |
706 | else if (addr == (unsigned long)stack_segment) | |
707 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
708 | else if (addr == (unsigned long)double_fault || |
709 | addr == (unsigned long)nmi) { | |
710 | /* Don't need to handle these */ | |
711 | return 0; | |
712 | #ifdef CONFIG_X86_MCE | |
713 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
714 | /* |
715 | * when xen hypervisor inject vMCE to guest, | |
716 | * use native mce handler to handle it | |
717 | */ | |
718 | ; | |
b80119bb JF |
719 | #endif |
720 | } else { | |
721 | /* Some other trap using IST? */ | |
722 | if (WARN_ON(val->ist != 0)) | |
723 | return 0; | |
724 | } | |
6cac5a92 JF |
725 | #endif /* CONFIG_X86_64 */ |
726 | info->address = addr; | |
727 | ||
e176d367 EH |
728 | info->cs = gate_segment(*val); |
729 | info->flags = val->dpl; | |
5ead97c8 | 730 | /* interrupt gates clear IF */ |
6d02c426 JF |
731 | if (val->type == GATE_INTERRUPT) |
732 | info->flags |= 1 << 2; | |
5ead97c8 JF |
733 | |
734 | return 1; | |
735 | } | |
736 | ||
737 | /* Locations of each CPU's IDT */ | |
6b68f01b | 738 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
739 | |
740 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
741 | also update Xen. */ | |
8d947344 | 742 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 743 | { |
5ead97c8 | 744 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
745 | unsigned long start, end; |
746 | ||
ab78f7ad JF |
747 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
748 | ||
f120f13e JF |
749 | preempt_disable(); |
750 | ||
780f36d8 CL |
751 | start = __this_cpu_read(idt_desc.address); |
752 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
753 | |
754 | xen_mc_flush(); | |
755 | ||
8d947344 | 756 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
757 | |
758 | if (p >= start && (p + 8) <= end) { | |
759 | struct trap_info info[2]; | |
760 | ||
761 | info[1].address = 0; | |
762 | ||
e176d367 | 763 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
764 | if (HYPERVISOR_set_trap_table(info)) |
765 | BUG(); | |
766 | } | |
f120f13e JF |
767 | |
768 | preempt_enable(); | |
5ead97c8 JF |
769 | } |
770 | ||
6b68f01b | 771 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 772 | struct trap_info *traps) |
5ead97c8 | 773 | { |
5ead97c8 JF |
774 | unsigned in, out, count; |
775 | ||
e176d367 | 776 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
777 | BUG_ON(count > 256); |
778 | ||
5ead97c8 | 779 | for (in = out = 0; in < count; in++) { |
e176d367 | 780 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 781 | |
e176d367 | 782 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
783 | out++; |
784 | } | |
785 | traps[out].address = 0; | |
f87e4cac JF |
786 | } |
787 | ||
788 | void xen_copy_trap_info(struct trap_info *traps) | |
789 | { | |
6b68f01b | 790 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
791 | |
792 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
793 | } |
794 | ||
795 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
796 | hold a spinlock to protect the static traps[] array (static because | |
797 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 798 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
799 | { |
800 | static DEFINE_SPINLOCK(lock); | |
801 | static struct trap_info traps[257]; | |
f87e4cac | 802 | |
ab78f7ad JF |
803 | trace_xen_cpu_load_idt(desc); |
804 | ||
f87e4cac JF |
805 | spin_lock(&lock); |
806 | ||
f120f13e JF |
807 | __get_cpu_var(idt_desc) = *desc; |
808 | ||
f87e4cac | 809 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
810 | |
811 | xen_mc_flush(); | |
812 | if (HYPERVISOR_set_trap_table(traps)) | |
813 | BUG(); | |
814 | ||
815 | spin_unlock(&lock); | |
816 | } | |
817 | ||
818 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
819 | they're handled differently. */ | |
820 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 821 | const void *desc, int type) |
5ead97c8 | 822 | { |
ab78f7ad JF |
823 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
824 | ||
f120f13e JF |
825 | preempt_disable(); |
826 | ||
014b15be GOC |
827 | switch (type) { |
828 | case DESC_LDT: | |
829 | case DESC_TSS: | |
5ead97c8 JF |
830 | /* ignore */ |
831 | break; | |
832 | ||
833 | default: { | |
9976b39b | 834 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
835 | |
836 | xen_mc_flush(); | |
014b15be | 837 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
838 | BUG(); |
839 | } | |
840 | ||
841 | } | |
f120f13e JF |
842 | |
843 | preempt_enable(); | |
5ead97c8 JF |
844 | } |
845 | ||
577eebea JF |
846 | /* |
847 | * Version of write_gdt_entry for use at early boot-time needed to | |
848 | * update an entry as simply as possible. | |
849 | */ | |
ad3062a0 | 850 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
851 | const void *desc, int type) |
852 | { | |
ab78f7ad JF |
853 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
854 | ||
577eebea JF |
855 | switch (type) { |
856 | case DESC_LDT: | |
857 | case DESC_TSS: | |
858 | /* ignore */ | |
859 | break; | |
860 | ||
861 | default: { | |
862 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
863 | ||
864 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
865 | dt[entry] = *(struct desc_struct *)desc; | |
866 | } | |
867 | ||
868 | } | |
869 | } | |
870 | ||
faca6227 | 871 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 872 | struct thread_struct *thread) |
5ead97c8 | 873 | { |
ab78f7ad JF |
874 | struct multicall_space mcs; |
875 | ||
876 | mcs = xen_mc_entry(0); | |
faca6227 | 877 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
878 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
879 | } | |
880 | ||
881 | static void xen_set_iopl_mask(unsigned mask) | |
882 | { | |
883 | struct physdev_set_iopl set_iopl; | |
884 | ||
885 | /* Force the change at ring 0. */ | |
886 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
887 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
888 | } | |
889 | ||
890 | static void xen_io_delay(void) | |
891 | { | |
892 | } | |
893 | ||
894 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
895 | static unsigned long xen_set_apic_id(unsigned int x) |
896 | { | |
897 | WARN_ON(1); | |
898 | return x; | |
899 | } | |
900 | static unsigned int xen_get_apic_id(unsigned long x) | |
901 | { | |
902 | return ((x)>>24) & 0xFFu; | |
903 | } | |
ad66dd34 | 904 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 905 | { |
558daa28 KRW |
906 | struct xen_platform_op op = { |
907 | .cmd = XENPF_get_cpuinfo, | |
908 | .interface_version = XENPF_INTERFACE_VERSION, | |
909 | .u.pcpu_info.xen_cpuid = 0, | |
910 | }; | |
911 | int ret = 0; | |
912 | ||
913 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
914 | * get called on the bootup processor. But just in case. */ | |
915 | if (!xen_initial_domain() || smp_processor_id()) | |
916 | return 0; | |
917 | ||
918 | if (reg == APIC_LVR) | |
919 | return 0x10; | |
920 | ||
921 | if (reg != APIC_ID) | |
922 | return 0; | |
923 | ||
924 | ret = HYPERVISOR_dom0_op(&op); | |
925 | if (ret) | |
926 | return 0; | |
927 | ||
928 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 929 | } |
f87e4cac | 930 | |
ad66dd34 | 931 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
932 | { |
933 | /* Warn to see if there's any stray references */ | |
934 | WARN_ON(1); | |
935 | } | |
ad66dd34 | 936 | |
ad66dd34 SS |
937 | static u64 xen_apic_icr_read(void) |
938 | { | |
939 | return 0; | |
940 | } | |
941 | ||
942 | static void xen_apic_icr_write(u32 low, u32 id) | |
943 | { | |
944 | /* Warn to see if there's any stray references */ | |
945 | WARN_ON(1); | |
946 | } | |
947 | ||
948 | static void xen_apic_wait_icr_idle(void) | |
949 | { | |
950 | return; | |
951 | } | |
952 | ||
94a8c3c2 YL |
953 | static u32 xen_safe_apic_wait_icr_idle(void) |
954 | { | |
955 | return 0; | |
956 | } | |
957 | ||
c1eeb2de YL |
958 | static void set_xen_basic_apic_ops(void) |
959 | { | |
960 | apic->read = xen_apic_read; | |
961 | apic->write = xen_apic_write; | |
962 | apic->icr_read = xen_apic_icr_read; | |
963 | apic->icr_write = xen_apic_icr_write; | |
964 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
965 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
966 | apic->set_apic_id = xen_set_apic_id; |
967 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
968 | |
969 | #ifdef CONFIG_SMP | |
970 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
971 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
972 | apic->send_IPI_mask = xen_send_IPI_mask; | |
973 | apic->send_IPI_all = xen_send_IPI_all; | |
974 | apic->send_IPI_self = xen_send_IPI_self; | |
975 | #endif | |
c1eeb2de | 976 | } |
ad66dd34 | 977 | |
5ead97c8 JF |
978 | #endif |
979 | ||
7b1333aa JF |
980 | static void xen_clts(void) |
981 | { | |
982 | struct multicall_space mcs; | |
983 | ||
984 | mcs = xen_mc_entry(0); | |
985 | ||
986 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
987 | ||
988 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
989 | } | |
990 | ||
a789ed5f JF |
991 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
992 | ||
993 | static unsigned long xen_read_cr0(void) | |
994 | { | |
2113f469 | 995 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
996 | |
997 | if (unlikely(cr0 == 0)) { | |
998 | cr0 = native_read_cr0(); | |
2113f469 | 999 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
1000 | } |
1001 | ||
1002 | return cr0; | |
1003 | } | |
1004 | ||
7b1333aa JF |
1005 | static void xen_write_cr0(unsigned long cr0) |
1006 | { | |
1007 | struct multicall_space mcs; | |
1008 | ||
2113f469 | 1009 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 1010 | |
7b1333aa JF |
1011 | /* Only pay attention to cr0.TS; everything else is |
1012 | ignored. */ | |
1013 | mcs = xen_mc_entry(0); | |
1014 | ||
1015 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
1016 | ||
1017 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1018 | } | |
1019 | ||
5ead97c8 JF |
1020 | static void xen_write_cr4(unsigned long cr4) |
1021 | { | |
2956a351 JF |
1022 | cr4 &= ~X86_CR4_PGE; |
1023 | cr4 &= ~X86_CR4_PSE; | |
1024 | ||
1025 | native_write_cr4(cr4); | |
5ead97c8 | 1026 | } |
1a7bbda5 KRW |
1027 | #ifdef CONFIG_X86_64 |
1028 | static inline unsigned long xen_read_cr8(void) | |
1029 | { | |
1030 | return 0; | |
1031 | } | |
1032 | static inline void xen_write_cr8(unsigned long val) | |
1033 | { | |
1034 | BUG_ON(val); | |
1035 | } | |
1036 | #endif | |
1153968a JF |
1037 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
1038 | { | |
1039 | int ret; | |
1040 | ||
1041 | ret = 0; | |
1042 | ||
f63c2f24 | 1043 | switch (msr) { |
1153968a JF |
1044 | #ifdef CONFIG_X86_64 |
1045 | unsigned which; | |
1046 | u64 base; | |
1047 | ||
1048 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1049 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1050 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1051 | ||
1052 | set: | |
1053 | base = ((u64)high << 32) | low; | |
1054 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1055 | ret = -EIO; |
1153968a JF |
1056 | break; |
1057 | #endif | |
d89961e2 JF |
1058 | |
1059 | case MSR_STAR: | |
1060 | case MSR_CSTAR: | |
1061 | case MSR_LSTAR: | |
1062 | case MSR_SYSCALL_MASK: | |
1063 | case MSR_IA32_SYSENTER_CS: | |
1064 | case MSR_IA32_SYSENTER_ESP: | |
1065 | case MSR_IA32_SYSENTER_EIP: | |
1066 | /* Fast syscall setup is all done in hypercalls, so | |
1067 | these are all ignored. Stub them out here to stop | |
1068 | Xen console noise. */ | |
1069 | break; | |
1070 | ||
41f2e477 JF |
1071 | case MSR_IA32_CR_PAT: |
1072 | if (smp_processor_id() == 0) | |
1073 | xen_set_pat(((u64)high << 32) | low); | |
1074 | break; | |
1075 | ||
1153968a JF |
1076 | default: |
1077 | ret = native_write_msr_safe(msr, low, high); | |
1078 | } | |
1079 | ||
1080 | return ret; | |
1081 | } | |
1082 | ||
0e91398f | 1083 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1084 | { |
1085 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1086 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1087 | xen_start_info->shared_info); | |
1088 | ||
1089 | HYPERVISOR_shared_info = | |
1090 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1091 | } else |
1092 | HYPERVISOR_shared_info = | |
1093 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1094 | ||
2e8fe719 JF |
1095 | #ifndef CONFIG_SMP |
1096 | /* In UP this is as good a place as any to set up shared info */ | |
1097 | xen_setup_vcpu_info_placement(); | |
1098 | #endif | |
d5edbc1f JF |
1099 | |
1100 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1101 | } |
1102 | ||
5f054e31 | 1103 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1104 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1105 | { |
1106 | int cpu; | |
1107 | ||
1108 | for_each_possible_cpu(cpu) | |
1109 | xen_vcpu_setup(cpu); | |
1110 | ||
1111 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1112 | percpu area for all cpus, so make use of it */ | |
1113 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1114 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1115 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1116 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1117 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1118 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1119 | } |
5ead97c8 JF |
1120 | } |
1121 | ||
ab144f5e AK |
1122 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1123 | unsigned long addr, unsigned len) | |
6487673b JF |
1124 | { |
1125 | char *start, *end, *reloc; | |
1126 | unsigned ret; | |
1127 | ||
1128 | start = end = reloc = NULL; | |
1129 | ||
93b1eab3 JF |
1130 | #define SITE(op, x) \ |
1131 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1132 | if (have_vcpu_info_placement) { \ |
1133 | start = (char *)xen_##x##_direct; \ | |
1134 | end = xen_##x##_direct_end; \ | |
1135 | reloc = xen_##x##_direct_reloc; \ | |
1136 | } \ | |
1137 | goto patch_site | |
1138 | ||
1139 | switch (type) { | |
93b1eab3 JF |
1140 | SITE(pv_irq_ops, irq_enable); |
1141 | SITE(pv_irq_ops, irq_disable); | |
1142 | SITE(pv_irq_ops, save_fl); | |
1143 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1144 | #undef SITE |
1145 | ||
1146 | patch_site: | |
1147 | if (start == NULL || (end-start) > len) | |
1148 | goto default_patch; | |
1149 | ||
ab144f5e | 1150 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1151 | |
1152 | /* Note: because reloc is assigned from something that | |
1153 | appears to be an array, gcc assumes it's non-null, | |
1154 | but doesn't know its relationship with start and | |
1155 | end. */ | |
1156 | if (reloc > start && reloc < end) { | |
1157 | int reloc_off = reloc - start; | |
ab144f5e AK |
1158 | long *relocp = (long *)(insnbuf + reloc_off); |
1159 | long delta = start - (char *)addr; | |
6487673b JF |
1160 | |
1161 | *relocp += delta; | |
1162 | } | |
1163 | break; | |
1164 | ||
1165 | default_patch: | |
1166 | default: | |
ab144f5e AK |
1167 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1168 | addr, len); | |
6487673b JF |
1169 | break; |
1170 | } | |
1171 | ||
1172 | return ret; | |
1173 | } | |
1174 | ||
ad3062a0 | 1175 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1176 | .paravirt_enabled = 1, |
1177 | .shared_kernel_pmd = 0, | |
1178 | ||
318f5a2a AL |
1179 | #ifdef CONFIG_X86_64 |
1180 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1181 | #endif | |
1182 | ||
5ead97c8 | 1183 | .name = "Xen", |
93b1eab3 | 1184 | }; |
5ead97c8 | 1185 | |
ad3062a0 | 1186 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1187 | .patch = xen_patch, |
93b1eab3 | 1188 | }; |
5ead97c8 | 1189 | |
ad3062a0 | 1190 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1191 | .cpuid = xen_cpuid, |
1192 | ||
1193 | .set_debugreg = xen_set_debugreg, | |
1194 | .get_debugreg = xen_get_debugreg, | |
1195 | ||
7b1333aa | 1196 | .clts = xen_clts, |
5ead97c8 | 1197 | |
a789ed5f | 1198 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1199 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1200 | |
5ead97c8 JF |
1201 | .read_cr4 = native_read_cr4, |
1202 | .read_cr4_safe = native_read_cr4_safe, | |
1203 | .write_cr4 = xen_write_cr4, | |
1204 | ||
1a7bbda5 KRW |
1205 | #ifdef CONFIG_X86_64 |
1206 | .read_cr8 = xen_read_cr8, | |
1207 | .write_cr8 = xen_write_cr8, | |
1208 | #endif | |
1209 | ||
5ead97c8 JF |
1210 | .wbinvd = native_wbinvd, |
1211 | ||
1212 | .read_msr = native_read_msr_safe, | |
1153968a | 1213 | .write_msr = xen_write_msr_safe, |
1ab46fd3 | 1214 | |
5ead97c8 JF |
1215 | .read_tsc = native_read_tsc, |
1216 | .read_pmc = native_read_pmc, | |
1217 | ||
cd0608e7 KRW |
1218 | .read_tscp = native_read_tscp, |
1219 | ||
81e103f1 | 1220 | .iret = xen_iret, |
d75cd22f | 1221 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1222 | #ifdef CONFIG_X86_64 |
1223 | .usergs_sysret32 = xen_sysret32, | |
1224 | .usergs_sysret64 = xen_sysret64, | |
1225 | #endif | |
5ead97c8 JF |
1226 | |
1227 | .load_tr_desc = paravirt_nop, | |
1228 | .set_ldt = xen_set_ldt, | |
1229 | .load_gdt = xen_load_gdt, | |
1230 | .load_idt = xen_load_idt, | |
1231 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1232 | #ifdef CONFIG_X86_64 |
1233 | .load_gs_index = xen_load_gs_index, | |
1234 | #endif | |
5ead97c8 | 1235 | |
38ffbe66 JF |
1236 | .alloc_ldt = xen_alloc_ldt, |
1237 | .free_ldt = xen_free_ldt, | |
1238 | ||
5ead97c8 JF |
1239 | .store_gdt = native_store_gdt, |
1240 | .store_idt = native_store_idt, | |
1241 | .store_tr = xen_store_tr, | |
1242 | ||
1243 | .write_ldt_entry = xen_write_ldt_entry, | |
1244 | .write_gdt_entry = xen_write_gdt_entry, | |
1245 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1246 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1247 | |
1248 | .set_iopl_mask = xen_set_iopl_mask, | |
1249 | .io_delay = xen_io_delay, | |
1250 | ||
952d1d70 JF |
1251 | /* Xen takes care of %gs when switching to usermode for us */ |
1252 | .swapgs = paravirt_nop, | |
1253 | ||
224101ed JF |
1254 | .start_context_switch = paravirt_start_context_switch, |
1255 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1256 | }; |
1257 | ||
ad3062a0 | 1258 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1259 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1260 | .startup_ipi_hook = paravirt_nop, |
1261 | #endif | |
93b1eab3 JF |
1262 | }; |
1263 | ||
fefa629a JF |
1264 | static void xen_reboot(int reason) |
1265 | { | |
349c709f JF |
1266 | struct sched_shutdown r = { .reason = reason }; |
1267 | ||
349c709f | 1268 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1269 | BUG(); |
1270 | } | |
1271 | ||
1272 | static void xen_restart(char *msg) | |
1273 | { | |
1274 | xen_reboot(SHUTDOWN_reboot); | |
1275 | } | |
1276 | ||
1277 | static void xen_emergency_restart(void) | |
1278 | { | |
1279 | xen_reboot(SHUTDOWN_reboot); | |
1280 | } | |
1281 | ||
1282 | static void xen_machine_halt(void) | |
1283 | { | |
1284 | xen_reboot(SHUTDOWN_poweroff); | |
1285 | } | |
1286 | ||
b2abe506 TG |
1287 | static void xen_machine_power_off(void) |
1288 | { | |
1289 | if (pm_power_off) | |
1290 | pm_power_off(); | |
1291 | xen_reboot(SHUTDOWN_poweroff); | |
1292 | } | |
1293 | ||
fefa629a JF |
1294 | static void xen_crash_shutdown(struct pt_regs *regs) |
1295 | { | |
1296 | xen_reboot(SHUTDOWN_crash); | |
1297 | } | |
1298 | ||
f09f6d19 DD |
1299 | static int |
1300 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1301 | { | |
086748e5 | 1302 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1303 | return NOTIFY_DONE; |
1304 | } | |
1305 | ||
1306 | static struct notifier_block xen_panic_block = { | |
1307 | .notifier_call= xen_panic_event, | |
1308 | }; | |
1309 | ||
1310 | int xen_panic_handler_init(void) | |
1311 | { | |
1312 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1313 | return 0; | |
1314 | } | |
1315 | ||
ad3062a0 | 1316 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1317 | .restart = xen_restart, |
1318 | .halt = xen_machine_halt, | |
b2abe506 | 1319 | .power_off = xen_machine_power_off, |
fefa629a JF |
1320 | .shutdown = xen_machine_halt, |
1321 | .crash_shutdown = xen_crash_shutdown, | |
1322 | .emergency_restart = xen_emergency_restart, | |
1323 | }; | |
1324 | ||
96f28bc6 DV |
1325 | static void __init xen_boot_params_init_edd(void) |
1326 | { | |
1327 | #if IS_ENABLED(CONFIG_EDD) | |
1328 | struct xen_platform_op op; | |
1329 | struct edd_info *edd_info; | |
1330 | u32 *mbr_signature; | |
1331 | unsigned nr; | |
1332 | int ret; | |
1333 | ||
1334 | edd_info = boot_params.eddbuf; | |
1335 | mbr_signature = boot_params.edd_mbr_sig_buffer; | |
1336 | ||
1337 | op.cmd = XENPF_firmware_info; | |
1338 | ||
1339 | op.u.firmware_info.type = XEN_FW_DISK_INFO; | |
1340 | for (nr = 0; nr < EDDMAXNR; nr++) { | |
1341 | struct edd_info *info = edd_info + nr; | |
1342 | ||
1343 | op.u.firmware_info.index = nr; | |
1344 | info->params.length = sizeof(info->params); | |
1345 | set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, | |
1346 | &info->params); | |
1347 | ret = HYPERVISOR_dom0_op(&op); | |
1348 | if (ret) | |
1349 | break; | |
1350 | ||
1351 | #define C(x) info->x = op.u.firmware_info.u.disk_info.x | |
1352 | C(device); | |
1353 | C(version); | |
1354 | C(interface_support); | |
1355 | C(legacy_max_cylinder); | |
1356 | C(legacy_max_head); | |
1357 | C(legacy_sectors_per_track); | |
1358 | #undef C | |
1359 | } | |
1360 | boot_params.eddbuf_entries = nr; | |
1361 | ||
1362 | op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; | |
1363 | for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { | |
1364 | op.u.firmware_info.index = nr; | |
1365 | ret = HYPERVISOR_dom0_op(&op); | |
1366 | if (ret) | |
1367 | break; | |
1368 | mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; | |
1369 | } | |
1370 | boot_params.edd_mbr_sig_buf_entries = nr; | |
1371 | #endif | |
1372 | } | |
1373 | ||
577eebea JF |
1374 | /* |
1375 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1376 | * we do this, we have to be careful not to call any stack-protected | |
1377 | * function, which is most of the kernel. | |
1378 | */ | |
1379 | static void __init xen_setup_stackprotector(void) | |
1380 | { | |
1381 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1382 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1383 | ||
1384 | setup_stack_canary_segment(0); | |
1385 | switch_to_new_gdt(0); | |
1386 | ||
1387 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1388 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1389 | } | |
1390 | ||
5ead97c8 JF |
1391 | /* First C function to be called on Xen boot */ |
1392 | asmlinkage void __init xen_start_kernel(void) | |
1393 | { | |
ec35a69c KRW |
1394 | struct physdev_set_iopl set_iopl; |
1395 | int rc; | |
5ead97c8 JF |
1396 | |
1397 | if (!xen_start_info) | |
1398 | return; | |
1399 | ||
6e833587 JF |
1400 | xen_domain_type = XEN_PV_DOMAIN; |
1401 | ||
7e77506a IC |
1402 | xen_setup_machphys_mapping(); |
1403 | ||
5ead97c8 | 1404 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1405 | pv_info = xen_info; |
1406 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1407 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1408 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1409 | |
6b18ae3e | 1410 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1411 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1412 | x86_init.oem.banner = xen_banner; |
845b3944 | 1413 | |
409771d2 | 1414 | xen_init_time_ops(); |
93b1eab3 | 1415 | |
ce2eef33 | 1416 | /* |
577eebea | 1417 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1418 | */ |
577eebea | 1419 | |
973df35e JF |
1420 | xen_init_mmu_ops(); |
1421 | ||
577eebea JF |
1422 | /* Prevent unwanted bits from being set in PTEs. */ |
1423 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1424 | #if 0 |
577eebea | 1425 | if (!xen_initial_domain()) |
8eaffa67 | 1426 | #endif |
577eebea JF |
1427 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1428 | ||
1429 | __supported_pte_mask |= _PAGE_IOMAP; | |
1430 | ||
817a824b IC |
1431 | /* |
1432 | * Prevent page tables from being allocated in highmem, even | |
1433 | * if CONFIG_HIGHPTE is enabled. | |
1434 | */ | |
1435 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1436 | ||
b75fe4e5 | 1437 | /* Work out if we support NX */ |
4763ed4d | 1438 | x86_configure_nx(); |
b75fe4e5 | 1439 | |
577eebea JF |
1440 | xen_setup_features(); |
1441 | ||
1442 | /* Get mfn list */ | |
1443 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1444 | xen_build_dynamic_phys_to_machine(); | |
1445 | ||
1446 | /* | |
1447 | * Set up kernel GDT and segment registers, mainly so that | |
1448 | * -fstack-protector code can be executed. | |
1449 | */ | |
1450 | xen_setup_stackprotector(); | |
0d1edf46 | 1451 | |
ce2eef33 | 1452 | xen_init_irq_ops(); |
e826fe1b JF |
1453 | xen_init_cpuid_mask(); |
1454 | ||
94a8c3c2 | 1455 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1456 | /* |
94a8c3c2 | 1457 | * set up the basic apic ops. |
ad66dd34 | 1458 | */ |
c1eeb2de | 1459 | set_xen_basic_apic_ops(); |
ad66dd34 | 1460 | #endif |
93b1eab3 | 1461 | |
e57778a1 JF |
1462 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1463 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1464 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1465 | } | |
1466 | ||
fefa629a JF |
1467 | machine_ops = xen_machine_ops; |
1468 | ||
38341432 JF |
1469 | /* |
1470 | * The only reliable way to retain the initial address of the | |
1471 | * percpu gdt_page is to remember it here, so we can go and | |
1472 | * mark it RW later, when the initial percpu area is freed. | |
1473 | */ | |
1474 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1475 | |
a9e7062d | 1476 | xen_smp_init(); |
5ead97c8 | 1477 | |
c1f5db1a IC |
1478 | #ifdef CONFIG_ACPI_NUMA |
1479 | /* | |
1480 | * The pages we from Xen are not related to machine pages, so | |
1481 | * any NUMA information the kernel tries to get from ACPI will | |
1482 | * be meaningless. Prevent it from trying. | |
1483 | */ | |
1484 | acpi_numa = -1; | |
1485 | #endif | |
c79c4982 KRW |
1486 | #ifdef CONFIG_X86_PAT |
1487 | /* | |
1488 | * For right now disable the PAT. We should remove this once | |
1489 | * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1 | |
1490 | * (xen/pat: Disable PAT support for now) is reverted. | |
1491 | */ | |
1492 | pat_enabled = 0; | |
1493 | #endif | |
60223a32 | 1494 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1495 | possible map and a non-dummy shared_info. */ |
60223a32 | 1496 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1497 | |
55d80856 | 1498 | local_irq_disable(); |
2ce802f6 | 1499 | early_boot_irqs_disabled = true; |
55d80856 | 1500 | |
084a2a4e | 1501 | xen_raw_console_write("mapping kernel into physical memory\n"); |
3699aad0 | 1502 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages); |
5ead97c8 | 1503 | |
33a84750 JF |
1504 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1505 | xen_build_mfn_list_list(); | |
1506 | ||
5ead97c8 JF |
1507 | /* keep using Xen gdt for now; no urgent need to change it */ |
1508 | ||
e68266b7 | 1509 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1510 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1511 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1512 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1513 | #else |
1514 | pv_info.kernel_rpl = 0; | |
1515 | #endif | |
5ead97c8 | 1516 | /* set the limit of our address space */ |
fb1d8404 | 1517 | xen_reserve_top(); |
5ead97c8 | 1518 | |
ec35a69c KRW |
1519 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1520 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1521 | * which pokes 0xcf8 port. | |
1522 | */ | |
1523 | set_iopl.iopl = 1; | |
1524 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1525 | if (rc != 0) | |
1526 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1527 | ||
7d087b68 | 1528 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1529 | /* set up basic CPUID stuff */ |
1530 | cpu_detect(&new_cpu_data); | |
1531 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1532 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1533 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1534 | #endif |
5ead97c8 JF |
1535 | |
1536 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1537 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1538 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1539 | ? __pa(xen_start_info->mod_start) : 0; | |
1540 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1541 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1542 | |
6e833587 | 1543 | if (!xen_initial_domain()) { |
83abc70a | 1544 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1545 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1546 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1547 | if (pci_xen) |
1548 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1549 | } else { |
c2419b4a JF |
1550 | const struct dom0_vga_console_info *info = |
1551 | (void *)((char *)xen_start_info + | |
1552 | xen_start_info->console.dom0.info_off); | |
ffb8b233 KRW |
1553 | struct xen_platform_op op = { |
1554 | .cmd = XENPF_firmware_info, | |
1555 | .interface_version = XENPF_INTERFACE_VERSION, | |
1556 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1557 | }; | |
c2419b4a JF |
1558 | |
1559 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1560 | xen_start_info->console.domU.mfn = 0; | |
1561 | xen_start_info->console.domU.evtchn = 0; | |
1562 | ||
ffb8b233 KRW |
1563 | if (HYPERVISOR_dom0_op(&op) == 0) |
1564 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; | |
1565 | ||
31b3c9d7 KRW |
1566 | xen_init_apic(); |
1567 | ||
5d990b62 CW |
1568 | /* Make sure ACS will be enabled */ |
1569 | pci_request_acs(); | |
211063dc KRW |
1570 | |
1571 | xen_acpi_sleep_register(); | |
bd49940a KRW |
1572 | |
1573 | /* Avoid searching for BIOS MP tables */ | |
1574 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1575 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
96f28bc6 DV |
1576 | |
1577 | xen_boot_params_init_edd(); | |
9e124fe1 | 1578 | } |
76a8df7b DV |
1579 | #ifdef CONFIG_PCI |
1580 | /* PCI BIOS service won't work from a PV guest. */ | |
1581 | pci_probe &= ~PCI_PROBE_BIOS; | |
1582 | #endif | |
084a2a4e JF |
1583 | xen_raw_console_write("about to get started...\n"); |
1584 | ||
499d19b8 JF |
1585 | xen_setup_runstate_info(0); |
1586 | ||
5ead97c8 | 1587 | /* Start the world */ |
f5d36de0 | 1588 | #ifdef CONFIG_X86_32 |
f0d43100 | 1589 | i386_start_kernel(); |
f5d36de0 | 1590 | #else |
084a2a4e | 1591 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1592 | #endif |
5ead97c8 | 1593 | } |
bee6ab53 | 1594 | |
e9daff24 | 1595 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1596 | { |
e9daff24 | 1597 | int cpu; |
bee6ab53 | 1598 | struct xen_add_to_physmap xatp; |
e9daff24 | 1599 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1600 | |
e9daff24 KRW |
1601 | if (!shared_info_page) |
1602 | shared_info_page = (struct shared_info *) | |
1603 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1604 | xatp.domid = DOMID_SELF; |
1605 | xatp.idx = 0; | |
1606 | xatp.space = XENMAPSPACE_shared_info; | |
e9daff24 | 1607 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; |
bee6ab53 SY |
1608 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) |
1609 | BUG(); | |
1610 | ||
e9daff24 | 1611 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; |
bee6ab53 | 1612 | |
016b6f5f SS |
1613 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1614 | * page, we use it in the event channel upcall and in some pvclock | |
1615 | * related functions. We don't need the vcpu_info placement | |
1616 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
e9daff24 KRW |
1617 | * HVM. |
1618 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1619 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1620 | * in that case multiple vcpus might be online. */ | |
1621 | for_each_online_cpu(cpu) { | |
016b6f5f SS |
1622 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
1623 | } | |
bee6ab53 SY |
1624 | } |
1625 | ||
e9daff24 | 1626 | #ifdef CONFIG_XEN_PVHVM |
4ff2d062 OH |
1627 | static void __init init_hvm_pv_info(void) |
1628 | { | |
e9daff24 | 1629 | int major, minor; |
5eb65be2 | 1630 | uint32_t eax, ebx, ecx, edx, pages, msr, base; |
4ff2d062 OH |
1631 | u64 pfn; |
1632 | ||
1633 | base = xen_cpuid_base(); | |
e9daff24 KRW |
1634 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); |
1635 | ||
1636 | major = eax >> 16; | |
1637 | minor = eax & 0xffff; | |
1638 | printk(KERN_INFO "Xen version %d.%d.\n", major, minor); | |
1639 | ||
4ff2d062 OH |
1640 | cpuid(base + 2, &pages, &msr, &ecx, &edx); |
1641 | ||
1642 | pfn = __pa(hypercall_page); | |
1643 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1644 | ||
1645 | xen_setup_features(); | |
1646 | ||
1647 | pv_info.name = "Xen HVM"; | |
1648 | ||
1649 | xen_domain_type = XEN_HVM_DOMAIN; | |
1650 | } | |
1651 | ||
38e20b07 SY |
1652 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1653 | unsigned long action, void *hcpu) | |
1654 | { | |
1655 | int cpu = (long)hcpu; | |
1656 | switch (action) { | |
1657 | case CPU_UP_PREPARE: | |
90d4f553 | 1658 | xen_vcpu_setup(cpu); |
7918c92a | 1659 | if (xen_have_vector_callback) { |
99bbb3a8 | 1660 | xen_init_lock_cpu(cpu); |
7918c92a KRW |
1661 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) |
1662 | xen_setup_timer(cpu); | |
1663 | } | |
38e20b07 SY |
1664 | break; |
1665 | default: | |
1666 | break; | |
1667 | } | |
1668 | return NOTIFY_OK; | |
1669 | } | |
1670 | ||
ad3062a0 | 1671 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1672 | .notifier_call = xen_hvm_cpu_notify, |
1673 | }; | |
1674 | ||
bee6ab53 SY |
1675 | static void __init xen_hvm_guest_init(void) |
1676 | { | |
4ff2d062 | 1677 | init_hvm_pv_info(); |
bee6ab53 | 1678 | |
016b6f5f | 1679 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1680 | |
1681 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1682 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1683 | xen_hvm_smp_init(); |
38e20b07 | 1684 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1685 | xen_unplug_emulated_devices(); |
38e20b07 | 1686 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1687 | xen_hvm_init_time_ops(); |
59151001 | 1688 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1689 | } |
1690 | ||
1691 | static bool __init xen_hvm_platform(void) | |
1692 | { | |
1693 | if (xen_pv_domain()) | |
1694 | return false; | |
1695 | ||
e9daff24 | 1696 | if (!xen_cpuid_base()) |
bee6ab53 SY |
1697 | return false; |
1698 | ||
1699 | return true; | |
1700 | } | |
1701 | ||
d9b8ca84 SY |
1702 | bool xen_hvm_need_lapic(void) |
1703 | { | |
1704 | if (xen_pv_domain()) | |
1705 | return false; | |
1706 | if (!xen_hvm_domain()) | |
1707 | return false; | |
1708 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1709 | return false; | |
1710 | return true; | |
1711 | } | |
1712 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1713 | ||
ad3062a0 | 1714 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1715 | .name = "Xen HVM", |
1716 | .detect = xen_hvm_platform, | |
1717 | .init_platform = xen_hvm_guest_init, | |
4cca6ea0 | 1718 | .x2apic_available = xen_x2apic_para_available, |
bee6ab53 SY |
1719 | }; |
1720 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1721 | #endif |