xen/mm: zero PTEs for non-present MFNs in the initial page table
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
5ead97c8
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
5ead97c8
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
5ead97c8
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25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
5ead97c8 34
1ccbf534 35#include <xen/xen.h>
5ead97c8 36#include <xen/interface/xen.h>
ecbf29cd 37#include <xen/interface/version.h>
5ead97c8
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38#include <xen/interface/physdev.h>
39#include <xen/interface/vcpu.h>
bee6ab53 40#include <xen/interface/memory.h>
cef12ee5 41#include <xen/interface/xen-mca.h>
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42#include <xen/features.h>
43#include <xen/page.h>
38e20b07 44#include <xen/hvm.h>
084a2a4e 45#include <xen/hvc-console.h>
211063dc 46#include <xen/acpi.h>
5ead97c8
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47
48#include <asm/paravirt.h>
7b6aa335 49#include <asm/apic.h>
5ead97c8 50#include <asm/page.h>
b5401a96 51#include <asm/xen/pci.h>
5ead97c8
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52#include <asm/xen/hypercall.h>
53#include <asm/xen/hypervisor.h>
54#include <asm/fixmap.h>
55#include <asm/processor.h>
707ebbc8 56#include <asm/proto.h>
1153968a 57#include <asm/msr-index.h>
6cac5a92 58#include <asm/traps.h>
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59#include <asm/setup.h>
60#include <asm/desc.h>
817a824b 61#include <asm/pgalloc.h>
5ead97c8 62#include <asm/pgtable.h>
f87e4cac 63#include <asm/tlbflush.h>
fefa629a 64#include <asm/reboot.h>
577eebea 65#include <asm/stackprotector.h>
bee6ab53 66#include <asm/hypervisor.h>
73c154c6 67#include <asm/mwait.h>
76a8df7b 68#include <asm/pci_x86.h>
73c154c6
KRW
69
70#ifdef CONFIG_ACPI
71#include <linux/acpi.h>
72#include <asm/acpi.h>
73#include <acpi/pdc_intel.h>
74#include <acpi/processor.h>
75#include <xen/interface/platform.h>
76#endif
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77
78#include "xen-ops.h"
3b827c1b 79#include "mmu.h"
f447d56d 80#include "smp.h"
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81#include "multicalls.h"
82
83EXPORT_SYMBOL_GPL(hypercall_page);
84
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85DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
86DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 87
6e833587
JF
88enum xen_domain_type xen_domain_type = XEN_NATIVE;
89EXPORT_SYMBOL_GPL(xen_domain_type);
90
7e77506a
IC
91unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
92EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
93unsigned long machine_to_phys_nr;
94EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 95
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96struct start_info *xen_start_info;
97EXPORT_SYMBOL_GPL(xen_start_info);
98
a0d695c8 99struct shared_info xen_dummy_shared_info;
60223a32 100
38341432
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101void *xen_initial_gdt;
102
bee6ab53 103RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
38e20b07
SY
104__read_mostly int xen_have_vector_callback;
105EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 106
60223a32
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107/*
108 * Point at some empty memory to start with. We map the real shared_info
109 * page as soon as fixmap is up and running.
110 */
a0d695c8 111struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
60223a32
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112
113/*
114 * Flag to determine whether vcpu info placement is available on all
115 * VCPUs. We assume it is to start with, and then set it to zero on
116 * the first failure. This is because it can succeed on some VCPUs
117 * and not others, since it can involve hypervisor memory allocation,
118 * or because the guest failed to guarantee all the appropriate
119 * constraints on all VCPUs (ie buffer can't cross a page boundary).
120 *
121 * Note that any particular CPU may be using a placed vcpu structure,
122 * but we can only optimise if the all are.
123 *
124 * 0: not available, 1: available
125 */
e4d04071 126static int have_vcpu_info_placement = 1;
60223a32 127
c06ee78d
MR
128static void clamp_max_cpus(void)
129{
130#ifdef CONFIG_SMP
131 if (setup_max_cpus > MAX_VIRT_CPUS)
132 setup_max_cpus = MAX_VIRT_CPUS;
133#endif
134}
135
9c7a7942 136static void xen_vcpu_setup(int cpu)
5ead97c8 137{
60223a32
JF
138 struct vcpu_register_vcpu_info info;
139 int err;
140 struct vcpu_info *vcpup;
141
a0d695c8 142 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 143
c06ee78d
MR
144 if (cpu < MAX_VIRT_CPUS)
145 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 146
c06ee78d
MR
147 if (!have_vcpu_info_placement) {
148 if (cpu >= MAX_VIRT_CPUS)
149 clamp_max_cpus();
150 return;
151 }
60223a32 152
c06ee78d 153 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 154 info.mfn = arbitrary_virt_to_mfn(vcpup);
60223a32
JF
155 info.offset = offset_in_page(vcpup);
156
60223a32
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157 /* Check to see if the hypervisor will put the vcpu_info
158 structure where we want it, which allows direct access via
159 a percpu-variable. */
160 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
161
162 if (err) {
163 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
164 have_vcpu_info_placement = 0;
c06ee78d 165 clamp_max_cpus();
60223a32
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166 } else {
167 /* This cpu is using the registered vcpu info, even if
168 later ones fail to. */
169 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 170 }
5ead97c8
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171}
172
9c7a7942
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173/*
174 * On restore, set the vcpu placement up again.
175 * If it fails, then we're in a bad state, since
176 * we can't back out from using it...
177 */
178void xen_vcpu_restore(void)
179{
3905bb2a 180 int cpu;
9c7a7942 181
3905bb2a
JF
182 for_each_online_cpu(cpu) {
183 bool other_cpu = (cpu != smp_processor_id());
9c7a7942 184
3905bb2a
JF
185 if (other_cpu &&
186 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
187 BUG();
9c7a7942 188
3905bb2a 189 xen_setup_runstate_info(cpu);
9c7a7942 190
3905bb2a 191 if (have_vcpu_info_placement)
9c7a7942 192 xen_vcpu_setup(cpu);
9c7a7942 193
3905bb2a
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194 if (other_cpu &&
195 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
196 BUG();
9c7a7942
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197 }
198}
199
5ead97c8
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200static void __init xen_banner(void)
201{
95c7c23b
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202 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
203 struct xen_extraversion extra;
204 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
205
5ead97c8 206 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 207 pv_info.name);
95c7c23b
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208 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
209 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 210 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8
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211}
212
5e626254
AP
213#define CPUID_THERM_POWER_LEAF 6
214#define APERFMPERF_PRESENT 0
215
e826fe1b
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216static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
217static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
218
73c154c6
KRW
219static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
220static __read_mostly unsigned int cpuid_leaf5_ecx_val;
221static __read_mostly unsigned int cpuid_leaf5_edx_val;
222
65ea5b03
PA
223static void xen_cpuid(unsigned int *ax, unsigned int *bx,
224 unsigned int *cx, unsigned int *dx)
5ead97c8 225{
82d64699 226 unsigned maskebx = ~0;
e826fe1b 227 unsigned maskecx = ~0;
5ead97c8 228 unsigned maskedx = ~0;
73c154c6 229 unsigned setecx = 0;
5ead97c8
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230 /*
231 * Mask out inconvenient features, to try and disable as many
232 * unsupported kernel subsystems as possible.
233 */
82d64699
JF
234 switch (*ax) {
235 case 1:
e826fe1b 236 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 237 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 238 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
239 break;
240
73c154c6
KRW
241 case CPUID_MWAIT_LEAF:
242 /* Synthesize the values.. */
243 *ax = 0;
244 *bx = 0;
245 *cx = cpuid_leaf5_ecx_val;
246 *dx = cpuid_leaf5_edx_val;
247 return;
248
5e626254
AP
249 case CPUID_THERM_POWER_LEAF:
250 /* Disabling APERFMPERF for kernel usage */
251 maskecx = ~(1 << APERFMPERF_PRESENT);
252 break;
253
82d64699
JF
254 case 0xb:
255 /* Suppress extended topology stuff */
256 maskebx = 0;
257 break;
e826fe1b 258 }
5ead97c8
JF
259
260 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
261 : "=a" (*ax),
262 "=b" (*bx),
263 "=c" (*cx),
264 "=d" (*dx)
265 : "0" (*ax), "2" (*cx));
e826fe1b 266
82d64699 267 *bx &= maskebx;
e826fe1b 268 *cx &= maskecx;
73c154c6 269 *cx |= setecx;
65ea5b03 270 *dx &= maskedx;
73c154c6 271
5ead97c8
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272}
273
73c154c6
KRW
274static bool __init xen_check_mwait(void)
275{
df88b2d9
KRW
276#if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \
277 !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
73c154c6
KRW
278 struct xen_platform_op op = {
279 .cmd = XENPF_set_processor_pminfo,
280 .u.set_pminfo.id = -1,
281 .u.set_pminfo.type = XEN_PM_PDC,
282 };
283 uint32_t buf[3];
284 unsigned int ax, bx, cx, dx;
285 unsigned int mwait_mask;
286
287 /* We need to determine whether it is OK to expose the MWAIT
288 * capability to the kernel to harvest deeper than C3 states from ACPI
289 * _CST using the processor_harvest_xen.c module. For this to work, we
290 * need to gather the MWAIT_LEAF values (which the cstate.c code
291 * checks against). The hypervisor won't expose the MWAIT flag because
292 * it would break backwards compatibility; so we will find out directly
293 * from the hardware and hypercall.
294 */
295 if (!xen_initial_domain())
296 return false;
297
298 ax = 1;
299 cx = 0;
300
301 native_cpuid(&ax, &bx, &cx, &dx);
302
303 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
304 (1 << (X86_FEATURE_MWAIT % 32));
305
306 if ((cx & mwait_mask) != mwait_mask)
307 return false;
308
309 /* We need to emulate the MWAIT_LEAF and for that we need both
310 * ecx and edx. The hypercall provides only partial information.
311 */
312
313 ax = CPUID_MWAIT_LEAF;
314 bx = 0;
315 cx = 0;
316 dx = 0;
317
318 native_cpuid(&ax, &bx, &cx, &dx);
319
320 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
321 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
322 */
323 buf[0] = ACPI_PDC_REVISION_ID;
324 buf[1] = 1;
325 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
326
327 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
328
329 if ((HYPERVISOR_dom0_op(&op) == 0) &&
330 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
331 cpuid_leaf5_ecx_val = cx;
332 cpuid_leaf5_edx_val = dx;
333 }
334 return true;
335#else
336 return false;
337#endif
338}
ad3062a0 339static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
340{
341 unsigned int ax, bx, cx, dx;
947ccf9c 342 unsigned int xsave_mask;
e826fe1b
JF
343
344 cpuid_leaf1_edx_mask =
cef12ee5 345 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
346 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
347
348 if (!xen_initial_domain())
349 cpuid_leaf1_edx_mask &=
350 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
351 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
947ccf9c 352 ax = 1;
5e287830 353 cx = 0;
947ccf9c 354 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 355
947ccf9c
SH
356 xsave_mask =
357 (1 << (X86_FEATURE_XSAVE % 32)) |
358 (1 << (X86_FEATURE_OSXSAVE % 32));
359
360 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
361 if ((cx & xsave_mask) != xsave_mask)
362 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
363 if (xen_check_mwait())
364 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
365}
366
5ead97c8
JF
367static void xen_set_debugreg(int reg, unsigned long val)
368{
369 HYPERVISOR_set_debugreg(reg, val);
370}
371
372static unsigned long xen_get_debugreg(int reg)
373{
374 return HYPERVISOR_get_debugreg(reg);
375}
376
224101ed 377static void xen_end_context_switch(struct task_struct *next)
5ead97c8 378{
5ead97c8 379 xen_mc_flush();
224101ed 380 paravirt_end_context_switch(next);
5ead97c8
JF
381}
382
383static unsigned long xen_store_tr(void)
384{
385 return 0;
386}
387
a05d2eba 388/*
cef43bf6
JF
389 * Set the page permissions for a particular virtual address. If the
390 * address is a vmalloc mapping (or other non-linear mapping), then
391 * find the linear mapping of the page and also set its protections to
392 * match.
a05d2eba
JF
393 */
394static void set_aliased_prot(void *v, pgprot_t prot)
395{
396 int level;
397 pte_t *ptep;
398 pte_t pte;
399 unsigned long pfn;
400 struct page *page;
401
402 ptep = lookup_address((unsigned long)v, &level);
403 BUG_ON(ptep == NULL);
404
405 pfn = pte_pfn(*ptep);
406 page = pfn_to_page(pfn);
407
408 pte = pfn_pte(pfn, prot);
409
410 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
411 BUG();
412
413 if (!PageHighMem(page)) {
414 void *av = __va(PFN_PHYS(pfn));
415
416 if (av != v)
417 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
418 BUG();
419 } else
420 kmap_flush_unused();
421}
422
38ffbe66
JF
423static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
424{
a05d2eba 425 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
426 int i;
427
a05d2eba
JF
428 for(i = 0; i < entries; i += entries_per_page)
429 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
430}
431
432static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
433{
a05d2eba 434 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
435 int i;
436
a05d2eba
JF
437 for(i = 0; i < entries; i += entries_per_page)
438 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
439}
440
5ead97c8
JF
441static void xen_set_ldt(const void *addr, unsigned entries)
442{
5ead97c8
JF
443 struct mmuext_op *op;
444 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
445
ab78f7ad
JF
446 trace_xen_cpu_set_ldt(addr, entries);
447
5ead97c8
JF
448 op = mcs.args;
449 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 450 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
451 op->arg2.nr_ents = entries;
452
453 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
454
455 xen_mc_issue(PARAVIRT_LAZY_CPU);
456}
457
6b68f01b 458static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 459{
5ead97c8
JF
460 unsigned long va = dtr->address;
461 unsigned int size = dtr->size + 1;
462 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 463 unsigned long frames[pages];
5ead97c8 464 int f;
5ead97c8 465
577eebea
JF
466 /*
467 * A GDT can be up to 64k in size, which corresponds to 8192
468 * 8-byte entries, or 16 4k pages..
469 */
5ead97c8
JF
470
471 BUG_ON(size > 65536);
472 BUG_ON(va & ~PAGE_MASK);
473
5ead97c8 474 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 475 int level;
577eebea 476 pte_t *ptep;
6ed6bf42
JF
477 unsigned long pfn, mfn;
478 void *virt;
479
577eebea
JF
480 /*
481 * The GDT is per-cpu and is in the percpu data area.
482 * That can be virtually mapped, so we need to do a
483 * page-walk to get the underlying MFN for the
484 * hypercall. The page can also be in the kernel's
485 * linear range, so we need to RO that mapping too.
486 */
487 ptep = lookup_address(va, &level);
6ed6bf42
JF
488 BUG_ON(ptep == NULL);
489
490 pfn = pte_pfn(*ptep);
491 mfn = pfn_to_mfn(pfn);
492 virt = __va(PFN_PHYS(pfn));
493
494 frames[f] = mfn;
9976b39b 495
5ead97c8 496 make_lowmem_page_readonly((void *)va);
6ed6bf42 497 make_lowmem_page_readonly(virt);
5ead97c8
JF
498 }
499
3ce5fa7e
JF
500 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
501 BUG();
5ead97c8
JF
502}
503
577eebea
JF
504/*
505 * load_gdt for early boot, when the gdt is only mapped once
506 */
ad3062a0 507static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
508{
509 unsigned long va = dtr->address;
510 unsigned int size = dtr->size + 1;
511 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
512 unsigned long frames[pages];
513 int f;
514
515 /*
516 * A GDT can be up to 64k in size, which corresponds to 8192
517 * 8-byte entries, or 16 4k pages..
518 */
519
520 BUG_ON(size > 65536);
521 BUG_ON(va & ~PAGE_MASK);
522
523 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
524 pte_t pte;
525 unsigned long pfn, mfn;
526
527 pfn = virt_to_pfn(va);
528 mfn = pfn_to_mfn(pfn);
529
530 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
531
532 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
533 BUG();
534
535 frames[f] = mfn;
536 }
537
538 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
539 BUG();
540}
541
5ead97c8
JF
542static void load_TLS_descriptor(struct thread_struct *t,
543 unsigned int cpu, unsigned int i)
544{
545 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
9976b39b 546 xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
5ead97c8
JF
547 struct multicall_space mc = __xen_mc_entry(0);
548
549 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
550}
551
552static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
553{
8b84ad94 554 /*
ccbeed3a
TH
555 * XXX sleazy hack: If we're being called in a lazy-cpu zone
556 * and lazy gs handling is enabled, it means we're in a
557 * context switch, and %gs has just been saved. This means we
558 * can zero it out to prevent faults on exit from the
559 * hypervisor if the next process has no %gs. Either way, it
560 * has been saved, and the new value will get loaded properly.
561 * This will go away as soon as Xen has been modified to not
562 * save/restore %gs for normal hypercalls.
8a95408e
EH
563 *
564 * On x86_64, this hack is not used for %gs, because gs points
565 * to KERNEL_GS_BASE (and uses it for PDA references), so we
566 * must not zero %gs on x86_64
567 *
568 * For x86_64, we need to zero %fs, otherwise we may get an
569 * exception between the new %fs descriptor being loaded and
570 * %fs being effectively cleared at __switch_to().
8b84ad94 571 */
8a95408e
EH
572 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
573#ifdef CONFIG_X86_32
ccbeed3a 574 lazy_load_gs(0);
8a95408e
EH
575#else
576 loadsegment(fs, 0);
577#endif
578 }
579
580 xen_mc_batch();
581
582 load_TLS_descriptor(t, cpu, 0);
583 load_TLS_descriptor(t, cpu, 1);
584 load_TLS_descriptor(t, cpu, 2);
585
586 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
587}
588
a8fc1089
EH
589#ifdef CONFIG_X86_64
590static void xen_load_gs_index(unsigned int idx)
591{
592 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
593 BUG();
5ead97c8 594}
a8fc1089 595#endif
5ead97c8
JF
596
597static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 598 const void *ptr)
5ead97c8 599{
cef43bf6 600 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 601 u64 entry = *(u64 *)ptr;
5ead97c8 602
ab78f7ad
JF
603 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
604
f120f13e
JF
605 preempt_disable();
606
5ead97c8
JF
607 xen_mc_flush();
608 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
609 BUG();
f120f13e
JF
610
611 preempt_enable();
5ead97c8
JF
612}
613
e176d367 614static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
615 struct trap_info *info)
616{
6cac5a92
JF
617 unsigned long addr;
618
6d02c426 619 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
620 return 0;
621
622 info->vector = vector;
6cac5a92
JF
623
624 addr = gate_offset(*val);
625#ifdef CONFIG_X86_64
b80119bb
JF
626 /*
627 * Look for known traps using IST, and substitute them
628 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
629 * about. Xen will handle faults like double_fault,
630 * so we should never see them. Warn if
b80119bb
JF
631 * there's an unexpected IST-using fault handler.
632 */
6cac5a92
JF
633 if (addr == (unsigned long)debug)
634 addr = (unsigned long)xen_debug;
635 else if (addr == (unsigned long)int3)
636 addr = (unsigned long)xen_int3;
637 else if (addr == (unsigned long)stack_segment)
638 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
639 else if (addr == (unsigned long)double_fault ||
640 addr == (unsigned long)nmi) {
641 /* Don't need to handle these */
642 return 0;
643#ifdef CONFIG_X86_MCE
644 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
645 /*
646 * when xen hypervisor inject vMCE to guest,
647 * use native mce handler to handle it
648 */
649 ;
b80119bb
JF
650#endif
651 } else {
652 /* Some other trap using IST? */
653 if (WARN_ON(val->ist != 0))
654 return 0;
655 }
6cac5a92
JF
656#endif /* CONFIG_X86_64 */
657 info->address = addr;
658
e176d367
EH
659 info->cs = gate_segment(*val);
660 info->flags = val->dpl;
5ead97c8 661 /* interrupt gates clear IF */
6d02c426
JF
662 if (val->type == GATE_INTERRUPT)
663 info->flags |= 1 << 2;
5ead97c8
JF
664
665 return 1;
666}
667
668/* Locations of each CPU's IDT */
6b68f01b 669static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
670
671/* Set an IDT entry. If the entry is part of the current IDT, then
672 also update Xen. */
8d947344 673static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 674{
5ead97c8 675 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
676 unsigned long start, end;
677
ab78f7ad
JF
678 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
679
f120f13e
JF
680 preempt_disable();
681
780f36d8
CL
682 start = __this_cpu_read(idt_desc.address);
683 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
684
685 xen_mc_flush();
686
8d947344 687 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
688
689 if (p >= start && (p + 8) <= end) {
690 struct trap_info info[2];
691
692 info[1].address = 0;
693
e176d367 694 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
695 if (HYPERVISOR_set_trap_table(info))
696 BUG();
697 }
f120f13e
JF
698
699 preempt_enable();
5ead97c8
JF
700}
701
6b68f01b 702static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 703 struct trap_info *traps)
5ead97c8 704{
5ead97c8
JF
705 unsigned in, out, count;
706
e176d367 707 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
708 BUG_ON(count > 256);
709
5ead97c8 710 for (in = out = 0; in < count; in++) {
e176d367 711 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 712
e176d367 713 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
714 out++;
715 }
716 traps[out].address = 0;
f87e4cac
JF
717}
718
719void xen_copy_trap_info(struct trap_info *traps)
720{
6b68f01b 721 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
722
723 xen_convert_trap_info(desc, traps);
f87e4cac
JF
724}
725
726/* Load a new IDT into Xen. In principle this can be per-CPU, so we
727 hold a spinlock to protect the static traps[] array (static because
728 it avoids allocation, and saves stack space). */
6b68f01b 729static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
730{
731 static DEFINE_SPINLOCK(lock);
732 static struct trap_info traps[257];
f87e4cac 733
ab78f7ad
JF
734 trace_xen_cpu_load_idt(desc);
735
f87e4cac
JF
736 spin_lock(&lock);
737
f120f13e
JF
738 __get_cpu_var(idt_desc) = *desc;
739
f87e4cac 740 xen_convert_trap_info(desc, traps);
5ead97c8
JF
741
742 xen_mc_flush();
743 if (HYPERVISOR_set_trap_table(traps))
744 BUG();
745
746 spin_unlock(&lock);
747}
748
749/* Write a GDT descriptor entry. Ignore LDT descriptors, since
750 they're handled differently. */
751static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 752 const void *desc, int type)
5ead97c8 753{
ab78f7ad
JF
754 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
755
f120f13e
JF
756 preempt_disable();
757
014b15be
GOC
758 switch (type) {
759 case DESC_LDT:
760 case DESC_TSS:
5ead97c8
JF
761 /* ignore */
762 break;
763
764 default: {
9976b39b 765 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
766
767 xen_mc_flush();
014b15be 768 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
769 BUG();
770 }
771
772 }
f120f13e
JF
773
774 preempt_enable();
5ead97c8
JF
775}
776
577eebea
JF
777/*
778 * Version of write_gdt_entry for use at early boot-time needed to
779 * update an entry as simply as possible.
780 */
ad3062a0 781static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
782 const void *desc, int type)
783{
ab78f7ad
JF
784 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
785
577eebea
JF
786 switch (type) {
787 case DESC_LDT:
788 case DESC_TSS:
789 /* ignore */
790 break;
791
792 default: {
793 xmaddr_t maddr = virt_to_machine(&dt[entry]);
794
795 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
796 dt[entry] = *(struct desc_struct *)desc;
797 }
798
799 }
800}
801
faca6227 802static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 803 struct thread_struct *thread)
5ead97c8 804{
ab78f7ad
JF
805 struct multicall_space mcs;
806
807 mcs = xen_mc_entry(0);
faca6227 808 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
809 xen_mc_issue(PARAVIRT_LAZY_CPU);
810}
811
812static void xen_set_iopl_mask(unsigned mask)
813{
814 struct physdev_set_iopl set_iopl;
815
816 /* Force the change at ring 0. */
817 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
818 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
819}
820
821static void xen_io_delay(void)
822{
823}
824
825#ifdef CONFIG_X86_LOCAL_APIC
558daa28
KRW
826static unsigned long xen_set_apic_id(unsigned int x)
827{
828 WARN_ON(1);
829 return x;
830}
831static unsigned int xen_get_apic_id(unsigned long x)
832{
833 return ((x)>>24) & 0xFFu;
834}
ad66dd34 835static u32 xen_apic_read(u32 reg)
5ead97c8 836{
558daa28
KRW
837 struct xen_platform_op op = {
838 .cmd = XENPF_get_cpuinfo,
839 .interface_version = XENPF_INTERFACE_VERSION,
840 .u.pcpu_info.xen_cpuid = 0,
841 };
842 int ret = 0;
843
844 /* Shouldn't need this as APIC is turned off for PV, and we only
845 * get called on the bootup processor. But just in case. */
846 if (!xen_initial_domain() || smp_processor_id())
847 return 0;
848
849 if (reg == APIC_LVR)
850 return 0x10;
851
852 if (reg != APIC_ID)
853 return 0;
854
855 ret = HYPERVISOR_dom0_op(&op);
856 if (ret)
857 return 0;
858
859 return op.u.pcpu_info.apic_id << 24;
5ead97c8 860}
f87e4cac 861
ad66dd34 862static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
863{
864 /* Warn to see if there's any stray references */
865 WARN_ON(1);
866}
ad66dd34 867
ad66dd34
SS
868static u64 xen_apic_icr_read(void)
869{
870 return 0;
871}
872
873static void xen_apic_icr_write(u32 low, u32 id)
874{
875 /* Warn to see if there's any stray references */
876 WARN_ON(1);
877}
878
879static void xen_apic_wait_icr_idle(void)
880{
881 return;
882}
883
94a8c3c2
YL
884static u32 xen_safe_apic_wait_icr_idle(void)
885{
886 return 0;
887}
888
c1eeb2de
YL
889static void set_xen_basic_apic_ops(void)
890{
891 apic->read = xen_apic_read;
892 apic->write = xen_apic_write;
893 apic->icr_read = xen_apic_icr_read;
894 apic->icr_write = xen_apic_icr_write;
895 apic->wait_icr_idle = xen_apic_wait_icr_idle;
896 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
558daa28
KRW
897 apic->set_apic_id = xen_set_apic_id;
898 apic->get_apic_id = xen_get_apic_id;
f447d56d
BG
899
900#ifdef CONFIG_SMP
901 apic->send_IPI_allbutself = xen_send_IPI_allbutself;
902 apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;
903 apic->send_IPI_mask = xen_send_IPI_mask;
904 apic->send_IPI_all = xen_send_IPI_all;
905 apic->send_IPI_self = xen_send_IPI_self;
906#endif
c1eeb2de 907}
ad66dd34 908
5ead97c8
JF
909#endif
910
7b1333aa
JF
911static void xen_clts(void)
912{
913 struct multicall_space mcs;
914
915 mcs = xen_mc_entry(0);
916
917 MULTI_fpu_taskswitch(mcs.mc, 0);
918
919 xen_mc_issue(PARAVIRT_LAZY_CPU);
920}
921
a789ed5f
JF
922static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
923
924static unsigned long xen_read_cr0(void)
925{
2113f469 926 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
927
928 if (unlikely(cr0 == 0)) {
929 cr0 = native_read_cr0();
2113f469 930 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
931 }
932
933 return cr0;
934}
935
7b1333aa
JF
936static void xen_write_cr0(unsigned long cr0)
937{
938 struct multicall_space mcs;
939
2113f469 940 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 941
7b1333aa
JF
942 /* Only pay attention to cr0.TS; everything else is
943 ignored. */
944 mcs = xen_mc_entry(0);
945
946 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
947
948 xen_mc_issue(PARAVIRT_LAZY_CPU);
949}
950
5ead97c8
JF
951static void xen_write_cr4(unsigned long cr4)
952{
2956a351
JF
953 cr4 &= ~X86_CR4_PGE;
954 cr4 &= ~X86_CR4_PSE;
955
956 native_write_cr4(cr4);
5ead97c8
JF
957}
958
1153968a
JF
959static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
960{
961 int ret;
962
963 ret = 0;
964
f63c2f24 965 switch (msr) {
1153968a
JF
966#ifdef CONFIG_X86_64
967 unsigned which;
968 u64 base;
969
970 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
971 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
972 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
973
974 set:
975 base = ((u64)high << 32) | low;
976 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 977 ret = -EIO;
1153968a
JF
978 break;
979#endif
d89961e2
JF
980
981 case MSR_STAR:
982 case MSR_CSTAR:
983 case MSR_LSTAR:
984 case MSR_SYSCALL_MASK:
985 case MSR_IA32_SYSENTER_CS:
986 case MSR_IA32_SYSENTER_ESP:
987 case MSR_IA32_SYSENTER_EIP:
988 /* Fast syscall setup is all done in hypercalls, so
989 these are all ignored. Stub them out here to stop
990 Xen console noise. */
991 break;
992
41f2e477
JF
993 case MSR_IA32_CR_PAT:
994 if (smp_processor_id() == 0)
995 xen_set_pat(((u64)high << 32) | low);
996 break;
997
1153968a
JF
998 default:
999 ret = native_write_msr_safe(msr, low, high);
1000 }
1001
1002 return ret;
1003}
1004
0e91398f 1005void xen_setup_shared_info(void)
5ead97c8
JF
1006{
1007 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1008 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1009 xen_start_info->shared_info);
1010
1011 HYPERVISOR_shared_info =
1012 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1013 } else
1014 HYPERVISOR_shared_info =
1015 (struct shared_info *)__va(xen_start_info->shared_info);
1016
2e8fe719
JF
1017#ifndef CONFIG_SMP
1018 /* In UP this is as good a place as any to set up shared info */
1019 xen_setup_vcpu_info_placement();
1020#endif
d5edbc1f
JF
1021
1022 xen_setup_mfn_list_list();
2e8fe719
JF
1023}
1024
5f054e31 1025/* This is called once we have the cpu_possible_mask */
0e91398f 1026void xen_setup_vcpu_info_placement(void)
60223a32
JF
1027{
1028 int cpu;
1029
1030 for_each_possible_cpu(cpu)
1031 xen_vcpu_setup(cpu);
1032
1033 /* xen_vcpu_setup managed to place the vcpu_info within the
1034 percpu area for all cpus, so make use of it */
1035 if (have_vcpu_info_placement) {
ecb93d1c
JF
1036 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1037 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1038 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1039 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1040 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1041 }
5ead97c8
JF
1042}
1043
ab144f5e
AK
1044static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1045 unsigned long addr, unsigned len)
6487673b
JF
1046{
1047 char *start, *end, *reloc;
1048 unsigned ret;
1049
1050 start = end = reloc = NULL;
1051
93b1eab3
JF
1052#define SITE(op, x) \
1053 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1054 if (have_vcpu_info_placement) { \
1055 start = (char *)xen_##x##_direct; \
1056 end = xen_##x##_direct_end; \
1057 reloc = xen_##x##_direct_reloc; \
1058 } \
1059 goto patch_site
1060
1061 switch (type) {
93b1eab3
JF
1062 SITE(pv_irq_ops, irq_enable);
1063 SITE(pv_irq_ops, irq_disable);
1064 SITE(pv_irq_ops, save_fl);
1065 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1066#undef SITE
1067
1068 patch_site:
1069 if (start == NULL || (end-start) > len)
1070 goto default_patch;
1071
ab144f5e 1072 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1073
1074 /* Note: because reloc is assigned from something that
1075 appears to be an array, gcc assumes it's non-null,
1076 but doesn't know its relationship with start and
1077 end. */
1078 if (reloc > start && reloc < end) {
1079 int reloc_off = reloc - start;
ab144f5e
AK
1080 long *relocp = (long *)(insnbuf + reloc_off);
1081 long delta = start - (char *)addr;
6487673b
JF
1082
1083 *relocp += delta;
1084 }
1085 break;
1086
1087 default_patch:
1088 default:
ab144f5e
AK
1089 ret = paravirt_patch_default(type, clobbers, insnbuf,
1090 addr, len);
6487673b
JF
1091 break;
1092 }
1093
1094 return ret;
1095}
1096
ad3062a0 1097static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1098 .paravirt_enabled = 1,
1099 .shared_kernel_pmd = 0,
1100
318f5a2a
AL
1101#ifdef CONFIG_X86_64
1102 .extra_user_64bit_cs = FLAT_USER_CS64,
1103#endif
1104
5ead97c8 1105 .name = "Xen",
93b1eab3 1106};
5ead97c8 1107
ad3062a0 1108static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1109 .patch = xen_patch,
93b1eab3 1110};
5ead97c8 1111
ad3062a0 1112static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1113 .cpuid = xen_cpuid,
1114
1115 .set_debugreg = xen_set_debugreg,
1116 .get_debugreg = xen_get_debugreg,
1117
7b1333aa 1118 .clts = xen_clts,
5ead97c8 1119
a789ed5f 1120 .read_cr0 = xen_read_cr0,
7b1333aa 1121 .write_cr0 = xen_write_cr0,
5ead97c8 1122
5ead97c8
JF
1123 .read_cr4 = native_read_cr4,
1124 .read_cr4_safe = native_read_cr4_safe,
1125 .write_cr4 = xen_write_cr4,
1126
5ead97c8
JF
1127 .wbinvd = native_wbinvd,
1128
1129 .read_msr = native_read_msr_safe,
1ab46fd3 1130 .rdmsr_regs = native_rdmsr_safe_regs,
1153968a 1131 .write_msr = xen_write_msr_safe,
1ab46fd3
KRW
1132 .wrmsr_regs = native_wrmsr_safe_regs,
1133
5ead97c8
JF
1134 .read_tsc = native_read_tsc,
1135 .read_pmc = native_read_pmc,
1136
81e103f1 1137 .iret = xen_iret,
d75cd22f 1138 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1139#ifdef CONFIG_X86_64
1140 .usergs_sysret32 = xen_sysret32,
1141 .usergs_sysret64 = xen_sysret64,
1142#endif
5ead97c8
JF
1143
1144 .load_tr_desc = paravirt_nop,
1145 .set_ldt = xen_set_ldt,
1146 .load_gdt = xen_load_gdt,
1147 .load_idt = xen_load_idt,
1148 .load_tls = xen_load_tls,
a8fc1089
EH
1149#ifdef CONFIG_X86_64
1150 .load_gs_index = xen_load_gs_index,
1151#endif
5ead97c8 1152
38ffbe66
JF
1153 .alloc_ldt = xen_alloc_ldt,
1154 .free_ldt = xen_free_ldt,
1155
5ead97c8
JF
1156 .store_gdt = native_store_gdt,
1157 .store_idt = native_store_idt,
1158 .store_tr = xen_store_tr,
1159
1160 .write_ldt_entry = xen_write_ldt_entry,
1161 .write_gdt_entry = xen_write_gdt_entry,
1162 .write_idt_entry = xen_write_idt_entry,
faca6227 1163 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1164
1165 .set_iopl_mask = xen_set_iopl_mask,
1166 .io_delay = xen_io_delay,
1167
952d1d70
JF
1168 /* Xen takes care of %gs when switching to usermode for us */
1169 .swapgs = paravirt_nop,
1170
224101ed
JF
1171 .start_context_switch = paravirt_start_context_switch,
1172 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1173};
1174
ad3062a0 1175static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1176#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1177 .startup_ipi_hook = paravirt_nop,
1178#endif
93b1eab3
JF
1179};
1180
fefa629a
JF
1181static void xen_reboot(int reason)
1182{
349c709f
JF
1183 struct sched_shutdown r = { .reason = reason };
1184
349c709f 1185 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1186 BUG();
1187}
1188
1189static void xen_restart(char *msg)
1190{
1191 xen_reboot(SHUTDOWN_reboot);
1192}
1193
1194static void xen_emergency_restart(void)
1195{
1196 xen_reboot(SHUTDOWN_reboot);
1197}
1198
1199static void xen_machine_halt(void)
1200{
1201 xen_reboot(SHUTDOWN_poweroff);
1202}
1203
b2abe506
TG
1204static void xen_machine_power_off(void)
1205{
1206 if (pm_power_off)
1207 pm_power_off();
1208 xen_reboot(SHUTDOWN_poweroff);
1209}
1210
fefa629a
JF
1211static void xen_crash_shutdown(struct pt_regs *regs)
1212{
1213 xen_reboot(SHUTDOWN_crash);
1214}
1215
f09f6d19
DD
1216static int
1217xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1218{
086748e5 1219 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1220 return NOTIFY_DONE;
1221}
1222
1223static struct notifier_block xen_panic_block = {
1224 .notifier_call= xen_panic_event,
1225};
1226
1227int xen_panic_handler_init(void)
1228{
1229 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1230 return 0;
1231}
1232
ad3062a0 1233static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1234 .restart = xen_restart,
1235 .halt = xen_machine_halt,
b2abe506 1236 .power_off = xen_machine_power_off,
fefa629a
JF
1237 .shutdown = xen_machine_halt,
1238 .crash_shutdown = xen_crash_shutdown,
1239 .emergency_restart = xen_emergency_restart,
1240};
1241
577eebea
JF
1242/*
1243 * Set up the GDT and segment registers for -fstack-protector. Until
1244 * we do this, we have to be careful not to call any stack-protected
1245 * function, which is most of the kernel.
1246 */
1247static void __init xen_setup_stackprotector(void)
1248{
1249 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1250 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1251
1252 setup_stack_canary_segment(0);
1253 switch_to_new_gdt(0);
1254
1255 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1256 pv_cpu_ops.load_gdt = xen_load_gdt;
1257}
1258
5ead97c8
JF
1259/* First C function to be called on Xen boot */
1260asmlinkage void __init xen_start_kernel(void)
1261{
ec35a69c
KRW
1262 struct physdev_set_iopl set_iopl;
1263 int rc;
5ead97c8
JF
1264 pgd_t *pgd;
1265
1266 if (!xen_start_info)
1267 return;
1268
6e833587
JF
1269 xen_domain_type = XEN_PV_DOMAIN;
1270
7e77506a
IC
1271 xen_setup_machphys_mapping();
1272
5ead97c8 1273 /* Install Xen paravirt ops */
93b1eab3
JF
1274 pv_info = xen_info;
1275 pv_init_ops = xen_init_ops;
93b1eab3 1276 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1277 pv_apic_ops = xen_apic_ops;
93b1eab3 1278
6b18ae3e 1279 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1280 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1281 x86_init.oem.banner = xen_banner;
845b3944 1282
409771d2 1283 xen_init_time_ops();
93b1eab3 1284
ce2eef33 1285 /*
577eebea 1286 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1287 */
577eebea 1288
973df35e
JF
1289 xen_init_mmu_ops();
1290
577eebea
JF
1291 /* Prevent unwanted bits from being set in PTEs. */
1292 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1293#if 0
577eebea 1294 if (!xen_initial_domain())
8eaffa67 1295#endif
577eebea
JF
1296 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1297
1298 __supported_pte_mask |= _PAGE_IOMAP;
1299
817a824b
IC
1300 /*
1301 * Prevent page tables from being allocated in highmem, even
1302 * if CONFIG_HIGHPTE is enabled.
1303 */
1304 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1305
b75fe4e5 1306 /* Work out if we support NX */
4763ed4d 1307 x86_configure_nx();
b75fe4e5 1308
577eebea
JF
1309 xen_setup_features();
1310
1311 /* Get mfn list */
1312 if (!xen_feature(XENFEAT_auto_translated_physmap))
1313 xen_build_dynamic_phys_to_machine();
1314
1315 /*
1316 * Set up kernel GDT and segment registers, mainly so that
1317 * -fstack-protector code can be executed.
1318 */
1319 xen_setup_stackprotector();
0d1edf46 1320
ce2eef33 1321 xen_init_irq_ops();
e826fe1b
JF
1322 xen_init_cpuid_mask();
1323
94a8c3c2 1324#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1325 /*
94a8c3c2 1326 * set up the basic apic ops.
ad66dd34 1327 */
c1eeb2de 1328 set_xen_basic_apic_ops();
ad66dd34 1329#endif
93b1eab3 1330
e57778a1
JF
1331 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1332 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1333 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1334 }
1335
fefa629a
JF
1336 machine_ops = xen_machine_ops;
1337
38341432
JF
1338 /*
1339 * The only reliable way to retain the initial address of the
1340 * percpu gdt_page is to remember it here, so we can go and
1341 * mark it RW later, when the initial percpu area is freed.
1342 */
1343 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1344
a9e7062d 1345 xen_smp_init();
5ead97c8 1346
c1f5db1a
IC
1347#ifdef CONFIG_ACPI_NUMA
1348 /*
1349 * The pages we from Xen are not related to machine pages, so
1350 * any NUMA information the kernel tries to get from ACPI will
1351 * be meaningless. Prevent it from trying.
1352 */
1353 acpi_numa = -1;
1354#endif
1355
5ead97c8
JF
1356 pgd = (pgd_t *)xen_start_info->pt_base;
1357
60223a32 1358 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1359 possible map and a non-dummy shared_info. */
60223a32 1360 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1361
55d80856 1362 local_irq_disable();
2ce802f6 1363 early_boot_irqs_disabled = true;
55d80856 1364
084a2a4e 1365 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1366 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1367
33a84750
JF
1368 /* Allocate and initialize top and mid mfn levels for p2m structure */
1369 xen_build_mfn_list_list();
1370
5ead97c8
JF
1371 /* keep using Xen gdt for now; no urgent need to change it */
1372
e68266b7 1373#ifdef CONFIG_X86_32
93b1eab3 1374 pv_info.kernel_rpl = 1;
5ead97c8 1375 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1376 pv_info.kernel_rpl = 0;
e68266b7
IC
1377#else
1378 pv_info.kernel_rpl = 0;
1379#endif
5ead97c8 1380 /* set the limit of our address space */
fb1d8404 1381 xen_reserve_top();
5ead97c8 1382
ec35a69c
KRW
1383 /* We used to do this in xen_arch_setup, but that is too late on AMD
1384 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1385 * which pokes 0xcf8 port.
1386 */
1387 set_iopl.iopl = 1;
1388 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1389 if (rc != 0)
1390 xen_raw_printk("physdev_op failed %d\n", rc);
1391
7d087b68 1392#ifdef CONFIG_X86_32
5ead97c8
JF
1393 /* set up basic CPUID stuff */
1394 cpu_detect(&new_cpu_data);
1395 new_cpu_data.hard_math = 1;
d560bc61 1396 new_cpu_data.wp_works_ok = 1;
5ead97c8 1397 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1398#endif
5ead97c8
JF
1399
1400 /* Poke various useful things into boot_params */
30c82645
PA
1401 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1402 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1403 ? __pa(xen_start_info->mod_start) : 0;
1404 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1405 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1406
6e833587 1407 if (!xen_initial_domain()) {
83abc70a 1408 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1409 add_preferred_console("tty", 0, NULL);
b8c2d3df 1410 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1411 if (pci_xen)
1412 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1413 } else {
c2419b4a
JF
1414 const struct dom0_vga_console_info *info =
1415 (void *)((char *)xen_start_info +
1416 xen_start_info->console.dom0.info_off);
1417
1418 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1419 xen_start_info->console.domU.mfn = 0;
1420 xen_start_info->console.domU.evtchn = 0;
1421
31b3c9d7
KRW
1422 xen_init_apic();
1423
5d990b62
CW
1424 /* Make sure ACS will be enabled */
1425 pci_request_acs();
211063dc
KRW
1426
1427 xen_acpi_sleep_register();
9e124fe1 1428 }
76a8df7b
DV
1429#ifdef CONFIG_PCI
1430 /* PCI BIOS service won't work from a PV guest. */
1431 pci_probe &= ~PCI_PROBE_BIOS;
1432#endif
084a2a4e
JF
1433 xen_raw_console_write("about to get started...\n");
1434
499d19b8
JF
1435 xen_setup_runstate_info(0);
1436
5ead97c8 1437 /* Start the world */
f5d36de0 1438#ifdef CONFIG_X86_32
f0d43100 1439 i386_start_kernel();
f5d36de0 1440#else
084a2a4e 1441 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1442#endif
5ead97c8 1443}
bee6ab53 1444
bee6ab53
SY
1445static int init_hvm_pv_info(int *major, int *minor)
1446{
1447 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1448 u64 pfn;
1449
1450 base = xen_cpuid_base();
1451 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1452
1453 *major = eax >> 16;
1454 *minor = eax & 0xffff;
1455 printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor);
1456
1457 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1458
1459 pfn = __pa(hypercall_page);
1460 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1461
1462 xen_setup_features();
1463
cff520b9 1464 pv_info.name = "Xen HVM";
bee6ab53
SY
1465
1466 xen_domain_type = XEN_HVM_DOMAIN;
1467
1468 return 0;
1469}
1470
44b46c3e 1471void __ref xen_hvm_init_shared_info(void)
bee6ab53 1472{
016b6f5f 1473 int cpu;
bee6ab53 1474 struct xen_add_to_physmap xatp;
016b6f5f 1475 static struct shared_info *shared_info_page = 0;
bee6ab53 1476
016b6f5f
SS
1477 if (!shared_info_page)
1478 shared_info_page = (struct shared_info *)
1479 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1480 xatp.domid = DOMID_SELF;
1481 xatp.idx = 0;
1482 xatp.space = XENMAPSPACE_shared_info;
1483 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1484 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1485 BUG();
1486
1487 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1488
016b6f5f
SS
1489 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1490 * page, we use it in the event channel upcall and in some pvclock
1491 * related functions. We don't need the vcpu_info placement
1492 * optimizations because we don't use any pv_mmu or pv_irq op on
1493 * HVM.
1494 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1495 * online but xen_hvm_init_shared_info is run at resume time too and
1496 * in that case multiple vcpus might be online. */
1497 for_each_online_cpu(cpu) {
1498 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1499 }
bee6ab53
SY
1500}
1501
ca65f9fc 1502#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
1503static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1504 unsigned long action, void *hcpu)
1505{
1506 int cpu = (long)hcpu;
1507 switch (action) {
1508 case CPU_UP_PREPARE:
90d4f553 1509 xen_vcpu_setup(cpu);
99bbb3a8
SS
1510 if (xen_have_vector_callback)
1511 xen_init_lock_cpu(cpu);
38e20b07
SY
1512 break;
1513 default:
1514 break;
1515 }
1516 return NOTIFY_OK;
1517}
1518
ad3062a0 1519static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
38e20b07
SY
1520 .notifier_call = xen_hvm_cpu_notify,
1521};
1522
bee6ab53
SY
1523static void __init xen_hvm_guest_init(void)
1524{
1525 int r;
1526 int major, minor;
1527
1528 r = init_hvm_pv_info(&major, &minor);
1529 if (r < 0)
1530 return;
1531
016b6f5f 1532 xen_hvm_init_shared_info();
38e20b07
SY
1533
1534 if (xen_feature(XENFEAT_hvm_callback_vector))
1535 xen_have_vector_callback = 1;
99bbb3a8 1536 xen_hvm_smp_init();
38e20b07 1537 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1538 xen_unplug_emulated_devices();
38e20b07 1539 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1540 xen_hvm_init_time_ops();
59151001 1541 xen_hvm_init_mmu_ops();
bee6ab53
SY
1542}
1543
1544static bool __init xen_hvm_platform(void)
1545{
1546 if (xen_pv_domain())
1547 return false;
1548
1549 if (!xen_cpuid_base())
1550 return false;
1551
1552 return true;
1553}
1554
d9b8ca84
SY
1555bool xen_hvm_need_lapic(void)
1556{
1557 if (xen_pv_domain())
1558 return false;
1559 if (!xen_hvm_domain())
1560 return false;
1561 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1562 return false;
1563 return true;
1564}
1565EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1566
ad3062a0 1567const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1568 .name = "Xen HVM",
1569 .detect = xen_hvm_platform,
1570 .init_platform = xen_hvm_guest_init,
1571};
1572EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1573#endif