Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/bootmem.h> | |
24 | #include <linux/module.h> | |
f4f97b3e JF |
25 | #include <linux/mm.h> |
26 | #include <linux/page-flags.h> | |
27 | #include <linux/highmem.h> | |
b8c2d3df | 28 | #include <linux/console.h> |
5ead97c8 JF |
29 | |
30 | #include <xen/interface/xen.h> | |
31 | #include <xen/interface/physdev.h> | |
32 | #include <xen/interface/vcpu.h> | |
fefa629a | 33 | #include <xen/interface/sched.h> |
5ead97c8 JF |
34 | #include <xen/features.h> |
35 | #include <xen/page.h> | |
36 | ||
37 | #include <asm/paravirt.h> | |
38 | #include <asm/page.h> | |
39 | #include <asm/xen/hypercall.h> | |
40 | #include <asm/xen/hypervisor.h> | |
41 | #include <asm/fixmap.h> | |
42 | #include <asm/processor.h> | |
43 | #include <asm/setup.h> | |
44 | #include <asm/desc.h> | |
45 | #include <asm/pgtable.h> | |
f87e4cac | 46 | #include <asm/tlbflush.h> |
fefa629a | 47 | #include <asm/reboot.h> |
eba0045f | 48 | #include <asm/pgalloc.h> |
5ead97c8 JF |
49 | |
50 | #include "xen-ops.h" | |
3b827c1b | 51 | #include "mmu.h" |
5ead97c8 JF |
52 | #include "multicalls.h" |
53 | ||
54 | EXPORT_SYMBOL_GPL(hypercall_page); | |
55 | ||
5ead97c8 JF |
56 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
57 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d JF |
58 | |
59 | /* | |
60 | * Note about cr3 (pagetable base) values: | |
61 | * | |
62 | * xen_cr3 contains the current logical cr3 value; it contains the | |
63 | * last set cr3. This may not be the current effective cr3, because | |
64 | * its update may be being lazily deferred. However, a vcpu looking | |
65 | * at its own cr3 can use this value knowing that it everything will | |
66 | * be self-consistent. | |
67 | * | |
68 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
69 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
70 | * out of date, but it will never be set early). If one vcpu is | |
71 | * looking at another vcpu's cr3 value, it should use this variable. | |
72 | */ | |
73 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
74 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
5ead97c8 JF |
75 | |
76 | struct start_info *xen_start_info; | |
77 | EXPORT_SYMBOL_GPL(xen_start_info); | |
78 | ||
a0d695c8 | 79 | struct shared_info xen_dummy_shared_info; |
60223a32 JF |
80 | |
81 | /* | |
82 | * Point at some empty memory to start with. We map the real shared_info | |
83 | * page as soon as fixmap is up and running. | |
84 | */ | |
a0d695c8 | 85 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
86 | |
87 | /* | |
88 | * Flag to determine whether vcpu info placement is available on all | |
89 | * VCPUs. We assume it is to start with, and then set it to zero on | |
90 | * the first failure. This is because it can succeed on some VCPUs | |
91 | * and not others, since it can involve hypervisor memory allocation, | |
92 | * or because the guest failed to guarantee all the appropriate | |
93 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
94 | * | |
95 | * Note that any particular CPU may be using a placed vcpu structure, | |
96 | * but we can only optimise if the all are. | |
97 | * | |
98 | * 0: not available, 1: available | |
99 | */ | |
04c44a08 | 100 | static int have_vcpu_info_placement = 1; |
60223a32 | 101 | |
9c7a7942 | 102 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 103 | { |
60223a32 JF |
104 | struct vcpu_register_vcpu_info info; |
105 | int err; | |
106 | struct vcpu_info *vcpup; | |
107 | ||
a0d695c8 | 108 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 109 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
110 | |
111 | if (!have_vcpu_info_placement) | |
112 | return; /* already tested, not available */ | |
113 | ||
114 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
115 | ||
116 | info.mfn = virt_to_mfn(vcpup); | |
117 | info.offset = offset_in_page(vcpup); | |
118 | ||
e3d26976 | 119 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
120 | cpu, vcpup, info.mfn, info.offset); |
121 | ||
122 | /* Check to see if the hypervisor will put the vcpu_info | |
123 | structure where we want it, which allows direct access via | |
124 | a percpu-variable. */ | |
125 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
126 | ||
127 | if (err) { | |
128 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
129 | have_vcpu_info_placement = 0; | |
130 | } else { | |
131 | /* This cpu is using the registered vcpu info, even if | |
132 | later ones fail to. */ | |
133 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 134 | |
60223a32 JF |
135 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
136 | cpu, vcpup); | |
137 | } | |
5ead97c8 JF |
138 | } |
139 | ||
9c7a7942 JF |
140 | /* |
141 | * On restore, set the vcpu placement up again. | |
142 | * If it fails, then we're in a bad state, since | |
143 | * we can't back out from using it... | |
144 | */ | |
145 | void xen_vcpu_restore(void) | |
146 | { | |
147 | if (have_vcpu_info_placement) { | |
148 | int cpu; | |
149 | ||
150 | for_each_online_cpu(cpu) { | |
151 | bool other_cpu = (cpu != smp_processor_id()); | |
152 | ||
153 | if (other_cpu && | |
154 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
155 | BUG(); | |
156 | ||
157 | xen_vcpu_setup(cpu); | |
158 | ||
159 | if (other_cpu && | |
160 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
161 | BUG(); | |
162 | } | |
163 | ||
164 | BUG_ON(!have_vcpu_info_placement); | |
165 | } | |
166 | } | |
167 | ||
5ead97c8 JF |
168 | static void __init xen_banner(void) |
169 | { | |
170 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | |
93b1eab3 | 171 | pv_info.name); |
e57778a1 JF |
172 | printk(KERN_INFO "Hypervisor signature: %s%s\n", |
173 | xen_start_info->magic, | |
174 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); | |
5ead97c8 JF |
175 | } |
176 | ||
65ea5b03 PA |
177 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
178 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 JF |
179 | { |
180 | unsigned maskedx = ~0; | |
181 | ||
182 | /* | |
183 | * Mask out inconvenient features, to try and disable as many | |
184 | * unsupported kernel subsystems as possible. | |
185 | */ | |
65ea5b03 | 186 | if (*ax == 1) |
5ead97c8 JF |
187 | maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */ |
188 | (1 << X86_FEATURE_ACPI) | /* disable ACPI */ | |
dbe9e994 JF |
189 | (1 << X86_FEATURE_MCE) | /* disable MCE */ |
190 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
5ead97c8 JF |
191 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
192 | ||
193 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
194 | : "=a" (*ax), |
195 | "=b" (*bx), | |
196 | "=c" (*cx), | |
197 | "=d" (*dx) | |
198 | : "0" (*ax), "2" (*cx)); | |
199 | *dx &= maskedx; | |
5ead97c8 JF |
200 | } |
201 | ||
202 | static void xen_set_debugreg(int reg, unsigned long val) | |
203 | { | |
204 | HYPERVISOR_set_debugreg(reg, val); | |
205 | } | |
206 | ||
207 | static unsigned long xen_get_debugreg(int reg) | |
208 | { | |
209 | return HYPERVISOR_get_debugreg(reg); | |
210 | } | |
211 | ||
212 | static unsigned long xen_save_fl(void) | |
213 | { | |
214 | struct vcpu_info *vcpu; | |
215 | unsigned long flags; | |
216 | ||
5ead97c8 | 217 | vcpu = x86_read_percpu(xen_vcpu); |
f120f13e | 218 | |
5ead97c8 JF |
219 | /* flag has opposite sense of mask */ |
220 | flags = !vcpu->evtchn_upcall_mask; | |
5ead97c8 JF |
221 | |
222 | /* convert to IF type flag | |
223 | -0 -> 0x00000000 | |
224 | -1 -> 0xffffffff | |
225 | */ | |
226 | return (-flags) & X86_EFLAGS_IF; | |
227 | } | |
228 | ||
229 | static void xen_restore_fl(unsigned long flags) | |
230 | { | |
231 | struct vcpu_info *vcpu; | |
232 | ||
5ead97c8 JF |
233 | /* convert from IF type flag */ |
234 | flags = !(flags & X86_EFLAGS_IF); | |
f120f13e JF |
235 | |
236 | /* There's a one instruction preempt window here. We need to | |
237 | make sure we're don't switch CPUs between getting the vcpu | |
238 | pointer and updating the mask. */ | |
239 | preempt_disable(); | |
5ead97c8 JF |
240 | vcpu = x86_read_percpu(xen_vcpu); |
241 | vcpu->evtchn_upcall_mask = flags; | |
f120f13e | 242 | preempt_enable_no_resched(); |
5ead97c8 | 243 | |
f120f13e JF |
244 | /* Doesn't matter if we get preempted here, because any |
245 | pending event will get dealt with anyway. */ | |
5ead97c8 | 246 | |
f120f13e JF |
247 | if (flags == 0) { |
248 | preempt_check_resched(); | |
249 | barrier(); /* unmask then check (avoid races) */ | |
5ead97c8 JF |
250 | if (unlikely(vcpu->evtchn_upcall_pending)) |
251 | force_evtchn_callback(); | |
f120f13e | 252 | } |
5ead97c8 JF |
253 | } |
254 | ||
255 | static void xen_irq_disable(void) | |
256 | { | |
f120f13e JF |
257 | /* There's a one instruction preempt window here. We need to |
258 | make sure we're don't switch CPUs between getting the vcpu | |
259 | pointer and updating the mask. */ | |
5ead97c8 | 260 | preempt_disable(); |
f120f13e | 261 | x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1; |
5ead97c8 JF |
262 | preempt_enable_no_resched(); |
263 | } | |
264 | ||
265 | static void xen_irq_enable(void) | |
266 | { | |
267 | struct vcpu_info *vcpu; | |
268 | ||
239d1fc0 JF |
269 | /* We don't need to worry about being preempted here, since |
270 | either a) interrupts are disabled, so no preemption, or b) | |
271 | the caller is confused and is trying to re-enable interrupts | |
272 | on an indeterminate processor. */ | |
273 | ||
5ead97c8 JF |
274 | vcpu = x86_read_percpu(xen_vcpu); |
275 | vcpu->evtchn_upcall_mask = 0; | |
276 | ||
f120f13e JF |
277 | /* Doesn't matter if we get preempted here, because any |
278 | pending event will get dealt with anyway. */ | |
5ead97c8 | 279 | |
f120f13e | 280 | barrier(); /* unmask then check (avoid races) */ |
5ead97c8 JF |
281 | if (unlikely(vcpu->evtchn_upcall_pending)) |
282 | force_evtchn_callback(); | |
5ead97c8 JF |
283 | } |
284 | ||
285 | static void xen_safe_halt(void) | |
286 | { | |
287 | /* Blocking includes an implicit local_irq_enable(). */ | |
349c709f | 288 | if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0) |
5ead97c8 JF |
289 | BUG(); |
290 | } | |
291 | ||
292 | static void xen_halt(void) | |
293 | { | |
294 | if (irqs_disabled()) | |
295 | HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL); | |
296 | else | |
297 | xen_safe_halt(); | |
298 | } | |
299 | ||
8965c1c0 | 300 | static void xen_leave_lazy(void) |
5ead97c8 | 301 | { |
8965c1c0 | 302 | paravirt_leave_lazy(paravirt_get_lazy_mode()); |
5ead97c8 | 303 | xen_mc_flush(); |
5ead97c8 JF |
304 | } |
305 | ||
306 | static unsigned long xen_store_tr(void) | |
307 | { | |
308 | return 0; | |
309 | } | |
310 | ||
311 | static void xen_set_ldt(const void *addr, unsigned entries) | |
312 | { | |
5ead97c8 JF |
313 | struct mmuext_op *op; |
314 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
315 | ||
316 | op = mcs.args; | |
317 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 318 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
319 | op->arg2.nr_ents = entries; |
320 | ||
321 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
322 | ||
323 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
324 | } | |
325 | ||
6b68f01b | 326 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 JF |
327 | { |
328 | unsigned long *frames; | |
329 | unsigned long va = dtr->address; | |
330 | unsigned int size = dtr->size + 1; | |
331 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
332 | int f; | |
333 | struct multicall_space mcs; | |
334 | ||
335 | /* A GDT can be up to 64k in size, which corresponds to 8192 | |
336 | 8-byte entries, or 16 4k pages.. */ | |
337 | ||
338 | BUG_ON(size > 65536); | |
339 | BUG_ON(va & ~PAGE_MASK); | |
340 | ||
341 | mcs = xen_mc_entry(sizeof(*frames) * pages); | |
342 | frames = mcs.args; | |
343 | ||
344 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
345 | frames[f] = virt_to_mfn(va); | |
346 | make_lowmem_page_readonly((void *)va); | |
347 | } | |
348 | ||
349 | MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); | |
350 | ||
351 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
352 | } | |
353 | ||
354 | static void load_TLS_descriptor(struct thread_struct *t, | |
355 | unsigned int cpu, unsigned int i) | |
356 | { | |
357 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
358 | xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
359 | struct multicall_space mc = __xen_mc_entry(0); | |
360 | ||
361 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
362 | } | |
363 | ||
364 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
365 | { | |
366 | xen_mc_batch(); | |
367 | ||
368 | load_TLS_descriptor(t, cpu, 0); | |
369 | load_TLS_descriptor(t, cpu, 1); | |
370 | load_TLS_descriptor(t, cpu, 2); | |
371 | ||
372 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
8b84ad94 JF |
373 | |
374 | /* | |
375 | * XXX sleazy hack: If we're being called in a lazy-cpu zone, | |
376 | * it means we're in a context switch, and %gs has just been | |
377 | * saved. This means we can zero it out to prevent faults on | |
378 | * exit from the hypervisor if the next process has no %gs. | |
379 | * Either way, it has been saved, and the new value will get | |
380 | * loaded properly. This will go away as soon as Xen has been | |
381 | * modified to not save/restore %gs for normal hypercalls. | |
382 | */ | |
8965c1c0 | 383 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) |
8b84ad94 | 384 | loadsegment(gs, 0); |
5ead97c8 JF |
385 | } |
386 | ||
387 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 388 | const void *ptr) |
5ead97c8 JF |
389 | { |
390 | unsigned long lp = (unsigned long)&dt[entrynum]; | |
391 | xmaddr_t mach_lp = virt_to_machine(lp); | |
75b8bb3e | 392 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 393 | |
f120f13e JF |
394 | preempt_disable(); |
395 | ||
5ead97c8 JF |
396 | xen_mc_flush(); |
397 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
398 | BUG(); | |
f120f13e JF |
399 | |
400 | preempt_enable(); | |
5ead97c8 JF |
401 | } |
402 | ||
403 | static int cvt_gate_to_trap(int vector, u32 low, u32 high, | |
404 | struct trap_info *info) | |
405 | { | |
406 | u8 type, dpl; | |
407 | ||
408 | type = (high >> 8) & 0x1f; | |
409 | dpl = (high >> 13) & 3; | |
410 | ||
411 | if (type != 0xf && type != 0xe) | |
412 | return 0; | |
413 | ||
414 | info->vector = vector; | |
415 | info->address = (high & 0xffff0000) | (low & 0x0000ffff); | |
416 | info->cs = low >> 16; | |
417 | info->flags = dpl; | |
418 | /* interrupt gates clear IF */ | |
419 | if (type == 0xe) | |
420 | info->flags |= 4; | |
421 | ||
422 | return 1; | |
423 | } | |
424 | ||
425 | /* Locations of each CPU's IDT */ | |
6b68f01b | 426 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
427 | |
428 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
429 | also update Xen. */ | |
8d947344 | 430 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 431 | { |
5ead97c8 | 432 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
433 | unsigned long start, end; |
434 | ||
435 | preempt_disable(); | |
436 | ||
437 | start = __get_cpu_var(idt_desc).address; | |
438 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
439 | |
440 | xen_mc_flush(); | |
441 | ||
8d947344 | 442 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
443 | |
444 | if (p >= start && (p + 8) <= end) { | |
445 | struct trap_info info[2]; | |
8d947344 | 446 | u32 *desc = (u32 *)g; |
5ead97c8 JF |
447 | |
448 | info[1].address = 0; | |
449 | ||
8d947344 | 450 | if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0])) |
5ead97c8 JF |
451 | if (HYPERVISOR_set_trap_table(info)) |
452 | BUG(); | |
453 | } | |
f120f13e JF |
454 | |
455 | preempt_enable(); | |
5ead97c8 JF |
456 | } |
457 | ||
6b68f01b | 458 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 459 | struct trap_info *traps) |
5ead97c8 | 460 | { |
5ead97c8 JF |
461 | unsigned in, out, count; |
462 | ||
5ead97c8 JF |
463 | count = (desc->size+1) / 8; |
464 | BUG_ON(count > 256); | |
465 | ||
5ead97c8 JF |
466 | for (in = out = 0; in < count; in++) { |
467 | const u32 *entry = (u32 *)(desc->address + in * 8); | |
468 | ||
469 | if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out])) | |
470 | out++; | |
471 | } | |
472 | traps[out].address = 0; | |
f87e4cac JF |
473 | } |
474 | ||
475 | void xen_copy_trap_info(struct trap_info *traps) | |
476 | { | |
6b68f01b | 477 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
478 | |
479 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
480 | } |
481 | ||
482 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
483 | hold a spinlock to protect the static traps[] array (static because | |
484 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 485 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
486 | { |
487 | static DEFINE_SPINLOCK(lock); | |
488 | static struct trap_info traps[257]; | |
f87e4cac JF |
489 | |
490 | spin_lock(&lock); | |
491 | ||
f120f13e JF |
492 | __get_cpu_var(idt_desc) = *desc; |
493 | ||
f87e4cac | 494 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
495 | |
496 | xen_mc_flush(); | |
497 | if (HYPERVISOR_set_trap_table(traps)) | |
498 | BUG(); | |
499 | ||
500 | spin_unlock(&lock); | |
501 | } | |
502 | ||
503 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
504 | they're handled differently. */ | |
505 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 506 | const void *desc, int type) |
5ead97c8 | 507 | { |
f120f13e JF |
508 | preempt_disable(); |
509 | ||
014b15be GOC |
510 | switch (type) { |
511 | case DESC_LDT: | |
512 | case DESC_TSS: | |
5ead97c8 JF |
513 | /* ignore */ |
514 | break; | |
515 | ||
516 | default: { | |
517 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
5ead97c8 JF |
518 | |
519 | xen_mc_flush(); | |
014b15be | 520 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
521 | BUG(); |
522 | } | |
523 | ||
524 | } | |
f120f13e JF |
525 | |
526 | preempt_enable(); | |
5ead97c8 JF |
527 | } |
528 | ||
faca6227 | 529 | static void xen_load_sp0(struct tss_struct *tss, |
f120f13e | 530 | struct thread_struct *thread) |
5ead97c8 JF |
531 | { |
532 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 533 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
534 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
535 | } | |
536 | ||
537 | static void xen_set_iopl_mask(unsigned mask) | |
538 | { | |
539 | struct physdev_set_iopl set_iopl; | |
540 | ||
541 | /* Force the change at ring 0. */ | |
542 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
543 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
544 | } | |
545 | ||
546 | static void xen_io_delay(void) | |
547 | { | |
548 | } | |
549 | ||
550 | #ifdef CONFIG_X86_LOCAL_APIC | |
42e0a9aa | 551 | static u32 xen_apic_read(unsigned long reg) |
5ead97c8 JF |
552 | { |
553 | return 0; | |
554 | } | |
f87e4cac | 555 | |
42e0a9aa | 556 | static void xen_apic_write(unsigned long reg, u32 val) |
f87e4cac JF |
557 | { |
558 | /* Warn to see if there's any stray references */ | |
559 | WARN_ON(1); | |
560 | } | |
5ead97c8 JF |
561 | #endif |
562 | ||
563 | static void xen_flush_tlb(void) | |
564 | { | |
d66bf8fc | 565 | struct mmuext_op *op; |
41e332b2 JF |
566 | struct multicall_space mcs; |
567 | ||
568 | preempt_disable(); | |
569 | ||
570 | mcs = xen_mc_entry(sizeof(*op)); | |
5ead97c8 | 571 | |
d66bf8fc JF |
572 | op = mcs.args; |
573 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
574 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
575 | ||
576 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
577 | |
578 | preempt_enable(); | |
5ead97c8 JF |
579 | } |
580 | ||
581 | static void xen_flush_tlb_single(unsigned long addr) | |
582 | { | |
d66bf8fc | 583 | struct mmuext_op *op; |
41e332b2 JF |
584 | struct multicall_space mcs; |
585 | ||
586 | preempt_disable(); | |
5ead97c8 | 587 | |
41e332b2 | 588 | mcs = xen_mc_entry(sizeof(*op)); |
d66bf8fc JF |
589 | op = mcs.args; |
590 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
591 | op->arg1.linear_addr = addr & PAGE_MASK; | |
592 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
593 | ||
594 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
595 | |
596 | preempt_enable(); | |
5ead97c8 JF |
597 | } |
598 | ||
f87e4cac JF |
599 | static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm, |
600 | unsigned long va) | |
601 | { | |
d66bf8fc JF |
602 | struct { |
603 | struct mmuext_op op; | |
604 | cpumask_t mask; | |
605 | } *args; | |
f87e4cac | 606 | cpumask_t cpumask = *cpus; |
d66bf8fc | 607 | struct multicall_space mcs; |
f87e4cac JF |
608 | |
609 | /* | |
610 | * A couple of (to be removed) sanity checks: | |
611 | * | |
612 | * - current CPU must not be in mask | |
613 | * - mask must exist :) | |
614 | */ | |
615 | BUG_ON(cpus_empty(cpumask)); | |
616 | BUG_ON(cpu_isset(smp_processor_id(), cpumask)); | |
617 | BUG_ON(!mm); | |
618 | ||
619 | /* If a CPU which we ran on has gone down, OK. */ | |
620 | cpus_and(cpumask, cpumask, cpu_online_map); | |
621 | if (cpus_empty(cpumask)) | |
622 | return; | |
623 | ||
d66bf8fc JF |
624 | mcs = xen_mc_entry(sizeof(*args)); |
625 | args = mcs.args; | |
626 | args->mask = cpumask; | |
627 | args->op.arg2.vcpumask = &args->mask; | |
628 | ||
f87e4cac | 629 | if (va == TLB_FLUSH_ALL) { |
d66bf8fc | 630 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; |
f87e4cac | 631 | } else { |
d66bf8fc JF |
632 | args->op.cmd = MMUEXT_INVLPG_MULTI; |
633 | args->op.arg1.linear_addr = va; | |
f87e4cac JF |
634 | } |
635 | ||
d66bf8fc JF |
636 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); |
637 | ||
638 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f87e4cac JF |
639 | } |
640 | ||
7b1333aa JF |
641 | static void xen_clts(void) |
642 | { | |
643 | struct multicall_space mcs; | |
644 | ||
645 | mcs = xen_mc_entry(0); | |
646 | ||
647 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
648 | ||
649 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
650 | } | |
651 | ||
652 | static void xen_write_cr0(unsigned long cr0) | |
653 | { | |
654 | struct multicall_space mcs; | |
655 | ||
656 | /* Only pay attention to cr0.TS; everything else is | |
657 | ignored. */ | |
658 | mcs = xen_mc_entry(0); | |
659 | ||
660 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
661 | ||
662 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
663 | } | |
664 | ||
60223a32 JF |
665 | static void xen_write_cr2(unsigned long cr2) |
666 | { | |
667 | x86_read_percpu(xen_vcpu)->arch.cr2 = cr2; | |
668 | } | |
669 | ||
5ead97c8 JF |
670 | static unsigned long xen_read_cr2(void) |
671 | { | |
672 | return x86_read_percpu(xen_vcpu)->arch.cr2; | |
673 | } | |
674 | ||
60223a32 JF |
675 | static unsigned long xen_read_cr2_direct(void) |
676 | { | |
677 | return x86_read_percpu(xen_vcpu_info.arch.cr2); | |
678 | } | |
679 | ||
5ead97c8 JF |
680 | static void xen_write_cr4(unsigned long cr4) |
681 | { | |
2956a351 JF |
682 | cr4 &= ~X86_CR4_PGE; |
683 | cr4 &= ~X86_CR4_PSE; | |
684 | ||
685 | native_write_cr4(cr4); | |
5ead97c8 JF |
686 | } |
687 | ||
5ead97c8 JF |
688 | static unsigned long xen_read_cr3(void) |
689 | { | |
690 | return x86_read_percpu(xen_cr3); | |
691 | } | |
692 | ||
9f79991d JF |
693 | static void set_current_cr3(void *v) |
694 | { | |
695 | x86_write_percpu(xen_current_cr3, (unsigned long)v); | |
696 | } | |
697 | ||
5ead97c8 JF |
698 | static void xen_write_cr3(unsigned long cr3) |
699 | { | |
9f79991d JF |
700 | struct mmuext_op *op; |
701 | struct multicall_space mcs; | |
702 | unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
703 | ||
f120f13e JF |
704 | BUG_ON(preemptible()); |
705 | ||
9f79991d | 706 | mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */ |
5ead97c8 | 707 | |
9f79991d JF |
708 | /* Update while interrupts are disabled, so its atomic with |
709 | respect to ipis */ | |
5ead97c8 JF |
710 | x86_write_percpu(xen_cr3, cr3); |
711 | ||
9f79991d JF |
712 | op = mcs.args; |
713 | op->cmd = MMUEXT_NEW_BASEPTR; | |
714 | op->arg1.mfn = mfn; | |
5ead97c8 | 715 | |
9f79991d | 716 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); |
5ead97c8 | 717 | |
9f79991d JF |
718 | /* Update xen_update_cr3 once the batch has actually |
719 | been submitted. */ | |
720 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
5ead97c8 | 721 | |
9f79991d | 722 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ |
5ead97c8 JF |
723 | } |
724 | ||
f4f97b3e JF |
725 | /* Early in boot, while setting up the initial pagetable, assume |
726 | everything is pinned. */ | |
6944a9c8 | 727 | static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn) |
5ead97c8 | 728 | { |
af7ae3b9 | 729 | #ifdef CONFIG_FLATMEM |
f4f97b3e | 730 | BUG_ON(mem_map); /* should only be used early */ |
af7ae3b9 | 731 | #endif |
5ead97c8 JF |
732 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); |
733 | } | |
734 | ||
6944a9c8 | 735 | /* Early release_pte assumes that all pts are pinned, since there's |
1c70e9bd | 736 | only init_mm and anything attached to that is pinned. */ |
6944a9c8 | 737 | static void xen_release_pte_init(u32 pfn) |
1c70e9bd JF |
738 | { |
739 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
740 | } | |
741 | ||
f6433706 | 742 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
74260714 JF |
743 | { |
744 | struct mmuext_op op; | |
f6433706 | 745 | op.cmd = cmd; |
74260714 JF |
746 | op.arg1.mfn = pfn_to_mfn(pfn); |
747 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
748 | BUG(); | |
749 | } | |
750 | ||
f4f97b3e JF |
751 | /* This needs to make sure the new pte page is pinned iff its being |
752 | attached to a pinned pagetable. */ | |
1c70e9bd | 753 | static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level) |
5ead97c8 | 754 | { |
f4f97b3e | 755 | struct page *page = pfn_to_page(pfn); |
5ead97c8 | 756 | |
f4f97b3e JF |
757 | if (PagePinned(virt_to_page(mm->pgd))) { |
758 | SetPagePinned(page); | |
759 | ||
74260714 | 760 | if (!PageHighMem(page)) { |
f4f97b3e | 761 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); |
f6433706 MM |
762 | if (level == PT_PTE) |
763 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
74260714 | 764 | } else |
f4f97b3e JF |
765 | /* make sure there are no stray mappings of |
766 | this page */ | |
767 | kmap_flush_unused(); | |
768 | } | |
5ead97c8 JF |
769 | } |
770 | ||
6944a9c8 | 771 | static void xen_alloc_pte(struct mm_struct *mm, u32 pfn) |
1c70e9bd | 772 | { |
f6433706 | 773 | xen_alloc_ptpage(mm, pfn, PT_PTE); |
1c70e9bd JF |
774 | } |
775 | ||
6944a9c8 | 776 | static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn) |
1c70e9bd | 777 | { |
f6433706 | 778 | xen_alloc_ptpage(mm, pfn, PT_PMD); |
1c70e9bd JF |
779 | } |
780 | ||
f4f97b3e | 781 | /* This should never happen until we're OK to use struct page */ |
f6433706 | 782 | static void xen_release_ptpage(u32 pfn, unsigned level) |
5ead97c8 | 783 | { |
f4f97b3e JF |
784 | struct page *page = pfn_to_page(pfn); |
785 | ||
786 | if (PagePinned(page)) { | |
74260714 | 787 | if (!PageHighMem(page)) { |
a684d69d MM |
788 | if (level == PT_PTE) |
789 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | |
f4f97b3e | 790 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
74260714 | 791 | } |
c946c7de | 792 | ClearPagePinned(page); |
f4f97b3e | 793 | } |
5ead97c8 JF |
794 | } |
795 | ||
6944a9c8 | 796 | static void xen_release_pte(u32 pfn) |
f6433706 MM |
797 | { |
798 | xen_release_ptpage(pfn, PT_PTE); | |
799 | } | |
800 | ||
6944a9c8 | 801 | static void xen_release_pmd(u32 pfn) |
f6433706 MM |
802 | { |
803 | xen_release_ptpage(pfn, PT_PMD); | |
804 | } | |
805 | ||
f4f97b3e JF |
806 | #ifdef CONFIG_HIGHPTE |
807 | static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) | |
5ead97c8 | 808 | { |
f4f97b3e JF |
809 | pgprot_t prot = PAGE_KERNEL; |
810 | ||
811 | if (PagePinned(page)) | |
812 | prot = PAGE_KERNEL_RO; | |
813 | ||
814 | if (0 && PageHighMem(page)) | |
815 | printk("mapping highpte %lx type %d prot %s\n", | |
816 | page_to_pfn(page), type, | |
817 | (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); | |
818 | ||
819 | return kmap_atomic_prot(page, type, prot); | |
5ead97c8 | 820 | } |
f4f97b3e | 821 | #endif |
5ead97c8 | 822 | |
9a4029fd JF |
823 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) |
824 | { | |
825 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | |
826 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
827 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
828 | pte_val_ma(pte)); | |
829 | ||
830 | return pte; | |
831 | } | |
832 | ||
833 | /* Init-time set_pte while constructing initial pagetables, which | |
834 | doesn't allow RO pagetable pages to be remapped RW */ | |
835 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | |
836 | { | |
837 | pte = mask_rw_pte(ptep, pte); | |
838 | ||
839 | xen_set_pte(ptep, pte); | |
840 | } | |
841 | ||
5ead97c8 JF |
842 | static __init void xen_pagetable_setup_start(pgd_t *base) |
843 | { | |
844 | pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base; | |
3843fc25 | 845 | int i; |
5ead97c8 | 846 | |
9a4029fd | 847 | /* special set_pte for pagetable initialization */ |
93b1eab3 | 848 | pv_mmu_ops.set_pte = xen_set_pte_init; |
9a4029fd | 849 | |
5ead97c8 JF |
850 | init_mm.pgd = base; |
851 | /* | |
3843fc25 JF |
852 | * copy top-level of Xen-supplied pagetable into place. This |
853 | * is a stand-in while we copy the pmd pages. | |
5ead97c8 JF |
854 | */ |
855 | memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t)); | |
856 | ||
3843fc25 JF |
857 | /* |
858 | * For PAE, need to allocate new pmds, rather than | |
859 | * share Xen's, since Xen doesn't like pmd's being | |
860 | * shared between address spaces. | |
861 | */ | |
862 | for (i = 0; i < PTRS_PER_PGD; i++) { | |
863 | if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) { | |
864 | pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE); | |
5ead97c8 | 865 | |
3843fc25 JF |
866 | memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]), |
867 | PAGE_SIZE); | |
5ead97c8 | 868 | |
3843fc25 | 869 | make_lowmem_page_readonly(pmd); |
5ead97c8 | 870 | |
3843fc25 JF |
871 | set_pgd(&base[i], __pgd(1 + __pa(pmd))); |
872 | } else | |
873 | pgd_clear(&base[i]); | |
5ead97c8 JF |
874 | } |
875 | ||
876 | /* make sure zero_page is mapped RO so we can use it in pagetables */ | |
877 | make_lowmem_page_readonly(empty_zero_page); | |
878 | make_lowmem_page_readonly(base); | |
879 | /* | |
880 | * Switch to new pagetable. This is done before | |
881 | * pagetable_init has done anything so that the new pages | |
882 | * added to the table can be prepared properly for Xen. | |
883 | */ | |
884 | xen_write_cr3(__pa(base)); | |
2b540781 JF |
885 | |
886 | /* Unpin initial Xen pagetable */ | |
887 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | |
888 | PFN_DOWN(__pa(xen_start_info->pt_base))); | |
5ead97c8 JF |
889 | } |
890 | ||
0e91398f | 891 | void xen_setup_shared_info(void) |
5ead97c8 JF |
892 | { |
893 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
2e8fe719 JF |
894 | unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP); |
895 | ||
5ead97c8 JF |
896 | /* |
897 | * Create a mapping for the shared info page. | |
898 | * Should be set_fixmap(), but shared_info is a machine | |
899 | * address with no corresponding pseudo-phys address. | |
900 | */ | |
2e8fe719 | 901 | set_pte_mfn(addr, |
5ead97c8 JF |
902 | PFN_DOWN(xen_start_info->shared_info), |
903 | PAGE_KERNEL); | |
5ead97c8 | 904 | |
2e8fe719 | 905 | HYPERVISOR_shared_info = (struct shared_info *)addr; |
5ead97c8 JF |
906 | } else |
907 | HYPERVISOR_shared_info = | |
908 | (struct shared_info *)__va(xen_start_info->shared_info); | |
909 | ||
2e8fe719 JF |
910 | #ifndef CONFIG_SMP |
911 | /* In UP this is as good a place as any to set up shared info */ | |
912 | xen_setup_vcpu_info_placement(); | |
913 | #endif | |
d5edbc1f JF |
914 | |
915 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
916 | } |
917 | ||
918 | static __init void xen_pagetable_setup_done(pgd_t *base) | |
919 | { | |
920 | /* This will work as long as patching hasn't happened yet | |
921 | (which it hasn't) */ | |
6944a9c8 JF |
922 | pv_mmu_ops.alloc_pte = xen_alloc_pte; |
923 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
924 | pv_mmu_ops.release_pte = xen_release_pte; | |
925 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
2e8fe719 JF |
926 | pv_mmu_ops.set_pte = xen_set_pte; |
927 | ||
0e91398f | 928 | xen_setup_shared_info(); |
2e8fe719 | 929 | |
f4f97b3e JF |
930 | /* Actually pin the pagetable down, but we can't set PG_pinned |
931 | yet because the page structures don't exist yet. */ | |
3843fc25 | 932 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base))); |
60223a32 | 933 | } |
5ead97c8 | 934 | |
e2426cf8 JF |
935 | static __init void xen_post_allocator_init(void) |
936 | { | |
937 | pv_mmu_ops.set_pmd = xen_set_pmd; | |
938 | pv_mmu_ops.set_pud = xen_set_pud; | |
939 | ||
940 | xen_mark_init_mm_pinned(); | |
941 | } | |
942 | ||
60223a32 | 943 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 944 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
945 | { |
946 | int cpu; | |
947 | ||
948 | for_each_possible_cpu(cpu) | |
949 | xen_vcpu_setup(cpu); | |
950 | ||
951 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
952 | percpu area for all cpus, so make use of it */ | |
953 | if (have_vcpu_info_placement) { | |
954 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
955 | ||
93b1eab3 JF |
956 | pv_irq_ops.save_fl = xen_save_fl_direct; |
957 | pv_irq_ops.restore_fl = xen_restore_fl_direct; | |
958 | pv_irq_ops.irq_disable = xen_irq_disable_direct; | |
959 | pv_irq_ops.irq_enable = xen_irq_enable_direct; | |
960 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; | |
60223a32 | 961 | } |
5ead97c8 JF |
962 | } |
963 | ||
ab144f5e AK |
964 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
965 | unsigned long addr, unsigned len) | |
6487673b JF |
966 | { |
967 | char *start, *end, *reloc; | |
968 | unsigned ret; | |
969 | ||
970 | start = end = reloc = NULL; | |
971 | ||
93b1eab3 JF |
972 | #define SITE(op, x) \ |
973 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
974 | if (have_vcpu_info_placement) { \ |
975 | start = (char *)xen_##x##_direct; \ | |
976 | end = xen_##x##_direct_end; \ | |
977 | reloc = xen_##x##_direct_reloc; \ | |
978 | } \ | |
979 | goto patch_site | |
980 | ||
981 | switch (type) { | |
93b1eab3 JF |
982 | SITE(pv_irq_ops, irq_enable); |
983 | SITE(pv_irq_ops, irq_disable); | |
984 | SITE(pv_irq_ops, save_fl); | |
985 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
986 | #undef SITE |
987 | ||
988 | patch_site: | |
989 | if (start == NULL || (end-start) > len) | |
990 | goto default_patch; | |
991 | ||
ab144f5e | 992 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
993 | |
994 | /* Note: because reloc is assigned from something that | |
995 | appears to be an array, gcc assumes it's non-null, | |
996 | but doesn't know its relationship with start and | |
997 | end. */ | |
998 | if (reloc > start && reloc < end) { | |
999 | int reloc_off = reloc - start; | |
ab144f5e AK |
1000 | long *relocp = (long *)(insnbuf + reloc_off); |
1001 | long delta = start - (char *)addr; | |
6487673b JF |
1002 | |
1003 | *relocp += delta; | |
1004 | } | |
1005 | break; | |
1006 | ||
1007 | default_patch: | |
1008 | default: | |
ab144f5e AK |
1009 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1010 | addr, len); | |
6487673b JF |
1011 | break; |
1012 | } | |
1013 | ||
1014 | return ret; | |
1015 | } | |
1016 | ||
aeaaa59c JF |
1017 | static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot) |
1018 | { | |
1019 | pte_t pte; | |
1020 | ||
1021 | phys >>= PAGE_SHIFT; | |
1022 | ||
1023 | switch (idx) { | |
1024 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | |
1025 | #ifdef CONFIG_X86_F00F_BUG | |
1026 | case FIX_F00F_IDT: | |
1027 | #endif | |
1028 | case FIX_WP_TEST: | |
1029 | case FIX_VDSO: | |
1030 | #ifdef CONFIG_X86_LOCAL_APIC | |
1031 | case FIX_APIC_BASE: /* maps dummy local APIC */ | |
1032 | #endif | |
1033 | pte = pfn_pte(phys, prot); | |
1034 | break; | |
1035 | ||
1036 | default: | |
1037 | pte = mfn_pte(phys, prot); | |
1038 | break; | |
1039 | } | |
1040 | ||
1041 | __native_set_fixmap(idx, pte); | |
1042 | } | |
1043 | ||
93b1eab3 | 1044 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
1045 | .paravirt_enabled = 1, |
1046 | .shared_kernel_pmd = 0, | |
1047 | ||
1048 | .name = "Xen", | |
93b1eab3 | 1049 | }; |
5ead97c8 | 1050 | |
93b1eab3 | 1051 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 1052 | .patch = xen_patch, |
5ead97c8 | 1053 | |
93b1eab3 | 1054 | .banner = xen_banner, |
5ead97c8 JF |
1055 | .memory_setup = xen_memory_setup, |
1056 | .arch_setup = xen_arch_setup, | |
e2426cf8 | 1057 | .post_allocator_init = xen_post_allocator_init, |
93b1eab3 | 1058 | }; |
5ead97c8 | 1059 | |
93b1eab3 | 1060 | static const struct pv_time_ops xen_time_ops __initdata = { |
15c84731 | 1061 | .time_init = xen_time_init, |
93b1eab3 | 1062 | |
15c84731 JF |
1063 | .set_wallclock = xen_set_wallclock, |
1064 | .get_wallclock = xen_get_wallclock, | |
e93ef949 | 1065 | .get_tsc_khz = xen_tsc_khz, |
ab550288 | 1066 | .sched_clock = xen_sched_clock, |
93b1eab3 | 1067 | }; |
15c84731 | 1068 | |
93b1eab3 | 1069 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
1070 | .cpuid = xen_cpuid, |
1071 | ||
1072 | .set_debugreg = xen_set_debugreg, | |
1073 | .get_debugreg = xen_get_debugreg, | |
1074 | ||
7b1333aa | 1075 | .clts = xen_clts, |
5ead97c8 JF |
1076 | |
1077 | .read_cr0 = native_read_cr0, | |
7b1333aa | 1078 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1079 | |
5ead97c8 JF |
1080 | .read_cr4 = native_read_cr4, |
1081 | .read_cr4_safe = native_read_cr4_safe, | |
1082 | .write_cr4 = xen_write_cr4, | |
1083 | ||
5ead97c8 JF |
1084 | .wbinvd = native_wbinvd, |
1085 | ||
1086 | .read_msr = native_read_msr_safe, | |
1087 | .write_msr = native_write_msr_safe, | |
1088 | .read_tsc = native_read_tsc, | |
1089 | .read_pmc = native_read_pmc, | |
1090 | ||
81e103f1 | 1091 | .iret = xen_iret, |
d75cd22f | 1092 | .irq_enable_sysexit = xen_sysexit, |
5ead97c8 JF |
1093 | |
1094 | .load_tr_desc = paravirt_nop, | |
1095 | .set_ldt = xen_set_ldt, | |
1096 | .load_gdt = xen_load_gdt, | |
1097 | .load_idt = xen_load_idt, | |
1098 | .load_tls = xen_load_tls, | |
1099 | ||
1100 | .store_gdt = native_store_gdt, | |
1101 | .store_idt = native_store_idt, | |
1102 | .store_tr = xen_store_tr, | |
1103 | ||
1104 | .write_ldt_entry = xen_write_ldt_entry, | |
1105 | .write_gdt_entry = xen_write_gdt_entry, | |
1106 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1107 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1108 | |
1109 | .set_iopl_mask = xen_set_iopl_mask, | |
1110 | .io_delay = xen_io_delay, | |
1111 | ||
8965c1c0 JF |
1112 | .lazy_mode = { |
1113 | .enter = paravirt_enter_lazy_cpu, | |
1114 | .leave = xen_leave_lazy, | |
1115 | }, | |
93b1eab3 JF |
1116 | }; |
1117 | ||
1118 | static const struct pv_irq_ops xen_irq_ops __initdata = { | |
1119 | .init_IRQ = xen_init_IRQ, | |
1120 | .save_fl = xen_save_fl, | |
1121 | .restore_fl = xen_restore_fl, | |
1122 | .irq_disable = xen_irq_disable, | |
1123 | .irq_enable = xen_irq_enable, | |
1124 | .safe_halt = xen_safe_halt, | |
1125 | .halt = xen_halt, | |
fab58420 JF |
1126 | #ifdef CONFIG_X86_64 |
1127 | .adjust_exception_frame = paravirt_nop, | |
1128 | #endif | |
93b1eab3 | 1129 | }; |
5ead97c8 | 1130 | |
93b1eab3 | 1131 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 1132 | #ifdef CONFIG_X86_LOCAL_APIC |
f87e4cac | 1133 | .apic_write = xen_apic_write, |
5ead97c8 JF |
1134 | .apic_read = xen_apic_read, |
1135 | .setup_boot_clock = paravirt_nop, | |
1136 | .setup_secondary_clock = paravirt_nop, | |
1137 | .startup_ipi_hook = paravirt_nop, | |
1138 | #endif | |
93b1eab3 JF |
1139 | }; |
1140 | ||
1141 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { | |
1142 | .pagetable_setup_start = xen_pagetable_setup_start, | |
1143 | .pagetable_setup_done = xen_pagetable_setup_done, | |
1144 | ||
1145 | .read_cr2 = xen_read_cr2, | |
1146 | .write_cr2 = xen_write_cr2, | |
1147 | ||
1148 | .read_cr3 = xen_read_cr3, | |
1149 | .write_cr3 = xen_write_cr3, | |
5ead97c8 JF |
1150 | |
1151 | .flush_tlb_user = xen_flush_tlb, | |
1152 | .flush_tlb_kernel = xen_flush_tlb, | |
1153 | .flush_tlb_single = xen_flush_tlb_single, | |
f87e4cac | 1154 | .flush_tlb_others = xen_flush_tlb_others, |
5ead97c8 JF |
1155 | |
1156 | .pte_update = paravirt_nop, | |
1157 | .pte_update_defer = paravirt_nop, | |
1158 | ||
eba0045f JF |
1159 | .pgd_alloc = __paravirt_pgd_alloc, |
1160 | .pgd_free = paravirt_nop, | |
1161 | ||
6944a9c8 JF |
1162 | .alloc_pte = xen_alloc_pte_init, |
1163 | .release_pte = xen_release_pte_init, | |
1164 | .alloc_pmd = xen_alloc_pte_init, | |
1165 | .alloc_pmd_clone = paravirt_nop, | |
1166 | .release_pmd = xen_release_pte_init, | |
f4f97b3e JF |
1167 | |
1168 | #ifdef CONFIG_HIGHPTE | |
1169 | .kmap_atomic_pte = xen_kmap_atomic_pte, | |
1170 | #endif | |
5ead97c8 | 1171 | |
9a4029fd | 1172 | .set_pte = NULL, /* see xen_pagetable_setup_* */ |
3b827c1b | 1173 | .set_pte_at = xen_set_pte_at, |
e2426cf8 | 1174 | .set_pmd = xen_set_pmd_hyper, |
3b827c1b | 1175 | |
08b882c6 JF |
1176 | .ptep_modify_prot_start = __ptep_modify_prot_start, |
1177 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
1178 | ||
3b827c1b | 1179 | .pte_val = xen_pte_val, |
a15af1c9 | 1180 | .pte_flags = native_pte_val, |
3b827c1b JF |
1181 | .pgd_val = xen_pgd_val, |
1182 | ||
1183 | .make_pte = xen_make_pte, | |
1184 | .make_pgd = xen_make_pgd, | |
1185 | ||
3b827c1b JF |
1186 | .set_pte_atomic = xen_set_pte_atomic, |
1187 | .set_pte_present = xen_set_pte_at, | |
e2426cf8 | 1188 | .set_pud = xen_set_pud_hyper, |
3b827c1b JF |
1189 | .pte_clear = xen_pte_clear, |
1190 | .pmd_clear = xen_pmd_clear, | |
1191 | ||
1192 | .make_pmd = xen_make_pmd, | |
1193 | .pmd_val = xen_pmd_val, | |
3b827c1b JF |
1194 | |
1195 | .activate_mm = xen_activate_mm, | |
1196 | .dup_mmap = xen_dup_mmap, | |
1197 | .exit_mmap = xen_exit_mmap, | |
1198 | ||
8965c1c0 JF |
1199 | .lazy_mode = { |
1200 | .enter = paravirt_enter_lazy_mmu, | |
1201 | .leave = xen_leave_lazy, | |
1202 | }, | |
aeaaa59c JF |
1203 | |
1204 | .set_fixmap = xen_set_fixmap, | |
5ead97c8 JF |
1205 | }; |
1206 | ||
f87e4cac JF |
1207 | #ifdef CONFIG_SMP |
1208 | static const struct smp_ops xen_smp_ops __initdata = { | |
1209 | .smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu, | |
1210 | .smp_prepare_cpus = xen_smp_prepare_cpus, | |
1211 | .cpu_up = xen_cpu_up, | |
1212 | .smp_cpus_done = xen_smp_cpus_done, | |
1213 | ||
1214 | .smp_send_stop = xen_smp_send_stop, | |
1215 | .smp_send_reschedule = xen_smp_send_reschedule, | |
3b16cf87 JA |
1216 | |
1217 | .send_call_func_ipi = xen_smp_send_call_function_ipi, | |
1218 | .send_call_func_single_ipi = xen_smp_send_call_function_single_ipi, | |
f87e4cac JF |
1219 | }; |
1220 | #endif /* CONFIG_SMP */ | |
1221 | ||
fefa629a JF |
1222 | static void xen_reboot(int reason) |
1223 | { | |
349c709f JF |
1224 | struct sched_shutdown r = { .reason = reason }; |
1225 | ||
fefa629a JF |
1226 | #ifdef CONFIG_SMP |
1227 | smp_send_stop(); | |
1228 | #endif | |
1229 | ||
349c709f | 1230 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1231 | BUG(); |
1232 | } | |
1233 | ||
1234 | static void xen_restart(char *msg) | |
1235 | { | |
1236 | xen_reboot(SHUTDOWN_reboot); | |
1237 | } | |
1238 | ||
1239 | static void xen_emergency_restart(void) | |
1240 | { | |
1241 | xen_reboot(SHUTDOWN_reboot); | |
1242 | } | |
1243 | ||
1244 | static void xen_machine_halt(void) | |
1245 | { | |
1246 | xen_reboot(SHUTDOWN_poweroff); | |
1247 | } | |
1248 | ||
1249 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1250 | { | |
1251 | xen_reboot(SHUTDOWN_crash); | |
1252 | } | |
1253 | ||
1254 | static const struct machine_ops __initdata xen_machine_ops = { | |
1255 | .restart = xen_restart, | |
1256 | .halt = xen_machine_halt, | |
1257 | .power_off = xen_machine_halt, | |
1258 | .shutdown = xen_machine_halt, | |
1259 | .crash_shutdown = xen_crash_shutdown, | |
1260 | .emergency_restart = xen_emergency_restart, | |
1261 | }; | |
1262 | ||
6487673b | 1263 | |
fb1d8404 JF |
1264 | static void __init xen_reserve_top(void) |
1265 | { | |
1266 | unsigned long top = HYPERVISOR_VIRT_START; | |
1267 | struct xen_platform_parameters pp; | |
1268 | ||
1269 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1270 | top = pp.virt_start; | |
1271 | ||
1272 | reserve_top_address(-top + 2 * PAGE_SIZE); | |
1273 | } | |
1274 | ||
5ead97c8 JF |
1275 | /* First C function to be called on Xen boot */ |
1276 | asmlinkage void __init xen_start_kernel(void) | |
1277 | { | |
1278 | pgd_t *pgd; | |
1279 | ||
1280 | if (!xen_start_info) | |
1281 | return; | |
1282 | ||
7999f4b4 | 1283 | BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0); |
5ead97c8 | 1284 | |
e57778a1 JF |
1285 | xen_setup_features(); |
1286 | ||
5ead97c8 | 1287 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1288 | pv_info = xen_info; |
1289 | pv_init_ops = xen_init_ops; | |
1290 | pv_time_ops = xen_time_ops; | |
1291 | pv_cpu_ops = xen_cpu_ops; | |
1292 | pv_irq_ops = xen_irq_ops; | |
1293 | pv_apic_ops = xen_apic_ops; | |
1294 | pv_mmu_ops = xen_mmu_ops; | |
93b1eab3 | 1295 | |
e57778a1 JF |
1296 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1297 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1298 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1299 | } | |
1300 | ||
fefa629a JF |
1301 | machine_ops = xen_machine_ops; |
1302 | ||
f87e4cac JF |
1303 | #ifdef CONFIG_SMP |
1304 | smp_ops = xen_smp_ops; | |
1305 | #endif | |
5ead97c8 | 1306 | |
5ead97c8 JF |
1307 | /* Get mfn list */ |
1308 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
d451bb7a | 1309 | xen_build_dynamic_phys_to_machine(); |
5ead97c8 JF |
1310 | |
1311 | pgd = (pgd_t *)xen_start_info->pt_base; | |
1312 | ||
f0d43100 | 1313 | init_pg_tables_start = __pa(pgd); |
5ead97c8 | 1314 | init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE; |
88a6846c | 1315 | max_pfn_mapped = (init_pg_tables_end + 512*1024) >> PAGE_SHIFT; |
5ead97c8 JF |
1316 | |
1317 | init_mm.pgd = pgd; /* use the Xen pagetables to start */ | |
1318 | ||
1319 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1320 | ||
1321 | x86_write_percpu(xen_cr3, __pa(pgd)); | |
9f79991d | 1322 | x86_write_percpu(xen_current_cr3, __pa(pgd)); |
60223a32 | 1323 | |
60223a32 | 1324 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1325 | possible map and a non-dummy shared_info. */ |
60223a32 | 1326 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1327 | |
93b1eab3 | 1328 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1329 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1330 | pv_info.kernel_rpl = 0; |
5ead97c8 | 1331 | |
eb179e44 JF |
1332 | /* Prevent unwanted bits from being set in PTEs. */ |
1333 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1334 | if (!is_initial_xendomain()) | |
1335 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1336 | ||
5ead97c8 | 1337 | /* set the limit of our address space */ |
fb1d8404 | 1338 | xen_reserve_top(); |
5ead97c8 JF |
1339 | |
1340 | /* set up basic CPUID stuff */ | |
1341 | cpu_detect(&new_cpu_data); | |
1342 | new_cpu_data.hard_math = 1; | |
1343 | new_cpu_data.x86_capability[0] = cpuid_edx(1); | |
1344 | ||
1345 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1346 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1347 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1348 | ? __pa(xen_start_info->mod_start) : 0; | |
1349 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
5ead97c8 | 1350 | |
9e124fe1 | 1351 | if (!is_initial_xendomain()) { |
83abc70a | 1352 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1353 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1354 | add_preferred_console("hvc", 0, NULL); |
9e124fe1 | 1355 | } |
b8c2d3df | 1356 | |
5ead97c8 | 1357 | /* Start the world */ |
f0d43100 | 1358 | i386_start_kernel(); |
5ead97c8 | 1359 | } |