Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
5ead97c8 | 36 | #include <xen/interface/xen.h> |
ecbf29cd | 37 | #include <xen/interface/version.h> |
5ead97c8 JF |
38 | #include <xen/interface/physdev.h> |
39 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 40 | #include <xen/interface/memory.h> |
cef12ee5 | 41 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
42 | #include <xen/features.h> |
43 | #include <xen/page.h> | |
38e20b07 | 44 | #include <xen/hvm.h> |
084a2a4e | 45 | #include <xen/hvc-console.h> |
211063dc | 46 | #include <xen/acpi.h> |
5ead97c8 JF |
47 | |
48 | #include <asm/paravirt.h> | |
7b6aa335 | 49 | #include <asm/apic.h> |
5ead97c8 | 50 | #include <asm/page.h> |
b5401a96 | 51 | #include <asm/xen/pci.h> |
5ead97c8 JF |
52 | #include <asm/xen/hypercall.h> |
53 | #include <asm/xen/hypervisor.h> | |
54 | #include <asm/fixmap.h> | |
55 | #include <asm/processor.h> | |
707ebbc8 | 56 | #include <asm/proto.h> |
1153968a | 57 | #include <asm/msr-index.h> |
6cac5a92 | 58 | #include <asm/traps.h> |
5ead97c8 JF |
59 | #include <asm/setup.h> |
60 | #include <asm/desc.h> | |
817a824b | 61 | #include <asm/pgalloc.h> |
5ead97c8 | 62 | #include <asm/pgtable.h> |
f87e4cac | 63 | #include <asm/tlbflush.h> |
fefa629a | 64 | #include <asm/reboot.h> |
577eebea | 65 | #include <asm/stackprotector.h> |
bee6ab53 | 66 | #include <asm/hypervisor.h> |
73c154c6 | 67 | #include <asm/mwait.h> |
76a8df7b | 68 | #include <asm/pci_x86.h> |
73c154c6 KRW |
69 | |
70 | #ifdef CONFIG_ACPI | |
71 | #include <linux/acpi.h> | |
72 | #include <asm/acpi.h> | |
73 | #include <acpi/pdc_intel.h> | |
74 | #include <acpi/processor.h> | |
75 | #include <xen/interface/platform.h> | |
76 | #endif | |
5ead97c8 JF |
77 | |
78 | #include "xen-ops.h" | |
3b827c1b | 79 | #include "mmu.h" |
f447d56d | 80 | #include "smp.h" |
5ead97c8 JF |
81 | #include "multicalls.h" |
82 | ||
83 | EXPORT_SYMBOL_GPL(hypercall_page); | |
84 | ||
5ead97c8 JF |
85 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
86 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 87 | |
6e833587 JF |
88 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
89 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
90 | ||
7e77506a IC |
91 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
92 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
93 | unsigned long machine_to_phys_nr; |
94 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 95 | |
5ead97c8 JF |
96 | struct start_info *xen_start_info; |
97 | EXPORT_SYMBOL_GPL(xen_start_info); | |
98 | ||
a0d695c8 | 99 | struct shared_info xen_dummy_shared_info; |
60223a32 | 100 | |
38341432 JF |
101 | void *xen_initial_gdt; |
102 | ||
bee6ab53 | 103 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
104 | __read_mostly int xen_have_vector_callback; |
105 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 106 | |
60223a32 JF |
107 | /* |
108 | * Point at some empty memory to start with. We map the real shared_info | |
109 | * page as soon as fixmap is up and running. | |
110 | */ | |
a0d695c8 | 111 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
112 | |
113 | /* | |
114 | * Flag to determine whether vcpu info placement is available on all | |
115 | * VCPUs. We assume it is to start with, and then set it to zero on | |
116 | * the first failure. This is because it can succeed on some VCPUs | |
117 | * and not others, since it can involve hypervisor memory allocation, | |
118 | * or because the guest failed to guarantee all the appropriate | |
119 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
120 | * | |
121 | * Note that any particular CPU may be using a placed vcpu structure, | |
122 | * but we can only optimise if the all are. | |
123 | * | |
124 | * 0: not available, 1: available | |
125 | */ | |
e4d04071 | 126 | static int have_vcpu_info_placement = 1; |
60223a32 | 127 | |
1c32cdc6 DV |
128 | struct tls_descs { |
129 | struct desc_struct desc[3]; | |
130 | }; | |
131 | ||
132 | /* | |
133 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
134 | * surprisingly expensive so we avoid updating them if they haven't | |
135 | * changed. Since Xen writes different descriptors than the one | |
136 | * passed in the update_descriptor hypercall we keep shadow copies to | |
137 | * compare against. | |
138 | */ | |
139 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
140 | ||
c06ee78d MR |
141 | static void clamp_max_cpus(void) |
142 | { | |
143 | #ifdef CONFIG_SMP | |
144 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
145 | setup_max_cpus = MAX_VIRT_CPUS; | |
146 | #endif | |
147 | } | |
148 | ||
9c7a7942 | 149 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 150 | { |
60223a32 JF |
151 | struct vcpu_register_vcpu_info info; |
152 | int err; | |
153 | struct vcpu_info *vcpup; | |
154 | ||
a0d695c8 | 155 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 156 | |
c06ee78d MR |
157 | if (cpu < MAX_VIRT_CPUS) |
158 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 159 | |
c06ee78d MR |
160 | if (!have_vcpu_info_placement) { |
161 | if (cpu >= MAX_VIRT_CPUS) | |
162 | clamp_max_cpus(); | |
163 | return; | |
164 | } | |
60223a32 | 165 | |
c06ee78d | 166 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 167 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
168 | info.offset = offset_in_page(vcpup); |
169 | ||
60223a32 JF |
170 | /* Check to see if the hypervisor will put the vcpu_info |
171 | structure where we want it, which allows direct access via | |
172 | a percpu-variable. */ | |
173 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
174 | ||
175 | if (err) { | |
176 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
177 | have_vcpu_info_placement = 0; | |
c06ee78d | 178 | clamp_max_cpus(); |
60223a32 JF |
179 | } else { |
180 | /* This cpu is using the registered vcpu info, even if | |
181 | later ones fail to. */ | |
182 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 183 | } |
5ead97c8 JF |
184 | } |
185 | ||
9c7a7942 JF |
186 | /* |
187 | * On restore, set the vcpu placement up again. | |
188 | * If it fails, then we're in a bad state, since | |
189 | * we can't back out from using it... | |
190 | */ | |
191 | void xen_vcpu_restore(void) | |
192 | { | |
3905bb2a | 193 | int cpu; |
9c7a7942 | 194 | |
3905bb2a JF |
195 | for_each_online_cpu(cpu) { |
196 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 197 | |
3905bb2a JF |
198 | if (other_cpu && |
199 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
200 | BUG(); | |
9c7a7942 | 201 | |
3905bb2a | 202 | xen_setup_runstate_info(cpu); |
9c7a7942 | 203 | |
3905bb2a | 204 | if (have_vcpu_info_placement) |
9c7a7942 | 205 | xen_vcpu_setup(cpu); |
9c7a7942 | 206 | |
3905bb2a JF |
207 | if (other_cpu && |
208 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
209 | BUG(); | |
9c7a7942 JF |
210 | } |
211 | } | |
212 | ||
5ead97c8 JF |
213 | static void __init xen_banner(void) |
214 | { | |
95c7c23b JF |
215 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
216 | struct xen_extraversion extra; | |
217 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
218 | ||
5ead97c8 | 219 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 220 | pv_info.name); |
95c7c23b JF |
221 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
222 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 223 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
224 | } |
225 | ||
5e626254 AP |
226 | #define CPUID_THERM_POWER_LEAF 6 |
227 | #define APERFMPERF_PRESENT 0 | |
228 | ||
e826fe1b JF |
229 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
230 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
231 | ||
73c154c6 KRW |
232 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
233 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
234 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
235 | ||
65ea5b03 PA |
236 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
237 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 238 | { |
82d64699 | 239 | unsigned maskebx = ~0; |
e826fe1b | 240 | unsigned maskecx = ~0; |
5ead97c8 | 241 | unsigned maskedx = ~0; |
73c154c6 | 242 | unsigned setecx = 0; |
5ead97c8 JF |
243 | /* |
244 | * Mask out inconvenient features, to try and disable as many | |
245 | * unsupported kernel subsystems as possible. | |
246 | */ | |
82d64699 JF |
247 | switch (*ax) { |
248 | case 1: | |
e826fe1b | 249 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 250 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 251 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
252 | break; |
253 | ||
73c154c6 KRW |
254 | case CPUID_MWAIT_LEAF: |
255 | /* Synthesize the values.. */ | |
256 | *ax = 0; | |
257 | *bx = 0; | |
258 | *cx = cpuid_leaf5_ecx_val; | |
259 | *dx = cpuid_leaf5_edx_val; | |
260 | return; | |
261 | ||
5e626254 AP |
262 | case CPUID_THERM_POWER_LEAF: |
263 | /* Disabling APERFMPERF for kernel usage */ | |
264 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
265 | break; | |
266 | ||
82d64699 JF |
267 | case 0xb: |
268 | /* Suppress extended topology stuff */ | |
269 | maskebx = 0; | |
270 | break; | |
e826fe1b | 271 | } |
5ead97c8 JF |
272 | |
273 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
274 | : "=a" (*ax), |
275 | "=b" (*bx), | |
276 | "=c" (*cx), | |
277 | "=d" (*dx) | |
278 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 279 | |
82d64699 | 280 | *bx &= maskebx; |
e826fe1b | 281 | *cx &= maskecx; |
73c154c6 | 282 | *cx |= setecx; |
65ea5b03 | 283 | *dx &= maskedx; |
73c154c6 | 284 | |
5ead97c8 JF |
285 | } |
286 | ||
73c154c6 KRW |
287 | static bool __init xen_check_mwait(void) |
288 | { | |
df88b2d9 KRW |
289 | #if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \ |
290 | !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE) | |
73c154c6 KRW |
291 | struct xen_platform_op op = { |
292 | .cmd = XENPF_set_processor_pminfo, | |
293 | .u.set_pminfo.id = -1, | |
294 | .u.set_pminfo.type = XEN_PM_PDC, | |
295 | }; | |
296 | uint32_t buf[3]; | |
297 | unsigned int ax, bx, cx, dx; | |
298 | unsigned int mwait_mask; | |
299 | ||
300 | /* We need to determine whether it is OK to expose the MWAIT | |
301 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
302 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
303 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
304 | * checks against). The hypervisor won't expose the MWAIT flag because | |
305 | * it would break backwards compatibility; so we will find out directly | |
306 | * from the hardware and hypercall. | |
307 | */ | |
308 | if (!xen_initial_domain()) | |
309 | return false; | |
310 | ||
311 | ax = 1; | |
312 | cx = 0; | |
313 | ||
314 | native_cpuid(&ax, &bx, &cx, &dx); | |
315 | ||
316 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
317 | (1 << (X86_FEATURE_MWAIT % 32)); | |
318 | ||
319 | if ((cx & mwait_mask) != mwait_mask) | |
320 | return false; | |
321 | ||
322 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
323 | * ecx and edx. The hypercall provides only partial information. | |
324 | */ | |
325 | ||
326 | ax = CPUID_MWAIT_LEAF; | |
327 | bx = 0; | |
328 | cx = 0; | |
329 | dx = 0; | |
330 | ||
331 | native_cpuid(&ax, &bx, &cx, &dx); | |
332 | ||
333 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
334 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
335 | */ | |
336 | buf[0] = ACPI_PDC_REVISION_ID; | |
337 | buf[1] = 1; | |
338 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
339 | ||
340 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
341 | ||
342 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
343 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
344 | cpuid_leaf5_ecx_val = cx; | |
345 | cpuid_leaf5_edx_val = dx; | |
346 | } | |
347 | return true; | |
348 | #else | |
349 | return false; | |
350 | #endif | |
351 | } | |
ad3062a0 | 352 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
353 | { |
354 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 355 | unsigned int xsave_mask; |
e826fe1b JF |
356 | |
357 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 358 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
359 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
360 | ||
361 | if (!xen_initial_domain()) | |
362 | cpuid_leaf1_edx_mask &= | |
363 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
364 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 365 | ax = 1; |
5e287830 | 366 | cx = 0; |
947ccf9c | 367 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 368 | |
947ccf9c SH |
369 | xsave_mask = |
370 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
371 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
372 | ||
373 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
374 | if ((cx & xsave_mask) != xsave_mask) | |
375 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
376 | if (xen_check_mwait()) |
377 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
378 | } |
379 | ||
5ead97c8 JF |
380 | static void xen_set_debugreg(int reg, unsigned long val) |
381 | { | |
382 | HYPERVISOR_set_debugreg(reg, val); | |
383 | } | |
384 | ||
385 | static unsigned long xen_get_debugreg(int reg) | |
386 | { | |
387 | return HYPERVISOR_get_debugreg(reg); | |
388 | } | |
389 | ||
224101ed | 390 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 391 | { |
5ead97c8 | 392 | xen_mc_flush(); |
224101ed | 393 | paravirt_end_context_switch(next); |
5ead97c8 JF |
394 | } |
395 | ||
396 | static unsigned long xen_store_tr(void) | |
397 | { | |
398 | return 0; | |
399 | } | |
400 | ||
a05d2eba | 401 | /* |
cef43bf6 JF |
402 | * Set the page permissions for a particular virtual address. If the |
403 | * address is a vmalloc mapping (or other non-linear mapping), then | |
404 | * find the linear mapping of the page and also set its protections to | |
405 | * match. | |
a05d2eba JF |
406 | */ |
407 | static void set_aliased_prot(void *v, pgprot_t prot) | |
408 | { | |
409 | int level; | |
410 | pte_t *ptep; | |
411 | pte_t pte; | |
412 | unsigned long pfn; | |
413 | struct page *page; | |
414 | ||
415 | ptep = lookup_address((unsigned long)v, &level); | |
416 | BUG_ON(ptep == NULL); | |
417 | ||
418 | pfn = pte_pfn(*ptep); | |
419 | page = pfn_to_page(pfn); | |
420 | ||
421 | pte = pfn_pte(pfn, prot); | |
422 | ||
423 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
424 | BUG(); | |
425 | ||
426 | if (!PageHighMem(page)) { | |
427 | void *av = __va(PFN_PHYS(pfn)); | |
428 | ||
429 | if (av != v) | |
430 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
431 | BUG(); | |
432 | } else | |
433 | kmap_flush_unused(); | |
434 | } | |
435 | ||
38ffbe66 JF |
436 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
437 | { | |
a05d2eba | 438 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
439 | int i; |
440 | ||
a05d2eba JF |
441 | for(i = 0; i < entries; i += entries_per_page) |
442 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
443 | } |
444 | ||
445 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
446 | { | |
a05d2eba | 447 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
448 | int i; |
449 | ||
a05d2eba JF |
450 | for(i = 0; i < entries; i += entries_per_page) |
451 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
452 | } |
453 | ||
5ead97c8 JF |
454 | static void xen_set_ldt(const void *addr, unsigned entries) |
455 | { | |
5ead97c8 JF |
456 | struct mmuext_op *op; |
457 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
458 | ||
ab78f7ad JF |
459 | trace_xen_cpu_set_ldt(addr, entries); |
460 | ||
5ead97c8 JF |
461 | op = mcs.args; |
462 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 463 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
464 | op->arg2.nr_ents = entries; |
465 | ||
466 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
467 | ||
468 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
469 | } | |
470 | ||
6b68f01b | 471 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 472 | { |
5ead97c8 JF |
473 | unsigned long va = dtr->address; |
474 | unsigned int size = dtr->size + 1; | |
475 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 476 | unsigned long frames[pages]; |
5ead97c8 | 477 | int f; |
5ead97c8 | 478 | |
577eebea JF |
479 | /* |
480 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
481 | * 8-byte entries, or 16 4k pages.. | |
482 | */ | |
5ead97c8 JF |
483 | |
484 | BUG_ON(size > 65536); | |
485 | BUG_ON(va & ~PAGE_MASK); | |
486 | ||
5ead97c8 | 487 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 488 | int level; |
577eebea | 489 | pte_t *ptep; |
6ed6bf42 JF |
490 | unsigned long pfn, mfn; |
491 | void *virt; | |
492 | ||
577eebea JF |
493 | /* |
494 | * The GDT is per-cpu and is in the percpu data area. | |
495 | * That can be virtually mapped, so we need to do a | |
496 | * page-walk to get the underlying MFN for the | |
497 | * hypercall. The page can also be in the kernel's | |
498 | * linear range, so we need to RO that mapping too. | |
499 | */ | |
500 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
501 | BUG_ON(ptep == NULL); |
502 | ||
503 | pfn = pte_pfn(*ptep); | |
504 | mfn = pfn_to_mfn(pfn); | |
505 | virt = __va(PFN_PHYS(pfn)); | |
506 | ||
507 | frames[f] = mfn; | |
9976b39b | 508 | |
5ead97c8 | 509 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 510 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
511 | } |
512 | ||
3ce5fa7e JF |
513 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
514 | BUG(); | |
5ead97c8 JF |
515 | } |
516 | ||
577eebea JF |
517 | /* |
518 | * load_gdt for early boot, when the gdt is only mapped once | |
519 | */ | |
ad3062a0 | 520 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
521 | { |
522 | unsigned long va = dtr->address; | |
523 | unsigned int size = dtr->size + 1; | |
524 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
525 | unsigned long frames[pages]; | |
526 | int f; | |
527 | ||
528 | /* | |
529 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
530 | * 8-byte entries, or 16 4k pages.. | |
531 | */ | |
532 | ||
533 | BUG_ON(size > 65536); | |
534 | BUG_ON(va & ~PAGE_MASK); | |
535 | ||
536 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
537 | pte_t pte; | |
538 | unsigned long pfn, mfn; | |
539 | ||
540 | pfn = virt_to_pfn(va); | |
541 | mfn = pfn_to_mfn(pfn); | |
542 | ||
543 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
544 | ||
545 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
546 | BUG(); | |
547 | ||
548 | frames[f] = mfn; | |
549 | } | |
550 | ||
551 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
552 | BUG(); | |
553 | } | |
554 | ||
59290362 DV |
555 | static inline bool desc_equal(const struct desc_struct *d1, |
556 | const struct desc_struct *d2) | |
557 | { | |
558 | return d1->a == d2->a && d1->b == d2->b; | |
559 | } | |
560 | ||
5ead97c8 JF |
561 | static void load_TLS_descriptor(struct thread_struct *t, |
562 | unsigned int cpu, unsigned int i) | |
563 | { | |
1c32cdc6 DV |
564 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
565 | struct desc_struct *gdt; | |
566 | xmaddr_t maddr; | |
567 | struct multicall_space mc; | |
568 | ||
569 | if (desc_equal(shadow, &t->tls_array[i])) | |
570 | return; | |
571 | ||
572 | *shadow = t->tls_array[i]; | |
573 | ||
574 | gdt = get_cpu_gdt_table(cpu); | |
575 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
576 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
577 | |
578 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
579 | } | |
580 | ||
581 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
582 | { | |
8b84ad94 | 583 | /* |
ccbeed3a TH |
584 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
585 | * and lazy gs handling is enabled, it means we're in a | |
586 | * context switch, and %gs has just been saved. This means we | |
587 | * can zero it out to prevent faults on exit from the | |
588 | * hypervisor if the next process has no %gs. Either way, it | |
589 | * has been saved, and the new value will get loaded properly. | |
590 | * This will go away as soon as Xen has been modified to not | |
591 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
592 | * |
593 | * On x86_64, this hack is not used for %gs, because gs points | |
594 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
595 | * must not zero %gs on x86_64 | |
596 | * | |
597 | * For x86_64, we need to zero %fs, otherwise we may get an | |
598 | * exception between the new %fs descriptor being loaded and | |
599 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 600 | */ |
8a95408e EH |
601 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
602 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 603 | lazy_load_gs(0); |
8a95408e EH |
604 | #else |
605 | loadsegment(fs, 0); | |
606 | #endif | |
607 | } | |
608 | ||
609 | xen_mc_batch(); | |
610 | ||
611 | load_TLS_descriptor(t, cpu, 0); | |
612 | load_TLS_descriptor(t, cpu, 1); | |
613 | load_TLS_descriptor(t, cpu, 2); | |
614 | ||
615 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
616 | } |
617 | ||
a8fc1089 EH |
618 | #ifdef CONFIG_X86_64 |
619 | static void xen_load_gs_index(unsigned int idx) | |
620 | { | |
621 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
622 | BUG(); | |
5ead97c8 | 623 | } |
a8fc1089 | 624 | #endif |
5ead97c8 JF |
625 | |
626 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 627 | const void *ptr) |
5ead97c8 | 628 | { |
cef43bf6 | 629 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 630 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 631 | |
ab78f7ad JF |
632 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
633 | ||
f120f13e JF |
634 | preempt_disable(); |
635 | ||
5ead97c8 JF |
636 | xen_mc_flush(); |
637 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
638 | BUG(); | |
f120f13e JF |
639 | |
640 | preempt_enable(); | |
5ead97c8 JF |
641 | } |
642 | ||
e176d367 | 643 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
644 | struct trap_info *info) |
645 | { | |
6cac5a92 JF |
646 | unsigned long addr; |
647 | ||
6d02c426 | 648 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
649 | return 0; |
650 | ||
651 | info->vector = vector; | |
6cac5a92 JF |
652 | |
653 | addr = gate_offset(*val); | |
654 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
655 | /* |
656 | * Look for known traps using IST, and substitute them | |
657 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
658 | * about. Xen will handle faults like double_fault, |
659 | * so we should never see them. Warn if | |
b80119bb JF |
660 | * there's an unexpected IST-using fault handler. |
661 | */ | |
6cac5a92 JF |
662 | if (addr == (unsigned long)debug) |
663 | addr = (unsigned long)xen_debug; | |
664 | else if (addr == (unsigned long)int3) | |
665 | addr = (unsigned long)xen_int3; | |
666 | else if (addr == (unsigned long)stack_segment) | |
667 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
668 | else if (addr == (unsigned long)double_fault || |
669 | addr == (unsigned long)nmi) { | |
670 | /* Don't need to handle these */ | |
671 | return 0; | |
672 | #ifdef CONFIG_X86_MCE | |
673 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
674 | /* |
675 | * when xen hypervisor inject vMCE to guest, | |
676 | * use native mce handler to handle it | |
677 | */ | |
678 | ; | |
b80119bb JF |
679 | #endif |
680 | } else { | |
681 | /* Some other trap using IST? */ | |
682 | if (WARN_ON(val->ist != 0)) | |
683 | return 0; | |
684 | } | |
6cac5a92 JF |
685 | #endif /* CONFIG_X86_64 */ |
686 | info->address = addr; | |
687 | ||
e176d367 EH |
688 | info->cs = gate_segment(*val); |
689 | info->flags = val->dpl; | |
5ead97c8 | 690 | /* interrupt gates clear IF */ |
6d02c426 JF |
691 | if (val->type == GATE_INTERRUPT) |
692 | info->flags |= 1 << 2; | |
5ead97c8 JF |
693 | |
694 | return 1; | |
695 | } | |
696 | ||
697 | /* Locations of each CPU's IDT */ | |
6b68f01b | 698 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
699 | |
700 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
701 | also update Xen. */ | |
8d947344 | 702 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 703 | { |
5ead97c8 | 704 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
705 | unsigned long start, end; |
706 | ||
ab78f7ad JF |
707 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
708 | ||
f120f13e JF |
709 | preempt_disable(); |
710 | ||
780f36d8 CL |
711 | start = __this_cpu_read(idt_desc.address); |
712 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
713 | |
714 | xen_mc_flush(); | |
715 | ||
8d947344 | 716 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
717 | |
718 | if (p >= start && (p + 8) <= end) { | |
719 | struct trap_info info[2]; | |
720 | ||
721 | info[1].address = 0; | |
722 | ||
e176d367 | 723 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
724 | if (HYPERVISOR_set_trap_table(info)) |
725 | BUG(); | |
726 | } | |
f120f13e JF |
727 | |
728 | preempt_enable(); | |
5ead97c8 JF |
729 | } |
730 | ||
6b68f01b | 731 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 732 | struct trap_info *traps) |
5ead97c8 | 733 | { |
5ead97c8 JF |
734 | unsigned in, out, count; |
735 | ||
e176d367 | 736 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
737 | BUG_ON(count > 256); |
738 | ||
5ead97c8 | 739 | for (in = out = 0; in < count; in++) { |
e176d367 | 740 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 741 | |
e176d367 | 742 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
743 | out++; |
744 | } | |
745 | traps[out].address = 0; | |
f87e4cac JF |
746 | } |
747 | ||
748 | void xen_copy_trap_info(struct trap_info *traps) | |
749 | { | |
6b68f01b | 750 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
751 | |
752 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
753 | } |
754 | ||
755 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
756 | hold a spinlock to protect the static traps[] array (static because | |
757 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 758 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
759 | { |
760 | static DEFINE_SPINLOCK(lock); | |
761 | static struct trap_info traps[257]; | |
f87e4cac | 762 | |
ab78f7ad JF |
763 | trace_xen_cpu_load_idt(desc); |
764 | ||
f87e4cac JF |
765 | spin_lock(&lock); |
766 | ||
f120f13e JF |
767 | __get_cpu_var(idt_desc) = *desc; |
768 | ||
f87e4cac | 769 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
770 | |
771 | xen_mc_flush(); | |
772 | if (HYPERVISOR_set_trap_table(traps)) | |
773 | BUG(); | |
774 | ||
775 | spin_unlock(&lock); | |
776 | } | |
777 | ||
778 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
779 | they're handled differently. */ | |
780 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 781 | const void *desc, int type) |
5ead97c8 | 782 | { |
ab78f7ad JF |
783 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
784 | ||
f120f13e JF |
785 | preempt_disable(); |
786 | ||
014b15be GOC |
787 | switch (type) { |
788 | case DESC_LDT: | |
789 | case DESC_TSS: | |
5ead97c8 JF |
790 | /* ignore */ |
791 | break; | |
792 | ||
793 | default: { | |
9976b39b | 794 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
795 | |
796 | xen_mc_flush(); | |
014b15be | 797 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
798 | BUG(); |
799 | } | |
800 | ||
801 | } | |
f120f13e JF |
802 | |
803 | preempt_enable(); | |
5ead97c8 JF |
804 | } |
805 | ||
577eebea JF |
806 | /* |
807 | * Version of write_gdt_entry for use at early boot-time needed to | |
808 | * update an entry as simply as possible. | |
809 | */ | |
ad3062a0 | 810 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
811 | const void *desc, int type) |
812 | { | |
ab78f7ad JF |
813 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
814 | ||
577eebea JF |
815 | switch (type) { |
816 | case DESC_LDT: | |
817 | case DESC_TSS: | |
818 | /* ignore */ | |
819 | break; | |
820 | ||
821 | default: { | |
822 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
823 | ||
824 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
825 | dt[entry] = *(struct desc_struct *)desc; | |
826 | } | |
827 | ||
828 | } | |
829 | } | |
830 | ||
faca6227 | 831 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 832 | struct thread_struct *thread) |
5ead97c8 | 833 | { |
ab78f7ad JF |
834 | struct multicall_space mcs; |
835 | ||
836 | mcs = xen_mc_entry(0); | |
faca6227 | 837 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
838 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
839 | } | |
840 | ||
841 | static void xen_set_iopl_mask(unsigned mask) | |
842 | { | |
843 | struct physdev_set_iopl set_iopl; | |
844 | ||
845 | /* Force the change at ring 0. */ | |
846 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
847 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
848 | } | |
849 | ||
850 | static void xen_io_delay(void) | |
851 | { | |
852 | } | |
853 | ||
854 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
855 | static unsigned long xen_set_apic_id(unsigned int x) |
856 | { | |
857 | WARN_ON(1); | |
858 | return x; | |
859 | } | |
860 | static unsigned int xen_get_apic_id(unsigned long x) | |
861 | { | |
862 | return ((x)>>24) & 0xFFu; | |
863 | } | |
ad66dd34 | 864 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 865 | { |
558daa28 KRW |
866 | struct xen_platform_op op = { |
867 | .cmd = XENPF_get_cpuinfo, | |
868 | .interface_version = XENPF_INTERFACE_VERSION, | |
869 | .u.pcpu_info.xen_cpuid = 0, | |
870 | }; | |
871 | int ret = 0; | |
872 | ||
873 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
874 | * get called on the bootup processor. But just in case. */ | |
875 | if (!xen_initial_domain() || smp_processor_id()) | |
876 | return 0; | |
877 | ||
878 | if (reg == APIC_LVR) | |
879 | return 0x10; | |
880 | ||
881 | if (reg != APIC_ID) | |
882 | return 0; | |
883 | ||
884 | ret = HYPERVISOR_dom0_op(&op); | |
885 | if (ret) | |
886 | return 0; | |
887 | ||
888 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 889 | } |
f87e4cac | 890 | |
ad66dd34 | 891 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
892 | { |
893 | /* Warn to see if there's any stray references */ | |
894 | WARN_ON(1); | |
895 | } | |
ad66dd34 | 896 | |
ad66dd34 SS |
897 | static u64 xen_apic_icr_read(void) |
898 | { | |
899 | return 0; | |
900 | } | |
901 | ||
902 | static void xen_apic_icr_write(u32 low, u32 id) | |
903 | { | |
904 | /* Warn to see if there's any stray references */ | |
905 | WARN_ON(1); | |
906 | } | |
907 | ||
908 | static void xen_apic_wait_icr_idle(void) | |
909 | { | |
910 | return; | |
911 | } | |
912 | ||
94a8c3c2 YL |
913 | static u32 xen_safe_apic_wait_icr_idle(void) |
914 | { | |
915 | return 0; | |
916 | } | |
917 | ||
c1eeb2de YL |
918 | static void set_xen_basic_apic_ops(void) |
919 | { | |
920 | apic->read = xen_apic_read; | |
921 | apic->write = xen_apic_write; | |
922 | apic->icr_read = xen_apic_icr_read; | |
923 | apic->icr_write = xen_apic_icr_write; | |
924 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
925 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
926 | apic->set_apic_id = xen_set_apic_id; |
927 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
928 | |
929 | #ifdef CONFIG_SMP | |
930 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
931 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
932 | apic->send_IPI_mask = xen_send_IPI_mask; | |
933 | apic->send_IPI_all = xen_send_IPI_all; | |
934 | apic->send_IPI_self = xen_send_IPI_self; | |
935 | #endif | |
c1eeb2de | 936 | } |
ad66dd34 | 937 | |
5ead97c8 JF |
938 | #endif |
939 | ||
7b1333aa JF |
940 | static void xen_clts(void) |
941 | { | |
942 | struct multicall_space mcs; | |
943 | ||
944 | mcs = xen_mc_entry(0); | |
945 | ||
946 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
947 | ||
948 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
949 | } | |
950 | ||
a789ed5f JF |
951 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
952 | ||
953 | static unsigned long xen_read_cr0(void) | |
954 | { | |
2113f469 | 955 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
956 | |
957 | if (unlikely(cr0 == 0)) { | |
958 | cr0 = native_read_cr0(); | |
2113f469 | 959 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
960 | } |
961 | ||
962 | return cr0; | |
963 | } | |
964 | ||
7b1333aa JF |
965 | static void xen_write_cr0(unsigned long cr0) |
966 | { | |
967 | struct multicall_space mcs; | |
968 | ||
2113f469 | 969 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 970 | |
7b1333aa JF |
971 | /* Only pay attention to cr0.TS; everything else is |
972 | ignored. */ | |
973 | mcs = xen_mc_entry(0); | |
974 | ||
975 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
976 | ||
977 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
978 | } | |
979 | ||
5ead97c8 JF |
980 | static void xen_write_cr4(unsigned long cr4) |
981 | { | |
2956a351 JF |
982 | cr4 &= ~X86_CR4_PGE; |
983 | cr4 &= ~X86_CR4_PSE; | |
984 | ||
985 | native_write_cr4(cr4); | |
5ead97c8 JF |
986 | } |
987 | ||
1153968a JF |
988 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
989 | { | |
990 | int ret; | |
991 | ||
992 | ret = 0; | |
993 | ||
f63c2f24 | 994 | switch (msr) { |
1153968a JF |
995 | #ifdef CONFIG_X86_64 |
996 | unsigned which; | |
997 | u64 base; | |
998 | ||
999 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1000 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1001 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1002 | ||
1003 | set: | |
1004 | base = ((u64)high << 32) | low; | |
1005 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1006 | ret = -EIO; |
1153968a JF |
1007 | break; |
1008 | #endif | |
d89961e2 JF |
1009 | |
1010 | case MSR_STAR: | |
1011 | case MSR_CSTAR: | |
1012 | case MSR_LSTAR: | |
1013 | case MSR_SYSCALL_MASK: | |
1014 | case MSR_IA32_SYSENTER_CS: | |
1015 | case MSR_IA32_SYSENTER_ESP: | |
1016 | case MSR_IA32_SYSENTER_EIP: | |
1017 | /* Fast syscall setup is all done in hypercalls, so | |
1018 | these are all ignored. Stub them out here to stop | |
1019 | Xen console noise. */ | |
1020 | break; | |
1021 | ||
41f2e477 JF |
1022 | case MSR_IA32_CR_PAT: |
1023 | if (smp_processor_id() == 0) | |
1024 | xen_set_pat(((u64)high << 32) | low); | |
1025 | break; | |
1026 | ||
1153968a JF |
1027 | default: |
1028 | ret = native_write_msr_safe(msr, low, high); | |
1029 | } | |
1030 | ||
1031 | return ret; | |
1032 | } | |
1033 | ||
0e91398f | 1034 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1035 | { |
1036 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1037 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1038 | xen_start_info->shared_info); | |
1039 | ||
1040 | HYPERVISOR_shared_info = | |
1041 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1042 | } else |
1043 | HYPERVISOR_shared_info = | |
1044 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1045 | ||
2e8fe719 JF |
1046 | #ifndef CONFIG_SMP |
1047 | /* In UP this is as good a place as any to set up shared info */ | |
1048 | xen_setup_vcpu_info_placement(); | |
1049 | #endif | |
d5edbc1f JF |
1050 | |
1051 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1052 | } |
1053 | ||
5f054e31 | 1054 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1055 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1056 | { |
1057 | int cpu; | |
1058 | ||
1059 | for_each_possible_cpu(cpu) | |
1060 | xen_vcpu_setup(cpu); | |
1061 | ||
1062 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1063 | percpu area for all cpus, so make use of it */ | |
1064 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1065 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1066 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1067 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1068 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1069 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1070 | } |
5ead97c8 JF |
1071 | } |
1072 | ||
ab144f5e AK |
1073 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1074 | unsigned long addr, unsigned len) | |
6487673b JF |
1075 | { |
1076 | char *start, *end, *reloc; | |
1077 | unsigned ret; | |
1078 | ||
1079 | start = end = reloc = NULL; | |
1080 | ||
93b1eab3 JF |
1081 | #define SITE(op, x) \ |
1082 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1083 | if (have_vcpu_info_placement) { \ |
1084 | start = (char *)xen_##x##_direct; \ | |
1085 | end = xen_##x##_direct_end; \ | |
1086 | reloc = xen_##x##_direct_reloc; \ | |
1087 | } \ | |
1088 | goto patch_site | |
1089 | ||
1090 | switch (type) { | |
93b1eab3 JF |
1091 | SITE(pv_irq_ops, irq_enable); |
1092 | SITE(pv_irq_ops, irq_disable); | |
1093 | SITE(pv_irq_ops, save_fl); | |
1094 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1095 | #undef SITE |
1096 | ||
1097 | patch_site: | |
1098 | if (start == NULL || (end-start) > len) | |
1099 | goto default_patch; | |
1100 | ||
ab144f5e | 1101 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1102 | |
1103 | /* Note: because reloc is assigned from something that | |
1104 | appears to be an array, gcc assumes it's non-null, | |
1105 | but doesn't know its relationship with start and | |
1106 | end. */ | |
1107 | if (reloc > start && reloc < end) { | |
1108 | int reloc_off = reloc - start; | |
ab144f5e AK |
1109 | long *relocp = (long *)(insnbuf + reloc_off); |
1110 | long delta = start - (char *)addr; | |
6487673b JF |
1111 | |
1112 | *relocp += delta; | |
1113 | } | |
1114 | break; | |
1115 | ||
1116 | default_patch: | |
1117 | default: | |
ab144f5e AK |
1118 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1119 | addr, len); | |
6487673b JF |
1120 | break; |
1121 | } | |
1122 | ||
1123 | return ret; | |
1124 | } | |
1125 | ||
ad3062a0 | 1126 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1127 | .paravirt_enabled = 1, |
1128 | .shared_kernel_pmd = 0, | |
1129 | ||
318f5a2a AL |
1130 | #ifdef CONFIG_X86_64 |
1131 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1132 | #endif | |
1133 | ||
5ead97c8 | 1134 | .name = "Xen", |
93b1eab3 | 1135 | }; |
5ead97c8 | 1136 | |
ad3062a0 | 1137 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1138 | .patch = xen_patch, |
93b1eab3 | 1139 | }; |
5ead97c8 | 1140 | |
ad3062a0 | 1141 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1142 | .cpuid = xen_cpuid, |
1143 | ||
1144 | .set_debugreg = xen_set_debugreg, | |
1145 | .get_debugreg = xen_get_debugreg, | |
1146 | ||
7b1333aa | 1147 | .clts = xen_clts, |
5ead97c8 | 1148 | |
a789ed5f | 1149 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1150 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1151 | |
5ead97c8 JF |
1152 | .read_cr4 = native_read_cr4, |
1153 | .read_cr4_safe = native_read_cr4_safe, | |
1154 | .write_cr4 = xen_write_cr4, | |
1155 | ||
5ead97c8 JF |
1156 | .wbinvd = native_wbinvd, |
1157 | ||
1158 | .read_msr = native_read_msr_safe, | |
1ab46fd3 | 1159 | .rdmsr_regs = native_rdmsr_safe_regs, |
1153968a | 1160 | .write_msr = xen_write_msr_safe, |
1ab46fd3 KRW |
1161 | .wrmsr_regs = native_wrmsr_safe_regs, |
1162 | ||
5ead97c8 JF |
1163 | .read_tsc = native_read_tsc, |
1164 | .read_pmc = native_read_pmc, | |
1165 | ||
81e103f1 | 1166 | .iret = xen_iret, |
d75cd22f | 1167 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1168 | #ifdef CONFIG_X86_64 |
1169 | .usergs_sysret32 = xen_sysret32, | |
1170 | .usergs_sysret64 = xen_sysret64, | |
1171 | #endif | |
5ead97c8 JF |
1172 | |
1173 | .load_tr_desc = paravirt_nop, | |
1174 | .set_ldt = xen_set_ldt, | |
1175 | .load_gdt = xen_load_gdt, | |
1176 | .load_idt = xen_load_idt, | |
1177 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1178 | #ifdef CONFIG_X86_64 |
1179 | .load_gs_index = xen_load_gs_index, | |
1180 | #endif | |
5ead97c8 | 1181 | |
38ffbe66 JF |
1182 | .alloc_ldt = xen_alloc_ldt, |
1183 | .free_ldt = xen_free_ldt, | |
1184 | ||
5ead97c8 JF |
1185 | .store_gdt = native_store_gdt, |
1186 | .store_idt = native_store_idt, | |
1187 | .store_tr = xen_store_tr, | |
1188 | ||
1189 | .write_ldt_entry = xen_write_ldt_entry, | |
1190 | .write_gdt_entry = xen_write_gdt_entry, | |
1191 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1192 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1193 | |
1194 | .set_iopl_mask = xen_set_iopl_mask, | |
1195 | .io_delay = xen_io_delay, | |
1196 | ||
952d1d70 JF |
1197 | /* Xen takes care of %gs when switching to usermode for us */ |
1198 | .swapgs = paravirt_nop, | |
1199 | ||
224101ed JF |
1200 | .start_context_switch = paravirt_start_context_switch, |
1201 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1202 | }; |
1203 | ||
ad3062a0 | 1204 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1205 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1206 | .startup_ipi_hook = paravirt_nop, |
1207 | #endif | |
93b1eab3 JF |
1208 | }; |
1209 | ||
fefa629a JF |
1210 | static void xen_reboot(int reason) |
1211 | { | |
349c709f JF |
1212 | struct sched_shutdown r = { .reason = reason }; |
1213 | ||
349c709f | 1214 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1215 | BUG(); |
1216 | } | |
1217 | ||
1218 | static void xen_restart(char *msg) | |
1219 | { | |
1220 | xen_reboot(SHUTDOWN_reboot); | |
1221 | } | |
1222 | ||
1223 | static void xen_emergency_restart(void) | |
1224 | { | |
1225 | xen_reboot(SHUTDOWN_reboot); | |
1226 | } | |
1227 | ||
1228 | static void xen_machine_halt(void) | |
1229 | { | |
1230 | xen_reboot(SHUTDOWN_poweroff); | |
1231 | } | |
1232 | ||
b2abe506 TG |
1233 | static void xen_machine_power_off(void) |
1234 | { | |
1235 | if (pm_power_off) | |
1236 | pm_power_off(); | |
1237 | xen_reboot(SHUTDOWN_poweroff); | |
1238 | } | |
1239 | ||
fefa629a JF |
1240 | static void xen_crash_shutdown(struct pt_regs *regs) |
1241 | { | |
1242 | xen_reboot(SHUTDOWN_crash); | |
1243 | } | |
1244 | ||
f09f6d19 DD |
1245 | static int |
1246 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1247 | { | |
086748e5 | 1248 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1249 | return NOTIFY_DONE; |
1250 | } | |
1251 | ||
1252 | static struct notifier_block xen_panic_block = { | |
1253 | .notifier_call= xen_panic_event, | |
1254 | }; | |
1255 | ||
1256 | int xen_panic_handler_init(void) | |
1257 | { | |
1258 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1259 | return 0; | |
1260 | } | |
1261 | ||
ad3062a0 | 1262 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1263 | .restart = xen_restart, |
1264 | .halt = xen_machine_halt, | |
b2abe506 | 1265 | .power_off = xen_machine_power_off, |
fefa629a JF |
1266 | .shutdown = xen_machine_halt, |
1267 | .crash_shutdown = xen_crash_shutdown, | |
1268 | .emergency_restart = xen_emergency_restart, | |
1269 | }; | |
1270 | ||
577eebea JF |
1271 | /* |
1272 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1273 | * we do this, we have to be careful not to call any stack-protected | |
1274 | * function, which is most of the kernel. | |
1275 | */ | |
1276 | static void __init xen_setup_stackprotector(void) | |
1277 | { | |
1278 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1279 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1280 | ||
1281 | setup_stack_canary_segment(0); | |
1282 | switch_to_new_gdt(0); | |
1283 | ||
1284 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1285 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1286 | } | |
1287 | ||
5ead97c8 JF |
1288 | /* First C function to be called on Xen boot */ |
1289 | asmlinkage void __init xen_start_kernel(void) | |
1290 | { | |
ec35a69c KRW |
1291 | struct physdev_set_iopl set_iopl; |
1292 | int rc; | |
5ead97c8 JF |
1293 | pgd_t *pgd; |
1294 | ||
1295 | if (!xen_start_info) | |
1296 | return; | |
1297 | ||
6e833587 JF |
1298 | xen_domain_type = XEN_PV_DOMAIN; |
1299 | ||
7e77506a IC |
1300 | xen_setup_machphys_mapping(); |
1301 | ||
5ead97c8 | 1302 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1303 | pv_info = xen_info; |
1304 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1305 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1306 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1307 | |
6b18ae3e | 1308 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1309 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1310 | x86_init.oem.banner = xen_banner; |
845b3944 | 1311 | |
409771d2 | 1312 | xen_init_time_ops(); |
93b1eab3 | 1313 | |
ce2eef33 | 1314 | /* |
577eebea | 1315 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1316 | */ |
577eebea | 1317 | |
973df35e JF |
1318 | xen_init_mmu_ops(); |
1319 | ||
577eebea JF |
1320 | /* Prevent unwanted bits from being set in PTEs. */ |
1321 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1322 | #if 0 |
577eebea | 1323 | if (!xen_initial_domain()) |
8eaffa67 | 1324 | #endif |
577eebea JF |
1325 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1326 | ||
1327 | __supported_pte_mask |= _PAGE_IOMAP; | |
1328 | ||
817a824b IC |
1329 | /* |
1330 | * Prevent page tables from being allocated in highmem, even | |
1331 | * if CONFIG_HIGHPTE is enabled. | |
1332 | */ | |
1333 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1334 | ||
b75fe4e5 | 1335 | /* Work out if we support NX */ |
4763ed4d | 1336 | x86_configure_nx(); |
b75fe4e5 | 1337 | |
577eebea JF |
1338 | xen_setup_features(); |
1339 | ||
1340 | /* Get mfn list */ | |
1341 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1342 | xen_build_dynamic_phys_to_machine(); | |
1343 | ||
1344 | /* | |
1345 | * Set up kernel GDT and segment registers, mainly so that | |
1346 | * -fstack-protector code can be executed. | |
1347 | */ | |
1348 | xen_setup_stackprotector(); | |
0d1edf46 | 1349 | |
ce2eef33 | 1350 | xen_init_irq_ops(); |
e826fe1b JF |
1351 | xen_init_cpuid_mask(); |
1352 | ||
94a8c3c2 | 1353 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1354 | /* |
94a8c3c2 | 1355 | * set up the basic apic ops. |
ad66dd34 | 1356 | */ |
c1eeb2de | 1357 | set_xen_basic_apic_ops(); |
ad66dd34 | 1358 | #endif |
93b1eab3 | 1359 | |
e57778a1 JF |
1360 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1361 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1362 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1363 | } | |
1364 | ||
fefa629a JF |
1365 | machine_ops = xen_machine_ops; |
1366 | ||
38341432 JF |
1367 | /* |
1368 | * The only reliable way to retain the initial address of the | |
1369 | * percpu gdt_page is to remember it here, so we can go and | |
1370 | * mark it RW later, when the initial percpu area is freed. | |
1371 | */ | |
1372 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1373 | |
a9e7062d | 1374 | xen_smp_init(); |
5ead97c8 | 1375 | |
c1f5db1a IC |
1376 | #ifdef CONFIG_ACPI_NUMA |
1377 | /* | |
1378 | * The pages we from Xen are not related to machine pages, so | |
1379 | * any NUMA information the kernel tries to get from ACPI will | |
1380 | * be meaningless. Prevent it from trying. | |
1381 | */ | |
1382 | acpi_numa = -1; | |
1383 | #endif | |
1384 | ||
5ead97c8 JF |
1385 | pgd = (pgd_t *)xen_start_info->pt_base; |
1386 | ||
60223a32 | 1387 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1388 | possible map and a non-dummy shared_info. */ |
60223a32 | 1389 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1390 | |
55d80856 | 1391 | local_irq_disable(); |
2ce802f6 | 1392 | early_boot_irqs_disabled = true; |
55d80856 | 1393 | |
084a2a4e | 1394 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1395 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1396 | |
33a84750 JF |
1397 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1398 | xen_build_mfn_list_list(); | |
1399 | ||
5ead97c8 JF |
1400 | /* keep using Xen gdt for now; no urgent need to change it */ |
1401 | ||
e68266b7 | 1402 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1403 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1404 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1405 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1406 | #else |
1407 | pv_info.kernel_rpl = 0; | |
1408 | #endif | |
5ead97c8 | 1409 | /* set the limit of our address space */ |
fb1d8404 | 1410 | xen_reserve_top(); |
5ead97c8 | 1411 | |
ec35a69c KRW |
1412 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1413 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1414 | * which pokes 0xcf8 port. | |
1415 | */ | |
1416 | set_iopl.iopl = 1; | |
1417 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1418 | if (rc != 0) | |
1419 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1420 | ||
7d087b68 | 1421 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1422 | /* set up basic CPUID stuff */ |
1423 | cpu_detect(&new_cpu_data); | |
1424 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1425 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1426 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1427 | #endif |
5ead97c8 JF |
1428 | |
1429 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1430 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1431 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1432 | ? __pa(xen_start_info->mod_start) : 0; | |
1433 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1434 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1435 | |
6e833587 | 1436 | if (!xen_initial_domain()) { |
83abc70a | 1437 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1438 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1439 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1440 | if (pci_xen) |
1441 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1442 | } else { |
c2419b4a JF |
1443 | const struct dom0_vga_console_info *info = |
1444 | (void *)((char *)xen_start_info + | |
1445 | xen_start_info->console.dom0.info_off); | |
1446 | ||
1447 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1448 | xen_start_info->console.domU.mfn = 0; | |
1449 | xen_start_info->console.domU.evtchn = 0; | |
1450 | ||
31b3c9d7 KRW |
1451 | xen_init_apic(); |
1452 | ||
5d990b62 CW |
1453 | /* Make sure ACS will be enabled */ |
1454 | pci_request_acs(); | |
211063dc KRW |
1455 | |
1456 | xen_acpi_sleep_register(); | |
9e124fe1 | 1457 | } |
76a8df7b DV |
1458 | #ifdef CONFIG_PCI |
1459 | /* PCI BIOS service won't work from a PV guest. */ | |
1460 | pci_probe &= ~PCI_PROBE_BIOS; | |
1461 | #endif | |
084a2a4e JF |
1462 | xen_raw_console_write("about to get started...\n"); |
1463 | ||
499d19b8 JF |
1464 | xen_setup_runstate_info(0); |
1465 | ||
5ead97c8 | 1466 | /* Start the world */ |
f5d36de0 | 1467 | #ifdef CONFIG_X86_32 |
f0d43100 | 1468 | i386_start_kernel(); |
f5d36de0 | 1469 | #else |
084a2a4e | 1470 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1471 | #endif |
5ead97c8 | 1472 | } |
bee6ab53 | 1473 | |
bee6ab53 SY |
1474 | static int init_hvm_pv_info(int *major, int *minor) |
1475 | { | |
1476 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1477 | u64 pfn; | |
1478 | ||
1479 | base = xen_cpuid_base(); | |
1480 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1481 | ||
1482 | *major = eax >> 16; | |
1483 | *minor = eax & 0xffff; | |
1484 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1485 | ||
1486 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1487 | ||
1488 | pfn = __pa(hypercall_page); | |
1489 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1490 | ||
1491 | xen_setup_features(); | |
1492 | ||
cff520b9 | 1493 | pv_info.name = "Xen HVM"; |
bee6ab53 SY |
1494 | |
1495 | xen_domain_type = XEN_HVM_DOMAIN; | |
1496 | ||
1497 | return 0; | |
1498 | } | |
1499 | ||
44b46c3e | 1500 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1501 | { |
016b6f5f | 1502 | int cpu; |
bee6ab53 | 1503 | struct xen_add_to_physmap xatp; |
016b6f5f | 1504 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1505 | |
016b6f5f SS |
1506 | if (!shared_info_page) |
1507 | shared_info_page = (struct shared_info *) | |
1508 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1509 | xatp.domid = DOMID_SELF; |
1510 | xatp.idx = 0; | |
1511 | xatp.space = XENMAPSPACE_shared_info; | |
1512 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1513 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1514 | BUG(); | |
1515 | ||
1516 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1517 | ||
016b6f5f SS |
1518 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1519 | * page, we use it in the event channel upcall and in some pvclock | |
1520 | * related functions. We don't need the vcpu_info placement | |
1521 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
1522 | * HVM. | |
1523 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1524 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1525 | * in that case multiple vcpus might be online. */ | |
1526 | for_each_online_cpu(cpu) { | |
1527 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1528 | } | |
bee6ab53 SY |
1529 | } |
1530 | ||
ca65f9fc | 1531 | #ifdef CONFIG_XEN_PVHVM |
38e20b07 SY |
1532 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1533 | unsigned long action, void *hcpu) | |
1534 | { | |
1535 | int cpu = (long)hcpu; | |
1536 | switch (action) { | |
1537 | case CPU_UP_PREPARE: | |
90d4f553 | 1538 | xen_vcpu_setup(cpu); |
99bbb3a8 SS |
1539 | if (xen_have_vector_callback) |
1540 | xen_init_lock_cpu(cpu); | |
38e20b07 SY |
1541 | break; |
1542 | default: | |
1543 | break; | |
1544 | } | |
1545 | return NOTIFY_OK; | |
1546 | } | |
1547 | ||
ad3062a0 | 1548 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1549 | .notifier_call = xen_hvm_cpu_notify, |
1550 | }; | |
1551 | ||
bee6ab53 SY |
1552 | static void __init xen_hvm_guest_init(void) |
1553 | { | |
1554 | int r; | |
1555 | int major, minor; | |
1556 | ||
1557 | r = init_hvm_pv_info(&major, &minor); | |
1558 | if (r < 0) | |
1559 | return; | |
1560 | ||
016b6f5f | 1561 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1562 | |
1563 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1564 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1565 | xen_hvm_smp_init(); |
38e20b07 | 1566 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1567 | xen_unplug_emulated_devices(); |
38e20b07 | 1568 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1569 | xen_hvm_init_time_ops(); |
59151001 | 1570 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1571 | } |
1572 | ||
1573 | static bool __init xen_hvm_platform(void) | |
1574 | { | |
1575 | if (xen_pv_domain()) | |
1576 | return false; | |
1577 | ||
1578 | if (!xen_cpuid_base()) | |
1579 | return false; | |
1580 | ||
1581 | return true; | |
1582 | } | |
1583 | ||
d9b8ca84 SY |
1584 | bool xen_hvm_need_lapic(void) |
1585 | { | |
1586 | if (xen_pv_domain()) | |
1587 | return false; | |
1588 | if (!xen_hvm_domain()) | |
1589 | return false; | |
1590 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1591 | return false; | |
1592 | return true; | |
1593 | } | |
1594 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1595 | ||
ad3062a0 | 1596 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1597 | .name = "Xen HVM", |
1598 | .detect = xen_hvm_platform, | |
1599 | .init_platform = xen_hvm_guest_init, | |
1600 | }; | |
1601 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1602 | #endif |