Linux 3.9-rc6
[linux-2.6-block.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
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25#include <linux/bootmem.h>
26#include <linux/module.h>
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
5ead97c8 34
1ccbf534 35#include <xen/xen.h>
0ec53ecf 36#include <xen/events.h>
5ead97c8 37#include <xen/interface/xen.h>
ecbf29cd 38#include <xen/interface/version.h>
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39#include <xen/interface/physdev.h>
40#include <xen/interface/vcpu.h>
bee6ab53 41#include <xen/interface/memory.h>
cef12ee5 42#include <xen/interface/xen-mca.h>
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43#include <xen/features.h>
44#include <xen/page.h>
38e20b07 45#include <xen/hvm.h>
084a2a4e 46#include <xen/hvc-console.h>
211063dc 47#include <xen/acpi.h>
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48
49#include <asm/paravirt.h>
7b6aa335 50#include <asm/apic.h>
5ead97c8 51#include <asm/page.h>
b5401a96 52#include <asm/xen/pci.h>
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53#include <asm/xen/hypercall.h>
54#include <asm/xen/hypervisor.h>
55#include <asm/fixmap.h>
56#include <asm/processor.h>
707ebbc8 57#include <asm/proto.h>
1153968a 58#include <asm/msr-index.h>
6cac5a92 59#include <asm/traps.h>
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60#include <asm/setup.h>
61#include <asm/desc.h>
817a824b 62#include <asm/pgalloc.h>
5ead97c8 63#include <asm/pgtable.h>
f87e4cac 64#include <asm/tlbflush.h>
fefa629a 65#include <asm/reboot.h>
577eebea 66#include <asm/stackprotector.h>
bee6ab53 67#include <asm/hypervisor.h>
73c154c6 68#include <asm/mwait.h>
76a8df7b 69#include <asm/pci_x86.h>
c79c4982 70#include <asm/pat.h>
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71
72#ifdef CONFIG_ACPI
73#include <linux/acpi.h>
74#include <asm/acpi.h>
75#include <acpi/pdc_intel.h>
76#include <acpi/processor.h>
77#include <xen/interface/platform.h>
78#endif
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79
80#include "xen-ops.h"
3b827c1b 81#include "mmu.h"
f447d56d 82#include "smp.h"
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83#include "multicalls.h"
84
85EXPORT_SYMBOL_GPL(hypercall_page);
86
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87DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
88DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 89
6e833587
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90enum xen_domain_type xen_domain_type = XEN_NATIVE;
91EXPORT_SYMBOL_GPL(xen_domain_type);
92
7e77506a
IC
93unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
94EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
95unsigned long machine_to_phys_nr;
96EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 97
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98struct start_info *xen_start_info;
99EXPORT_SYMBOL_GPL(xen_start_info);
100
a0d695c8 101struct shared_info xen_dummy_shared_info;
60223a32 102
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103void *xen_initial_gdt;
104
bee6ab53 105RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
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SY
106__read_mostly int xen_have_vector_callback;
107EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 108
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109/*
110 * Point at some empty memory to start with. We map the real shared_info
111 * page as soon as fixmap is up and running.
112 */
4648da7c 113struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
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114
115/*
116 * Flag to determine whether vcpu info placement is available on all
117 * VCPUs. We assume it is to start with, and then set it to zero on
118 * the first failure. This is because it can succeed on some VCPUs
119 * and not others, since it can involve hypervisor memory allocation,
120 * or because the guest failed to guarantee all the appropriate
121 * constraints on all VCPUs (ie buffer can't cross a page boundary).
122 *
123 * Note that any particular CPU may be using a placed vcpu structure,
124 * but we can only optimise if the all are.
125 *
126 * 0: not available, 1: available
127 */
e4d04071 128static int have_vcpu_info_placement = 1;
60223a32 129
1c32cdc6
DV
130struct tls_descs {
131 struct desc_struct desc[3];
132};
133
134/*
135 * Updating the 3 TLS descriptors in the GDT on every task switch is
136 * surprisingly expensive so we avoid updating them if they haven't
137 * changed. Since Xen writes different descriptors than the one
138 * passed in the update_descriptor hypercall we keep shadow copies to
139 * compare against.
140 */
141static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
142
c06ee78d
MR
143static void clamp_max_cpus(void)
144{
145#ifdef CONFIG_SMP
146 if (setup_max_cpus > MAX_VIRT_CPUS)
147 setup_max_cpus = MAX_VIRT_CPUS;
148#endif
149}
150
9c7a7942 151static void xen_vcpu_setup(int cpu)
5ead97c8 152{
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153 struct vcpu_register_vcpu_info info;
154 int err;
155 struct vcpu_info *vcpup;
156
a0d695c8 157 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 158
c06ee78d
MR
159 if (cpu < MAX_VIRT_CPUS)
160 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 161
c06ee78d
MR
162 if (!have_vcpu_info_placement) {
163 if (cpu >= MAX_VIRT_CPUS)
164 clamp_max_cpus();
165 return;
166 }
60223a32 167
c06ee78d 168 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 169 info.mfn = arbitrary_virt_to_mfn(vcpup);
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170 info.offset = offset_in_page(vcpup);
171
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172 /* Check to see if the hypervisor will put the vcpu_info
173 structure where we want it, which allows direct access via
174 a percpu-variable. */
175 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
176
177 if (err) {
178 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
179 have_vcpu_info_placement = 0;
c06ee78d 180 clamp_max_cpus();
60223a32
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181 } else {
182 /* This cpu is using the registered vcpu info, even if
183 later ones fail to. */
184 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 185 }
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186}
187
9c7a7942
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188/*
189 * On restore, set the vcpu placement up again.
190 * If it fails, then we're in a bad state, since
191 * we can't back out from using it...
192 */
193void xen_vcpu_restore(void)
194{
3905bb2a 195 int cpu;
9c7a7942 196
9d328a94 197 for_each_possible_cpu(cpu) {
3905bb2a 198 bool other_cpu = (cpu != smp_processor_id());
9d328a94 199 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL);
9c7a7942 200
9d328a94 201 if (other_cpu && is_up &&
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202 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
203 BUG();
9c7a7942 204
3905bb2a 205 xen_setup_runstate_info(cpu);
9c7a7942 206
3905bb2a 207 if (have_vcpu_info_placement)
9c7a7942 208 xen_vcpu_setup(cpu);
9c7a7942 209
9d328a94 210 if (other_cpu && is_up &&
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211 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
212 BUG();
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213 }
214}
215
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216static void __init xen_banner(void)
217{
95c7c23b
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218 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
219 struct xen_extraversion extra;
220 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
221
5ead97c8 222 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 223 pv_info.name);
95c7c23b
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224 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
225 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 226 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8 227}
394b40f6
KRW
228/* Check if running on Xen version (major, minor) or later */
229bool
230xen_running_on_version_or_later(unsigned int major, unsigned int minor)
231{
232 unsigned int version;
233
234 if (!xen_domain())
235 return false;
236
237 version = HYPERVISOR_xen_version(XENVER_version, NULL);
238 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
239 ((version >> 16) > major))
240 return true;
241 return false;
242}
5ead97c8 243
5e626254
AP
244#define CPUID_THERM_POWER_LEAF 6
245#define APERFMPERF_PRESENT 0
246
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247static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
248static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
249
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250static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
251static __read_mostly unsigned int cpuid_leaf5_ecx_val;
252static __read_mostly unsigned int cpuid_leaf5_edx_val;
253
65ea5b03
PA
254static void xen_cpuid(unsigned int *ax, unsigned int *bx,
255 unsigned int *cx, unsigned int *dx)
5ead97c8 256{
82d64699 257 unsigned maskebx = ~0;
e826fe1b 258 unsigned maskecx = ~0;
5ead97c8 259 unsigned maskedx = ~0;
73c154c6 260 unsigned setecx = 0;
5ead97c8
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261 /*
262 * Mask out inconvenient features, to try and disable as many
263 * unsupported kernel subsystems as possible.
264 */
82d64699
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265 switch (*ax) {
266 case 1:
e826fe1b 267 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 268 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 269 maskedx = cpuid_leaf1_edx_mask;
82d64699
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270 break;
271
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272 case CPUID_MWAIT_LEAF:
273 /* Synthesize the values.. */
274 *ax = 0;
275 *bx = 0;
276 *cx = cpuid_leaf5_ecx_val;
277 *dx = cpuid_leaf5_edx_val;
278 return;
279
5e626254
AP
280 case CPUID_THERM_POWER_LEAF:
281 /* Disabling APERFMPERF for kernel usage */
282 maskecx = ~(1 << APERFMPERF_PRESENT);
283 break;
284
82d64699
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285 case 0xb:
286 /* Suppress extended topology stuff */
287 maskebx = 0;
288 break;
e826fe1b 289 }
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290
291 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
292 : "=a" (*ax),
293 "=b" (*bx),
294 "=c" (*cx),
295 "=d" (*dx)
296 : "0" (*ax), "2" (*cx));
e826fe1b 297
82d64699 298 *bx &= maskebx;
e826fe1b 299 *cx &= maskecx;
73c154c6 300 *cx |= setecx;
65ea5b03 301 *dx &= maskedx;
73c154c6 302
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303}
304
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305static bool __init xen_check_mwait(void)
306{
e3aa4e61 307#ifdef CONFIG_ACPI
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KRW
308 struct xen_platform_op op = {
309 .cmd = XENPF_set_processor_pminfo,
310 .u.set_pminfo.id = -1,
311 .u.set_pminfo.type = XEN_PM_PDC,
312 };
313 uint32_t buf[3];
314 unsigned int ax, bx, cx, dx;
315 unsigned int mwait_mask;
316
317 /* We need to determine whether it is OK to expose the MWAIT
318 * capability to the kernel to harvest deeper than C3 states from ACPI
319 * _CST using the processor_harvest_xen.c module. For this to work, we
320 * need to gather the MWAIT_LEAF values (which the cstate.c code
321 * checks against). The hypervisor won't expose the MWAIT flag because
322 * it would break backwards compatibility; so we will find out directly
323 * from the hardware and hypercall.
324 */
325 if (!xen_initial_domain())
326 return false;
327
e3aa4e61
LJ
328 /*
329 * When running under platform earlier than Xen4.2, do not expose
330 * mwait, to avoid the risk of loading native acpi pad driver
331 */
332 if (!xen_running_on_version_or_later(4, 2))
333 return false;
334
73c154c6
KRW
335 ax = 1;
336 cx = 0;
337
338 native_cpuid(&ax, &bx, &cx, &dx);
339
340 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
341 (1 << (X86_FEATURE_MWAIT % 32));
342
343 if ((cx & mwait_mask) != mwait_mask)
344 return false;
345
346 /* We need to emulate the MWAIT_LEAF and for that we need both
347 * ecx and edx. The hypercall provides only partial information.
348 */
349
350 ax = CPUID_MWAIT_LEAF;
351 bx = 0;
352 cx = 0;
353 dx = 0;
354
355 native_cpuid(&ax, &bx, &cx, &dx);
356
357 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
358 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
359 */
360 buf[0] = ACPI_PDC_REVISION_ID;
361 buf[1] = 1;
362 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
363
364 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
365
366 if ((HYPERVISOR_dom0_op(&op) == 0) &&
367 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
368 cpuid_leaf5_ecx_val = cx;
369 cpuid_leaf5_edx_val = dx;
370 }
371 return true;
372#else
373 return false;
374#endif
375}
ad3062a0 376static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
377{
378 unsigned int ax, bx, cx, dx;
947ccf9c 379 unsigned int xsave_mask;
e826fe1b
JF
380
381 cpuid_leaf1_edx_mask =
cef12ee5 382 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
383 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
384
385 if (!xen_initial_domain())
386 cpuid_leaf1_edx_mask &=
387 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
388 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
947ccf9c 389 ax = 1;
5e287830 390 cx = 0;
947ccf9c 391 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 392
947ccf9c
SH
393 xsave_mask =
394 (1 << (X86_FEATURE_XSAVE % 32)) |
395 (1 << (X86_FEATURE_OSXSAVE % 32));
396
397 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
398 if ((cx & xsave_mask) != xsave_mask)
399 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
400 if (xen_check_mwait())
401 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
402}
403
5ead97c8
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404static void xen_set_debugreg(int reg, unsigned long val)
405{
406 HYPERVISOR_set_debugreg(reg, val);
407}
408
409static unsigned long xen_get_debugreg(int reg)
410{
411 return HYPERVISOR_get_debugreg(reg);
412}
413
224101ed 414static void xen_end_context_switch(struct task_struct *next)
5ead97c8 415{
5ead97c8 416 xen_mc_flush();
224101ed 417 paravirt_end_context_switch(next);
5ead97c8
JF
418}
419
420static unsigned long xen_store_tr(void)
421{
422 return 0;
423}
424
a05d2eba 425/*
cef43bf6
JF
426 * Set the page permissions for a particular virtual address. If the
427 * address is a vmalloc mapping (or other non-linear mapping), then
428 * find the linear mapping of the page and also set its protections to
429 * match.
a05d2eba
JF
430 */
431static void set_aliased_prot(void *v, pgprot_t prot)
432{
433 int level;
434 pte_t *ptep;
435 pte_t pte;
436 unsigned long pfn;
437 struct page *page;
438
439 ptep = lookup_address((unsigned long)v, &level);
440 BUG_ON(ptep == NULL);
441
442 pfn = pte_pfn(*ptep);
443 page = pfn_to_page(pfn);
444
445 pte = pfn_pte(pfn, prot);
446
447 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
448 BUG();
449
450 if (!PageHighMem(page)) {
451 void *av = __va(PFN_PHYS(pfn));
452
453 if (av != v)
454 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
455 BUG();
456 } else
457 kmap_flush_unused();
458}
459
38ffbe66
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460static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
461{
a05d2eba 462 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
463 int i;
464
a05d2eba
JF
465 for(i = 0; i < entries; i += entries_per_page)
466 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
467}
468
469static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
470{
a05d2eba 471 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
472 int i;
473
a05d2eba
JF
474 for(i = 0; i < entries; i += entries_per_page)
475 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
476}
477
5ead97c8
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478static void xen_set_ldt(const void *addr, unsigned entries)
479{
5ead97c8
JF
480 struct mmuext_op *op;
481 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
482
ab78f7ad
JF
483 trace_xen_cpu_set_ldt(addr, entries);
484
5ead97c8
JF
485 op = mcs.args;
486 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 487 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
488 op->arg2.nr_ents = entries;
489
490 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
491
492 xen_mc_issue(PARAVIRT_LAZY_CPU);
493}
494
6b68f01b 495static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 496{
5ead97c8
JF
497 unsigned long va = dtr->address;
498 unsigned int size = dtr->size + 1;
499 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 500 unsigned long frames[pages];
5ead97c8 501 int f;
5ead97c8 502
577eebea
JF
503 /*
504 * A GDT can be up to 64k in size, which corresponds to 8192
505 * 8-byte entries, or 16 4k pages..
506 */
5ead97c8
JF
507
508 BUG_ON(size > 65536);
509 BUG_ON(va & ~PAGE_MASK);
510
5ead97c8 511 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 512 int level;
577eebea 513 pte_t *ptep;
6ed6bf42
JF
514 unsigned long pfn, mfn;
515 void *virt;
516
577eebea
JF
517 /*
518 * The GDT is per-cpu and is in the percpu data area.
519 * That can be virtually mapped, so we need to do a
520 * page-walk to get the underlying MFN for the
521 * hypercall. The page can also be in the kernel's
522 * linear range, so we need to RO that mapping too.
523 */
524 ptep = lookup_address(va, &level);
6ed6bf42
JF
525 BUG_ON(ptep == NULL);
526
527 pfn = pte_pfn(*ptep);
528 mfn = pfn_to_mfn(pfn);
529 virt = __va(PFN_PHYS(pfn));
530
531 frames[f] = mfn;
9976b39b 532
5ead97c8 533 make_lowmem_page_readonly((void *)va);
6ed6bf42 534 make_lowmem_page_readonly(virt);
5ead97c8
JF
535 }
536
3ce5fa7e
JF
537 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
538 BUG();
5ead97c8
JF
539}
540
577eebea
JF
541/*
542 * load_gdt for early boot, when the gdt is only mapped once
543 */
ad3062a0 544static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
545{
546 unsigned long va = dtr->address;
547 unsigned int size = dtr->size + 1;
548 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
549 unsigned long frames[pages];
550 int f;
551
552 /*
553 * A GDT can be up to 64k in size, which corresponds to 8192
554 * 8-byte entries, or 16 4k pages..
555 */
556
557 BUG_ON(size > 65536);
558 BUG_ON(va & ~PAGE_MASK);
559
560 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
561 pte_t pte;
562 unsigned long pfn, mfn;
563
564 pfn = virt_to_pfn(va);
565 mfn = pfn_to_mfn(pfn);
566
567 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
568
569 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
570 BUG();
571
572 frames[f] = mfn;
573 }
574
575 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
576 BUG();
577}
578
59290362
DV
579static inline bool desc_equal(const struct desc_struct *d1,
580 const struct desc_struct *d2)
581{
582 return d1->a == d2->a && d1->b == d2->b;
583}
584
5ead97c8
JF
585static void load_TLS_descriptor(struct thread_struct *t,
586 unsigned int cpu, unsigned int i)
587{
1c32cdc6
DV
588 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
589 struct desc_struct *gdt;
590 xmaddr_t maddr;
591 struct multicall_space mc;
592
593 if (desc_equal(shadow, &t->tls_array[i]))
594 return;
595
596 *shadow = t->tls_array[i];
597
598 gdt = get_cpu_gdt_table(cpu);
599 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
600 mc = __xen_mc_entry(0);
5ead97c8
JF
601
602 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
603}
604
605static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
606{
8b84ad94 607 /*
ccbeed3a
TH
608 * XXX sleazy hack: If we're being called in a lazy-cpu zone
609 * and lazy gs handling is enabled, it means we're in a
610 * context switch, and %gs has just been saved. This means we
611 * can zero it out to prevent faults on exit from the
612 * hypervisor if the next process has no %gs. Either way, it
613 * has been saved, and the new value will get loaded properly.
614 * This will go away as soon as Xen has been modified to not
615 * save/restore %gs for normal hypercalls.
8a95408e
EH
616 *
617 * On x86_64, this hack is not used for %gs, because gs points
618 * to KERNEL_GS_BASE (and uses it for PDA references), so we
619 * must not zero %gs on x86_64
620 *
621 * For x86_64, we need to zero %fs, otherwise we may get an
622 * exception between the new %fs descriptor being loaded and
623 * %fs being effectively cleared at __switch_to().
8b84ad94 624 */
8a95408e
EH
625 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
626#ifdef CONFIG_X86_32
ccbeed3a 627 lazy_load_gs(0);
8a95408e
EH
628#else
629 loadsegment(fs, 0);
630#endif
631 }
632
633 xen_mc_batch();
634
635 load_TLS_descriptor(t, cpu, 0);
636 load_TLS_descriptor(t, cpu, 1);
637 load_TLS_descriptor(t, cpu, 2);
638
639 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
640}
641
a8fc1089
EH
642#ifdef CONFIG_X86_64
643static void xen_load_gs_index(unsigned int idx)
644{
645 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
646 BUG();
5ead97c8 647}
a8fc1089 648#endif
5ead97c8
JF
649
650static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 651 const void *ptr)
5ead97c8 652{
cef43bf6 653 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 654 u64 entry = *(u64 *)ptr;
5ead97c8 655
ab78f7ad
JF
656 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
657
f120f13e
JF
658 preempt_disable();
659
5ead97c8
JF
660 xen_mc_flush();
661 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
662 BUG();
f120f13e
JF
663
664 preempt_enable();
5ead97c8
JF
665}
666
e176d367 667static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
668 struct trap_info *info)
669{
6cac5a92
JF
670 unsigned long addr;
671
6d02c426 672 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
673 return 0;
674
675 info->vector = vector;
6cac5a92
JF
676
677 addr = gate_offset(*val);
678#ifdef CONFIG_X86_64
b80119bb
JF
679 /*
680 * Look for known traps using IST, and substitute them
681 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
682 * about. Xen will handle faults like double_fault,
683 * so we should never see them. Warn if
b80119bb
JF
684 * there's an unexpected IST-using fault handler.
685 */
6cac5a92
JF
686 if (addr == (unsigned long)debug)
687 addr = (unsigned long)xen_debug;
688 else if (addr == (unsigned long)int3)
689 addr = (unsigned long)xen_int3;
690 else if (addr == (unsigned long)stack_segment)
691 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
692 else if (addr == (unsigned long)double_fault ||
693 addr == (unsigned long)nmi) {
694 /* Don't need to handle these */
695 return 0;
696#ifdef CONFIG_X86_MCE
697 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
698 /*
699 * when xen hypervisor inject vMCE to guest,
700 * use native mce handler to handle it
701 */
702 ;
b80119bb
JF
703#endif
704 } else {
705 /* Some other trap using IST? */
706 if (WARN_ON(val->ist != 0))
707 return 0;
708 }
6cac5a92
JF
709#endif /* CONFIG_X86_64 */
710 info->address = addr;
711
e176d367
EH
712 info->cs = gate_segment(*val);
713 info->flags = val->dpl;
5ead97c8 714 /* interrupt gates clear IF */
6d02c426
JF
715 if (val->type == GATE_INTERRUPT)
716 info->flags |= 1 << 2;
5ead97c8
JF
717
718 return 1;
719}
720
721/* Locations of each CPU's IDT */
6b68f01b 722static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
723
724/* Set an IDT entry. If the entry is part of the current IDT, then
725 also update Xen. */
8d947344 726static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 727{
5ead97c8 728 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
729 unsigned long start, end;
730
ab78f7ad
JF
731 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
732
f120f13e
JF
733 preempt_disable();
734
780f36d8
CL
735 start = __this_cpu_read(idt_desc.address);
736 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
737
738 xen_mc_flush();
739
8d947344 740 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
741
742 if (p >= start && (p + 8) <= end) {
743 struct trap_info info[2];
744
745 info[1].address = 0;
746
e176d367 747 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
748 if (HYPERVISOR_set_trap_table(info))
749 BUG();
750 }
f120f13e
JF
751
752 preempt_enable();
5ead97c8
JF
753}
754
6b68f01b 755static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 756 struct trap_info *traps)
5ead97c8 757{
5ead97c8
JF
758 unsigned in, out, count;
759
e176d367 760 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
761 BUG_ON(count > 256);
762
5ead97c8 763 for (in = out = 0; in < count; in++) {
e176d367 764 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 765
e176d367 766 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
767 out++;
768 }
769 traps[out].address = 0;
f87e4cac
JF
770}
771
772void xen_copy_trap_info(struct trap_info *traps)
773{
6b68f01b 774 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
775
776 xen_convert_trap_info(desc, traps);
f87e4cac
JF
777}
778
779/* Load a new IDT into Xen. In principle this can be per-CPU, so we
780 hold a spinlock to protect the static traps[] array (static because
781 it avoids allocation, and saves stack space). */
6b68f01b 782static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
783{
784 static DEFINE_SPINLOCK(lock);
785 static struct trap_info traps[257];
f87e4cac 786
ab78f7ad
JF
787 trace_xen_cpu_load_idt(desc);
788
f87e4cac
JF
789 spin_lock(&lock);
790
f120f13e
JF
791 __get_cpu_var(idt_desc) = *desc;
792
f87e4cac 793 xen_convert_trap_info(desc, traps);
5ead97c8
JF
794
795 xen_mc_flush();
796 if (HYPERVISOR_set_trap_table(traps))
797 BUG();
798
799 spin_unlock(&lock);
800}
801
802/* Write a GDT descriptor entry. Ignore LDT descriptors, since
803 they're handled differently. */
804static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 805 const void *desc, int type)
5ead97c8 806{
ab78f7ad
JF
807 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
808
f120f13e
JF
809 preempt_disable();
810
014b15be
GOC
811 switch (type) {
812 case DESC_LDT:
813 case DESC_TSS:
5ead97c8
JF
814 /* ignore */
815 break;
816
817 default: {
9976b39b 818 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
819
820 xen_mc_flush();
014b15be 821 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
822 BUG();
823 }
824
825 }
f120f13e
JF
826
827 preempt_enable();
5ead97c8
JF
828}
829
577eebea
JF
830/*
831 * Version of write_gdt_entry for use at early boot-time needed to
832 * update an entry as simply as possible.
833 */
ad3062a0 834static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
835 const void *desc, int type)
836{
ab78f7ad
JF
837 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
838
577eebea
JF
839 switch (type) {
840 case DESC_LDT:
841 case DESC_TSS:
842 /* ignore */
843 break;
844
845 default: {
846 xmaddr_t maddr = virt_to_machine(&dt[entry]);
847
848 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
849 dt[entry] = *(struct desc_struct *)desc;
850 }
851
852 }
853}
854
faca6227 855static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 856 struct thread_struct *thread)
5ead97c8 857{
ab78f7ad
JF
858 struct multicall_space mcs;
859
860 mcs = xen_mc_entry(0);
faca6227 861 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
862 xen_mc_issue(PARAVIRT_LAZY_CPU);
863}
864
865static void xen_set_iopl_mask(unsigned mask)
866{
867 struct physdev_set_iopl set_iopl;
868
869 /* Force the change at ring 0. */
870 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
871 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
872}
873
874static void xen_io_delay(void)
875{
876}
877
878#ifdef CONFIG_X86_LOCAL_APIC
558daa28
KRW
879static unsigned long xen_set_apic_id(unsigned int x)
880{
881 WARN_ON(1);
882 return x;
883}
884static unsigned int xen_get_apic_id(unsigned long x)
885{
886 return ((x)>>24) & 0xFFu;
887}
ad66dd34 888static u32 xen_apic_read(u32 reg)
5ead97c8 889{
558daa28
KRW
890 struct xen_platform_op op = {
891 .cmd = XENPF_get_cpuinfo,
892 .interface_version = XENPF_INTERFACE_VERSION,
893 .u.pcpu_info.xen_cpuid = 0,
894 };
895 int ret = 0;
896
897 /* Shouldn't need this as APIC is turned off for PV, and we only
898 * get called on the bootup processor. But just in case. */
899 if (!xen_initial_domain() || smp_processor_id())
900 return 0;
901
902 if (reg == APIC_LVR)
903 return 0x10;
904
905 if (reg != APIC_ID)
906 return 0;
907
908 ret = HYPERVISOR_dom0_op(&op);
909 if (ret)
910 return 0;
911
912 return op.u.pcpu_info.apic_id << 24;
5ead97c8 913}
f87e4cac 914
ad66dd34 915static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
916{
917 /* Warn to see if there's any stray references */
918 WARN_ON(1);
919}
ad66dd34 920
ad66dd34
SS
921static u64 xen_apic_icr_read(void)
922{
923 return 0;
924}
925
926static void xen_apic_icr_write(u32 low, u32 id)
927{
928 /* Warn to see if there's any stray references */
929 WARN_ON(1);
930}
931
932static void xen_apic_wait_icr_idle(void)
933{
934 return;
935}
936
94a8c3c2
YL
937static u32 xen_safe_apic_wait_icr_idle(void)
938{
939 return 0;
940}
941
c1eeb2de
YL
942static void set_xen_basic_apic_ops(void)
943{
944 apic->read = xen_apic_read;
945 apic->write = xen_apic_write;
946 apic->icr_read = xen_apic_icr_read;
947 apic->icr_write = xen_apic_icr_write;
948 apic->wait_icr_idle = xen_apic_wait_icr_idle;
949 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
558daa28
KRW
950 apic->set_apic_id = xen_set_apic_id;
951 apic->get_apic_id = xen_get_apic_id;
f447d56d
BG
952
953#ifdef CONFIG_SMP
954 apic->send_IPI_allbutself = xen_send_IPI_allbutself;
955 apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;
956 apic->send_IPI_mask = xen_send_IPI_mask;
957 apic->send_IPI_all = xen_send_IPI_all;
958 apic->send_IPI_self = xen_send_IPI_self;
959#endif
c1eeb2de 960}
ad66dd34 961
5ead97c8
JF
962#endif
963
7b1333aa
JF
964static void xen_clts(void)
965{
966 struct multicall_space mcs;
967
968 mcs = xen_mc_entry(0);
969
970 MULTI_fpu_taskswitch(mcs.mc, 0);
971
972 xen_mc_issue(PARAVIRT_LAZY_CPU);
973}
974
a789ed5f
JF
975static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
976
977static unsigned long xen_read_cr0(void)
978{
2113f469 979 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
980
981 if (unlikely(cr0 == 0)) {
982 cr0 = native_read_cr0();
2113f469 983 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
984 }
985
986 return cr0;
987}
988
7b1333aa
JF
989static void xen_write_cr0(unsigned long cr0)
990{
991 struct multicall_space mcs;
992
2113f469 993 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 994
7b1333aa
JF
995 /* Only pay attention to cr0.TS; everything else is
996 ignored. */
997 mcs = xen_mc_entry(0);
998
999 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1000
1001 xen_mc_issue(PARAVIRT_LAZY_CPU);
1002}
1003
5ead97c8
JF
1004static void xen_write_cr4(unsigned long cr4)
1005{
2956a351
JF
1006 cr4 &= ~X86_CR4_PGE;
1007 cr4 &= ~X86_CR4_PSE;
1008
1009 native_write_cr4(cr4);
5ead97c8 1010}
1a7bbda5
KRW
1011#ifdef CONFIG_X86_64
1012static inline unsigned long xen_read_cr8(void)
1013{
1014 return 0;
1015}
1016static inline void xen_write_cr8(unsigned long val)
1017{
1018 BUG_ON(val);
1019}
1020#endif
1153968a
JF
1021static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1022{
1023 int ret;
1024
1025 ret = 0;
1026
f63c2f24 1027 switch (msr) {
1153968a
JF
1028#ifdef CONFIG_X86_64
1029 unsigned which;
1030 u64 base;
1031
1032 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1033 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1034 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1035
1036 set:
1037 base = ((u64)high << 32) | low;
1038 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 1039 ret = -EIO;
1153968a
JF
1040 break;
1041#endif
d89961e2
JF
1042
1043 case MSR_STAR:
1044 case MSR_CSTAR:
1045 case MSR_LSTAR:
1046 case MSR_SYSCALL_MASK:
1047 case MSR_IA32_SYSENTER_CS:
1048 case MSR_IA32_SYSENTER_ESP:
1049 case MSR_IA32_SYSENTER_EIP:
1050 /* Fast syscall setup is all done in hypercalls, so
1051 these are all ignored. Stub them out here to stop
1052 Xen console noise. */
1053 break;
1054
41f2e477
JF
1055 case MSR_IA32_CR_PAT:
1056 if (smp_processor_id() == 0)
1057 xen_set_pat(((u64)high << 32) | low);
1058 break;
1059
1153968a
JF
1060 default:
1061 ret = native_write_msr_safe(msr, low, high);
1062 }
1063
1064 return ret;
1065}
1066
0e91398f 1067void xen_setup_shared_info(void)
5ead97c8
JF
1068{
1069 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1070 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1071 xen_start_info->shared_info);
1072
1073 HYPERVISOR_shared_info =
1074 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1075 } else
1076 HYPERVISOR_shared_info =
1077 (struct shared_info *)__va(xen_start_info->shared_info);
1078
2e8fe719
JF
1079#ifndef CONFIG_SMP
1080 /* In UP this is as good a place as any to set up shared info */
1081 xen_setup_vcpu_info_placement();
1082#endif
d5edbc1f
JF
1083
1084 xen_setup_mfn_list_list();
2e8fe719
JF
1085}
1086
5f054e31 1087/* This is called once we have the cpu_possible_mask */
0e91398f 1088void xen_setup_vcpu_info_placement(void)
60223a32
JF
1089{
1090 int cpu;
1091
1092 for_each_possible_cpu(cpu)
1093 xen_vcpu_setup(cpu);
1094
1095 /* xen_vcpu_setup managed to place the vcpu_info within the
1096 percpu area for all cpus, so make use of it */
1097 if (have_vcpu_info_placement) {
ecb93d1c
JF
1098 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1099 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1100 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1101 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1102 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1103 }
5ead97c8
JF
1104}
1105
ab144f5e
AK
1106static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1107 unsigned long addr, unsigned len)
6487673b
JF
1108{
1109 char *start, *end, *reloc;
1110 unsigned ret;
1111
1112 start = end = reloc = NULL;
1113
93b1eab3
JF
1114#define SITE(op, x) \
1115 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1116 if (have_vcpu_info_placement) { \
1117 start = (char *)xen_##x##_direct; \
1118 end = xen_##x##_direct_end; \
1119 reloc = xen_##x##_direct_reloc; \
1120 } \
1121 goto patch_site
1122
1123 switch (type) {
93b1eab3
JF
1124 SITE(pv_irq_ops, irq_enable);
1125 SITE(pv_irq_ops, irq_disable);
1126 SITE(pv_irq_ops, save_fl);
1127 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1128#undef SITE
1129
1130 patch_site:
1131 if (start == NULL || (end-start) > len)
1132 goto default_patch;
1133
ab144f5e 1134 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1135
1136 /* Note: because reloc is assigned from something that
1137 appears to be an array, gcc assumes it's non-null,
1138 but doesn't know its relationship with start and
1139 end. */
1140 if (reloc > start && reloc < end) {
1141 int reloc_off = reloc - start;
ab144f5e
AK
1142 long *relocp = (long *)(insnbuf + reloc_off);
1143 long delta = start - (char *)addr;
6487673b
JF
1144
1145 *relocp += delta;
1146 }
1147 break;
1148
1149 default_patch:
1150 default:
ab144f5e
AK
1151 ret = paravirt_patch_default(type, clobbers, insnbuf,
1152 addr, len);
6487673b
JF
1153 break;
1154 }
1155
1156 return ret;
1157}
1158
ad3062a0 1159static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1160 .paravirt_enabled = 1,
1161 .shared_kernel_pmd = 0,
1162
318f5a2a
AL
1163#ifdef CONFIG_X86_64
1164 .extra_user_64bit_cs = FLAT_USER_CS64,
1165#endif
1166
5ead97c8 1167 .name = "Xen",
93b1eab3 1168};
5ead97c8 1169
ad3062a0 1170static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1171 .patch = xen_patch,
93b1eab3 1172};
5ead97c8 1173
ad3062a0 1174static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1175 .cpuid = xen_cpuid,
1176
1177 .set_debugreg = xen_set_debugreg,
1178 .get_debugreg = xen_get_debugreg,
1179
7b1333aa 1180 .clts = xen_clts,
5ead97c8 1181
a789ed5f 1182 .read_cr0 = xen_read_cr0,
7b1333aa 1183 .write_cr0 = xen_write_cr0,
5ead97c8 1184
5ead97c8
JF
1185 .read_cr4 = native_read_cr4,
1186 .read_cr4_safe = native_read_cr4_safe,
1187 .write_cr4 = xen_write_cr4,
1188
1a7bbda5
KRW
1189#ifdef CONFIG_X86_64
1190 .read_cr8 = xen_read_cr8,
1191 .write_cr8 = xen_write_cr8,
1192#endif
1193
5ead97c8
JF
1194 .wbinvd = native_wbinvd,
1195
1196 .read_msr = native_read_msr_safe,
1153968a 1197 .write_msr = xen_write_msr_safe,
1ab46fd3 1198
5ead97c8
JF
1199 .read_tsc = native_read_tsc,
1200 .read_pmc = native_read_pmc,
1201
cd0608e7
KRW
1202 .read_tscp = native_read_tscp,
1203
81e103f1 1204 .iret = xen_iret,
d75cd22f 1205 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1206#ifdef CONFIG_X86_64
1207 .usergs_sysret32 = xen_sysret32,
1208 .usergs_sysret64 = xen_sysret64,
1209#endif
5ead97c8
JF
1210
1211 .load_tr_desc = paravirt_nop,
1212 .set_ldt = xen_set_ldt,
1213 .load_gdt = xen_load_gdt,
1214 .load_idt = xen_load_idt,
1215 .load_tls = xen_load_tls,
a8fc1089
EH
1216#ifdef CONFIG_X86_64
1217 .load_gs_index = xen_load_gs_index,
1218#endif
5ead97c8 1219
38ffbe66
JF
1220 .alloc_ldt = xen_alloc_ldt,
1221 .free_ldt = xen_free_ldt,
1222
5ead97c8
JF
1223 .store_gdt = native_store_gdt,
1224 .store_idt = native_store_idt,
1225 .store_tr = xen_store_tr,
1226
1227 .write_ldt_entry = xen_write_ldt_entry,
1228 .write_gdt_entry = xen_write_gdt_entry,
1229 .write_idt_entry = xen_write_idt_entry,
faca6227 1230 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1231
1232 .set_iopl_mask = xen_set_iopl_mask,
1233 .io_delay = xen_io_delay,
1234
952d1d70
JF
1235 /* Xen takes care of %gs when switching to usermode for us */
1236 .swapgs = paravirt_nop,
1237
224101ed
JF
1238 .start_context_switch = paravirt_start_context_switch,
1239 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1240};
1241
ad3062a0 1242static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1243#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1244 .startup_ipi_hook = paravirt_nop,
1245#endif
93b1eab3
JF
1246};
1247
fefa629a
JF
1248static void xen_reboot(int reason)
1249{
349c709f
JF
1250 struct sched_shutdown r = { .reason = reason };
1251
349c709f 1252 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1253 BUG();
1254}
1255
1256static void xen_restart(char *msg)
1257{
1258 xen_reboot(SHUTDOWN_reboot);
1259}
1260
1261static void xen_emergency_restart(void)
1262{
1263 xen_reboot(SHUTDOWN_reboot);
1264}
1265
1266static void xen_machine_halt(void)
1267{
1268 xen_reboot(SHUTDOWN_poweroff);
1269}
1270
b2abe506
TG
1271static void xen_machine_power_off(void)
1272{
1273 if (pm_power_off)
1274 pm_power_off();
1275 xen_reboot(SHUTDOWN_poweroff);
1276}
1277
fefa629a
JF
1278static void xen_crash_shutdown(struct pt_regs *regs)
1279{
1280 xen_reboot(SHUTDOWN_crash);
1281}
1282
f09f6d19
DD
1283static int
1284xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1285{
086748e5 1286 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1287 return NOTIFY_DONE;
1288}
1289
1290static struct notifier_block xen_panic_block = {
1291 .notifier_call= xen_panic_event,
1292};
1293
1294int xen_panic_handler_init(void)
1295{
1296 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1297 return 0;
1298}
1299
ad3062a0 1300static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1301 .restart = xen_restart,
1302 .halt = xen_machine_halt,
b2abe506 1303 .power_off = xen_machine_power_off,
fefa629a
JF
1304 .shutdown = xen_machine_halt,
1305 .crash_shutdown = xen_crash_shutdown,
1306 .emergency_restart = xen_emergency_restart,
1307};
1308
577eebea
JF
1309/*
1310 * Set up the GDT and segment registers for -fstack-protector. Until
1311 * we do this, we have to be careful not to call any stack-protected
1312 * function, which is most of the kernel.
1313 */
1314static void __init xen_setup_stackprotector(void)
1315{
1316 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1317 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1318
1319 setup_stack_canary_segment(0);
1320 switch_to_new_gdt(0);
1321
1322 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1323 pv_cpu_ops.load_gdt = xen_load_gdt;
1324}
1325
5ead97c8
JF
1326/* First C function to be called on Xen boot */
1327asmlinkage void __init xen_start_kernel(void)
1328{
ec35a69c
KRW
1329 struct physdev_set_iopl set_iopl;
1330 int rc;
5ead97c8
JF
1331
1332 if (!xen_start_info)
1333 return;
1334
6e833587
JF
1335 xen_domain_type = XEN_PV_DOMAIN;
1336
7e77506a
IC
1337 xen_setup_machphys_mapping();
1338
5ead97c8 1339 /* Install Xen paravirt ops */
93b1eab3
JF
1340 pv_info = xen_info;
1341 pv_init_ops = xen_init_ops;
93b1eab3 1342 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1343 pv_apic_ops = xen_apic_ops;
93b1eab3 1344
6b18ae3e 1345 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1346 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1347 x86_init.oem.banner = xen_banner;
845b3944 1348
409771d2 1349 xen_init_time_ops();
93b1eab3 1350
ce2eef33 1351 /*
577eebea 1352 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1353 */
577eebea 1354
973df35e
JF
1355 xen_init_mmu_ops();
1356
577eebea
JF
1357 /* Prevent unwanted bits from being set in PTEs. */
1358 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1359#if 0
577eebea 1360 if (!xen_initial_domain())
8eaffa67 1361#endif
577eebea
JF
1362 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1363
1364 __supported_pte_mask |= _PAGE_IOMAP;
1365
817a824b
IC
1366 /*
1367 * Prevent page tables from being allocated in highmem, even
1368 * if CONFIG_HIGHPTE is enabled.
1369 */
1370 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1371
b75fe4e5 1372 /* Work out if we support NX */
4763ed4d 1373 x86_configure_nx();
b75fe4e5 1374
577eebea
JF
1375 xen_setup_features();
1376
1377 /* Get mfn list */
1378 if (!xen_feature(XENFEAT_auto_translated_physmap))
1379 xen_build_dynamic_phys_to_machine();
1380
1381 /*
1382 * Set up kernel GDT and segment registers, mainly so that
1383 * -fstack-protector code can be executed.
1384 */
1385 xen_setup_stackprotector();
0d1edf46 1386
ce2eef33 1387 xen_init_irq_ops();
e826fe1b
JF
1388 xen_init_cpuid_mask();
1389
94a8c3c2 1390#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1391 /*
94a8c3c2 1392 * set up the basic apic ops.
ad66dd34 1393 */
c1eeb2de 1394 set_xen_basic_apic_ops();
ad66dd34 1395#endif
93b1eab3 1396
e57778a1
JF
1397 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1398 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1399 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1400 }
1401
fefa629a
JF
1402 machine_ops = xen_machine_ops;
1403
38341432
JF
1404 /*
1405 * The only reliable way to retain the initial address of the
1406 * percpu gdt_page is to remember it here, so we can go and
1407 * mark it RW later, when the initial percpu area is freed.
1408 */
1409 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1410
a9e7062d 1411 xen_smp_init();
5ead97c8 1412
c1f5db1a
IC
1413#ifdef CONFIG_ACPI_NUMA
1414 /*
1415 * The pages we from Xen are not related to machine pages, so
1416 * any NUMA information the kernel tries to get from ACPI will
1417 * be meaningless. Prevent it from trying.
1418 */
1419 acpi_numa = -1;
1420#endif
c79c4982
KRW
1421#ifdef CONFIG_X86_PAT
1422 /*
1423 * For right now disable the PAT. We should remove this once
1424 * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1
1425 * (xen/pat: Disable PAT support for now) is reverted.
1426 */
1427 pat_enabled = 0;
1428#endif
60223a32 1429 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1430 possible map and a non-dummy shared_info. */
60223a32 1431 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1432
55d80856 1433 local_irq_disable();
2ce802f6 1434 early_boot_irqs_disabled = true;
55d80856 1435
084a2a4e 1436 xen_raw_console_write("mapping kernel into physical memory\n");
3699aad0 1437 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages);
5ead97c8 1438
33a84750
JF
1439 /* Allocate and initialize top and mid mfn levels for p2m structure */
1440 xen_build_mfn_list_list();
1441
5ead97c8
JF
1442 /* keep using Xen gdt for now; no urgent need to change it */
1443
e68266b7 1444#ifdef CONFIG_X86_32
93b1eab3 1445 pv_info.kernel_rpl = 1;
5ead97c8 1446 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1447 pv_info.kernel_rpl = 0;
e68266b7
IC
1448#else
1449 pv_info.kernel_rpl = 0;
1450#endif
5ead97c8 1451 /* set the limit of our address space */
fb1d8404 1452 xen_reserve_top();
5ead97c8 1453
ec35a69c
KRW
1454 /* We used to do this in xen_arch_setup, but that is too late on AMD
1455 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1456 * which pokes 0xcf8 port.
1457 */
1458 set_iopl.iopl = 1;
1459 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1460 if (rc != 0)
1461 xen_raw_printk("physdev_op failed %d\n", rc);
1462
7d087b68 1463#ifdef CONFIG_X86_32
5ead97c8
JF
1464 /* set up basic CPUID stuff */
1465 cpu_detect(&new_cpu_data);
1466 new_cpu_data.hard_math = 1;
d560bc61 1467 new_cpu_data.wp_works_ok = 1;
5ead97c8 1468 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1469#endif
5ead97c8
JF
1470
1471 /* Poke various useful things into boot_params */
30c82645
PA
1472 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1473 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1474 ? __pa(xen_start_info->mod_start) : 0;
1475 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1476 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1477
6e833587 1478 if (!xen_initial_domain()) {
83abc70a 1479 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1480 add_preferred_console("tty", 0, NULL);
b8c2d3df 1481 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1482 if (pci_xen)
1483 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1484 } else {
c2419b4a
JF
1485 const struct dom0_vga_console_info *info =
1486 (void *)((char *)xen_start_info +
1487 xen_start_info->console.dom0.info_off);
ffb8b233
KRW
1488 struct xen_platform_op op = {
1489 .cmd = XENPF_firmware_info,
1490 .interface_version = XENPF_INTERFACE_VERSION,
1491 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1492 };
c2419b4a
JF
1493
1494 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1495 xen_start_info->console.domU.mfn = 0;
1496 xen_start_info->console.domU.evtchn = 0;
1497
ffb8b233
KRW
1498 if (HYPERVISOR_dom0_op(&op) == 0)
1499 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1500
31b3c9d7
KRW
1501 xen_init_apic();
1502
5d990b62
CW
1503 /* Make sure ACS will be enabled */
1504 pci_request_acs();
211063dc
KRW
1505
1506 xen_acpi_sleep_register();
bd49940a
KRW
1507
1508 /* Avoid searching for BIOS MP tables */
1509 x86_init.mpparse.find_smp_config = x86_init_noop;
1510 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
9e124fe1 1511 }
76a8df7b
DV
1512#ifdef CONFIG_PCI
1513 /* PCI BIOS service won't work from a PV guest. */
1514 pci_probe &= ~PCI_PROBE_BIOS;
1515#endif
084a2a4e
JF
1516 xen_raw_console_write("about to get started...\n");
1517
499d19b8
JF
1518 xen_setup_runstate_info(0);
1519
5ead97c8 1520 /* Start the world */
f5d36de0 1521#ifdef CONFIG_X86_32
f0d43100 1522 i386_start_kernel();
f5d36de0 1523#else
084a2a4e 1524 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1525#endif
5ead97c8 1526}
bee6ab53 1527
e9daff24 1528void __ref xen_hvm_init_shared_info(void)
bee6ab53 1529{
e9daff24 1530 int cpu;
bee6ab53 1531 struct xen_add_to_physmap xatp;
e9daff24 1532 static struct shared_info *shared_info_page = 0;
bee6ab53 1533
e9daff24
KRW
1534 if (!shared_info_page)
1535 shared_info_page = (struct shared_info *)
1536 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1537 xatp.domid = DOMID_SELF;
1538 xatp.idx = 0;
1539 xatp.space = XENMAPSPACE_shared_info;
e9daff24 1540 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
bee6ab53
SY
1541 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1542 BUG();
1543
e9daff24 1544 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
bee6ab53 1545
016b6f5f
SS
1546 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1547 * page, we use it in the event channel upcall and in some pvclock
1548 * related functions. We don't need the vcpu_info placement
1549 * optimizations because we don't use any pv_mmu or pv_irq op on
e9daff24
KRW
1550 * HVM.
1551 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1552 * online but xen_hvm_init_shared_info is run at resume time too and
1553 * in that case multiple vcpus might be online. */
1554 for_each_online_cpu(cpu) {
016b6f5f
SS
1555 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1556 }
bee6ab53
SY
1557}
1558
e9daff24 1559#ifdef CONFIG_XEN_PVHVM
4ff2d062
OH
1560static void __init init_hvm_pv_info(void)
1561{
e9daff24 1562 int major, minor;
5eb65be2 1563 uint32_t eax, ebx, ecx, edx, pages, msr, base;
4ff2d062
OH
1564 u64 pfn;
1565
1566 base = xen_cpuid_base();
e9daff24
KRW
1567 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1568
1569 major = eax >> 16;
1570 minor = eax & 0xffff;
1571 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1572
4ff2d062
OH
1573 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1574
1575 pfn = __pa(hypercall_page);
1576 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1577
1578 xen_setup_features();
1579
1580 pv_info.name = "Xen HVM";
1581
1582 xen_domain_type = XEN_HVM_DOMAIN;
1583}
1584
38e20b07
SY
1585static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1586 unsigned long action, void *hcpu)
1587{
1588 int cpu = (long)hcpu;
1589 switch (action) {
1590 case CPU_UP_PREPARE:
90d4f553 1591 xen_vcpu_setup(cpu);
99bbb3a8
SS
1592 if (xen_have_vector_callback)
1593 xen_init_lock_cpu(cpu);
38e20b07
SY
1594 break;
1595 default:
1596 break;
1597 }
1598 return NOTIFY_OK;
1599}
1600
ad3062a0 1601static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
38e20b07
SY
1602 .notifier_call = xen_hvm_cpu_notify,
1603};
1604
bee6ab53
SY
1605static void __init xen_hvm_guest_init(void)
1606{
4ff2d062 1607 init_hvm_pv_info();
bee6ab53 1608
016b6f5f 1609 xen_hvm_init_shared_info();
38e20b07
SY
1610
1611 if (xen_feature(XENFEAT_hvm_callback_vector))
1612 xen_have_vector_callback = 1;
99bbb3a8 1613 xen_hvm_smp_init();
38e20b07 1614 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1615 xen_unplug_emulated_devices();
38e20b07 1616 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1617 xen_hvm_init_time_ops();
59151001 1618 xen_hvm_init_mmu_ops();
bee6ab53
SY
1619}
1620
1621static bool __init xen_hvm_platform(void)
1622{
1623 if (xen_pv_domain())
1624 return false;
1625
e9daff24 1626 if (!xen_cpuid_base())
bee6ab53
SY
1627 return false;
1628
1629 return true;
1630}
1631
d9b8ca84
SY
1632bool xen_hvm_need_lapic(void)
1633{
1634 if (xen_pv_domain())
1635 return false;
1636 if (!xen_hvm_domain())
1637 return false;
1638 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1639 return false;
1640 return true;
1641}
1642EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1643
ad3062a0 1644const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1645 .name = "Xen HVM",
1646 .detect = xen_hvm_platform,
1647 .init_platform = xen_hvm_guest_init,
4cca6ea0 1648 .x2apic_available = xen_x2apic_para_available,
bee6ab53
SY
1649};
1650EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1651#endif